KR20120065603A - Semiconductor light emitting device, manufacturing method of the same and light emitting apparataus - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, a method for manufacturing a semiconductor light emitting device, and a light emitting device, wherein an aspect of the present invention is a substrate having at least one first through hole, and a first conductive semiconductor layer formed on the substrate. And a first layer formed on a part of a lower surface of the active layer formed on the first conductive semiconductor layer, the second conductive semiconductor layer formed on the active layer, and the first conductive semiconductor layer exposed by the through hole. And a portion of the lower surface of the first conductive semiconductor layer exposed by the through hole, wherein at least a portion of the first conductive semiconductor layer and the active layer are removed to form the second conductive semiconductor layer. A semiconductor light emitting device includes a second through hole formed to be exposed and a second electrode formed on a bottom surface of the second conductive semiconductor layer exposed by the second through hole.
According to an embodiment of the present invention, a semiconductor light emitting device having improved processability and improved crystal quality and light extraction efficiency may be obtained using a substrate that is excellent in workability and suitable for obtaining a large number of devices at a large area at one time.

Description

Semiconductor light emitting device, method and method for manufacturing light emitting device {Semiconductor light emitting device, manufacturing method of the same and light emitting apparataus}

The present invention relates to a semiconductor light emitting device, a method for manufacturing a semiconductor light emitting device, and a light emitting device.

A light emitting diode (LED), which is a kind of semiconductor light emitting device, is a semiconductor device capable of generating light of various colors based on recombination of electrons and holes at junctions of p and n type semiconductors when current is applied thereto. Such semiconductor light emitting devices have a number of advantages, such as long lifespan, low power supply, excellent initial driving characteristics, high vibration resistance, etc., compared to filament based light emitting devices. In particular, in recent years, group III nitride semiconductors capable of emitting light in a blue series short wavelength region have been in the spotlight.

The light emitting device using the group III nitride semiconductor is obtained by growing a light emitting structure having an n-type and p-type nitride semiconductor layer and an active layer formed therebetween on the substrate, in this case, a sapphire substrate as a substrate for growth of the nitride semiconductor This is commonly used. The sapphire substrate has a hexagonal laminar structure that is relatively easy to grow a nitride thin film, and has the advantage of being stable at high temperatures.

However, sapphire (α-Al ₂ O ₃₎ For the substrate, the hardness is high, processability is inferior. In addition, a sapphire substrate is relatively expensive, and in the case of a practically used substrate, since the area is relatively small, there is a limit in manufacturing a large number of devices at one time. Specifically, in order to replace an existing light source such as a fluorescent lamp, the efficiency related to the manufacturing cost needs to be greatly improved. For this purpose, a large diameter of the substrate may be considered. Sapphire substrates commonly used at present are relatively small in size (mainly 2 " and 3 "), so there is a problem in that mass production is low. In order to solve this problem, a method of replacing a sapphire substrate with another wafer having a low cost and large diameter such as a silicon (Si) substrate has been studied.

An object of the present invention is to provide a semiconductor light emitting device having excellent workability and improved crystal quality and light extraction efficiency by using a substrate suitable for obtaining a large number of devices at a large area at a time.

Another object of the present invention is to provide a method for efficiently manufacturing a semiconductor light emitting device having the above structure.

Further, another object of the present invention is to provide a light emitting device using a semiconductor light emitting device having the above structure.

In order to solve the above problems, an aspect of the present invention,

A substrate having at least one first through hole, a first conductive semiconductor layer formed on the substrate, an active layer formed on the first conductive semiconductor layer, and a second conductive semiconductor layer formed on the active layer And a first electrode formed on a portion of a lower surface of the first conductive semiconductor layer exposed by the through hole, and another portion of a lower surface of the first conductive semiconductor layer exposed by the through hole. At least a portion of the first conductive semiconductor layer and the active layer is removed to expose the second conductive semiconductor layer and a bottom surface of the second conductive semiconductor layer exposed by the second through hole. It provides a semiconductor light emitting device comprising a second electrode formed on.

In one embodiment of the present invention, irregularities may be formed on the side of the substrate.

In one embodiment of the present invention, irregularities may be formed on at least a portion of the lower surface of the first conductive semiconductor layer exposed by the through hole.

In this case, the first electrode may be formed to have a shape corresponding to the unevenness.

In one embodiment of the present invention, the substrate may be a silicon (Si) substrate.

In one embodiment of the present invention, the upper surface of the second conductivity-type semiconductor layer may be uneven.

In an embodiment of the present invention, the semiconductor device may further include a buffer unit formed in at least a portion of the region between the substrate and the first conductive semiconductor layer.

In this case, the buffer unit may include a nucleation layer formed on the substrate and a stress compensation layer formed on the nucleation layer and having a larger lattice constant than the nucleation layer.

In this case, the nucleation layer is made of an Al-containing nitride semiconductor, and the stress compensation layer may be made of a nitride semiconductor having a lower Al content or no Al than the nucleation layer.

In addition, the nucleation layer may include a first nitride semiconductor layer formed on the substrate and a second nitride semiconductor layer made of a material having a lattice constant greater than that of the first nitride semiconductor layer and having a smaller lattice constant than the stress compensation layer. In this case, the first nitride semiconductor layer is made of AlN, the second nitride semiconductor layer is made of Al _x Ga _(1-x) N (0 <x <1), the stress compensation layer is GaN Can be made.

The second nitride semiconductor layer may have a higher Al content than a region close to the stress compensation layer in a region close to the first nitride semiconductor layer.

In addition, the stress compensation layer may be made of undoped GaN.

In addition, the buffer unit may further include a porous mask layer disposed between the nucleation layer and the stress compensation layer.

In contrast, the stress compensation layer is divided into upper and lower layers in a thickness direction, and the buffer unit may further include a porous mask layer disposed between the upper and lower layers.

In this case, the porous mask layer may be made of silicon nitride.

In addition, the buffer part may further include an intermediate layer made of a material different from the stress compensation layer on the stress compensation layer, in this case, the stress compensation layer is made of GaN, the intermediate layer is Al _x Ga _{(1- x)} N (0 <x≤1).

In addition, the buffer part is formed on the intermediate layer, and may further include an additional nitride layer made of a material different from the intermediate layer, in this case, the additional nitride layer may be made of GaN.

In one embodiment of the present invention, the first electrode has a ring shape, and when viewed from the bottom of the first conductivity type semiconductor layer, the first electrode may be formed to surround the second electrode.

In one embodiment of the present invention, the second electrode may be formed to fill the second through hole.

In one embodiment of the present invention, the semiconductor substrate may further include a reflector formed in at least a portion of the region between the substrate and the first conductivity-type semiconductor layer.

In this case, the reflector may have a DBR structure.

In one embodiment of the present invention, the substrate has a plurality of through holes, the first electrode may be formed along the surface of the substrate.

On the other hand, another aspect of the present invention,

Sequentially growing a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer on a substrate to form a light emitting structure, and forming a first through hole in the substrate to form a bottom surface of the first conductive semiconductor layer. Exposing at least a portion of the second conductive semiconductor layer by partially removing the first conductive semiconductor layer and the active layer from a lower surface of the first conductive semiconductor layer exposed by the first through hole. Forming a second through hole to expose, forming a first electrode on a lower surface of the first conductive semiconductor layer exposed by the first through hole, and forming the first electrode exposed by the second through hole It provides a method for manufacturing a semiconductor light emitting device comprising the step of forming a second electrode on the lower surface of the two conductive semiconductor layer.

In an embodiment of the present disclosure, the method may further include forming a buffer unit on the substrate before forming the light emitting structure.

In this case, exposing the bottom surface of the first conductivity type semiconductor layer may include forming a through hole in the buffer unit.

In an embodiment of the present disclosure, the method may further include forming a reflector on the substrate before forming the light emitting structure.

In this case, exposing the bottom surface of the first conductivity type semiconductor layer may include forming a through hole in the reflecting portion.

In addition, the forming of the reflector may be performed so that the reflector is located only in a region around the through hole.

On the other hand, another aspect of the present invention,

A first substrate having a first protrusion and a second protrusion formed on an upper surface thereof, a module substrate having first and second terminal patterns and at least one first through hole, a first conductive semiconductor layer formed on the substrate; An active layer formed on the first conductive semiconductor layer, a second conductive semiconductor layer formed on the active layer, a first electrode formed on a portion of a lower surface of the first conductive semiconductor layer exposed by the through hole; And a portion of a lower surface of the first conductive semiconductor layer exposed by the through hole, and at least a portion of the first conductive semiconductor layer and the active layer are removed to expose the second conductive semiconductor layer. And a second light emitting device including a second through hole formed therein and a second electrode formed on a bottom surface of the second conductive semiconductor layer exposed by the second through hole, wherein the semiconductor light emitting device includes an upper portion. The light emitting device is disposed on the module substrate such that the first and second through holes are coupled to the first and second protrusions, respectively.

In one embodiment of the present invention, the first and second terminal patterns may be formed in the first and second protrusions, respectively.

In this case, the module substrate may further include first and second wiring structures respectively connected to the first and second terminal patterns and respectively formed in the first and second protrusions.

In addition, the module substrate may further include first and second wiring structures connected to the first and second terminal patterns, respectively, and formed along surfaces of the first and second protrusions, respectively.

In one embodiment of the present invention, at least one of the first and second protrusions may have a side inclined with respect to the upper surface of the module substrate so that the area is reduced toward the top.

In one embodiment of the present invention, the first protrusion has a ring shape, and when viewed from the top of the module substrate, the first protrusion may be formed to surround the second protrusion.

According to an embodiment of the present invention, a semiconductor light emitting device having improved processability and improved crystal quality and light extraction efficiency may be obtained using a substrate that is excellent in workability and suitable for obtaining a large number of devices at a large area at one time.

In addition, according to another embodiment of the present invention, it is possible to obtain a method for efficiently manufacturing a semiconductor light emitting device having the above structure.

In addition, according to another embodiment of the present invention, it is possible to obtain a light emitting device using a semiconductor light emitting device having the above structure.

1 is a cross-sectional view schematically showing a semiconductor light emitting device according to an embodiment of the present invention.
2 is a schematic cross-sectional view showing a module substrate that can be used in a light emitting device according to an embodiment of the present invention.
3 is an enlarged schematic view of an area around a protrusion in the module substrate of FIG. 2.
4 and 5 are schematic perspective views illustrating a state in which the semiconductor light emitting device of FIG. 1 and the module substrate of FIG. 2 are coupled to each other.
6 and 7 are cross-sectional views schematically illustrating a semiconductor light emitting device according to an embodiment modified from the embodiment of FIG. 1.
8 is a schematic cross-sectional view of a semiconductor light emitting device according to another embodiment of the present invention.
9 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention.
10 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention.
11 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention.
12 to 16 are schematic cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to one embodiment of the present invention.
17 is a configuration diagram schematically showing an example of use of a semiconductor light emitting device proposed in the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. Further, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shapes and sizes of the elements in the drawings may be exaggerated for clarity of description, and the elements denoted by the same reference numerals in the drawings are the same elements.

1 is a cross-sectional view schematically showing a semiconductor light emitting device according to an embodiment of the present invention. Referring to FIG. 1, the semiconductor light emitting device 100 according to the present embodiment may include a substrate 101, a first conductivity type semiconductor layer 102, an active layer 103, a second conductivity type semiconductor layer 104, and a first structure. And an electrode 105 and a second electrode 106. The substrate 101 is provided as a substrate for semiconductor growth, and may be a substrate made of an electrically insulating and conductive material such as Si, sapphire, SiC, MgAl ₂ O ₄ , MgO, LiAlO ₂ , LiGaO ₂ , GaN, or the like. However, in the present embodiment, a substrate 101 made of Si, that is, a silicon semiconductor is used, and the silicon semiconductor may be provided as a large area substrate to provide an advantage in mass production of devices. In addition, the silicon semiconductor substrate 101 is excellent in workability and heat dissipation performance, and in this embodiment, the first through-hole H1 is formed in the substrate 101 to form the first conductive semiconductor layer ( 102) was to expose the lower surface. In the present specification, terms such as 'top', 'bottom', and 'side' are based on the drawings and may actually vary depending on the direction in which the device is disposed. On the other hand, when the silicon semiconductor is used as a substrate, since the difference in the lattice constant and the material such as nitride semiconductor grown thereon is relatively large, the crystallinity of the grown semiconductor layer may be bad, as will be described later, the substrate 101 This problem can be minimized by employing an appropriate buffer section.

The first and second conductivity-type semiconductor layers 102 and 104 may be formed of semiconductors doped with n-type and p-type impurities, respectively, but are not limited thereto, and may be p-type and n-type semiconductor layers, respectively. . In addition, the first and second conductivity-type semiconductor layers 102 and 104 may be formed of nitride semiconductors such as Al _x In _y Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x +). It can be made of a material having a composition of y≤1). However, the first and second conductivity-type semiconductor layers 102 and 104 may be made of AlGaInP-based semiconductors or AlGaAs-based semiconductors instead of nitride semiconductors. The active layer 103 disposed between the first and second conductivity type semiconductor layers 102 and 104 emits light having a predetermined energy by recombination of electrons and holes, and the quantum well layer and the quantum barrier layer alternate with each other. For example, in the case of a nitride semiconductor, a GaN / InGaN structure may be used. Meanwhile, the first and second conductivity-type semiconductor layers 102 and 104 and the active layer 103 constituting the light emitting structure may be formed of metal organic chemical vapor deposition (MOCVD) and hydrogenation vapor phase epitaxy. , 'HVPE'), Molecular Beam Epitaxy (MBE) and the like can be grown using processes known in the art.

The first and second electrodes 105 and 106 are formed on the bottom surface of the first conductive semiconductor layer 102 and the bottom surface of the first conductive semiconductor layer 104, respectively, and correspond to regions to be connected to external electrodes. In detail, the first electrode 105 is formed in a region corresponding to the first through hole H1 formed in the thickness direction of the substrate 101 and is exposed by the first through hole H1. It is formed on the lower surface of the type semiconductor layer 102. In addition, the second electrode 106 is formed in a region corresponding to the second through hole H2, and the second through hole H2 is formed from the lower surface of the first conductive semiconductor layer 102. The second conductivity-type semiconductor layer 104 is exposed as a shape in which the 102 and the active layer 103 are partially removed. That is, the second electrode 106 is formed on the bottom surface of the second conductive semiconductor layer 104 exposed by the second through hole H2. In this case, an insulator 107 may be formed on the inner wall of the second through hole H2 as shown in FIG. 1 to prevent the occurrence of an unintended electrical short.

As in the present embodiment, since both the first and second electrodes 105 and 106 have a structure formed under the light emitting structure, a path of light emitted to the outside through the second conductivity-type semiconductor layer 104 is provided. The blocking structure may be minimized, and the first and second conductivity-type semiconductor layers 102 and 103 and the first and second electrodes 105 and 106 may be directly connected, so that the substrate 101 may be interposed therebetween. Electrical properties may be improved than when interposed. In addition, since wire bonding for connecting the electrode of the device and the terminal pattern of the module substrate is unnecessary, process convenience may be improved.

In this case, unevenness may be formed on the upper surface of the second conductivity-type semiconductor layer 104 so that the light efficiency extracted to the outside may be improved, but in some cases, unevenness may be excluded. In addition, as described above, the first and second through holes H1 and H2 may be easily formed by using the silicon substrate 101. In addition, the first electrode 105 may form an ohmic contact with the first conductivity-type semiconductor layer 102 while having high light reflectivity such as Ag, Al, Ni, etc. to reflect the light emitted from the active layer 103 upwards. It can be made of a substance. However, the first electrode 105 is not always in direct contact with the first conductivity type semiconductor layer 102, and the ohmic contact performance is improved between the first electrode 105 and the first conductivity type semiconductor layer 102. There may be intervening layers. Similarly, the second electrode 106 is not always in direct contact with the second conductivity type semiconductor layer 104, and improves ohmic contact performance between the second electrode 106 and the second conductivity type semiconductor layer 104. There may be intervening layers.

In addition, by forming the first and second electrodes 105 and 106 in the areas corresponding to the two through holes, that is, the first and second through holes H1 and H2, the module substrate may be used as a light emitting device. In the case of mounting to, since self alignment is possible, the mounting process may be facilitated. 2 is a schematic cross-sectional view illustrating a module substrate that may be used in a light emitting device according to an embodiment of the present invention, and FIG. 3 is an enlarged schematic view of an area around a protrusion in the module substrate of FIG. 2. 4 and 5 are schematic perspective views illustrating a state in which the semiconductor light emitting device of FIG. 1 and the module substrate of FIG. 2 are coupled to each other. As shown in FIGS. 2 and 4, the module substrate 108 includes first and second terminal patterns 109 and 110, and first and second protrusions P1 and P2 are formed on an upper surface thereof. . In this case, the first protrusion P1 has a shape corresponding to the first through hole H1 of FIG. 1, and the second protrusion P2 has a shape corresponding to the second through hole H2 of FIG. 1. . In addition, first and second terminal patterns 109 and 110 are formed on at least one surface (upper surface in the present embodiment) of the first and second protrusions P1 and P2. As the module substrate has a protrusion P, as shown in FIG. 4, the light emitting device 100 may be easily coupled to the module substrate in a self-aligned state on the module substrate. In this case, as shown in FIG. 4, the first terminal pattern 109 may have a ring shape, and when viewed from the top of the module substrate 108, may be formed to surround the second terminal pattern 110. . Similarly, the first electrode 105 may also have a ring shape and may be formed to surround the second electrode 106 when viewed from the bottom of the first conductivity-type semiconductor layer 102. Meanwhile, the first and second electrodes 105 and 106 and the first and second terminal patterns 109 and 110 may be joined by bonding layers (not shown) such as eutectic metal or conductive polymer, respectively.

The module board 108 may use a general PCB board, or a board having various structures such as FPBC, MCPCB, and MPCB. In particular, the wiring structure may be connected to the first terminal patterns 109 and 110 at the protrusions P1 and P2. May be provided. That is, as shown in FIG. 3, the wiring structure 111 is provided inside the first protrusion P1 to be connected to the first terminal pattern 109-FIG. 3A-or the wiring structure 111 ′. May be formed along the surface of the first protrusion P1-FIG. 3 (b)-. The wiring structures 111 and 111 ′ may be connected to an electrode pattern formed in or on the module substrate 108 to be connected to an external power source. In FIG. 3, only the wiring structures 111 and 111 ′ are formed in the first protrusion P1, but the same wiring structure may be formed in the second protrusion P2. The areas corresponding to the first and second protrusions P1 and P2 in the module substrate 108 may be formed integrally with the flat areas disposed at the beginning, or may be formed separately and bonded to the flat areas. Can be.

On the other hand, the protrusions in the module substrate 108 may be formed in various shapes in addition to the cylindrical, for example, as shown in the modified example of FIG. 5, the second protrusions P2` have a module so that the area is reduced toward the top It may have a side that is inclined with respect to the top surface of the substrate 108. Accordingly, the shape of the second through hole H2` in the device may also be modified to correspond to the second protrusion P2`. As the side surface of the second protrusion P2` has an inclined structure, it may be easier to process, and also provides an easy advantage in forming a wiring structure on the surface of the second protrusion P2`. . In FIG. 5, the side surface of the second protrusion P2 ′ is inclined, but according to the embodiment, the side surface of the first protrusion P1 is inclined, and the first through hole H1 has a shape corresponding thereto. You might have

6 and 7 are cross-sectional views schematically illustrating a semiconductor light emitting device according to an embodiment modified from the embodiment of FIG. 1. First, referring to FIG. 6, in the case of the semiconductor light emitting device 100 ′ according to the present embodiment, unevenness is formed on at least one surface (side surface in the present embodiment) of the substrate 101 ′, and other components are described above. Same as form Since the substrate 101` made of a silicon semiconductor has superior heat dissipation performance as compared to other substrates such as sapphire, the device using the same can be expected to improve heat dissipation and emission characteristics, and in particular, the substrate as in the present embodiment. By forming irregularities at 101 ', heat dissipation performance may be further improved. In this case, the unevenness of the substrate 101 ′ may be easily formed by a process such as CMP, RIE, etc. using the excellent processability of silicon. On the other hand, the unevenness of the substrate 101 'proposed in the present modification may be employed in the embodiments described below.

Next, in the embodiment of FIG. 7, the semiconductor light emitting device 100 ″ is the same as the embodiment of FIG. 1 except for the shape of the second electrode 106 ′. As shown in FIG. 7, the second electrode 106 ′ may be formed to fill the second through hole H2, and thus, the first and second electrodes 105 and 106 ′ may be formed based on the lower surface thereof. It may have the same height. In the present embodiment, only one protrusion may be formed on the module substrate on which the element is disposed, and the first and second electrodes 105 and 106` are formed by forming first and second terminal patterns on the upper surface of the one protrusion. Can be connected to

8 is a schematic cross-sectional view of a semiconductor light emitting device according to another embodiment of the present invention. Referring to FIG. 8, the semiconductor light emitting device 200 according to the present exemplary embodiment may include a substrate 201, a first conductive semiconductor layer 202, an active layer 203, a second conductive semiconductor layer 204, and a first conductive layer. The electrode 205 and the second electrode 206 are included. Unlike the previous embodiment, the buffer portion B is interposed between the substrate 201 and the first conductivity-type semiconductor layer 202. The buffer portion B may alleviate the tensile stress caused by depositing a material having a lattice constant smaller than that of the silicon semiconductor, such as a nitride semiconductor, on the silicon substrate 201, and furthermore, the semiconductor layer may be grown on the silicon substrate 201. It may be composed of a plurality of semiconductor layers to reduce crystal defects. Accordingly, by employing the buffer portion B, it is possible to minimize the deterioration of crystallinity of the grown semiconductor layer while using the silicon substrate 201. This will be described in connection with. On the other hand, the buffer unit (B) proposed in the present modification may be employed in the embodiments described below.

9 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention. Referring to FIG. 9, the semiconductor light emitting device 300 according to the present embodiment may include a substrate 301, a first conductive semiconductor layer 302, an active layer 303, a second conductive semiconductor layer 304, and a first substrate. The electrode 305 and the second electrode 306 are included. Unlike the previous embodiment, the reflector R is interposed between the substrate 301 and the first conductivity-type semiconductor layer 302. The reflector R may emit light emitted from the active layer 303 toward the substrate 301, and light absorption by the silicon semiconductor having a relatively low reflectance may be reduced by the reflector R. For example, in the case of a nitride semiconductor light emitting device of blue light, blue photon energy (˜2.7 eV) generated in the active layer 303 may be emitted in all directions. Here, since the photons directed to the silicon substrate 301 are all absorbed by the silicon substrate 301 (the energy band gap of Si: 1.1 eV), a considerable amount (about 50%) of the photons may be lost, resulting in a decrease in light efficiency. There is a problem. Therefore, as in the present embodiment, the light absorption by the silicon substrate 3010 can be minimized by employing the reflector R. FIG.

The reflector R may be any material as long as the material has high light reflectivity. For example, as illustrated in FIG. 9, the reflector R may have a DBR structure in which dielectric layers R1 and R2 having different refractive indices are alternately stacked. Can be used. In addition, an ODR structure in which a reflective layer and a low refractive layer is stacked may be used. In this case, the DBR structure may be implemented by combining materials such as SiO ₂ , TiO ₂ , TiO ₂ , SiC, or AlGaN / GaN, InGaN / In, etc. It may be removed in the hole H1 forming step to expose the first conductivity-type semiconductor layer 302 or may be formed only in an area except for an area corresponding to the first through hole H1 from the top surface of the substrate 301. On the other hand, the reflection unit (R) proposed in the present modification may be employed in the embodiments described below.

10 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention. Referring to FIG. 10, the semiconductor light emitting device 400 according to the present exemplary embodiment may include a substrate 401, a first conductive semiconductor layer 402, an active layer 403, a second conductive semiconductor layer 404, and a first conductive layer. It comprises an electrode 405 and a second electrode 406, unlike the previous embodiment, a portion of the lower surface of the first conductivity type semiconductor layer 402, specifically exposed by the first through hole (H1). Unevenness is formed in at least some of the regions. In this case, the first electrode 405 may be formed to have a shape corresponding to the unevenness of the first conductivity-type semiconductor layer 402. As the concave-convex structures are formed in the first conductive semiconductor layer 402 and the first electrode 405, the areas of the regions in contact with each other may increase, so that electrical and optical characteristics may be improved. Meanwhile, the concave-convex structures of the first conductive semiconductor layer 402 and the first electrode 405 proposed in the present modification may be employed in the embodiments described below. Although not shown, an uneven structure may also be formed at an interface between the second conductivity-type semiconductor layer 404 and the second electrode 406.

12 is a schematic cross-sectional view of a semiconductor light emitting device according to still another embodiment of the present invention. Referring to FIG. 12, the semiconductor light emitting device 500 according to the present embodiment may include a substrate 501, a first conductive semiconductor layer 502, an active layer 503, a second conductive semiconductor layer 504, and a first substrate. It is comprised including the electrode 505 and the 2nd electrode 506, and differs from previous embodiment in the shape of the board | substrate 501. FIG. Specifically, the substrate 501 includes a plurality of first through holes H1 exposing the bottom surface of the first conductivity type semiconductor layer 502, in which case the first electrode 505 is formed of the substrate 501. It can be formed along the surface. As shown in FIG. 8, since the area in contact with the outside may be increased, heat dissipation performance by the substrate 501 and the first electrode 505 may be improved. In addition, since the area of the first electrode 505 itself is increased, the light reflection performance and the electrical characteristics may be improved. In particular, when the substrate 501 is doped with impurities (for example, n-type doping), the electrical characteristics may be increased. Could be further improved.

Hereinafter, a method of manufacturing a semiconductor light emitting device having the above-described structure will be described, and based on the structure shown in FIG. 8 (with a buffer unit), other embodiments may be manufactured by applying a similar method. . 12 to 16 are schematic cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to one embodiment of the present invention.

First, as shown in FIG. 12, the buffer portion B is formed on the substrate 101, and the buffer portion B is formed from the upper surface of the substrate 101 by the nucleation layer 601, the mask layer 602, A stress compensation layer 603, an intermediate layer 604, and an additional nitride semiconductor layer 605. As described above, the buffer unit B may have a multilayer structure to minimize crystal defects of the semiconductor layer grown thereon, and to reduce the stress applied to the semiconductor layer to lower the possibility of crack generation.

Referring to each component of the buffer unit B, first, the nucleation layer 601 may be made of an Al-containing nitride semiconductor, and may be grown under low temperature conditions on the upper surface of the substrate 101 made of a dissimilar material such as a silicon semiconductor. Can be. As a more specific example, the nucleation layer 601 may be divided into two layers, in which case, the first nitride semiconductor layer made of AlN and Al _x Ga _(1-x) N (0 <x <1) It may include a second nitride semiconductor layer. The second nitride semiconductor layer may be employed to alleviate the lattice constant difference between AlN (first nitride semiconductor layer) and GaN (stress compensation layer) when the stress compensation layer 603 grown thereon is made of GaN. To this end, the second nitride semiconductor layer may have a structure in which an Al content is higher than a region close to the stress compensation layer 603 in a region close to the first nitride semiconductor layer. In addition, since the lattice constant of the second nitride semiconductor layer made of Al _x Ga _(1-x) N (0 <x <1) is larger than that of the first nitride semiconductor layer made of AlN, it is extended by the second nitride semiconductor layer. Compressive stress may be generated to relieve stress.

When the nucleation layer 601 having the above-described structure is grown, the nucleation layer 601 is subjected to elongation stress due to the difference in lattice constant from the silicon substrate 101, which causes the nitride semiconductor to be a silicon semiconductor, for example, This is because the lattice constant is smaller than the (111) plane. The semiconductor layer grown in the state where the extension stress is applied is bent in the cooling step after growth, and there is a problem that defects such as cracks occur in the semiconductor layer due to such bending, and according to the present embodiment, Layers were formed on nucleation layer 601. Specifically, the stress compensation layer 603 formed on the nucleation layer 602 is made of a material having a lattice constant larger than that of the nucleation layer 602, and thus, compressive stress compensates for elongation stress. Can be generated. When the nucleation layer 602 is made of Al-containing nitride semiconductor, the stress compensation layer 603 may be formed of a nitride layer having a lower Al content than GaN or the nucleation layer 602. In addition, the stress compensation layer 603 may be undoped or doped with impurities. However, when the stress compensation layer 603 is formed of an undoped semiconductor, the compressive stress generation effect may be further increased.

Meanwhile, as shown in FIG. 12, the porous mask layer 602 may be formed on the nucleation layer 601 before growing the stress compensation layer 603. The porous mask layer 602 may be made of silicon nitride (SiN _x ) having a plurality of open regions, and may be formed to have a plurality of open regions exposing the nucleation layer 601 by applying appropriate growth conditions, for example. have. Defects such as dislocations in the nucleation layer 601 are blocked by the porous mask layer 602, and the stress compensation layer 603 may induce lateral growth through the open region, thereby constituting an element. The crystallinity of the semiconductor layers can be improved.

In this case, the formation order of the porous mask layer 602 may vary depending on the embodiment. That is, as shown in FIG. 13, the porous mask layer 602 may be disposed between the stress compensation layers 603 and 603 ′. In this case, the stress compensation layer is divided into an upper layer 603 and a lower layer 603`, specifically, after the growth of the lower layer 603`, a porous mask layer 602 is formed, and then the upper layer 603 is regrown. Can be obtained. In such a structure, the stress compensation layer 603 ′ may be formed directly on the nucleation layer 601, which may be more advantageous in terms of compressive stress generation effect.

The intermediate layer 604 is formed on the stress compensation layer 603, and is formed of a material different from that of the stress compensation layer 603 to form a heterogeneous interface with the stress compensation layer 603. Specifically, when the stress compensation layer 603 is made of GaN, the intermediate layer 604 may be made of Al _x Ga _(1-x) N (0 <x≤1), and the stress compensation layer 603 and the intermediate layer ( Since propagation of dislocations may be blocked at the heterogeneous interface of 604, the effect of improving crystallinity may be expected by the intermediate layer 604. However, the intermediate layer 604 will not necessarily be necessary elements in this embodiment, and may be excluded in some cases. Next, the additional nitride semiconductor layer 605 may be formed of the same material as that of the stress compensation layer 603, for example, GaN, and may be employed as a multilayer structure of GaN / n-GaN. In addition, since the additional nitride semiconductor layer 605 is formed of a material different from that of the intermediate layer 604, similar to the foregoing, the potential is blocked.

In this way, when the nitride semiconductors are grown on the silicon substrate 101, which is advantageous for mass production, by employing the buffer sections B and B` having the above-described structure, cracks are reduced and high quality with improved crystallinity. The light emitting diode structure can be obtained. Referring to FIG. 13, a multilayer buffer structure employable in the present invention will be described in detail by another approach. An AlN / AlGaN nucleation layer 601 is grown on the silicon substrate 101, and is continuously undoped GaN. To grow the compensation layer (603, 603`) and the additional nitride semiconductor layer 605 of the n-type GaN, and to reduce the dislocation density inside the stress compensation layer (603, 603`) and the additional nitride semiconductor layer 605, respectively It may be understood that the SiN _x porous mask layer 602 and the AlGaN intermediate layer 604 are further interposed. In a specific example, an AlN / AlGaN nuclear growth layer (about 2 μm or less) is grown, and an undoped GaN layer (about 2 μm or less) and an n-type GaN layer (3 to 4 μm) are grown in succession. When additionally using the SiN _x layer and the AlGaN interlayer at the submicro level inside the layer, the crystallinity of GaN in the light emitting structure grown based on the multilayer buffer structure is (300) arcsec, in the case of (002) FWHM, In the case of (102) FWHM, it was <400 arcsec or less. In addition, cracks are not formed in the wafer, and bowing due to thermal stress can be maintained at a low level of <20 μm.

On the other hand, after the buffer portion B is formed, as shown in FIG. 14, the light emitting structure, that is, the first conductive semiconductor layer 102, the active layer 103, and the second conductive semiconductor layer 104 is formed. The transparent electrode layer 106 may be formed on the second conductive semiconductor layer 104 by a process such as MOCVD or HVPE. Subsequently, as illustrated in FIG. 15, the first through hole H1 is formed in the substrate 101 by grinding, CMP, RIE, or the like to expose the bottom surface of the first conductive semiconductor layer 102. In this case, the removal of the buffer portion B may also be necessary as a separate process. In addition, as shown in FIG. 16, a second through hole H2 is formed from a lower portion of the light emitting structure to expose the second conductive semiconductor layer 104, and additionally, the insulator 107 is formed through the second through hole ( It can deposit on the inner wall of H2). Subsequently, the first and second electrodes may be formed on the exposed lower surfaces of the first and second conductivity-type semiconductor layers 102 and 104 to implement the device.

On the other hand, the semiconductor light emitting device having the above structure can be applied in various fields. 17 is a configuration diagram schematically showing an example of use of a semiconductor light emitting device proposed in the present invention. Referring to FIG. 17, the dimming device 700 includes a light emitting module 701, a structure 704 in which the light emitting module 701 is disposed, and a power supply unit 703, and the light emitting module 701 includes the present invention. One or more semiconductor light emitting devices 702 obtained in the manner proposed in the above may be disposed. In this case, the semiconductor light emitting device 702 may be mounted on the module 701 or may be provided in a package form. The power supply unit 703 may include an interface 705 for receiving power and a power control unit 706 for controlling the power supplied to the light emitting module 701. In this case, the interface 705 may include a fuse for blocking the overcurrent and an electromagnetic shielding filter for shielding the electromagnetic interference signal.

When the AC power is input to the power source, the power control unit 706 may include a rectifying unit for converting AC into DC and a constant voltage control unit for converting into a voltage suitable for the light emitting module 701. If the power source itself is a direct current source (for example, a battery) having a voltage suitable for the light emitting module 701, the rectifier or the constant voltage controller may be omitted. In addition, when the light emitting module 701 itself employs an element such as an AC-LED, AC power may be directly supplied to the light emitting module 701, and in this case, the rectifier or the constant voltage controller may be omitted. In addition, the power control unit may control the color temperature and the like to enable the illumination of the human emotion. In addition, the power supply unit 703 may include a feedback circuit device for performing a comparison between the light emission amount of the light emitting element 702 and a preset light amount, and a memory device in which information such as desired luminance and color rendering is stored.

The dimming device 700 may be used as a backlight unit used in a display device such as a liquid crystal display device having an image panel, an indoor lighting device such as a lamp, a flat panel light, or an outdoor lighting device such as a street lamp, a signboard, a sign, and the like. It can be used in various transportation lighting devices, such as automobiles, ships, aircrafts, and the like. Furthermore, it may be widely used in home appliances such as TVs and refrigerators, and medical devices.

The present invention is not limited by the above-described embodiments and the accompanying drawings, but is intended to be limited only by the appended claims. It will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. something to do.

101: substrate 102: first conductive semiconductor layer
103: active layer 104: second conductive semiconductor layer
105: first electrode 106: second electrode
107: insulator 108: module substrate
109 and 110: first and second terminal patterns B: buffer portion
R: reflector R1, R2: dielectric layer
H1, H2: first and second through holes P1, P2: first and second protrusions
601: nucleation layer 602: porous mask
603: stress compensation layer 604: intermediate layer
605: additional nitride semiconductor layer

Claims (37)

A substrate having at least one first through hole;
A first conductivity type semiconductor layer formed on the substrate;
An active layer formed on the first conductivity type semiconductor layer;
A second conductivity type semiconductor layer formed on the active layer;
A first electrode formed on a portion of a lower surface of the first conductivity type semiconductor layer exposed by the through hole;
It is formed from another portion of the lower surface of the first conductive semiconductor layer exposed by the through hole, and formed so that at least a portion of the first conductive semiconductor layer and the active layer is removed to expose the second conductive semiconductor layer. A second through hole; And
A second electrode formed on a bottom surface of the second conductive semiconductor layer exposed by the second through hole;
Semiconductor light emitting device comprising a.
The method of claim 1,
The semiconductor light emitting device, characterized in that the irregularities formed on the side of the substrate.
The method of claim 1,
The semiconductor light emitting device of claim 1, wherein at least a portion of the bottom surface of the first conductive semiconductor layer is exposed by the through hole.
The method of claim 3,
The first electrode is a semiconductor light emitting device, characterized in that formed to have a shape corresponding to the irregularities.
The method of claim 1,
The substrate is a semiconductor light emitting device, characterized in that the silicon (Si) substrate.
The method of claim 1,
The semiconductor light emitting device of claim 2, wherein unevenness is formed on an upper surface of the second conductivity-type semiconductor layer.
The method of claim 1,
And a buffer unit formed in at least a portion of the substrate and the first conductive semiconductor layer.
The method of claim 7, wherein
And the buffer unit comprises a nucleation layer formed on the substrate and a stress compensation layer formed on the nucleation layer and having a lattice constant greater than that of the nucleation layer.
The method of claim 8,
And the nucleation layer is formed of an Al-containing nitride semiconductor, and the stress compensation layer is formed of a nitride semiconductor having a lower Al content or no Al than the nucleation layer.
The method of claim 8,
The nucleation layer includes a first nitride semiconductor layer formed on the substrate and a second nitride semiconductor layer made of a material having a lattice constant greater than that of the first nitride semiconductor layer and smaller than the stress compensation layer. A semiconductor light emitting device.
The method of claim 10,
The first nitride semiconductor layer is made of AlN, the second nitride semiconductor layer is made of Al _x Ga _(1-x) N (0 <x <1), characterized in that the stress compensation layer is made of GaN A semiconductor light emitting device.
The method of claim 11,
And wherein the second nitride semiconductor layer has a higher Al content than a region close to the stress compensation layer in a region close to the first nitride semiconductor layer.
The method of claim 11,
The stress compensation layer is a semiconductor light emitting device, characterized in that made of undoped GaN.
The method according to any one of claims 8 to 13,
The buffer unit further comprises a porous mask layer disposed between the nucleation layer and the stress compensation layer.
The method according to any one of claims 8 to 13,
The stress compensation layer is divided into upper and lower layers in the thickness direction,
The buffer unit further comprises a porous mask layer disposed between the upper and lower layers.
The method of claim 14,
The porous mask layer is a semiconductor light emitting device, characterized in that made of silicon nitride.
The method of claim 8,
And the buffer part further comprises an intermediate layer formed of a material different from the stress compensation layer on the stress compensation layer.
18. The method of claim 17,
The stress compensation layer is made of GaN, the intermediate layer is a semiconductor light emitting device, characterized in that consisting of Al _x Ga _(1-x) N (0 <x _{≤ 1} ).
18. The method of claim 17,
The buffer unit is formed on the intermediate layer, the semiconductor light emitting device further comprises an additional nitride layer made of a material different from the intermediate layer.
20. The method of claim 19,
The additional nitride layer is a semiconductor light emitting device, characterized in that made of GaN.
The method of claim 1,
The first electrode has a ring shape, and when viewed from below the first conductive semiconductor layer, the first electrode is formed to surround the second electrode.
The method of claim 1,
And the second electrode is formed to fill the second through hole.
The method of claim 1,
And a reflector formed in at least a portion of the substrate and the first conductivity-type semiconductor layer.
The method of claim 23, wherein
The reflector has a DBR structure, characterized in that the semiconductor light emitting device.
The method of claim 1,
The substrate has a plurality of through holes, and the first electrode is a semiconductor light emitting device, characterized in that formed along the surface of the substrate.
Sequentially growing a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer on the substrate to form a light emitting structure;
Forming at least a portion of the bottom surface of the first conductive semiconductor layer by forming a first through hole in the substrate;
Forming a second through hole exposing the second conductive semiconductor layer by partially removing the first conductive semiconductor layer and the active layer from a lower surface of the first conductive semiconductor layer exposed by the first through hole. step;
Forming a first electrode on a lower surface of the first conductivity type semiconductor layer exposed by the first through hole; And
Forming a second electrode on a lower surface of the second conductive semiconductor layer exposed by the second through hole;
Gt; a &lt; / RTI &gt; semiconductor light emitting device.
The method of claim 26,
And forming a buffer unit on the substrate before forming the light emitting structure.
The method of claim 27,
Exposing the bottom surface of the first conductive semiconductor layer comprises forming a through hole in the buffer portion.
The method of claim 26,
And forming a reflector on the substrate before forming the light emitting structure.
The method of claim 29,
Exposing the bottom surface of the first conductivity type semiconductor layer includes forming a through hole in the reflecting portion.
The method of claim 29,
The forming of the reflector may be performed such that the reflector is located only in a region around the through hole.
A module substrate having first and second protrusions formed on an upper surface thereof, and first and second terminal patterns; And
A substrate having at least one first through hole, a first conductive semiconductor layer formed on the substrate, an active layer formed on the first conductive semiconductor layer, and a second conductive semiconductor layer formed on the active layer And a first electrode formed on a portion of a lower surface of the first conductive semiconductor layer exposed by the through hole, and another portion of a lower surface of the first conductive semiconductor layer exposed by the through hole. At least a portion of the first conductive semiconductor layer and the active layer is removed to expose the second conductive semiconductor layer and a bottom surface of the second conductive semiconductor layer exposed by the second through hole. It includes a semiconductor light emitting device comprising a second electrode formed on,
And the semiconductor light emitting device is disposed on the module substrate such that the first and second through holes are coupled to the first and second protrusions, respectively.
33. The method of claim 32,
And the first and second terminal patterns are formed in the first and second protrusions, respectively.
34. The method of claim 33,
The module substrate may further include first and second wiring structures respectively connected to the first and second terminal patterns and respectively formed in the first and second protrusions.
34. The method of claim 33,
The module substrate may further include first and second wiring structures connected to the first and second terminal patterns, respectively, and formed along surfaces of the first and second protrusions, respectively.
33. The method of claim 32,
At least one of the first and second protrusions has a side surface inclined with respect to the upper surface of the module substrate so as to decrease the area toward the top.
33. The method of claim 32,
The first protrusion has a ring shape, and when viewed from the top of the module substrate, the first protrusion is formed to surround the second protrusion.

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