JP3998154B1 - Capacitor charge / discharge system - Google Patents

Abstract

Provided is a method capable of determining a bypass current so that a power transistor having a large rating is not required even in a parallel monitor circuit used in a charge / discharge system that handles a large current composed of a high-power capacitor.
【Task】
The present invention relates to a capacitor charging / discharging system having a parallel monitor that bypasses a charging current at a voltage exceeding a set value and charging / discharging a capacitor composed of a plurality of capacitors (C1, C2,... Cn) connected in series. , The transistor Tr and the resistor R are provided in the bypass current path. When the power consumption of the transistor Tr when the bypass current flows is Pc and the power consumption of the resistor R is Pr, Pr = kPc (where k ≧ 1) is set.
[Selection] Figure 1

Description

  The present invention relates to a capacitor charge / discharge system for supplying power to a load that requires power in a periodic cycle time, and more particularly to a capacitor charge / discharge system that suppresses heat generation of a transistor due to a bypass current.

  In recent years, electric double layer capacitors capable of charging and discharging a large current have attracted attention. An electric double layer capacitor is a capacitor that uses an electric double layer formed by the polarization of ions at the interface between the electrode and the electrolyte. It can charge a large capacitance compared to conventional capacitors, and can be charged and discharged quickly. Is possible and its application is expected. Applications of the electric double layer capacitor include memory backup, electric vehicle power assist, and power storage battery replacement, and are widely studied from small capacity products to large capacity products. The present applicant, for example, connects a plurality of electric double layer capacitor cells in series, and a capacitor power storage device configured in combination with an electronic circuit that charges and discharges while monitoring each capacitor cell with a parallel monitor, as an ECS (Energy Capacitor). System) or ECaSS (Energy Capacitor Systems) (registered trademark). Here, the parallel monitor is connected between the terminals of each electric double layer capacitor of the capacitor bank in which a plurality of electric double layer capacitors are connected in series. When the charge voltage of the capacitor bank exceeds the set value of the parallel monitor, the charge current is It is a device that bypasses.

The capacitor bank with the parallel monitor described above bypasses the charging current so that the charging voltage of the capacitor bank does not rise above a set value when charging, so that all electric double layer capacitors in the capacitor bank are kept constant. The battery is evenly charged up to a set voltage, and the storage capacity of the electric double layer capacitor can be exhibited almost 100%. Therefore, the parallel monitor can equalize the maximum voltage, prevent backflow, detect and control the end-of-charge voltage, etc., even when there are variations in capacitor characteristics and residual charge, so that it can be used to the full withstand voltage. As such, it has an extremely important role and is an indispensable device for effective use of energy density. Such a parallel monitor is disclosed in Patent Document 1 (Japanese Patent No. 3306325).
Japanese Patent No. 3306325

  Various types of electric double layer capacitors can be obtained, from a high output type capacitor having a low internal resistance to a capacitor having a high internal density but a high energy density. In a high output type capacitor, a large current of 100 A to 1000 A flows through the capacitor depending on the application.

A high output type capacitor has a large variation in capacitance due to its structure. (Since the polarizable electrode is thinly coated compared to the high energy density type electric double layer capacitor, a slight difference in coating thickness results in a difference in capacitance.)
When the capacitors are connected in series, the variation in the capacitance causes the voltage not to be equalized to a fraction of the number of capacitors (the voltage is not evenly distributed to the capacitors). In order to deal with such variations in the capacitance of the capacitor, a method of connecting a voltage equalizing resistor in parallel with the capacitor is also conceivable. However, this method reduces the nonuniformity of the leakage resistance, but the capacitance is not the same. There is no corrective effect for.

  Therefore, the above-described parallel monitor circuit is used in a charge / discharge system that handles a large current using such a high output type capacitor. However, if all the bypass current of the capacitor flows through the parallel monitor circuit, a power transistor with a large rating is required. If this is provided for each parallel monitor circuit, there is a problem that the circuit configuration becomes very expensive.

  Further, when mounting a power transistor having a large rating, a configuration such as a heat radiating member such as a heat sink for mounting the power transistor is required, which causes a problem of an increase in cost. In addition, such a complicated mounting structure has a problem that the reliability of the parallel monitor circuit is lowered.

  In order to deal with each of the problems as described above, a solution may be considered in which a resistor is provided in the bypass current path of the capacitor to limit the maximum current during bypassing, and a certain voltage is also shared by this resistor. When such a resistor is provided, a part of the heat generated by the bypass current of the capacitor can be shared by the resistor, and a lower rated power transistor can be used. The present invention relates to a method for determining a resistance value when a resistor for sharing a heat generation burden caused by a capacitor bypass current is provided.

For this purpose, the invention according to claim 1 of the present invention is used for a load that requires power in a periodic cycle time, and has a parallel monitor that bypasses a charging current with a voltage exceeding a set value, and is connected in series. In a capacitor charging / discharging system for charging / discharging a capacitor module composed of an electric double layer capacitor, a bypass current path for bypassing a charging current of each electric double layer capacitor is provided with a transistor and a resistor connected in series with the transistor , When the voltage of each electric double layer capacitor exceeds the set value by the reference voltage Vr, a comparator is provided to turn on the transistor, and the emitter-collector voltage when the transistor determined by the rated characteristics of the transistor is on is set to Vton Then,
Vr−Vton = kVton
And
k = 1.2-1.5
It sets so that it may become.

  According to the capacitor charging / discharging system according to the embodiment of the present invention, a transistor Tr having a smaller rating can be used, and a structure such as a heat radiating member such as a heat sink for attaching to the transistor Tr is unnecessary, and the cost is reduced. Can be suppressed. Further, since the mounting structure is simplified, there is an advantage that reliability as a circuit can be secured.

  Further, according to the capacitor charge / discharge system according to the embodiment of the present invention, a power transistor having a large rating is required even in a parallel monitor circuit used in a charge / discharge system that handles a large current composed of a high-power capacitor. The bypass current can be determined so that it does not.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration of a charge / discharge system targeted by the present invention. In FIG. 1, a charging source 10 is for charging a high output type capacity module composed of connected electric double layer capacitors C1, C2,. Such a high output capacity is the same as that described in “Problems to be Solved by the Invention”. A parallel monitor circuit is provided in parallel with each of the electric double layer capacitors C1, C2,. As shown in the figure, the parallel monitor is connected between the terminals of the electric double layer capacitors C1, C2,... Cn, and from the comparators CMP1 to CMPn, current limiting resistors R1 to Rn, transistors Tr1 to Trn, and reference voltages Vr1 to Vrn. Become. As the reference voltages Vr1 to Vrn, a common capacitor full charge voltage (generally, a capacitor rated voltage) Vr is used.

  As shown in FIG. 1, the parallel monitor circuit monitors each voltage of the capacitors C1, C2,... Cn with the reference voltage Vr by the comparators CMP1 to CMPn, and the voltage of the capacitor C is set to a set value by the reference voltage Vr. If exceeded, the transistor Tr is turned on to bypass the charging current.

  In the capacitor charge / discharge system assumed by the present invention, when the parallel monitor circuit passes such a bypass current, the current limiting resistors R1 to Rn are selected so as not to bypass all the charge currents. Alternatively, the resistance values of the current limiting resistors R1 to Rn are made variable so as not to bypass all charging currents and adjusted.

In the capacitor charge / discharge system assumed by the present invention, by setting the current limiting resistors R1 to Rn as described above, a power transistor having a large rating is not required as the transistors Tr1 to Trn. The current limiting resistors R1 to Rn can partially bear the heat generation burden due to the bypass current of the electric double layer capacitors C1, C2,... Cn, and lower rated transistors Tr1 to Trn can be used.

  Here, the bypass current determination method of the capacitor charge / discharge system according to the embodiment of the present invention will be described with reference to FIG. FIG. 2 is a diagram showing parameters of a parallel monitor circuit targeted by the present invention. FIG. 2 shows one of a plurality of parallel monitor circuits shown in FIG.

In FIG. 2, It is a bypass current. The bypass current It is assumed that the initialization voltage (rated voltage) of the electric double layer capacitor C is Vr, and the emitter-collector voltage when the transistor Tr determined by the rated characteristics of the transistor Tr is on is Vton.
It = (Vr−Vton) / R (1)
It can be expressed as.

Further, the heat generation Pc from the transistor Tr when the bypass current It flows (power consumption of the transistor Tr) is:
Pc = It × Vton (2)
It can be expressed as. Also, the heat generation Pr from the resistor R (power consumption of the resistor R) when the bypass current It flows is:
Pr = It × (Vr−Vton) (3)
It can be expressed as.

Here, a constant of k ≧ 1 is introduced, and in the present invention,
Pr = kPc (4)
It is assumed that the bypass current It is determined so that In the present invention, the resistance values of the transistor Tr and the resistor R are selected in order to pass such a bypass current It.

  Here, a case where k = 1 is set will be described. In the equation (4), when k = 1 is set, the power consumption can be shared by the transistors Tr and the resistors R substantially equally. That is, when the bypass current is made to flow in this way, theoretically, (heat generation amount of the transistor Tr) = (heat generation amount of the resistor R) can be obtained.

  When a transistor is mounted, it is advantageous in terms of cost and reliability that a heat radiating member such as a heat sink is not used. Therefore, it is ideal to use a transistor with a low rating if possible and to design without using a heat dissipation member. In the capacitor charging / discharging according to the present invention, as described above, the resistor R partially shares the heat generated by the transistor Tr by causing the bypass current to flow so that the transistor Tr and the resistor R generate heat substantially evenly. The configuration is as follows. With such a configuration, a transistor Tr having a smaller rating can be used. Further, with such a configuration, a configuration such as a heat radiating member such as a heat sink for attaching to the transistor Tr becomes unnecessary, and the cost can be suppressed. Further, since the mounting structure is simplified, there is an advantage that reliability as a circuit can be secured.

  Next, a case where k = k = 1.2 to 1.5 is set will be described. Setting k = 1.2 to 1.5 means that the bypass current flows so that more power is shared by the resistor R than the transistor Tr, as can be seen from the equation (4). . That is, when k = k = 1.2 to 1.5 is set, the resistor R generates heat more than the transistor Tr.

  Charge / discharge systems may be used for types of loads that require power at periodic cycle times. Such a type of load includes a motor used for a machine tool or the like that requires a work amount at regular intervals. In such a charge / discharge system that is used with a relatively high output in a short cycle, it is preferable to set the heat generation amount of the resistor R higher than the heat generation amount of the transistor Tr.

  FIG. 3 is a diagram showing a heat generation profile of the resistor R and the transistor Tr. FIG. 3A shows a waveform of a current input to the resistor R and the transistor Tr, and FIG. 3B shows a heat generation curve of the element enclosure of the resistor R and the transistor Tr when the current is input. .

  Referring to FIG. 3, the resistor R generates heat so as to quickly follow the flowing current. On the other hand, the heat generation curve of the transistor Tr generates heat so as to rise gently without following the current quickly. That is, it can be said that the transistor Tr is a type of element that heats up while the resistance R is a type of element that is easily heated and cooled.

  In the present invention, k = k = 1.2 to 1.5 is set in consideration of the heat generation characteristics of both the resistor R and the transistor Tr and the cyclic use of the charge / discharge system. According to such a setting, the resistor R generates heat more than the transistor Tr during cyclic use of the charge / discharge system. However, since the heat generation pattern of the resistor R has high followability to current, it is efficient. As a result, the heat radiation efficiency of the entire circuit is improved. Also, by sharing the heat generation with the resistor R, the transistor Tr that is vulnerable to heat is protected, and there is a risk that the transistor Tr having a higher cost than the resistor R is called. Can be avoided.

  Next, another embodiment of the present invention will be described. In the capacitor charge / discharge system assumed by the present invention, the entire current is not bypassed as described above. Therefore, although a part of the current is bypassed to the capacitor that has reached full charge early, a predetermined amount of charging current still flows, and this capacitor becomes a burden. .

  The concept of the bypass current determination method of the present invention will be described. If all the bypass current of the capacitor flows through the transistors of the parallel monitor circuit, a power transistor with a large rating is required. If this is provided for each parallel monitor, there is a problem that the circuit configuration becomes very expensive.

  Therefore, in the bypass current determination method of the present invention, a part of the bypass current is applied to the parallel monitor circuit, even if it takes into consideration that some of the capacitors that have reached full charge early are subject to some burden. Make it flow. However, if the burden on such a capacitor is prolonged, the life of the capacitor is shortened, so that a time restriction is provided. For example, such a time is set as Ti. In other words, this time Ti is the time from when the capacitors first reach full charge among a plurality of capacitors in the system until all capacitors reach full charge.

  It is also noted that the charge / discharge system is used for a type of load that requires power at periodic cycle times. Such a type of load includes a motor used for a machine tool or the like that requires a work amount at regular intervals.

  Assuming that the periodic cycle time of the load is Ts, Ti / Ts charge / discharge cycles are repeated during the previous time Ti. In another embodiment, the bypass current is determined to solve the capacitor initialization problem during Ti / Ts charge / discharge cycles.

  In the capacitor charging / discharging system of the present invention, it is allowed that a predetermined amount of charging current other than the bypass current continues to flow for a predetermined period to a capacitor that has reached full charge quickly, and a certain amount of burden is imposed on the capacitor. . However, measures shall be taken so that this does not take a long time. In other words, the slowest charging capacitor is set to be fully charged within the predetermined period. Here, the “predetermined period” is from when the first capacitor among the capacitors C1, C2,... Cn reaches full charge until all the capacitors C1, C2,. This is time, and this is the total initialization time Ti.

  Next, the load 20 in the capacitor charge / discharge system assumed by the present invention will be described. FIG. 4 is a diagram showing a load profile of the load 20 of the charge / discharge system targeted by the present invention. The capacitor charge / discharge system assumed by the present invention is used for a type of load that requires electric power in a periodic cycle time. Such a type of load includes a motor used for a machine tool or the like that requires a work amount at regular intervals. As shown in FIG. 4, the load 20 in the capacitor charge / discharge system assumed by the present invention is configured to consume a current and generate a regenerative current at a periodic cycle time Ts. Here, such a load profile is merely an example, and the determination method of the present invention is not limited to such a load profile. In the capacitor charge / discharge system assumed by the present invention, the point is that the load profile has a periodic cycle time Ts.

  When the load 20 of the capacitor charging / discharging system has such a load profile, in the present invention, the bypass current is set so that all the capacitors C1, C2,... Cn are fully charged in Ti / Ts cycles. Make a decision. In order to determine the bypass current, the current limiting resistors R1 to Rn are selected and adjusted as described above.

  In the capacitor charging / discharging system of the present invention, what is going to be performed over the entire initialization time Ti is adjustment of the gap between the capacitor that reaches full charge the fastest and the capacitor that reaches full charge latest. Here, it is assumed that ΔV is a predictable variation amount of the initial voltage between the capacitor that reaches full charge the fastest and the capacitor that reaches full charge latest.

  In the method for determining the bypass current according to the present invention, another characteristic feature is that the bypass current is determined so as to eliminate the expected variation amount ΔV in Ti / Ts charge / discharge cycles.

  According to the method for determining the bypass current as described above, even in the parallel monitor circuit used in the charge / discharge system that handles a large current composed of the high output type capacitor, the bypass transistor is bypassed so that a power transistor with a large rating is not required. The current can be determined.

It is a figure which shows the structure of the charging / discharging system which this invention makes object. It is a figure which shows the parameter of the parallel monitor circuit which this invention makes object. It is a figure which shows the heat generation profile of the resistance R and the transistor Tr. It is a figure which shows the load profile of the load 20 of the charging / discharging system which this invention makes object.

Explanation of symbols

10 ... charging source, 20 ... load

Claims (1)

Capacitor charging used for loads that require power in a periodic cycle time and charging / discharging a capacitor module consisting of multiple electric double layer capacitors connected in series with a parallel monitor that bypasses the charging current with a voltage exceeding the set value In the discharge system,
A bypass current path for bypassing the charging current of each electric double layer capacitor is provided with a transistor and a resistor connected in series with the transistor, and when the voltage of each electric double layer capacitor exceeds a set value by the reference voltage Vr A comparator for turning on the transistor is provided, and the voltage between the emitter and the collector when the transistor determined by the rated characteristics of the transistor is on is Vton.
Vr−Vton = kVton
And
k = 1.2-1.5
Capacitor charge / discharge system, characterized in that

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