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CN113966099B - Microwave integrated circuit film thickening process suitable for solid-state product - Google Patents

Microwave integrated circuit film thickening process suitable for solid-state product Download PDF

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CN113966099B
CN113966099B CN202110738712.3A CN202110738712A CN113966099B CN 113966099 B CN113966099 B CN 113966099B CN 202110738712 A CN202110738712 A CN 202110738712A CN 113966099 B CN113966099 B CN 113966099B
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plating
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gold
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CN113966099A (en
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张楠
王平
任联锋
郑凯鑫
贾旭洲
左春娟
介洋洋
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Xian Institute of Space Radio Technology
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4076Through-connections; Vertical interconnect access [VIA] connections by thin-film techniques
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18Electroplating using modulated, pulsed or reversing current
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/54Electroplating of non-metallic surfaces
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

本发明提供了一种适用于固放产品的微波集成电路薄膜加厚工艺,包括如下步骤:在带有附着层的陶瓷基片上实施一次镀金,形成的金镀层的厚度为2~3μm;将掩膜版紧密贴合在一次镀金后涂覆有光敏胶的基片表面,曝光后进行显影、定影以及金属层的腐蚀,完成在金镀层上的光刻;在光刻后的金镀层上镀铜,形成的铜镀层的厚度为3~5μm;在铜镀层上镀镍,形成的镍镀层的厚度为0.5~1μm;在镍镀层上实施二次镀金,形成的金镀层的厚度为2~3μm。本发明通过特有的膜层结构设计,基于薄膜陶瓷电路板制作工艺,采用“四镀一刻”的方式,解决了较厚膜层电路的制作问题,达到较高的图形精度与膜层附着力,实现多种功能,满足大功率电路的需求。

The present invention provides a microwave integrated circuit film thickening process suitable for solid-state products, comprising the following steps: performing a gold plating on a ceramic substrate with an attachment layer, and the thickness of the formed gold plating layer is 2 to 3 μm; closely attaching the mask to the surface of the substrate coated with photosensitive adhesive after the gold plating, performing development, fixing and etching of the metal layer after exposure, and completing photolithography on the gold plating layer; copper plating on the gold plating layer after photolithography, and the thickness of the formed copper plating layer is 3 to 5 μm; nickel plating on the copper plating layer, and the thickness of the formed nickel plating layer is 0.5 to 1 μm; performing a secondary gold plating on the nickel plating layer, and the thickness of the formed gold plating layer is 2 to 3 μm. The present invention solves the problem of making thicker film layer circuits through a unique film layer structure design, based on the thin film ceramic circuit board manufacturing process, and adopts the "four plating and one engraving" method, achieves higher graphic accuracy and film layer adhesion, realizes multiple functions, and meets the needs of high-power circuits.

Description

一种适用于固放产品的微波集成电路薄膜加厚工艺A microwave integrated circuit film thickening process suitable for solid-state products

技术领域Technical Field

本发明属于微波集成电路技术领域,特别涉及一种适用于固放产品的微波集成电路薄膜加厚工艺。The invention belongs to the technical field of microwave integrated circuits, and in particular relates to a microwave integrated circuit film thickening process suitable for solid-state products.

背景技术Background technique

常规薄膜电路通过溅射、图形转移以及镀金进行制作,膜层厚度受到手工焊接、湿法刻蚀质量控制等各方面限制,目前微波集成电路微带产品主要以薄膜工艺为主,微带电路图形表层Au膜层厚度最厚仅4μm~6μm,难以满足大功率部件应用需求。为了达到使用要求,通常采用在Au层表面键合金带的方式,以提高电路功率耐受能力。但是这种方法可靠性低,工艺流程长,不能满足高可靠型号任务的需求。Conventional thin-film circuits are made by sputtering, pattern transfer, and gold plating. The thickness of the film layer is limited by manual welding, wet etching quality control, and other factors. Currently, microwave integrated circuit microstrip products are mainly based on thin-film technology. The thickness of the Au film layer on the surface of the microstrip circuit pattern is only 4μm to 6μm, which is difficult to meet the application requirements of high-power components. In order to meet the use requirements, it is usually used to bond gold strips on the surface of the Au layer to improve the circuit power tolerance. However, this method has low reliability and a long process flow, and cannot meet the requirements of high-reliability model tasks.

随着卫星发射成本的提高和卫星功能密度的不断增加,原有基于氧化铝陶瓷基板的固放制造模式已经无法满足需求,迫切需要找到一种能显著提高大功率固放电路可靠性的途径。With the increase in satellite launch costs and the continuous increase in satellite functional density, the original solid-state amplifier manufacturing model based on alumina ceramic substrates can no longer meet the demand. There is an urgent need to find a way to significantly improve the reliability of high-power solid-state amplifier circuits.

为了满足大功率电路的需求,产品制作过程中可将Au层加厚至10~15μm,但是由于产品装配过程中涉及到SnPb焊接,过厚的Au层无法通过多次搪锡彻底去金,残余金的存在使焊点的长期可靠性存在隐患。In order to meet the needs of high-power circuits, the Au layer can be thickened to 10-15μm during the product manufacturing process. However, since SnPb welding is involved in the product assembly process, the excessively thick Au layer cannot be completely removed through multiple tinning processes. The presence of residual gold poses a risk to the long-term reliability of the solder joints.

当前,在公开发表的文献以及刊物中,较少有提到薄膜加厚相关工艺、规范以及产品应用的实例。中国专利“印刷电路板的局部图形铜厚加厚的制作方法”,公开号CN108617104A,提供了一种印刷电路板的局部图形铜厚加厚的制作方法,包括以下步骤:来料步骤;钻孔和沉孔步骤;第一次板电步骤;第一次贴干膜步骤;第一次曝光和第一次显影步骤;局部电镀步骤;第一次退膜步骤;第二次板电步骤;喷印抗蚀刻油墨步骤;第二次贴干膜步骤;第二次曝光和第二次显影步骤;蚀刻步骤;第二次退膜步骤。该专利采用“带胶电镀”实现铜层加厚,利用“胶膜”控制铜层侧向生长,然而,“带胶电镀”难以控制铜层在高度方向上的生长,同时“胶膜”可能作为污染源对电镀溶液体系造成污染,影响镀层纯度,最终导致印刷电路板产品性能不合格。At present, there are few examples of film thickening related processes, specifications and product applications in publicly published documents and publications. The Chinese patent "Method for thickening the copper thickness of local graphics of printed circuit boards", publication number CN108617104A, provides a method for thickening the copper thickness of local graphics of printed circuit boards, including the following steps: material incoming step; drilling and countersinking step; first board electrification step; first dry film pasting step; first exposure and first development step; local electroplating step; first film stripping step; second board electrification step; anti-etching ink printing step; second dry film pasting step; second exposure and second development step; etching step; second film stripping step. This patent adopts "adhesive electroplating" to achieve copper layer thickening, and uses "adhesive film" to control the lateral growth of the copper layer. However, "adhesive electroplating" is difficult to control the growth of the copper layer in the height direction. At the same time, the "adhesive film" may act as a pollution source to pollute the electroplating solution system, affecting the purity of the coating, and ultimately resulting in unqualified performance of the printed circuit board product.

中国专利“一种PCB板面单区局部加厚镀铜的生产工艺”,公开号 CN106061127A,提供了一种PCB板面单区局部加厚镀铜的生产工艺,工艺流程主要包括:(1)对铜材进行清洗,清洗液为松香油污清洗液;(2)微蚀,利用 NaPS将底铜微蚀;(3)化学沉铜,将PCB板一次浸入到化学镀液中进行镀铜; (4)图形电镀;(5)掩体,选用抗镀材料加工后得到掩体层;(6)局部加厚镀铜,运用掩体层,进行局部加厚镀铜;(7)喷砂,对铜面喷砂以得到磨砂面;(8)喷锡,喷砂处理后进行喷锡;(9)水洗,水洗时控制温度,并且伴有空气搅拌;(10)镀后用开水烫熔掩体层蜡层回收,再用水溶性清洗剂清洗即可。该专利利用掩体阻挡线条在镀铜过程中侧向生长。然而,掩体同样难以控制铜层在高度方向上的生长,且存在制作复杂,电镀完成后去除工序繁琐的问题。The Chinese patent "A production process for locally thickening copper plating in a single area of a PCB board", publication number CN106061127A, provides a production process for locally thickening copper plating in a single area of a PCB board, the process flow mainly includes: (1) cleaning the copper material, the cleaning liquid is a rosin oil cleaning liquid; (2) micro-etching, using NaPS to micro-etch the bottom copper; (3) chemical copper deposition, immersing the PCB board in a chemical plating solution for copper plating; (4) pattern electroplating; (5) shield, selecting a shield layer after processing with a plating-resistant material; (6) local thickening copper plating, using the shield layer to perform local thickening copper plating; (7) sandblasting, sandblasting the copper surface to obtain a frosted surface; (8) tin spraying, tin spraying after sandblasting; (9) water washing, controlling the temperature during water washing, and accompanied by air stirring; (10) melting the shield layer wax layer with boiling water after plating, and then washing with a water-soluble cleaning agent. This patent uses a shield to prevent the lines from growing laterally during the copper plating process. However, the shelter also has the problem of difficulty in controlling the growth of the copper layer in the height direction, and has the problem of complex manufacturing and cumbersome removal process after electroplating.

中国专利“一种氮化铝基薄膜电路制作方法”,公开号CN104037115A,提供了一种具备锡焊功能表面镀层结构和异形状特征的氮化铝基薄膜电路制作方法,包括以下步骤:步骤101:清洗氮化铝基片。步骤102:将氮化铝基片设置形成正面和反面具有金属种子层薄膜。步骤103:在正面的金属种子层薄膜上使用光刻刻蚀工艺制备形成含异形状特征的电路图形。步骤104:激光加工氮化铝基薄膜电路的内部矩形通孔、或内部矩形通孔与外形异常部分。步骤105:稀盐酸处理。步骤106:制备锡焊功能表面镀层。步骤107:使用砂轮划片机划切氮化铝基薄膜电路的外形常规部分。该专利针对基于氮化铝陶瓷基板的薄膜微波电路板制作,采用物理沉积方式制作金属种子层,再通过图形转移和电镀加厚获得成品,不涉及薄膜加厚工艺。The Chinese patent "A method for manufacturing an aluminum nitride-based thin film circuit", publication number CN104037115A, provides a method for manufacturing an aluminum nitride-based thin film circuit with a soldering functional surface coating structure and a special-shaped feature, comprising the following steps: Step 101: Cleaning the aluminum nitride substrate. Step 102: Arranging the aluminum nitride substrate to form a metal seed layer film on the front and back. Step 103: Using a photolithography process on the metal seed layer film on the front to prepare a circuit pattern with special-shaped features. Step 104: Laser processing the internal rectangular through hole of the aluminum nitride-based thin film circuit, or the internal rectangular through hole and the abnormal shape part. Step 105: Dilute hydrochloric acid treatment. Step 106: Prepare a soldering functional surface coating. Step 107: Use a grinding wheel scriber to scribe the regular shape part of the aluminum nitride-based thin film circuit. This patent is aimed at the production of thin-film microwave circuit boards based on aluminum nitride ceramic substrates. The metal seed layer is prepared by physical deposition, and the finished product is obtained by pattern transfer and electroplating thickening. It does not involve a film thickening process.

中国专利“氧化铝陶瓷电路板制作方法”,公开号CN109195338A,提供了一种氧化铝陶瓷电路板制作方法,包括:步骤1,紫外激光刻蚀:采用紫外激光机对氧化铝陶瓷板依电路图形进行刻蚀,以形成与所述电路图形中的导电部分形状匹配的凹槽;步骤2,填充导电铜浆:用印刷方式将导电铜浆均匀地填充进所述凹槽中,并烘烤;步骤3,磨板:用磨板机将非电路图形的陶瓷面上残留的导电铜浆磨掉;步骤4,表面刷镀:用高速电刷镀笔在电路图形上刷镀铜镍金,即成高可靠精细陶瓷电路板。该专利是使用激光在陶瓷基板上刻蚀出与走线一致的凹槽,然后通过印刷金属浆料与烧结工序制作电路基层,最后在印刷金属膜上方刷镀金属层,不涉及薄膜加厚工艺。The Chinese patent "Method for Making Alumina Ceramic Circuit Board", publication number CN109195338A, provides a method for making an alumina ceramic circuit board, including: step 1, ultraviolet laser etching: using an ultraviolet laser machine to etch the alumina ceramic board according to the circuit pattern to form a groove that matches the shape of the conductive part in the circuit pattern; step 2, filling with conductive copper paste: filling the conductive copper paste into the groove evenly by printing, and baking; step 3, grinding the plate: using a grinding machine to grind off the conductive copper paste remaining on the ceramic surface of the non-circuit pattern; step 4, surface brush plating: using a high-speed brush plating pen to brush copper, nickel and gold on the circuit pattern to form a high-reliability fine ceramic circuit board. This patent uses laser to etch a groove consistent with the routing on the ceramic substrate, and then prints metal slurry and sintering process to make the circuit base layer, and finally brush-plated the metal layer on the printed metal film, without involving the film thickening process.

对国内外论文和期刊文献进行了检索,尚未发现适用于固放产品的微波集成电路薄膜加厚工艺。A search of domestic and foreign papers and journal literature has been conducted, but no microwave integrated circuit film thickening process suitable for solid-state products has been found.

发明内容Summary of the invention

为了克服现有技术中的不足,本发明人进行了锐意研究,提供了一种适用于固放产品的微波集成电路薄膜加厚工艺,通过特有的膜层结构设计,基于薄膜陶瓷电路板制作工艺,采用“四镀一刻”(四次长时间电镀,一次光刻)的方式,解决了较厚膜层电路的制作问题,达到较高的图形精度与膜层附着力,实现多种功能(焊接功能器件、键合金丝/金带/功能器件),满足大功率电路的需求,从而完成本发明。In order to overcome the deficiencies in the prior art, the inventors have conducted intensive research and provided a microwave integrated circuit film thickening process suitable for solid-state products. Through a unique film layer structure design and based on the thin-film ceramic circuit board manufacturing process, the "four plating and one engraving" (four long-term electroplating and one photolithography) method is adopted to solve the problem of manufacturing thicker film layer circuits, achieve higher graphic accuracy and film layer adhesion, realize multiple functions (welding functional devices, bonding gold wires/gold ribbons/functional devices), meet the needs of high-power circuits, and thus complete the present invention.

本发明提供的技术方案如下:The technical solution provided by the present invention is as follows:

第一方面,一种适用于固放产品的微波集成电路薄膜加厚工艺,包括如下步骤:In a first aspect, a microwave integrated circuit film thickening process applicable to solid-state products comprises the following steps:

在带有附着层的陶瓷基片上实施一次镀金,形成的金镀层的厚度为2~3μm;Performing gold plating once on the ceramic substrate with the adhesion layer, the thickness of the formed gold plating layer is 2 to 3 μm;

将掩膜版紧密贴合在一次镀金后涂覆有光敏胶的基片表面,曝光后进行显影、定影以及金属层的腐蚀,完成在金镀层上的光刻;The mask is closely attached to the surface of the substrate coated with photosensitive adhesive after the gold plating, and after exposure, development, fixing and etching of the metal layer are performed to complete the photolithography on the gold plating layer;

在光刻后的金镀层上镀铜,形成的铜镀层的厚度为3~5μm;Copper is plated on the gold-plated layer after photolithography, and the thickness of the formed copper-plated layer is 3 to 5 μm;

在铜镀层上镀镍,形成的镍镀层的厚度为0.5~1μm;Plating nickel on the copper plating layer, the thickness of the formed nickel plating layer is 0.5 to 1 μm;

在镍镀层上实施二次镀金,形成的金镀层的厚度为2~3μm。Secondary gold plating is performed on the nickel plating layer, and the thickness of the formed gold plating layer is 2 to 3 μm.

第二方面,一种薄膜加厚微波集成电路板,如图5所示,由下至上依次包括陶瓷基片、附着层、2~3μm的Au镀层、3~5μm的Cu镀层、0.5~1μm的Ni 镀层以及2~3μm的Au镀层。In the second aspect, a thin film thickened microwave integrated circuit board, as shown in FIG5 , comprises, from bottom to top, a ceramic substrate, an adhesion layer, a 2-3 μm Au plating layer, a 3-5 μm Cu plating layer, a 0.5-1 μm Ni plating layer and a 2-3 μm Au plating layer.

根据本发明提供的一种适用于固放产品的微波集成电路薄膜加厚工艺,具有以下有益效果:A microwave integrated circuit film thickening process suitable for solid-state products provided by the present invention has the following beneficial effects:

(1)根据本发明提供的一种适用于固放产品的微波集成电路薄膜加厚工艺,基于常规陶瓷薄膜电路的“二次叠加式”复合膜层技术路线,创新地解决固放电路产品难以耐受较大电流能力问题;其中“四镀一刻”的工艺流程中,通过镀液和电镀工艺的参数选择,可以达到复合膜层结构镀层厚度与结晶颗粒的高质量控制;(1) A microwave integrated circuit film thickening process suitable for solid-state products provided by the present invention is based on the "secondary stacking" composite film layer technology route of conventional ceramic thin film circuits, which innovatively solves the problem that solid-state circuit products are difficult to withstand large current capabilities; in the "four-plating and one-carving" process flow, the thickness of the composite film layer structure and the high quality control of the crystal particles can be achieved through the selection of plating solution and electroplating process parameters;

(2)根据本发明提供的一种适用于固放产品的微波集成电路薄膜加厚工艺,确定了优化后的膜层结构,在现有薄膜电路结构基础上,增加电镀3~5μm 的Cu层,以保证电路性能的正常实现;同时,为避免Cu层向表面扩散氧化,同时满足后续组装金丝、金带键合要求,在电镀厚Cu的基础上依次电镀 0.5~1μm的Ni、2~3μm的Au,以符合航天可靠性要求;表面金层厚度控制在 2~3μm,可以通过常规的搪锡实现去金,保证铅锡焊接的可靠性;(2) According to a microwave integrated circuit film thickening process suitable for solid-state products provided by the present invention, an optimized film layer structure is determined. On the basis of the existing thin film circuit structure, a 3-5 μm Cu layer is electroplated to ensure the normal realization of circuit performance; at the same time, in order to prevent the Cu layer from diffusing and oxidizing to the surface and meet the subsequent assembly gold wire and gold ribbon bonding requirements, 0.5-1 μm Ni and 2-3 μm Au are electroplated in sequence on the basis of the electroplated thick Cu to meet the aerospace reliability requirements; the surface gold layer thickness is controlled at 2-3 μm, and the gold can be removed by conventional tin plating to ensure the reliability of lead-tin welding;

(3)根据本发明提供的一种适用于固放产品的微波集成电路薄膜加厚工艺,根据确定的膜层结构,对工序进行优化设计,将加厚工艺流程进行优化:将光刻工序放在一次镀金之后,使得微带侧向生长时长显著缩短,从而获得侧面较为整齐的微带,同时提高产品性能稳定性;本发明采用无掩膜、掩体状态下控制微带边缘侧向生长,避免了掩膜、掩体带来的污染或工序繁杂问题。(3) According to a microwave integrated circuit film thickening process suitable for solid-state products provided by the present invention, the process is optimized and designed according to the determined film layer structure, and the thickening process flow is optimized: the photolithography process is placed after the first gold plating, so that the lateral growth time of the microstrip is significantly shortened, thereby obtaining a microstrip with a neater side, and at the same time improving the product performance stability; the present invention controls the lateral growth of the microstrip edge in a mask-free or cover-free state, avoiding the pollution caused by the mask or cover or the complicated process.

(4)根据本发明提供的一种适用于固放产品的微波集成电路薄膜加厚工艺,制得的“准厚膜”电路产品,膜层附着力提高到2kg/mm2以上,金丝键合强度高,线宽/间距精度好,电路膜层厚度可调,电路膜层电阻精度高,电路膜层耐受锡铅焊料次数多,耐电流能力强。(4) According to a microwave integrated circuit film thickening process suitable for solid-state products provided by the present invention, a "quasi-thick film" circuit product is obtained, the film adhesion is increased to more than 2kg/ mm2 , the gold wire bonding strength is high, the line width/spacing accuracy is good, the circuit film thickness is adjustable, the circuit film resistance accuracy is high, the circuit film can withstand many tin-lead solder times, and the current resistance is strong.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1为一种适用于固放产品的微波集成电路薄膜加厚工艺的流程图;FIG1 is a flow chart of a microwave integrated circuit film thickening process applicable to solid-state products;

图2为先光刻后镀膜时微波集成电路薄膜加厚工艺的流程图;FIG2 is a flow chart of a microwave integrated circuit thin film thickening process when photolithography is performed first and then coating is performed;

图3.1和图3.2为采用图2中工艺流程电镀后微带突出部分尺度示意图;图 3.3和图3.4为采用图1中工艺流程电镀后微带侧面图;Figures 3.1 and 3.2 are schematic diagrams of the scale of the protruding part of the microstrip after electroplating using the process flow in Figure 2; Figures 3.3 and 3.4 are side views of the microstrip after electroplating using the process flow in Figure 1;

图4为采用图1中工艺流程电镀后微带侧面尺寸图;FIG4 is a side dimensional diagram of the microstrip after electroplating using the process flow in FIG1;

图5左为现有微波集成电路结构示意图;图5右为本发明中微波集成电路结构示意图;FIG5 on the left is a schematic diagram of the structure of a conventional microwave integrated circuit; FIG5 on the right is a schematic diagram of the structure of a microwave integrated circuit in the present invention;

图6为本发明中微波集成电路结构的SEM图;FIG6 is a SEM image of the microwave integrated circuit structure of the present invention;

图7为固放产品应用场景。Figure 7 shows the application scenario of solid-state products.

具体实施方式Detailed ways

下面通过对本发明进行详细说明,本发明的特点和优点将随着这些说明而变得更为清楚、明确。The following detailed description of the present invention will make the features and advantages of the present invention more clear and explicit.

在这里专用的词“示例性”意为“用作例子、实施例或说明性”。这里作为“示例性”所说明的任何实施例不必解释为优于或好于其它实施例。尽管在附图中示出了实施例的各种方面,但是除非特别指出,不必按比例绘制附图。The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. Although various aspects of the embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless otherwise noted.

如图1所示,本发明提供了一种适用于固放产品的微波集成电路薄膜加厚工艺,薄膜加厚工艺具体阐述如下。As shown in FIG. 1 , the present invention provides a microwave integrated circuit film thickening process applicable to solid-state products. The film thickening process is specifically described as follows.

(1)光绘(1) Light painting

利用光绘设备将电子图形制作为放大若干倍数的底片。采用激光直写工艺时,则可忽略本工序。Use photolithography equipment to make electronic graphics into negatives that are magnified several times. This process can be ignored when using laser direct writing technology.

(2)制版(2) Plate making

采用缩微照相,将放大的电子图形成像在玻璃掩膜版上。采用激光直写制版时,可直接在掩膜版上刻蚀图形。Microphotography is used to image the enlarged electronic pattern on the glass mask. When laser direct writing is used for plate making, the pattern can be directly etched on the mask.

(3)打孔(3) Punching

根据设计需要,决定是否在陶瓷基片上实施打孔工序。目前,通常使用二氧化碳、皮秒或光纤激光加工的方式在陶瓷基片上制孔。According to the design requirements, it is decided whether to implement the drilling process on the ceramic substrate. Currently, carbon dioxide, picosecond or fiber laser processing is usually used to make holes on ceramic substrates.

(4)溅射(4) Sputtering

根据选择附着层的差异,采用不同的通气速率、真空度、功率参数在基片表面实施溅射镀膜,得到附着层。According to the difference of the selected adhesion layer, different ventilation rate, vacuum degree and power parameters are adopted to implement sputtering coating on the surface of the substrate to obtain the adhesion layer.

薄膜加厚微波集成电路产品,正反面溅射膜层结构与常规薄膜微波集成电路产品一致。溅射得到的附着层是后续膜层沉积的种子层,其附着力将决定最终薄膜加厚产品的附着力。The structure of the sputtered film layers on the front and back of the thin film thickened microwave integrated circuit products is consistent with that of conventional thin film microwave integrated circuit products. The adhesion layer obtained by sputtering is the seed layer for the subsequent film deposition, and its adhesion will determine the adhesion of the final thin film thickened product.

(5)一次镀金(5) One-time gold plating

镀金采用中性微氰镀覆体系,溶液pH=5.9~6.1,金含量为8~15g/L,体系温度为50±5℃,电流密度为1~2.3mA/cm2,阳极:阴极(面积比)=2:1。一次镀金厚度为2~3μm。The gold plating adopts a neutral micro-cyanide plating system, the solution pH is 5.9-6.1, the gold content is 8-15g/L, the system temperature is 50±5℃, the current density is 1-2.3mA/ cm2 , and the anode: cathode (area ratio) is 2:1. The thickness of the gold plating is 2-3μm.

在溅射层上直接进行镀铜、镍等后续操作,由于晶格等微观结构差异,会导致铜层与底部溅射层剥离,一次镀金的金层的作用是附着层与其上方镀层的过渡。Subsequent operations such as copper and nickel plating are directly performed on the sputtered layer. Due to differences in microstructures such as the lattice, the copper layer will be peeled off from the bottom sputtered layer. The function of the gold layer of the first gold plating is the transition between the adhesion layer and the plating layer above it.

一次镀金中,中性微氰镀液中金以Au(CN)2 -的形式存在,具有较强的阴极极化作用、分散能力和覆盖能力,镀层细致光亮,因此选用为薄膜加厚的镀金体系。In the primary gold plating, the gold in the neutral micro-cyanide plating solution exists in the form of Au(CN) 2 - , which has strong cathode polarization, dispersion and covering ability, and the coating is fine and bright, so the gold plating system with thickened film is selected.

(6)光刻(6) Photolithography

将步骤(2)中制作的掩膜版紧密贴合在一次镀金后涂覆有光敏胶的基片表面,曝光后进行显影、定影以及金属层的腐蚀,完成图形的转移。The mask produced in step (2) is tightly attached to the surface of the substrate coated with photosensitive adhesive after the gold plating. After exposure, development, fixing and etching of the metal layer are performed to complete the transfer of the pattern.

传统的蚀刻理念中,一般为先光刻后镀膜,对应至本发明中工艺,则步骤 (6)应在步骤(5)前,流程图如图2所示。In the traditional etching concept, photolithography is generally performed first and then coating. Corresponding to the process in the present invention, step (6) should be performed before step (5). The flow chart is shown in Figure 2.

图1和图2工艺流程中均显示,薄膜加厚主要有4次电镀(预镀工序过程时长极短、镀层厚度极小,此处不做讨论):然而,值得注意的是,每增加一次电镀工序,微带(图形)都会进一步侧向生长,进一步放大底层缺陷,甚至超出微带公差要求,使微带边缘呈“锯齿状”。采用图2中工艺流程,四次电镀后,以100μm线宽为标准,突出部分尺度可高达20μm(见图3.1、图3.2)。The process flow in Figure 1 and Figure 2 shows that the film thickening mainly involves four electroplating steps (the pre-plating step is extremely short and the coating thickness is extremely small, which will not be discussed here): However, it is worth noting that with each additional electroplating step, the microstrip (graphic) will further grow laterally, further amplifying the underlying defects, and even exceeding the microstrip tolerance requirements, making the microstrip edge "serrated". Using the process flow in Figure 2, after four electroplating steps, with a line width of 100μm as the standard, the protruding part can be as large as 20μm (see Figures 3.1 and 3.2).

本发明为减少电镀对微带外观的影响,将加厚工艺流程进行优化:将光刻工序放在一次镀金之后。这一操作使得微带侧向生长的机会从四次减少为三次,微带侧向生长时长显著缩短,从而获得侧面较为整齐的微带(见图3.3、图3.4),线条宽度精度可控制在±15μm(以100μm线宽为标准,见图4)。因而,将工艺流程由图2所示的“先刻后镀”改进为图1所示的“先镀后刻”。In order to reduce the impact of electroplating on the appearance of the microstrip, the present invention optimizes the thickening process flow: the photolithography process is placed after the first gold plating. This operation reduces the chances of lateral growth of the microstrip from four times to three times, and the lateral growth time of the microstrip is significantly shortened, thereby obtaining a microstrip with a relatively neat side (see Figure 3.3 and Figure 3.4), and the line width accuracy can be controlled within ±15μm (with a line width of 100μm as the standard, see Figure 4). Therefore, the process flow is improved from "engraving first and then plating" shown in Figure 2 to "plating first and then engraving" shown in Figure 1.

(7)镀铜(7) Copper plating

(7.1)镀前准备(7.1) Preparation before plating

对于表面污迹较多的电路半成品,应使用有机溶剂对基片表面除油。For semi-finished circuits with a lot of surface stains, organic solvents should be used to degrease the substrate surface.

含不导电孤立图形的电路半成品,应先进行金丝互连,使电孤立图形在电镀时与电极连通。金丝作为工艺线,首先应保证所有孤立图形均导通,同时应避开较细线条、输入输出端等关键功能性区域。Semi-finished circuits containing isolated non-conductive patterns should first be interconnected with gold wires to connect the electrically isolated patterns to the electrodes during electroplating. As a process line, the gold wires should first ensure that all isolated patterns are conductive, while avoiding key functional areas such as thinner lines and input and output terminals.

同时可知,本发明中上述先镀后刻的方式,实现了将工艺线键合点“缺陷”电镀放大次数从4次减少到3次的作用,在一定意义上进一步改善了薄膜加厚电路产品的外观。At the same time, it can be seen that the above-mentioned method of plating first and then engraving in the present invention achieves the effect of reducing the number of electroplating amplification times of the "defect" of the process line bonding point from 4 times to 3 times, which in a certain sense further improves the appearance of the thin film thickened circuit product.

镀铜前应对产品表面状态、金丝互联情况进行检查,核对数量、工艺文件齐套性。明确工艺要求、计算施镀面积并清洗挂具。Before copper plating, the surface condition of the product and the interconnection of the gold wires should be checked, and the quantity and completeness of the process documents should be checked. The process requirements should be clarified, the plating area should be calculated, and the hangers should be cleaned.

(7.2)上挂(7.2) Hang up

将基片固定在夹具上,夹点应选择在空白处或检验点上,要求夹持牢靠,不脱落。Fix the substrate on the fixture. The clamping point should be selected at the blank area or the inspection point. It is required to be clamped firmly and not fall off.

(7.3)除油(7.3) Degreasing

在碱性除油液中浸泡除油,严禁使用超声波除油。Degreasing is done by soaking in alkaline degreasing liquid. It is strictly forbidden to use ultrasonic degreasing.

(7.4)氰化镀铜(7.4) Cyanide copper plating

将待镀基片零件挂镀槽中,并在阴极杆上固定好,基片的顶端距镀液液面约5~10cm。每槽电镀最小面积不低于2dm2;如果基片面积不足,用“陪片”(可采用铝合金或铜合金作为电镀配片)使总面积达到2dm2Place the substrate parts to be plated in the plating tank and fix them on the cathode rod. The top of the substrate is about 5 to 10 cm away from the surface of the plating solution. The minimum plating area of each tank is not less than 2dm2 ; if the substrate area is insufficient, use a "companion sheet" (aluminum alloy or copper alloy can be used as the plating companion sheet) to make the total area reach 2dm2 .

氰化镀铜电镀,溶液组分及工艺参数见表1。Cyanide copper plating, solution composition and process parameters are shown in Table 1.

表1氰化镀铜溶液配方及操作条件Table 1 Cyanide copper plating solution formula and operating conditions

下槽后,先使用2±0.5A/dm2的电流密度“冲击镀”1±0.5min,然后降低电流至1.1±0.1A/dm2,继续镀铜,总电镀时间3±1min。After the tank is lowered, a current density of 2±0.5A/dm 2 is used for "impact plating" for 1±0.5min, and then the current is reduced to 1.1±0.1A/dm 2 and copper plating continues. The total electroplating time is 3±1min.

(7.5)酸性光亮镀铜(7.5) Acid bright copper plating

镀铜注意事项与前文相同。The precautions for copper plating are the same as above.

酸性光亮镀铜电镀液中,溶液组分及工艺参数见表2。In the acid bright copper plating solution, the solution components and process parameters are shown in Table 2.

表2光亮镀铜溶液配方及操作条件Table 2 Bright copper plating solution formula and operating conditions

下槽后,先用2±0.5A/dm2的电流密度“冲击镀”1±0.5min,然后将电流降至 1.4±0.1A/dm2,继续镀铜,总电镀时间40±5min。铜层厚度为3~5μm。After the tank is lowered, the current density is 2±0.5A/ dm2 for "impact plating" for 1±0.5min, and then the current is reduced to 1.4±0.1A/ dm2 and copper plating is continued. The total electroplating time is 40±5min. The copper layer thickness is 3~5μm.

化学镀铜体系始终处于非稳态,状态一致性差;氰化镀铜结晶颗粒粗大,难以保证线条侧边的笔直度,但与一次镀金后界面结合力强,因此作为预镀铜工序。而酸性光亮镀铜的镀层光亮、孔隙率低且整平性好,故选用其作为正式镀铜工序。The chemical copper plating system is always in a non-steady state with poor consistency. The cyanide copper plating has coarse crystal particles, which makes it difficult to ensure the straightness of the line side, but the interface bonding strength is strong after the first gold plating, so it is used as a pre-copper plating process. The acid bright copper plating has a bright coating, low porosity and good leveling, so it is selected as the formal copper plating process.

(8)镀镍(8) Nickel plating

镀镍体系的选用必须考虑内应力对膜层与基片、膜层与膜层之间附着力的影响。经大量研发试验后,确定选择氨基磺酸盐镀镍溶液体系。该体系应力低、镀液沉积速度快,且分散能力优于使用硫酸主盐的镀镍溶液。The selection of nickel plating system must consider the effect of internal stress on the adhesion between the film layer and the substrate, and between the film layers. After a large number of R&D tests, it was determined to choose the aminosulfonate nickel plating solution system. This system has low stress, fast plating solution deposition speed, and better dispersion ability than the nickel plating solution using sulfuric acid as the main salt.

氨基磺酸盐镀镍溶液体系,溶液组分及工艺参数见表3。Aminosulfonate nickel plating solution system, solution components and process parameters are shown in Table 3.

表3电镀镍溶液配方及操作条件Table 3 Nickel electroplating solution formula and operating conditions

镍层厚度过小无法阻止下层铜层扩散,存在电路失效风险;而厚度过大则会导致膜层内应力失控,造成电路膜层脱落。为确定这一厚度,对选用不同镍层厚度的薄膜加厚电路片进行了高温储存试验,见表4。If the nickel layer thickness is too small, it cannot prevent the diffusion of the underlying copper layer, and there is a risk of circuit failure; if the thickness is too large, the stress in the film layer will be out of control, causing the circuit film layer to fall off. In order to determine this thickness, high-temperature storage tests were conducted on thin-film thickened circuit sheets with different nickel layer thicknesses, as shown in Table 4.

表4镍层厚度确定试验Table 4 Nickel layer thickness determination test

三组试片金层均为发生颜色变化,即未发生肉眼可见的铜层扩散。进一步采用“序号1”试验样片进行金丝、金带压焊试验。金丝、金带的破坏性拉力测试数值均满足微波集成电路相关检验要求,且断裂方式均为“颈缩处断裂”,可判定金层性能达标,纯度可靠,考虑应力因素,选择镍层厚度为0.5-1μm。The gold layers of the three groups of test pieces all changed color, that is, no visible diffusion of the copper layer occurred. The "serial number 1" test piece was further used for gold wire and gold ribbon pressure welding tests. The destructive tensile test values of the gold wire and gold ribbon all met the relevant inspection requirements of microwave integrated circuits, and the fracture mode was "fracture at the necking point", which can be judged that the performance of the gold layer meets the standard and the purity is reliable. Considering the stress factor, the nickel layer thickness is selected to be 0.5-1μm.

(9)二次镀金(9) Secondary gold plating

(9.1)预镀金(9.1) Pre-gold plating

预镀金前,对镀镍后微波集成电路产品水洗,再采用10wt%~15wt%的柠檬酸溶液进行活化处理,活化温度为室温,活化时间20s~60s。Before pre-gold plating, the nickel-plated microwave integrated circuit product is washed with water, and then activated with a 10wt% to 15wt% citric acid solution, the activation temperature is room temperature, and the activation time is 20s to 60s.

活化后的微波集成电路产品,采用柠檬酸盐镀金液,在柠檬酸盐镀金槽中,预镀金3~5min。其中,柠檬酸盐镀金液,溶液组分及工艺参数见表5。The activated microwave integrated circuit product is pre-plated with gold for 3 to 5 minutes in a citrate gold plating tank using a citrate gold plating solution. The citrate gold plating solution, solution components and process parameters are shown in Table 5.

表5预镀金(1)溶液配方及操作条件Table 5 Pre-gold plating (1) solution formula and operating conditions

(9.2)镀金(9.2)Gold plating

二次镀金厚度为2-3微米。具体操作方法和参数与5)电镀中相同,即:采用中性微氰镀覆体系,溶液pH=5.9~6.1,金含量为8~15g/L,体系温度为50±5℃,电流密度为1~2.3mA/cm2,阳极:阴极面积比=2:1。The thickness of the secondary gold plating is 2-3 microns. The specific operation method and parameters are the same as those in 5) electroplating, that is, a neutral micro-cyanide plating system is used, the solution pH is 5.9-6.1, the gold content is 8-15g/L, the system temperature is 50±5℃, the current density is 1-2.3mA/ cm2 , and the anode: cathode area ratio is 2:1.

至此已经确定了具体的膜层结构。即在现有薄膜电路结构基础上(基片+ 附着层+2~3μm的Au镀层),增加电镀3~5μm的Cu镀层、0.5~1μm的Ni镀层以及2~3μm的Au镀层,如图5所示和图6。So far, the specific film layer structure has been determined. That is, on the basis of the existing thin film circuit structure (substrate + adhesion layer + 2-3μm Au plating), 3-5μm Cu plating, 0.5-1μm Ni plating and 2-3μm Au plating are added, as shown in Figure 5 and Figure 6.

3~5μm Cu镀层的设置可以保证电路性能的正常实现,Cu的选择考量了其优良的导热、导电性能,可以在满足电性能实现的前提下,兼顾散热等需求。 0.5~1μm厚度Ni镀层避免Cu层向表面扩散氧化,同时满足后续组装金丝、金带键合要求,若镍层厚度过小无法阻止下层铜层扩散,存在电路失效风险,而厚度过大则会导致膜层内应力失控,造成电路膜层脱落。表面金层厚度控制在 2~3μm,可以通过常规的搪锡实现去金,保证铅锡焊接的可靠性。采取该工艺条件的模样产品已进行多次试验,能够满足产品性能需求。The setting of 3-5μm Cu plating can ensure the normal realization of circuit performance. The selection of Cu takes into account its excellent thermal and electrical conductivity. It can take into account heat dissipation and other requirements while meeting the requirements of electrical performance. The 0.5-1μm thick Ni plating prevents the Cu layer from diffusing and oxidizing to the surface, while meeting the subsequent assembly gold wire and gold ribbon bonding requirements. If the thickness of the nickel layer is too small, it cannot prevent the diffusion of the underlying copper layer, and there is a risk of circuit failure. If the thickness is too large, the stress in the film layer will be out of control, causing the circuit film layer to fall off. The thickness of the surface gold layer is controlled at 2-3μm, and the gold can be removed by conventional tin plating to ensure the reliability of lead-tin welding. The prototype product using this process condition has been tested many times and can meet the product performance requirements.

本发明中薄膜加厚工艺制得的薄膜加厚微波集成电路,可达到的技术指标如下:The thin film thickening microwave integrated circuit obtained by the thin film thickening process of the present invention can achieve the following technical indicators:

a.电路膜层附着力>2kg/mm2,直径25微米金丝键合强度≥4.5g;250*25 微米金带键合强度≥50g;a. Adhesion of circuit film layer>2kg/ mm2 , bonding strength of 25 micron diameter gold wire≥4.5g; bonding strength of 250*25 micron gold ribbon≥50g;

b.线宽/间距精度±15μm;b. Line width/spacing accuracy ±15μm;

c.电路膜层厚度:10-15μm;c. Circuit film thickness: 10-15μm;

d.电路膜层电阻精度±2%;d. Circuit film layer resistance accuracy ±2%;

e.电路膜层耐受锡铅焊料次数:至少20次,每次3秒;e. Number of times the circuit film layer can withstand tin-lead solder: at least 20 times, 3 seconds each time;

f.耐电流能力:0.4mm线宽/5Af. Current resistance: 0.4mm line width/5A

综上,本发明在薄膜微波集成电路制备工艺的基础之上,结合焊接与键合等多种使用需求与金属材料的物理特性,从确定薄膜加厚的复合膜层结构出发、通过试验确认各个膜层部分的厚度、利用流程优化改善产品质量,最终获得了性能指标均满足航天星载产品要求的薄膜加厚的微波电路产品,达到国内外先进水平。该工艺方法目前已率先在风云2号L频段220W固放、风云3号C频段100W固放、天通S频段20W固放、天链S频段43W固放等多型号、多频段的大功率固放产品得到成功应用,解决了常规工艺膜层耐返修差、耐电流能力不足问题,应用效果良好,见图7。In summary, based on the thin film microwave integrated circuit preparation process, the present invention combines various use requirements such as welding and bonding with the physical properties of metal materials, starting from determining the composite film structure of the film thickening, confirming the thickness of each film layer through experiments, and using process optimization to improve product quality, and finally obtains a film thickening microwave circuit product whose performance indicators meet the requirements of aerospace satellite products, reaching the advanced level at home and abroad. This process method has been successfully applied to high-power solid-state amplifiers of multiple models and bands, such as Fengyun-2 L-band 220W solid-state amplifier, Fengyun-3 C-band 100W solid-state amplifier, Tiantong S-band 20W solid-state amplifier, and Tianlian S-band 43W solid-state amplifier, solving the problems of poor rework resistance and insufficient current resistance of conventional process film layers, and the application effect is good, as shown in Figure 7.

根据本发明的第二方面,提供了一种薄膜加厚微波集成电路板,采用第一方面所述的加厚工艺制备得到,如图5所示,由下至上依次包括陶瓷基片、附着层、2~3μm的Au镀层、3~5μm的Cu镀层、0.5~1μm的Ni镀层以及2~3μm 的Au镀层。According to a second aspect of the present invention, a thin film thickened microwave integrated circuit board is provided, which is prepared by the thickening process described in the first aspect, as shown in FIG5 , and includes, from bottom to top, a ceramic substrate, an adhesion layer, a 2-3 μm Au coating, a 3-5 μm Cu coating, a 0.5-1 μm Ni coating, and a 2-3 μm Au coating.

以上结合具体实施方式和范例性实例对本发明进行了详细说明,不过这些说明并不能理解为对本发明的限制。本领域技术人员理解,在不偏离本发明精神和范围的情况下,可以对本发明技术方案及其实施方式进行多种等价替换、修饰或改进,这些均落入本发明的范围内。本发明的保护范围以所附权利要求为准。The present invention has been described in detail above in conjunction with specific implementations and exemplary examples, but these descriptions cannot be understood as limiting the present invention. Those skilled in the art understand that, without departing from the spirit and scope of the present invention, the technical solution of the present invention and its implementation methods may be subjected to a variety of equivalent substitutions, modifications or improvements, all of which fall within the scope of the present invention. The scope of protection of the present invention shall be subject to the attached claims.

本发明说明书中未作详细描述的内容属本领域技术人员的公知技术。The contents not described in detail in the specification of the present invention belong to the common knowledge of those skilled in the art.

Claims (11)

1. A microwave integrated circuit film thickening process suitable for a solid-state product is characterized by comprising the following steps of:
carrying out primary gold plating on the ceramic substrate with the adhesion layer, wherein the thickness of a formed gold plating layer is 2-3 mu m;
Tightly attaching the mask plate on the surface of the substrate coated with the photosensitive adhesive after primary gold plating, and performing development, fixation and corrosion of a metal layer after exposure to finish photoetching on a gold plating layer;
copper is plated on the gold plating layer after photoetching, and the thickness of the formed copper plating layer is 3-5 mu m;
nickel is plated on the copper plating layer, and the thickness of the nickel plating layer is 0.5-1 mu m;
Performing secondary gold plating on the nickel plating layer, wherein the thickness of the formed gold plating layer is 2-3 mu m; the thickness of the circuit film is 10-15 μm.
2. The process for thickening a thin film of a microwave integrated circuit suitable for a solid-state product according to claim 1, wherein in the step of performing gold plating on the ceramic substrate with the adhesion layer once, a neutral micro cyanide plating system is adopted, the ph=5.9 to 6.1 of the solution, the gold content is 8 to 15g/L, the system temperature is 50±5 ℃, the current density is 1 to 2.3mA/cm 2, and the anode: cathode area ratio = 2:1.
3. The process for thickening a thin film of a microwave integrated circuit suitable for use in a solid-state product according to claim 1, wherein the step of plating copper on the gold plating layer after photolithography comprises a pre-plating preparation process:
and (3) carrying out gold wire interconnection on the circuit semi-finished product containing the non-conductive isolated pattern, so that the electrically isolated pattern is communicated with the electrode during electroplating.
4. The process for thickening a film of a microwave integrated circuit suitable for use in a solid-state product according to claim 1, wherein the step of plating copper on the gold plating layer after photolithography comprises a cyanide copper plating process as a preplating process:
Hanging the substrate part to be plated in a plating tank, fixing the substrate part on a cathode rod, and keeping the top end of the substrate 5-10 cm away from the liquid level of the plating solution; the minimum electroplating area of each groove is not lower than 2dm 2, and if the area of the substrate is insufficient, the total area reaches 2dm 2 by using an electroplating piece;
After the substrate part is put down in the groove, the current density of 2+/-0.5A/dm 2 is firstly used for impact plating for 1+/-0.5 min, then the current is reduced to 1.1+/-0.1A/dm 2, copper plating is continued, and the total electroplating time is 3+/-1 min.
5. The process for thickening a thin film of a microwave integrated circuit suitable for use in a solid-state product according to claim 1, wherein the step of plating copper on the gold plating layer after photolithography comprises a cyanide copper plating process:
Hanging the substrate part to be plated in a plating tank, fixing the substrate part on a cathode rod, and keeping the top end of the substrate 5-10 cm away from the liquid level of the plating solution; the minimum electroplating area of each groove is not lower than 2dm 2, and if the area of the substrate is insufficient, the total area reaches 2dm 2 by using an electroplating piece;
After the substrate part is put down in the groove, the current density of 2+/-0.5A/dm 2 is firstly used for impact plating for 1+/-0.5 min, then the current is reduced to 1.4+/-0.1A/dm 2, copper plating is continued, and the total electroplating time is 40+/-5 min.
6. The process for thickening a film of a microwave integrated circuit suitable for use in a solid state product according to claim 1, wherein in the step of plating nickel on the copper plating layer, the nickel plating system is a sulfamate nickel plating solution system.
7. The process for thickening a microwave integrated circuit film suitable for a solid-state product according to claim 1, wherein in the step of plating nickel on a copper plating layer, the system temperature is 55-65 ℃, the cathode current density is 1-2A/dm 2, the system ph=3.8-4.2, and the anode: cathode area ratio = 2:1, a step of; the stirring mode is cathode movement or cathode rotation and air stirring; the system is filtered regularly or continuously, and the filtering precision is 1-5 mu m; the anode is a sulfur-containing nickel plate or nickel cake.
8. The process for thickening a thin film of a microwave integrated circuit suitable for a solid product according to claim 1, wherein the step of performing secondary gold plating on the nickel plating layer comprises a pre-gold plating process:
before pre-gold plating, washing a nickel-plated microwave integrated circuit product with water, and then activating by adopting 10-15 wt% citric acid solution, wherein the activating temperature is room temperature, and the activating time is 20-60 s;
And pre-plating the activated microwave integrated circuit with citrate gold plating solution in a citrate gold plating tank for 3-5 min.
9. The process for thickening a thin film of a microwave integrated circuit suitable for a solid product according to claim 1, wherein the step of performing the secondary gold plating on the nickel plating layer comprises a gold plating process:
Adopting a neutral micro-cyanide plating system, wherein the pH value of the solution is=5.9-6.1, the gold content is 8-15 g/L, the system temperature is 50+/-5 ℃, the current density is 1-2.3 mA/cm 2, and the anode: cathode area ratio = 2:1.
10. A microwave integrated circuit board with thickened film, which is characterized by being prepared by the microwave integrated circuit film thickening process suitable for solid-state products according to one of claims 1 to 9, and sequentially comprising a ceramic substrate, an adhesion layer, a gold coating of 2-3 mu m, a copper coating of 3-5 mu m, a nickel coating of 0.5-1 mu m and a gold coating of 2-3 mu m from bottom to top.
11. The thin-film thickened microwave integrated circuit board according to claim 10, wherein the adhesion of a circuit film layer of the circuit board is more than 2kg/mm 2, and the gold wire bonding strength with the diameter of 25 micrometers is more than or equal to 4.5g; the bonding strength of the gold ribbon of 250 x 25 microns is more than or equal to 50g; line width/pitch accuracy + -15 μm; the precision of the circuit film resistance is +/-2%; circuit film tolerates tin-lead solder times: at least 20 times, each for 3 seconds; current resistance capability: 0.4mm line width/5A.
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