CN117878138A - Silicon carbide semiconductor epitaxial wafer and preparation method thereof, and silicon carbide semiconductor device - Google Patents

Abstract

The present application provides a silicon carbide semiconductor epitaxial wafer and a preparation method thereof, and a silicon carbide semiconductor device. The silicon carbide semiconductor epitaxial wafer includes a silicon carbide substrate, a first silicon carbide epitaxial layer, and a second silicon carbide epitaxial layer. The first silicon carbide epitaxial layer is disposed on the silicon carbide substrate; the second silicon carbide epitaxial layer is disposed on the first silicon carbide epitaxial layer; the dislocation density of the first silicon carbide epitaxial layer is less than the dislocation density of the silicon carbide substrate. Specifically, the dislocation density of the first silicon carbide epitaxial layer in the present application is less than the dislocation density of the silicon carbide substrate, and the first silicon carbide epitaxial layer is used as the growth surface of the second silicon carbide epitaxial layer, which greatly reduces the probability of the silicon carbide substrate crystal dislocation extending or transforming to the second silicon carbide epitaxial layer, can significantly improve the yield of the epitaxial wafer, and lay a solid foundation for the subsequent improvement of the yield and reliability of silicon carbide semiconductor devices.

Description

Silicon carbide semiconductor epitaxial wafer and preparation method thereof, and silicon carbide semiconductor device

Technical Field

The present application relates to the field of semiconductor technology, and in particular to a silicon carbide semiconductor epitaxial wafer and a preparation method thereof, and a silicon carbide semiconductor device.

Background technique

Silicon carbide (SiC) is a typical representative of the third generation of wide bandgap semiconductor materials. SiC-based power devices have excellent properties such as high frequency, high power, low power consumption, high temperature resistance, high voltage resistance, and radiation resistance. They are the key "core" of new energy vehicles, ultra-high voltage power grids, rail transit, photovoltaic wind power inverters, and next-generation communication technologies. At present, all SiC power devices are built based on SiC epitaxial layers. SiC epitaxial production is the middle link of the SiC semiconductor industry chain, playing a connecting role. Since epitaxial defects directly affect the electrical properties and reliability of back-end devices, the control of epitaxial defects has always been a core issue in the research and development of epitaxial mass production processes.

Since the stacking fault energy of SiC crystal is low, stacking fault (SF) defects are more likely to form inside the material during the 4H-SiC crystal growth and epitaxy process. Literature shows that epitaxial SF defects will become leakage channels for SiC power devices, causing a significant increase in leakage current and a reduction in reverse withstand voltage by more than 20%. Therefore, inhibiting the formation of SF defects in the epitaxial layer is crucial to improving chip yield and reliability.

Summary of the invention

The present application provides a silicon carbide semiconductor epitaxial wafer and a preparation method thereof, and a silicon carbide semiconductor device, which can solve the problem that stacking fault defects are easily formed in the epitaxial layer during the epitaxial process.

To solve the above technical problems, the first technical solution adopted in the present application is: to provide a silicon carbide semiconductor epitaxial wafer, comprising: a silicon carbide substrate; a first silicon carbide epitaxial layer, arranged on the silicon carbide substrate; a second silicon carbide epitaxial layer, arranged on the first silicon carbide epitaxial layer; wherein the dislocation density of the first silicon carbide epitaxial layer is less than the dislocation density of the silicon carbide substrate.

In order to solve the above technical problems, the second technical solution adopted in the present application is: to provide a silicon carbide semiconductor device, wherein the silicon carbide semiconductor device comprises the silicon carbide semiconductor epitaxial wafer described in any one of the above items.

To solve the above technical problems, the third technical solution adopted in the present application is: to provide a method for preparing a silicon carbide semiconductor epitaxial wafer, comprising: providing a silicon carbide substrate; growing a first silicon carbide epitaxial layer on the silicon carbide substrate, wherein the first silicon carbide epitaxial layer is formed by liquid phase epitaxial growth of a carbon film and a silicon film; and growing a second silicon carbide epitaxial layer on the first silicon carbide epitaxial layer.

To solve the above technical problems, the fourth technical solution adopted in the present application is: to provide a method for preparing a silicon carbide semiconductor epitaxial wafer, comprising: providing a silicon carbide substrate; growing a first silicon carbide epitaxial layer on the silicon carbide substrate; growing a second silicon carbide epitaxial layer on the first silicon carbide epitaxial layer; wherein the dislocation density of the first silicon carbide epitaxial layer is less than the dislocation density of the silicon carbide substrate.

Different from the prior art, the beneficial effect of the present application is that, in the silicon carbide semiconductor epitaxial wafer provided by the present application, the dislocation density of the first silicon carbide epitaxial layer is less than the dislocation density of the silicon carbide substrate, and the first silicon carbide epitaxial layer is used as the growth surface of the second silicon carbide epitaxial layer, which greatly reduces the probability of the silicon carbide substrate crystal dislocation extending or transforming to the second silicon carbide epitaxial layer. Compared with the traditional method of directly epitaxially growing the silicon carbide epitaxial layer on the surface of the silicon carbide substrate, the stacking fault density of the second silicon carbide epitaxial layer epitaxially grown on the first silicon carbide epitaxial layer is reduced by more than 40%, which significantly improves the yield of the epitaxial layer and lays a solid foundation for subsequently improving the yield and reliability of silicon carbide semiconductor devices.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:

FIG1 is a schematic structural diagram of an embodiment of a silicon carbide semiconductor epitaxial wafer provided by the present application;

FIG2 is a schematic flow chart of an embodiment of a method for preparing a silicon carbide semiconductor epitaxial wafer provided in the present application;

FIG3 is a schematic diagram of a specific process of an embodiment of step S2 in FIG2 ;

FIG4 is a schematic diagram of an intermediate product of a silicon carbide semiconductor epitaxial wafer provided by the present application after step S1;

FIG5 is a schematic diagram of an intermediate product of a silicon carbide semiconductor epitaxial wafer provided by the present application after step S21;

FIG6 is a schematic diagram of an intermediate product of a silicon carbide semiconductor epitaxial wafer provided by the present application in step S22;

FIG7 is a schematic diagram of an intermediate product of a silicon carbide semiconductor epitaxial wafer provided by the present application in step S22;

FIG8 is a schematic diagram of an intermediate product of a silicon carbide semiconductor epitaxial wafer in step S22 provided by the present application;

FIG9 is a schematic diagram of an intermediate product of a silicon carbide semiconductor epitaxial wafer provided by the present application after step S22;

FIG10 is a schematic diagram of the structure of the silicon carbide semiconductor epitaxial wafer provided in the present application after step S3.

Description of labels:

Silicon carbide semiconductor epitaxial wafer-100; silicon carbide substrate-10; first silicon carbide epitaxial layer-20; second silicon carbide epitaxial layer-30; carbon film-40; liquid silicon film-50; polycrystalline silicon film-60; Si-C melt-70;

First thickness—H1; second thickness—H2; third thickness—H3.

Detailed ways

The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

The terms "first", "second", "third" in this application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the embodiments of this application, all directional indications (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the steps or units listed, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

Taking the current SiC epitaxy, which usually uses an off-axis SiC substrate with a (0001) orientation of <11-20> 4° as the epitaxial substrate, as an example, in the related technology, the introduction of step flow growth through the off-axis substrate greatly reduces the formation of SF defects in epitaxy, which is a major technological advancement in SiC epitaxy. Later, technicians continued to improve epitaxial SF defects by means of high-temperature hydrogen etching of the substrate and growth of a slow buffer layer, reducing its density to about 1ea/ ^cm2 . However, it still requires new technological breakthroughs to further reduce the SF density to below 0.3ea/ ^cm2 .

The use of step flow growth has greatly reduced the incidence of SF defects in epitaxial mass production, but a small amount of in-grown SF defects are still formed. The study of the formation mechanism of such SF defects is still an important research direction in SiC crystal defect theory. Generally speaking, epitaxial SF defects are divided into Shockley type and Frank type stacking faults. Crystal growth theory shows that these two SF defects are directly related to the abnormal evolution of the step state at the dislocation on the substrate surface. The two-dimensional nucleation at the dislocation on the substrate surface at the beginning of growth is often the origin of the stacking fault.

In order to solve the above problems, the present application adopts an optimized substrate surface treatment process to suppress abnormal nucleation at substrate dislocations, so as to effectively suppress epitaxial SF defects.

The present application is described in detail below with reference to the accompanying drawings and embodiments.

Refer to FIG. 1 , which is a schematic structural diagram of an embodiment of a silicon carbide semiconductor epitaxial wafer provided in the present application.

Specifically, the present application provides a silicon carbide semiconductor epitaxial wafer 100, which includes a silicon carbide substrate 10, a first silicon carbide epitaxial layer 20, and a second silicon carbide epitaxial layer 30. The first silicon carbide epitaxial layer 20 is disposed on the silicon carbide substrate 10; the second silicon carbide epitaxial layer 30 is disposed on the first silicon carbide epitaxial layer 20; and the first silicon carbide epitaxial layer 20 serves as an intercalation layer between the silicon carbide substrate 10 and the second silicon carbide epitaxial layer 30.

The dislocation density of the first silicon carbide epitaxial layer 20 is smaller than the dislocation density of the silicon carbide substrate 10 .

The silicon carbide substrate 10 may be a 4H-SiC substrate or a 6H-SiC substrate. Since the 4H-SiC substrate has a higher bulk mobility and a smaller anisotropy, the 4H-SiC substrate is preferably used in the present application.

In some embodiments, the (0001) plane (i.e., the growth plane) of the silicon carbide substrate 10 has an angle deviation orientation of 2°-6° along the <11-20> direction. For example, the (0001) plane of the silicon carbide substrate 10 has an angle deviation orientation of 2° along the <11-20> direction; or, the (0001) plane of the silicon carbide substrate 10 has an angle deviation orientation of 4° along the <11-20> direction; or, the (0001) plane of the silicon carbide substrate 10 has an angle deviation orientation of 6° along the <11-20> direction. This is not limited here, as long as the first silicon carbide epitaxial layer 20 can be better formed on the silicon carbide substrate 10.

The dislocation density of the first silicon carbide epitaxial layer 20 is smaller than that of the silicon carbide substrate 10 , and the first silicon carbide epitaxial layer 20 serves as an intercalation layer between the silicon carbide substrate 10 and the second silicon carbide epitaxial layer 30 .

Specifically, the present application forms a first silicon carbide epitaxial layer 20 with a smaller dislocation density between the silicon carbide substrate 10 and the second silicon carbide epitaxial layer 30 as the growth surface of the second silicon carbide epitaxial layer 30, thereby greatly reducing the probability of the crystal dislocation of the silicon carbide substrate 10 extending or transforming to the second silicon carbide epitaxial layer 30. Compared with the conventional method of directly epitaxially growing the second silicon carbide epitaxial layer 30 on the surface of the silicon carbide substrate 10, the stacking fault density of the second silicon carbide epitaxial layer 30 epitaxially grown on the first silicon carbide epitaxial layer 20 can be reduced by more than 40%, thereby significantly improving the yield of the second silicon carbide epitaxial layer 30, laying a solid foundation for subsequently improving the yield and reliability of silicon carbide semiconductor devices.

In one embodiment, in the silicon carbide semiconductor epitaxial wafer 100 , the thickness ratio of the silicon carbide substrate 10 , the first silicon carbide epitaxial layer 20 , and the second silicon carbide epitaxial layer 30 is 290-500: 0.05-0.5: 5-100.

Specifically, the thickness of the first silicon carbide epitaxial layer 20 should not be too large as a proportion of the total thickness of the silicon carbide semiconductor epitaxial wafer 100, otherwise it will cause severe wafer warping and increase internal stress. Of course, the thickness of the first silicon carbide epitaxial layer 20 should not be too small as a proportion of the total thickness of the silicon carbide semiconductor epitaxial wafer 100, otherwise it will not be able to effectively block the extension of dislocations in the substrate.

In a specific embodiment, the thickness of the first silicon carbide epitaxial layer 20 is 50-500 nm. Accordingly, the thickness of the silicon carbide substrate 10 and the thickness of the second silicon carbide epitaxial layer 30 can be designed according to the above ratio.

In one embodiment, metal ions are further doped in the first silicon carbide epitaxial layer 20. Specifically, during the preparation of the first silicon carbide epitaxial layer 20, doping with metal ions can help to melt the carbon film formed in the previous process, thereby facilitating epitaxial formation of the first silicon carbide epitaxial layer 20 on the growth surface of the silicon carbide substrate 10. Exemplarily, the doping concentration of the metal ions can range from 1E19 to 1E21/cm3, for example, 1E20/cm3.

In some embodiments, the metal ions include at least one of titanium ions, chromium ions, vanadium ions, and iron ions. The source of the metal ions may be formed from gas-phase halides or organic compounds of the corresponding metals.

In one embodiment, the type of metal ions doped in the first silicon carbide epitaxial layer 20 is one, and because the atomic density of the metal ions in the first silicon carbide epitaxial layer 20 is greater than the atomic density of other components, the doping concentration of the metal ions gradually decreases in the direction from the first silicon carbide epitaxial layer 20 toward the second silicon carbide epitaxial layer 30.

In one embodiment, there are multiple types of metal ions doped in the first silicon carbide epitaxial layer 20, wherein the multiple metal ions are classified according to the atomic density of the metal ions, and the multiple metal ions include heavy metal ions and light metal ions. Since the atomic density of heavy metal ions is greater than that of light metal ions, the doping concentration of heavy metal ions in the area of the first silicon carbide epitaxial layer 20 close to the silicon carbide substrate 10 is greater than the doping concentration of light metal ions.

In one embodiment, nitrogen ions are also doped in the first silicon carbide epitaxial layer 20. Specifically, the co-doping of metal ions and nitrogen ions can adjust the lattice constant of the first silicon carbide epitaxial layer 20, thereby reducing the stacking fault density of the second silicon carbide epitaxial layer 30 epitaxially grown on the first silicon carbide epitaxial layer 20, and significantly improving the yield of the second silicon carbide epitaxial layer 30.

In one embodiment, the nitrogen ions in the first silicon carbide epitaxial layer 20 have a first doping concentration; the nitrogen ions in the second silicon carbide epitaxial layer 30 have a second doping concentration; and the first doping concentration is greater than the second doping concentration.

In one embodiment, the first doping concentration ranges from 1E18 to 1E19, and the second doping concentration ranges from 1E15 to 2E16. The specific design can be made according to actual needs.

Specifically, the silicon carbide semiconductor epitaxial wafer 100 provided in the present application can greatly reduce the probability of crystal dislocations of the silicon carbide substrate 10 extending or transforming to the second silicon carbide epitaxial layer 30 by forming a first silicon carbide epitaxial layer 20 with a dislocation density less than that of the silicon carbide substrate 10 between the silicon carbide substrate 10 and the second silicon carbide epitaxial layer 30 as the growth surface of the second silicon carbide epitaxial layer 30, thereby significantly improving the yield of the second silicon carbide epitaxial layer 30 and laying a solid foundation for subsequently improving the yield and reliability of silicon carbide semiconductor devices. In addition, by doping metal ions and nitrogen ions in the first silicon carbide epitaxial layer 20, the metal ions can help to melt the carbon film formed in the previous process, thereby helping to form the first silicon carbide epitaxial layer 20, and the co-doping of metal ions and nitrogen ions can adjust the lattice constant of the first silicon carbide epitaxial layer 20, thereby helping to reduce the stacking fault density of the second silicon carbide epitaxial layer 30 epitaxially grown on the first silicon carbide epitaxial layer 20, and significantly improve the yield of the second silicon carbide epitaxial layer 30.

Referring to Figures 2 and 10, Figure 2 is a flow chart of an embodiment of a method for preparing a silicon carbide semiconductor epitaxial wafer provided in the present application; Figure 3 is a specific flow chart of an embodiment of step S2 in Figure 2; Figure 4 is a schematic diagram of an intermediate product of the silicon carbide semiconductor epitaxial wafer provided in the present application after step S1; Figure 5 is a schematic diagram of an intermediate product of the silicon carbide semiconductor epitaxial wafer provided in the present application after step S21; Figure 6 is a schematic diagram of an intermediate product of the silicon carbide semiconductor epitaxial wafer provided in the present application in step S22; Figure 7 is a schematic diagram of an intermediate product of the silicon carbide semiconductor epitaxial wafer provided in the present application in step S22; Figure 8 is a schematic diagram of an intermediate product of the silicon carbide semiconductor epitaxial wafer provided in the present application in step S22; Figure 9 is a schematic diagram of an intermediate product of the silicon carbide semiconductor epitaxial wafer provided in the present application after step S22; Figure 10 is a structural schematic diagram of the silicon carbide semiconductor epitaxial wafer provided in the present application after step S3.

Specifically, the present application also provides a method for preparing a silicon carbide semiconductor epitaxial wafer 100, comprising:

Step S1 : providing a silicon carbide substrate 10 .

Referring to FIG. 4 , the silicon carbide substrate 10 may be a 4H-SiC substrate or a 6H-SiC substrate. Since the 4H-SiC substrate has a higher bulk mobility and a smaller anisotropy, the 4H-SiC substrate is preferably used in the present application.

In some embodiments, the growth surface of the silicon carbide substrate 10 has an angle deviation orientation of 2°-6° along the <11-20> direction. In the embodiment of the present application, the growth surface of the silicon carbide substrate 10 has an angle deviation orientation of 4° along the <11-20> direction, and the growth surface of the silicon carbide substrate 10 is a silicon (Si) surface.

Step S2 : growing a first silicon carbide epitaxial layer 20 on the silicon carbide substrate 10 .

The dislocation density of the first silicon carbide epitaxial layer 20 is smaller than the dislocation density of the silicon carbide substrate 10 .

In order to make the dislocation density of the first silicon carbide epitaxial layer 20 smaller than the dislocation density of the silicon carbide substrate 10 , the first silicon carbide epitaxial layer 20 is formed by liquid phase epitaxial growth of a carbon film and a silicon film.

Specifically, by forming a first silicon carbide epitaxial layer 20 with a smaller dislocation density than the silicon carbide substrate 10 on the silicon carbide substrate 10 as the growth surface of the second silicon carbide epitaxial layer 30 formed in the subsequent process, the probability of the crystal dislocations of the silicon carbide substrate 10 extending or transforming to the second silicon carbide epitaxial layer 30 can be greatly reduced, and the yield of the second silicon carbide epitaxial layer 30 can be significantly improved, laying a solid foundation for subsequently improving the yield and reliability of silicon carbide semiconductor devices.

Referring to FIG. 3 , in one embodiment, step S2 includes:

Step S21 : forming a carbon film 40 on the silicon carbide substrate 10 .

In one embodiment, before step S21 , the method further includes: introducing a fourth reaction gas into the reaction chamber under a third preset condition to perform a high temperature treatment on the silicon carbide substrate 10 placed in the reaction chamber.

The third preset condition is to raise the temperature in the reaction chamber to greater than 1600° C.; the fourth reaction gas includes an inert gas, such as H ₂ and/or HCl gas.

Specifically, the silicon carbide substrate 10 provided in step S1 is placed in a reaction chamber of an epitaxial furnace and heated to above 1600° C. The surface of the silicon carbide substrate 10 (including the growth surface) is etched in an inert atmosphere to remove dirt and processing damage layers on the surface of the silicon carbide substrate 10 wafer, so as to provide a clean and flat growth surface for the subsequently formed film layer.

5 , in one embodiment, step S21 specifically includes: introducing a reaction gas into a reaction chamber under a preset temperature range and a preset pressure range to treat the silicon carbide substrate 10 for a preset time, thereby forming a carbon film 40 on the growth surface of the silicon carbide substrate 10 .

Among them, the preset temperature range is 1350-1550°C, the preset pressure range is 100-1000mbar; the reaction gas is an inert gas (such as argon or helium, etc.), and the preset time range is 5-10min.

Specifically, the temperature in the reaction chamber is lowered from more than 1600° C. to 1350-1550° C., and the silicon carbide substrate 10 is subjected to high temperature annealing for 5-10 minutes in an inert gas atmosphere, and the pressure in the reaction chamber is set to 100-1000 mbar, so that a layer of carbon film 40 with a specific orientation is formed on the growth surface of the silicon carbide substrate 10. The carbon film 40 uniformly covering the growth surface of the silicon carbide substrate 10 provides a deposition surface for forming a flat and smooth silicon film in the next step.

In some embodiments, the second thickness H2 of the carbon film 40 is in the range of 10-50 nm, for example, 10 nm, 20 nm, 30 nm, 40 nm or 50 nm, etc., which is not limited here. Specifically, the carbon film 40 with a certain thickness is used to provide sufficient carbon source for the subsequently formed silicon film.

Step S22 : forming a liquid silicon film 50 on the surface of the carbon film 40 . The liquid silicon film 50 dissolves the carbon film 40 and forms a first silicon carbide epitaxial layer 20 by liquid phase epitaxial growth.

6 and 7 , in one embodiment, step S22 specifically includes: forming a polysilicon film 60 having a first thickness H1 on the carbon film 40 ; and performing high temperature treatment on the polysilicon film 60 to melt the polysilicon film 60 to form a liquid silicon film 50 .

The ratio of the first thickness H1 to the second thickness H2 is 50:1-150:1. In the embodiment of the present application, the first thickness H1 is 1000-5000 nm. Specifically, the thickness of the polysilicon film 60 cannot be too large, otherwise the carbon film 40 will not be able to provide sufficient carbon source for the liquid silicon film 50 formed after the polysilicon film 60 is dissolved.

The polysilicon film may be formed by using vacuum coating technology or atmospheric deposition technology.

Of course, the order of forming the carbon film 40 and the polysilicon film 60 can be replaced. Specifically, in another embodiment, step S2 includes: forming a polysilicon film 60 on the silicon carbide substrate 10; forming a carbon film 40 on the surface of the polysilicon film 60; high-temperature treatment to melt the polysilicon film 60 to form a liquid silicon film 50, the liquid silicon film 50 dissolves the carbon film 40 and forms a first silicon carbide epitaxial layer 20 by liquid phase epitaxial growth.

In one embodiment, the step of forming the polysilicon film 60 having a first thickness H1 on the carbon film 40 includes:

6 , under a first preset condition, a first reaction gas including a silicon source gas is introduced into the reaction chamber to form a polysilicon film 60 having a first thickness H1 on the carbon film 40 .

Among them, the first preset condition is to continue to cool the temperature in the reaction chamber to a temperature range of 1100-1300° C. after step S21, and introduce a first reaction gas containing a silicon source such as SiH4, SiHCl ₃ and/or SiH ₂ Cl ₂ into the furnace to deposit a polycrystalline silicon film 60 with a first thickness H1 on the surface of the carbon film 40.

In one embodiment, the step of subjecting the polysilicon film 60 to high temperature treatment to melt the polysilicon film 60 to form the liquid silicon film 50 includes:

7 , the polysilicon film 60 is subjected to high temperature treatment under a preset temperature range and a preset pressure range, so that the polysilicon film 60 is melted to form a liquid silicon film 50 .

In this step, the preset temperature range is 1500-1600°C, and the preset pressure range is 800-1500 mbar. Specifically, the wafer temperature is raised to 1500-1600°C, and the pressure range is set to 800-1500 mbar. The solid polysilicon film 60 is melted to form a liquid silicon film 50, and then the liquid silicon film 50 dissolves the carbon film 40 and forms the first silicon carbide epitaxial layer 20 by liquid phase epitaxial growth.

In one embodiment, the first reaction gas further includes a gas-phase halide or organic compound having metal ions, so as to dope the polysilicon film 60 with metal ions when forming the polysilicon film 60 . Doping with metal ions can help to promote the melting of the carbon film 40 formed in the previous process.

8 , the liquid silicon film 50 is dissolved to form a carbon film 40 after step S21. Meanwhile, the metal ions in the liquid silicon film 50 can increase the solubility of carbon atoms in the melt to form a silicon-rich Si-C melt 70. The silicon-rich Si-C melt 70 is used as a reactant to epitaxially grow a single-crystal first silicon carbide epitaxial layer 20 on the surface of the silicon carbide substrate 10 in the form of liquid phase epitaxy and a step flow growth mode.

In some embodiments, the metal ions include at least one of titanium ions, chromium ions, vanadium ions, iron ions, and molybdenum ions.

In one embodiment, the first reaction gas further includes NH _3. Specifically, NH ₃ is introduced when the polysilicon film 60 is formed, so as to dope nitrogen ions in the polysilicon film 60 when the polysilicon film 60 is formed. The co-doping of metal ions and nitrogen ions can adjust the lattice constant of the first silicon carbide epitaxial layer 20 formed in the subsequent process, thereby reducing the stacking fault density of the second silicon carbide epitaxial layer 30 epitaxially grown on the first silicon carbide epitaxial layer 20, and significantly improving the yield of the second silicon carbide epitaxial layer 30.

Specifically, in step S22, silicon source gas (SiH4, SiHCl ₃ and/or SiH ₂ Cl ₂ , etc.), gaseous halide or metal organic compound containing metal ions (Ti, Cr, V, Fe, etc.) and NH ₃ are introduced into the reaction chamber to deposit a polysilicon film 60 doped with N and metal ions on the surface of the carbon film 40. In this embodiment, the first reaction gas also includes H ₂ , and the gas flow rate of H ₂ is 60-130 slm; the flow rate of the silicon source gas is 50-150 sccm; the doping concentration of metal ions in the polysilicon film 60 is 1E18-1E20/cm ³ , and the doping concentration of N is 1E18-1E19/cm ³ .

In one embodiment, the steps of dissolving the carbon film 40 with the liquid silicon film 50 and forming the first silicon carbide epitaxial layer 20 by liquid phase epitaxial growth include:

A second reaction gas containing a carbon source gas is introduced into the reaction chamber to replenish carbon atoms in the liquid silicon film 50 , thereby forming a first silicon carbide epitaxial layer 20 having a third thickness H3 by liquid phase epitaxial growth.

The carbon source gas includes CH ₄ , C ₃ H ₈ and/or C ₂ H ₄ and the like.

Referring to FIG9 , specifically, a carbon source gas is introduced into the reaction chamber, and carbon atoms generated by the decomposition of the carbon source gas are dissolved in the Si-C melt 70, and diffused toward the epitaxial interface to supplement the carbon atoms required for epitaxy, and the first silicon carbide epitaxial layer 20 continuously grows upward, and finally forms a first silicon carbide epitaxial layer 20 with a third thickness H3. The dislocation density (TSD, TED, BPD) in the first silicon carbide epitaxial layer 20 is reduced to less than 40% of the initial 4H-SiC substrate, and the doping type is co-doped with N ions and metal ions, and the lattice parameter is slightly larger than the initial silicon carbide substrate 10.

In one embodiment, the third thickness H3 is 50-500nm. For example, the third thickness H3 can be 50nm, 100nm, 200nm, 300nm, 400nm or 50nm, etc., which is not limited here. Specifically, the first silicon carbide epitaxial layer 20 with the third thickness H3 is used to provide a growth surface for the subsequently formed second silicon carbide epitaxial layer 30 to reduce the probability of crystal dislocations of the silicon carbide substrate 10 extending or transforming to the second silicon carbide epitaxial layer 30.

In one embodiment, the second reaction gas further comprises a gas-phase halide or organic compound having a second metal ion; wherein the second metal ion comprises at least one of titanium ion, chromium ion, vanadium ion, iron ion and wood ion.

Specifically, doping with the second metal ion can help to melt the carbon film 40 when the liquid silicon film 50 dissolves the carbon film 40. In addition, it should be noted that although both the first metal ion and the second metal ion can help to melt the carbon film 40, doping with the second metal ion when forming the liquid silicon film 50 cannot replace doping with the first metal ion when forming the polysilicon film 60, because the liquid silicon film 50 in the liquid phase has a diffusion effect, which easily leads to uneven doping. Therefore, doping with the first metal ion in the polysilicon film 60 makes the distribution of the metal ions in the polysilicon film 60 more uniform than doping with the second metal ion when forming the liquid silicon film 50.

Step S3 : growing a second silicon carbide epitaxial layer 30 on the first silicon carbide epitaxial layer 20 .

In one embodiment, before step S3 , the process further includes: stopping the introduction of the carbon source gas into the reaction chamber, and introducing a third reaction gas into the reaction chamber under a second preset condition to remove the liquid silicon film 50 remaining on the surface of the first silicon carbide epitaxial layer 20 .

The second preset condition is to raise the temperature in the reaction chamber after step S2 to a temperature greater than 1650°C.

The third reaction gas may be H ₂ and/or HCl gas. Specifically, the supply of the carbon source into the reaction chamber is terminated, and the wafer formed after step S2 is heated to above 1650° C., and the residual liquid silicon film 50 on the surface of the first silicon carbide epitaxial layer 20 is etched away with H ₂ and/or HCl to expose the first silicon carbide epitaxial layer 20 .

In one embodiment, step S3 specifically includes: under a fourth preset condition, introducing a fifth reaction gas into the reaction chamber to form a second silicon carbide epitaxial layer 30 on the surface of the first silicon carbide epitaxial layer 20 .

The fourth preset condition is to set the temperature range in the reaction chamber to 1550-1700°C, the pressure range to 50-300 mbar, _and the fifth reaction gas includes at least one of _SiH4 , _SiHCl3 and _SiH2Cl2 , _and at least one of _{C3H8 and C2H4} .

Referring to FIG. 10 , specifically, SiH ₄ , SiHCl ₃ and/or SiH ₂ Cl ₂ gas, and C ₃ H ₈ and/or C ₂ H ₄ gas are introduced into the reaction chamber, so as to prepare the second silicon carbide epitaxial layer 30 on the surface of the first silicon carbide epitaxial layer 20 by CVD method, and finally form the structure of silicon carbide semiconductor epitaxial wafer 100. In this step, the epitaxial growth pressure is 50-300 mbar, the temperature range is 1550-1700° C., and the growth rate is 1.5-150 m/h. Since the defect density in the first silicon carbide epitaxial layer 20 is greatly reduced compared with the SiC silicon carbide substrate 10 produced by the PVT method, the probability of stacking fault defect formation is greatly reduced when the second silicon carbide epitaxial layer 30 is grown by CVD on the surface of the first silicon carbide epitaxial layer 20.

Specifically, the method for preparing the silicon carbide semiconductor epitaxial wafer 100 provided in the present application, by forming a first silicon carbide epitaxial layer 20 formed by liquid phase epitaxial growth of a carbon film 40 and a liquid silicon film 50 on a silicon carbide substrate 10, as a growth surface for a second silicon carbide epitaxial layer 30, can greatly reduce the probability of crystal dislocations of the silicon carbide substrate 10 extending or transforming into the second silicon carbide epitaxial layer 30, significantly improve the yield of the second silicon carbide epitaxial layer 30, and lay a solid foundation for subsequently improving the yield and reliability of silicon carbide semiconductor devices. In addition, by doping metal ions and nitrogen ions when preparing the first silicon carbide epitaxial layer 20, the metal ions can help to melt the carbon film 40 formed in the previous process, thereby helping to form the first silicon carbide epitaxial layer 20, and the co-doping of metal ions and nitrogen ions can adjust the lattice constant of the first silicon carbide epitaxial layer 20, thereby helping to reduce the stacking fault density of the second silicon carbide epitaxial layer 30 epitaxially grown on the first silicon carbide epitaxial layer 20, and significantly improve the yield of the second silicon carbide epitaxial layer 30.

The present application also provides a silicon carbide semiconductor device (not shown), which includes the silicon carbide semiconductor epitaxial wafer 100 provided in any of the above embodiments, or the silicon carbide semiconductor device is prepared by the method for preparing the silicon carbide semiconductor epitaxial wafer 100 provided in any of the above embodiments.

In some embodiments, the silicon carbide semiconductor device may be a planar gate semiconductor device or a trench gate semiconductor device. The planar gate semiconductor device and the trench gate semiconductor device are formed based on the silicon carbide semiconductor epitaxial wafer 100 provided in any of the above embodiments of the present application, and other structures in the device are basically the same as those in the prior art, and are not described in detail here.

Specifically, the silicon carbide semiconductor device provided in the present application adopts a silicon carbide semiconductor epitaxial wafer 100 as the outer edge structure of the device, which can significantly reduce the stacking fault density of the second silicon carbide epitaxial layer 30, improve the yield of the second silicon carbide epitaxial layer 30, and lay a solid foundation for subsequently improving the yield and reliability of silicon carbide semiconductor devices.

The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims (22)

1. A silicon carbide semiconductor epitaxial wafer, comprising:

a silicon carbide substrate;

the first silicon carbide epitaxial layer is arranged on the silicon carbide substrate;

the second silicon carbide epitaxial layer is arranged on the first silicon carbide epitaxial layer;

wherein the dislocation density of the first silicon carbide epitaxial layer is less than the dislocation density of the silicon carbide substrate.

2. The silicon carbide semiconductor epitaxial wafer of claim 1, wherein the first silicon carbide epitaxial layer is doped with metal ions.

3. The silicon carbide semiconductor epitaxial wafer of claim 2, wherein the metal ions comprise at least one of titanium ions, chromium ions, vanadium ions, and iron ions.

4. A silicon carbide semiconductor epitaxial wafer according to claim 2 or 3, wherein the kind of the metal ions doped in the first silicon carbide epitaxial layer is one, and the doping concentration of the metal ions gradually decreases in the direction of the first silicon carbide epitaxial layer toward the second silicon carbide epitaxial layer.

5. A silicon carbide semiconductor epitaxial wafer according to claim 2 or claim 3 wherein the metal ions doped in said first silicon carbide epitaxial layer are of a plurality of species, wherein a plurality of said metal ions comprise heavy metal ions and light metal ions, and wherein said first silicon carbide epitaxial layer is adjacent to a region of said silicon carbide substrate, said heavy metal ions having a doping concentration greater than that of said light metal ions.

6. The silicon carbide semiconductor epitaxial wafer of claim 2, wherein the first silicon carbide epitaxial layer and the second silicon carbide epitaxial layer are further doped with nitrogen ions.

7. The silicon carbide semiconductor epitaxial wafer of claim 6, wherein nitrogen ions in the first silicon carbide epitaxial layer have a first doping concentration; nitrogen ions in the second silicon carbide epitaxial layer have a second doping concentration;

the first doping concentration is greater than the second doping concentration.

8. The silicon carbide semiconductor epitaxial wafer of claim 7, wherein the first doping concentration ranges from 1E17 to 1E19 and the second doping concentration ranges from 1E14 to 1E18.

9. The silicon carbide semiconductor epitaxial wafer of claim 1, wherein the silicon carbide substrate, the first silicon carbide epitaxial layer, and the second silicon carbide epitaxial layer have a thickness ratio of: 290-500: 0.05 to 0.5:5 to 100.

10. The silicon carbide semiconductor epitaxial wafer of claim 9, wherein the first silicon carbide epitaxial layer has a thickness of 50-500nm.

11. A silicon carbide semiconductor device comprising the silicon carbide semiconductor epitaxial wafer of any one of claims 1 to 10.

12. The preparation method of the silicon carbide semiconductor epitaxial wafer is characterized by comprising the following steps of:

providing a silicon carbide substrate;

forming a first silicon carbide epitaxial layer on the silicon carbide substrate by growth, wherein the first silicon carbide epitaxial layer is formed by liquid phase epitaxial growth of a carbon film and a silicon film;

and growing a second silicon carbide epitaxial layer on the first silicon carbide epitaxial layer.

13. The preparation method of the silicon carbide semiconductor epitaxial wafer is characterized by comprising the following steps of:

providing a silicon carbide substrate;

forming a first silicon carbide epitaxial layer on the silicon carbide substrate;

forming a second silicon carbide epitaxial layer on the first silicon carbide epitaxial layer;

wherein the dislocation density of the first silicon carbide epitaxial layer is less than the dislocation density of the silicon carbide substrate.

14. The method of preparing as claimed in claim 13, wherein the step of growing a first silicon carbide epitaxial layer on the silicon carbide substrate comprises:

forming a carbon film on the silicon carbide substrate;

and forming a liquid silicon film on the surface of the carbon film, wherein the liquid silicon film dissolves the carbon film and forms the first silicon carbide epitaxial layer through liquid phase epitaxial growth.

15. The method according to claim 14, wherein the step of forming a liquid silicon film on the surface of the carbon film includes:

forming a polysilicon film having a first thickness on the carbon film;

and carrying out high-temperature treatment on the polycrystalline silicon film so as to enable the polycrystalline silicon film to be melted to form the liquid silicon film.

16. The method of manufacturing according to claim 15, wherein the step of forming a polysilicon film having a first thickness on the carbon film includes:

and under a first preset condition, introducing a first reaction gas comprising a silicon source gas into the reaction cavity to form a polycrystalline silicon film with the first thickness on the carbon film.

17. The method of claim 16, wherein the first reactant gas further comprises a vapor phase halide or organic compound having a first metal ion;

wherein the first metal ion includes at least one of titanium ion, chromium ion, vanadium ion, iron ion, and molybdenum ion.

18. The method of preparing according to claim 14, wherein the step of dissolving the carbon film in the liquid silicon film and forming the first silicon carbide epitaxial layer by liquid phase epitaxial growth comprises:

and introducing a second reaction gas containing carbon source gas into the reaction cavity to supplement carbon atoms in the liquid silicon film, so that the first silicon carbide epitaxial layer is formed by liquid phase epitaxial growth.

19. The method of claim 18, wherein the second reactant gas further comprises a vapor phase halide or organic compound having a second metal ion;

wherein the second metal ion includes at least one of titanium ion, chromium ion, vanadium ion, iron ion, and molybdenum ion.

20. The method of preparing as claimed in claim 14, wherein before growing the second silicon carbide epitaxial layer on the first silicon carbide epitaxial layer, further comprising:

and stopping introducing carbon source gas into the reaction cavity, and introducing third reaction gas into the reaction cavity under a second preset condition to remove the liquid silicon film remained on the surface of the first silicon carbide epitaxial layer.

21. The method of preparing as claimed in claim 13, wherein the step of growing a first silicon carbide epitaxial layer on the silicon carbide substrate comprises:

forming a polysilicon film on the silicon carbide substrate;

forming a carbon film on the surface of the polysilicon film;

and (3) performing high-temperature treatment to enable the polycrystalline silicon film to be melted to form a liquid silicon film, wherein the liquid silicon film dissolves the carbon film and forms the first silicon carbide epitaxial layer through liquid phase epitaxial growth.

22. The method of producing according to claim 13, further comprising, before the step of forming the carbon film on the silicon carbide substrate:

under a third preset condition, introducing a fourth reaction gas into the reaction cavity to perform high-temperature treatment on the silicon carbide substrate placed in the reaction cavity;

wherein the fourth reaction gas is an inert gas.