CN105826409A - Local back field N type solar cell, preparation method thereof, assembly and system - Google Patents

Abstract

The invention relates to a partial back field N-type solar cell and a preparation method, component and system thereof. A method for preparing a partial back field N-type solar cell of the present invention comprises the following steps: after doping the N-type crystalline silicon substrate and treating the growth barrier layer, printing acid-resistant slurry on the back surface thereof to form a sub-grid pattern mask Then immerse in an acid solution to remove the barrier layer in the area not covered by the mask; immerse in an alkaline solution to remove the mask, and simultaneously etch other areas while retaining the n+ heavily doped area under the mask; again immerse in an acid solution to remove The remaining barrier layer; finally prepare the electrode to complete the preparation of the back field N-type solar cell. The beneficial effect is that the contact resistance is low because the back sub-gate is only in contact with the local n+ heavily doped region; at the same time, the region not in contact with the back sub-gate is a non-doped region, so the Auger recombination is low. The fabricated battery has high photoelectric conversion efficiency.

Description

A local back field N-type solar cell and its preparation method, component and system

technical field

The invention relates to the technical field of solar cells, in particular to a partial back field N-type solar cell and a preparation method, component and system thereof.

Background technique

A solar cell is a semiconductor device that converts solar energy into electricity. At present, the mainstream products in the industry are P-type crystalline silicon solar cells. The battery process is simple, but it has a light-induced decay effect, that is, the efficiency of the battery will gradually decay with time, which is mainly due to the combination of boron atoms doped into the P-type silicon substrate and oxygen atoms in the substrate. Produces boron-oxygen pair results. Studies have shown that the boron-oxygen pair acts as a carrier trap, reducing the minority carrier lifetime, which leads to the attenuation of the photoelectric conversion efficiency of the battery. Compared with P-type crystalline silicon solar cells, N-type crystalline silicon solar cells have the advantages of small light-induced attenuation, good resistance to metal impurity pollution, and long minority carrier diffusion length, and because the positive and negative electrodes of N-type crystalline silicon solar cells can be It is made into a conventional H-shaped grid electrode structure, so not only the front side of the battery can absorb light, but the back surface can also absorb reflected and scattered light to generate additional electricity.

Common N-type crystalline silicon solar cells have a p+/n/n+ structure, in which the front surface of the cell is doped with p+ type, and the back surface is doped with n+ type. In order to reduce the contact resistance between the back electrode and the n+ doped region, it is desirable that the n+ layer be heavily doped. In order to improve the open-circuit voltage and short-circuit current of the battery, it is necessary to reduce heavy doping to bring about high Auger recombination. At this time, it is desired that the n+ layer is lightly doped. The prior art cannot well solve the contradiction between the fill factor caused by the n+ type doped region on the back surface and the open circuit voltage and short circuit current.

Contents of the invention

The object of the present invention is to overcome the deficiencies of the prior art and provide a partial back field N-type solar cell and its preparation method, assembly and system. The partial back field N-type solar cell obtained by the preparation method of the local back field N-type solar cell provided by the present invention can better solve the contradiction between the filling factor brought by the n+ type doped region on the back surface and the open circuit voltage and short circuit current .

A kind of preparation method of partial back field N-type solar cell provided by the invention, its technical scheme is:

A method for preparing a local back field N-type solar cell, comprising the following steps:

(1), doping the N-type crystalline silicon substrate, and then preparing a barrier layer on the front surface and the back surface of the N-type crystalline silicon substrate, the thickness of the back barrier layer is less than the thickness of the front barrier layer;

(2), printing acid-resistant slurry on the back surface of the N-type crystalline silicon substrate after step (1) and drying to form a mask of the sub-grid pattern;

(3), immerse the N-type crystalline silicon substrate treated in step (2) in an acid solution to remove the barrier layer in the area not covered by the mask. The front barrier layer is required not to be removed by the acid solution, but the thickness will be correspondingly thinned;

(4), immerse the N-type crystalline silicon substrate treated in step (3) in an alkaline solution to remove the mask, and at the same time, the alkaline solution removes the n+ heavily doped region not covered by the mask, and the local n+ covered by the mask The heavily doped region is not damaged;

(5), immersing the N-type crystalline silicon substrate in the acidic solution again to remove the residual barrier layer on the front surface and the back surface;

(6), prepare passivation anti-reflection film on the front surface of the N-type crystalline silicon substrate processed in step (5) and prepare passivation film on the back surface, then use metal on the front surface and the back surface of the N-type crystalline silicon substrate The paste prints the front electrode and the back electrode, the back sub-gate of the back electrode is connected to the local n+ heavily doped region, and after sintering, the preparation of the local back field N-type solar cell is completed.

Wherein, the method for doping the N-type crystalline silicon substrate in step (1) includes the following steps:

S1. Select an N-type crystalline silicon substrate, and perform texturing treatment on the front surface of the N-type crystalline silicon substrate; the resistivity of the N-type crystalline silicon substrate is 0.5-15Ω·cm;

S2. Put the N-type crystalline silicon substrate treated in step S1 into an industrial diffusion furnace to perform boron diffusion on the textured surface to form a p+ doped region on the front surface. The boron source is boron tribromide, and the diffusion temperature is 900-1000 ℃, the time is 60-180 minutes; the square resistance value after boron diffusion is 40-100Ω/sqr;

S3. Put the boron-diffused N-type crystalline silicon substrate into an etching cleaning machine to remove the boron diffusion layer on the back surface and the borosilicate glass layer on the front surface;

S4. Using an ion implanter to implant phosphorus on the back surface of the N-type crystalline silicon substrate processed in step S3 and perform annealing treatment to form an n+ heavily doped region on the back surface, the square resistance of the n+ heavily doped region is 10-40Ω/sqr ; The annealing peak temperature is 700-950°C, the annealing time is 30-200min, and the ambient gas source is N ₂ and O ₂ .

Wherein, the barrier layer is a _SiO2 layer or a _SiNx layer, the thickness of the front barrier layer is 200-300nm, and the thickness of the back barrier layer is 50-100nm.

Wherein, in step (2), the width of the mask of the sub-grid pattern is 60-160 μm, parallel to each other, and the distance is 1-2 mm.

Wherein, the acidic solution in the step (3) is 5-20% HF solution, the time for the N-type crystalline silicon substrate to be immersed in the 5-20% HF solution is 0.5-5 minutes, and after taking out the N-type crystalline silicon substrate, use deionized Wash with water.

Wherein, the alkaline solution in step (4) is 10-30% KOH solution, 10-30% NaOH solution, 10-30% tetramethylammonium hydroxide solution or 10-30% ethylenediamine solution The temperature of the alkaline solution is 50-90°C, the reaction time for the N-type crystalline silicon substrate immersed in the alkaline solution is 0.5-5 minutes, and the N-type crystalline silicon substrate is taken out and cleaned with deionized water.

Wherein, the acid solution in step (5) is in 5-20% HF solution, the time for the N-type crystalline silicon substrate to be immersed in the 5-20% HF solution is 2-5 minutes, and the N-type crystalline silicon substrate is taken out and used Ionized water cleaning.

Wherein, in step (6), the method for preparing the front electrode and the back electrode on the front surface and the back surface of the N-type crystalline silicon substrate is: using silver paste to print the back electrode of the H-type grid line on the back surface of the N-type crystalline silicon substrate And drying, in which the width of the main gate on the back is 0.5-3mm, 3-6 are arranged at equal intervals, and the width of the sub-grid on the back is 40-100μm; the front main gate and the front side are printed with aluminum-doped silver paste on the front surface of the N-type crystalline silicon substrate The auxiliary grids are then dried, the front main grids are 0.5-3mm wide, 3-6 are arranged at equal intervals, and the front auxiliary grids are 40-100μm wide; the peak temperature of sintering is not higher than 900°C.

The present invention also provides a local back field N-type solar cell, comprising an N-type crystalline silicon substrate, the front surface of the N-type crystalline silicon substrate includes a p+ doped region and a passivation anti-reflection film on the front surface sequentially from the inside to the outside; N The back surface of the N-type crystalline silicon substrate includes a local n+ heavily doped region and a passivation film on the back surface sequentially from the inside to the outside; the N-type crystalline silicon substrate also includes a back electrode arranged on the back surface, and the back electrode includes a back main gate and a back surface. A sub-gate, the back side sub-gate is connected to a local n+ heavily doped region.

Among them, the rear main grid and the rear auxiliary grid form an H-shaped grid line, wherein the width of the rear main grid is 0.5-3 mm, 3-6 are arranged at equal intervals, and the width of the rear auxiliary grid is 40-100 μm.

Among them, the N-type crystalline silicon substrate also includes a front electrode arranged on the front surface, and the front electrode includes a front main grid and a front sub-gate, wherein the front main grid is 0.5-3 mm wide, 3-6 are arranged at equal intervals, and the front sub-gate is 40 mm wide. -100 μm.

Wherein, the passivation anti-reflection film is one or more of SiO ₂ , SiN _x or Al ₂ O ₃ dielectric films, and the passivation film is a composite dielectric film composed of SiO ₂ and SiN _x dielectric films; the passivation anti-reflection film The thickness is 70-110nm; the thickness of the passivation film is not less than 20nm.

Among them, the rear main grid is a silver rear main grid, and the rear sub grid is a silver rear sub grid; the front main grid is a silver aluminum alloy front main grid, and the front sub grid is a silver aluminum alloy front sub grid.

The present invention also provides a partial back field N-type solar cell assembly, comprising front layer material, encapsulation material, local back field N-type solar cell, encapsulation material, back layer material, partial back field N The N-type solar cell is the above-mentioned partial back field N-type solar cell.

The present invention also provides a partial back field N-type solar cell system, including more than one partial back field N-type solar cell components in series, the partial back field N-type solar cell component is the above-mentioned partial back field N-type solar cell components.

Implementation of the present invention comprises following technical effect:

The technical effect of the present invention is mainly reflected in: the present invention can form local n+ heavily doped on the back of N-type crystalline silicon after a series of operations such as setting dielectric film, acid-resistant slurry mask, acid corrosion and alkali corrosion. region, during subsequent metallization, the sub-gate metal paste only contacts the local n+ heavily doped region. Since the sub-gate on the back is only in contact with the local n+ heavily doped region, the contact resistance is low; at the same time, the region not in contact with the sub-gate is a non-doped region, so the Auger recombination is low. Therefore, the n-type solar cell prepared according to the method of the present invention has high filling factor, open circuit voltage and short circuit current at the same time, so it has high photoelectric conversion efficiency.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a cell structure after step 1 of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a cell structure after step 4 of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

3 is a schematic cross-sectional view of a cell structure after step five of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

4 is a schematic cross-sectional view of a cell structure after step six of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

5 is a schematic cross-sectional view of a cell structure after step 7 of a method for manufacturing a partial back field N-type solar cell according to an embodiment of the present invention.

FIG. 6 is a schematic cross-sectional view of a cell structure after step eight of a method for manufacturing a partial back field N-type solar cell according to an embodiment of the present invention.

7 is a schematic cross-sectional view of a cell structure after step 9 of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

8 is a schematic cross-sectional view of a cell structure after step ten of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

9 is a schematic cross-sectional view of a cell structure after step eleven of a method for preparing a partial back field N-type solar cell according to an embodiment of the present invention.

detailed description

The present invention will be described in detail below in conjunction with the embodiments and the accompanying drawings. It should be noted that the described embodiments are only intended to facilitate the understanding of the present invention, rather than limiting it in any way.

Referring to Figures 1 to 9, a method for preparing a partial back field N-type solar cell provided in this embodiment includes the following steps:

(1), select the N-type crystalline silicon substrate 10 of 156mm * 156mm, and do texture processing to the front surface of the N-type crystalline silicon substrate 10; The resistivity of the N-type crystalline silicon substrate 10 is 0.5～15Ω·cm, preferably 1 ~5Ω·cm; the thickness of the N-type crystalline silicon substrate 10 is 50-300 μm, preferably 80-200 μm; the battery structure after this step is shown in FIG. 1 .

(2), put the N-type crystalline silicon substrate 10 processed in step (1) into an industrial diffusion furnace to carry out boron diffusion on the suede surface to form the p+ doped region 12 on the front surface, and the boron source adopts boron tribromide, The diffusion temperature is 900-1000° C., and the time is 60-180 minutes. The square resistance after boron diffusion is 40-100Ω/sqr, preferably 50-70Ω/sqr.

(3) Put the boron-diffused N-type crystalline silicon substrate 10 into an etching cleaning machine, and remove the boron diffusion layer on the back surface and the borosilicate glass layer on the front surface.

(4), use an ion implanter to implant phosphorus into the back surface of the N-type crystalline silicon substrate 10 processed in step (3) and perform annealing to form the n+ heavily doped region 16 on the back surface, and the square resistance of the n+ heavily doped region 16 10-40Ω/sqr. The annealing peak temperature is 700-950°C, preferably 850-900°C, the annealing time is 30-200min, preferably 60-200min, and the ambient gas source is preferably N ₂ and O ₂ . The structure of the battery after this step is shown in FIG. 2 .

(5) A barrier layer is grown on the front surface and the back surface of the N-type crystalline silicon substrate 10 treated in step (4). The barrier layer can be a SiO ₂ layer or a SiN _x layer, and this embodiment uses a SiO ₂ layer as a specific example. The specific method is to put the N-type crystalline silicon substrate 10 into PECVD (Plasma Enhanced Chemical Vapor Deposition) equipment, grow a front _SiO2 layer 13 with a thickness of 200-300nm on the front surface, and grow a thickness of 50-100nm on the back surface. The backside SiO ₂ layer 17 . The structure of the battery after this step is shown in FIG. 3 .

(6) Print the acid-resistant paste 40 on the back surface of the N-type crystalline silicon substrate 10 after the treatment in step (5), and dry it to form a mask. The pattern after the ink is applied is a sub-grid structure, the sub-grid lines are 60-160 μm wide, 154 mm long, parallel to each other, with a distance of 1-2 mm, preferably 1.55 mm, and a total of 100 sub-grid lines are arranged. The battery structure after completing this step is shown in FIG. 4 .

(7) Immerse the N-type crystalline silicon substrate 10 treated in step (6) in 5-20% HF solution, take it out after 0.5-5 minutes and clean it with deionized water. At this time, the SiO ₂ in the area not covered by the mask on the back surface is removed by HF, while most of the SiO ₂ on the front surface is still not removed. The battery structure after this step is shown in FIG. 5 .

(8), immerse the N-type crystalline silicon substrate 10 treated in step (7) in 10-30% by weight of lye, the working temperature is 50-90°C, react for 0.5-5 minutes, take it out and clean it with deionized water . At this time, the regions on the back surface not covered by the mask will react with the alkali solution because there is no protection of SiO ₂ , and the n+ heavily doped regions in these regions are removed. At the same time, the residual mask will also be removed by lye. The area covered by the mask is a local n+ heavily doped region 161; note that in this step, the p+ doped region 12 on the front surface and the local n+ heavily doped region 161 on the back surface are covered with _SiO2 film, Does not react with lye. The lye can be KOH, NaOH, tetramethylammonium hydroxide or ethylenediamine solution. The structure of the battery after this step is shown in FIG. 6 .

(9) Immerse the N-type crystalline silicon substrate 10 treated in step (8) in a 5-20% HF solution, take it out after 2-5 minutes and clean it with deionized water. At this time, the remaining SiO ₂ layers on the front surface and the back surface are all removed. The battery structure after completing this step is shown in FIG. 7 .

(10), passivation anti-reflection film 14 is set on the front surface of N-type crystalline silicon substrate 10 after step (9) process and passivation film 18 is set on the back surface, wherein the passivation anti-reflection film 14 of front surface is SiO _2. One or more of SiN _x and Al ₂ O ₃ dielectric films, the passivation film 18 on the back surface is a composite dielectric film composed of SiO ₂ and SiN _x dielectric films. The thickness of the passivation anti-reflection film 14 on the front surface is 70-110 nm; the thickness of the passivation film 18 on the back surface is not less than 20 nm. The battery structure after completing this step is shown in FIG. 8 .

(11) Use silver paste to print electrodes on the back surface of the N-type crystalline silicon substrate 10 and dry them. The electrode pattern is an H-type grid line, wherein the back main grid 22 has a line width of 0.5-3mm and a length of 154mm, and is arranged at equal intervals There are 3-6 grids, and the sub-gates 26 on the back have a line width of 40-100 μm, a length of 154 mm, and are parallel to each other with a distance of 1.55 mm. A total of 100 grids are provided. Make sure that the printed rear sub-gate 26 falls within the local n+ heavily doped region 161 . On the front surface of the N-type crystalline silicon substrate 10, the front main grid 20 and the front sub-grid 24 are printed with aluminum-doped silver paste and dried. Among them, the width of 20 front main grids is 0.5-3mm, the length is 154mm, and 3-6 lines are arranged at equal intervals. The front auxiliary grids 24 have a line width of 40-100 μm, a length of 154 mm, and are parallel to each other with a distance of 1.95 mm. There are 80 of them in total. The battery structure after completing this step is shown in FIG. 9 .

(12) Transfer the N-type crystalline silicon substrate 10 treated in step (11) into a belt-type sintering furnace for sintering. The peak sintering temperature is not higher than 900° C., that is, the production of local back field N-type solar cells is completed.

The preparation method of the partial back-field N-type solar cell provided in this example can form a selective The sub-gate metal paste only contacts the local heavily n+ doped region during subsequent metallization. Since the sub-gate is only in contact with the local n+ heavily doped region, the contact resistance is low and the fill factor is high; at the same time, the region not in contact with the sub-gate is a non-doped region, so the Auger recombination is low and the open circuit voltage is high. However, using the existing technology, if the n+ doped region on the back is heavily doped, although the contact resistance is low, the open circuit voltage is also low; if the n+ doped region on the back is lightly doped, although the open circuit voltage is high, the contact resistance is high , Poor fill factor. It can be seen that the n-type solar cell prepared according to the above method can overcome the contradiction between the open circuit voltage and the fill factor in the prior art, so it has a higher photoelectric conversion efficiency.

Referring to Fig. 9, this embodiment also provides a partial back field N-type solar cell, including an N-type crystalline silicon substrate 10, and the front surface of the N-type crystalline silicon substrate 10 includes p+ doped regions sequentially from inside to outside 12 and the positive surface passivation anti-reflection film 14; the back surface of the N-type crystalline silicon substrate 10 includes a local n+ heavily doped region 161 and a back surface passivation film 18 from the inside to the outside; the N-type crystalline silicon substrate 10 also includes a set On the back electrode on the back surface, the back electrode includes a back main gate 22 and a back sub-gate 26 , and the back sub-gate is connected to a local n+ heavily doped region 161 . Since the back sub-gate 26 is only in contact with the local n+ heavily doped region 161 , the contact resistance is low; at the same time, the region not in contact with the back sub-gate is a non-doped region, so the Auger recombination is low. The partial back field N-type solar cell of this embodiment has high fill factor, open circuit voltage and short circuit current at the same time, so it has high photoelectric conversion efficiency.

Preferably, the rear main grid and the rear auxiliary grid form an H-shaped grid line, wherein the rear main grid 22 is 0.5-3 mm wide, 3-6 are arranged at equal intervals, and the rear auxiliary grid 26 is 40-100 μm wide. The N-type crystalline silicon substrate 10 also includes a front electrode arranged on the front surface, and the front electrode includes a front main grid 20 and a front sub-gate 24, wherein the front main grid 20 is 0.5-3mm wide, and 3-6 are arranged at equal intervals, and the front sub-gate 24 40-100 μm wide. The passivation anti-reflection film 14 is one or more of SiO ₂ , SiN _x or Al ₂ O ₃ dielectric films, and the passivation film 18 is a composite dielectric film composed of SiO ₂ and SiN _x dielectric films; the passivation anti-reflection film The thickness is 70-110nm; the thickness of the passivation film is not less than 20nm.

In this embodiment, the back electrode is sintered by printing silver paste, and the front electrode is sintered by printing aluminum-doped silver paste, so the back main grid 22 of the local back field N-type solar cell is a silver back main grid, and the back sub-grid 26 It is a silver back sub-grid; the front main grid 20 is a silver-aluminum alloy front main grid, and the front sub-grid 24 is a silver-aluminum alloy front sub-grid.

This embodiment also provides a partial back field N-type solar cell assembly, including a front layer material connected from top to bottom, an encapsulation material, a partial back field N-type solar cell, an encapsulation material, a back layer material, and a local back field N-type solar cell assembly. The N-type solar cell is the above-mentioned partial back field N-type solar cell. The structure and working principle of the partial back field N-type solar cell assembly in this embodiment use technologies known in the art, and the improvement of the partial back field N-type solar cell assembly provided by the present invention only involves the above-mentioned partial back field N-type solar cell , do not make changes to other parts. Therefore, this description only details the partial back field N-type solar cell and its preparation method, and does not repeat the details of other components and working principles of the partial back field N-type solar cell module here. Those skilled in the art can realize the partial back field N-type solar cell assembly of the present invention on the basis of the content described in this specification.

This embodiment also provides a partial back field N-type solar cell system, including one or more than one partial back field N-type solar cell components in series, and the partial back field N-type solar cell component is the above-mentioned partial back field N-type solar cell modules. The structure and working principle of the partial back field N-type solar cell system in this embodiment use technologies known in the art, and the improvement of the partial back field N-type solar cell system provided by the present invention only involves the above-mentioned partial back field N-type solar cell , do not make changes to other parts. Therefore, this specification only describes the partial back field N-type solar cell and its preparation method in detail, and other components and working principles of the partial back field N-type solar cell system will not be repeated here. Those skilled in the art can realize the partial back field N-type solar cell system of the present invention on the basis of the content described in this specification.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting the protection scope of the present invention, although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand , the technical solution of the present invention may be modified or equivalently replaced without departing from the spirit and scope of the technical solution of the present invention.

Claims (15)

1. A preparation method for a local back field N-type solar cell, characterized in that: comprises the following steps: (1), doping the N-type crystalline silicon substrate, and then preparing a barrier layer on the front surface and the back surface of the N-type crystalline silicon substrate, the thickness of the back barrier layer is less than the thickness of the front barrier layer; (2), printing acid-resistant slurry on the back surface of the N-type crystalline silicon substrate after step (1) and drying to form a mask of the sub-grid pattern; (3), immerse the N-type crystalline silicon substrate treated in step (2) in an acid solution to remove the barrier layer in the area not covered by the mask. The front barrier layer is required not to be removed by the acid solution, but the thickness will be correspondingly thinned; (4), immerse the N-type crystalline silicon substrate treated in step (3) in an alkaline solution to remove the mask, and the alkaline solution simultaneously removes the n+ heavily doped region not covered by the mask, and the region covered by the mask is Local n+ heavily doped regions; (5), immersing the N-type crystalline silicon substrate in the acidic solution again to remove the residual barrier layer on the front surface and the back surface; (6), prepare passivation anti-reflection film on the front surface of the N-type crystalline silicon substrate processed in step (5) and prepare passivation film on the back surface, then use metal on the front surface and the back surface of the N-type crystalline silicon substrate The paste prints the front electrode and the back electrode, the back sub-gate of the back electrode is connected to the local n+ heavily doped region, and after sintering, the preparation of the local back field N-type solar cell is completed. 2. the preparation method of a kind of partial back field N-type solar cell according to claim 1 is characterized in that: the method that N-type crystalline silicon substrate is carried out to doping treatment comprises the following steps in the step (1): S1. Select an N-type crystalline silicon substrate, and perform texturing treatment on the front surface of the N-type crystalline silicon substrate; the resistivity of the N-type crystalline silicon substrate is 0.5-15Ω·cm; S2. Put the N-type crystalline silicon substrate treated in step S1 into an industrial diffusion furnace to perform boron diffusion on the textured surface to form a p+ doped region on the front surface. The boron source is boron tribromide, and the diffusion temperature is 900-1000 ℃, the time is 60-180 minutes; the square resistance value after boron diffusion is 40-100Ω/sqr; S3. Put the boron-diffused N-type crystalline silicon substrate into an etching cleaning machine to remove the boron diffusion layer on the back surface and the borosilicate glass layer on the front surface; S4. Using an ion implanter to implant phosphorus on the back surface of the N-type crystalline silicon substrate processed in step S3 and perform annealing treatment to form an n+ heavily doped region on the back surface, the square resistance of the n+ heavily doped region is 10-40Ω/sqr ; The annealing peak temperature is 700-950°C, the annealing time is 30-200min, and the ambient gas source is N ₂ and O ₂ . 3. the preparation method of a kind of local back field N-type solar cell according to claim ₁ , is characterized in that: described barrier layer is SiO Layer or _SiNx layer, the thickness of front barrier layer is 200-300nm, the back side The thickness of the barrier layer is 50-100 nm. 4. the preparation method of a kind of partial back field N-type solar cell according to claim 1 is characterized in that: the width of the mask of sub-grid pattern in step (2) is 60-160 μ m, is parallel to each other, and spacing is 1-2mm. 5. the preparation method of a kind of local back field N-type solar cell according to claim 1 is characterized in that: the acidic solution in the step (3) is the HF solution of 5-20%, and the N-type crystalline silicon substrate is immersed in 5 The time in -20% HF solution is 0.5-5 minutes, and the N-type crystalline silicon substrate is taken out and cleaned with deionized water. 6. The preparation method of a local back field N-type solar cell according to claim 1, characterized in that: the alkaline solution in step (4) is 10-30% KOH solution, 10-30% NaOH solution, 10-30% tetramethylammonium hydroxide solution or 10-30% ethylenediamine solution; the temperature of the alkaline solution is 50-90°C, and the N-type crystalline silicon substrate is immersed in the alkaline solution. The time is 0.5-5 minutes, and the N-type crystalline silicon substrate is taken out and cleaned with deionized water. 7. the preparation method of a kind of local back field N-type solar cell according to claim 1 is characterized in that: the acidic solution in the step (5) is in the HF solution of 5-20%, and the N-type crystalline silicon substrate is immersed in The time in the 5-20% HF solution is 2-5 minutes, and the N-type crystalline silicon substrate is taken out and cleaned with deionized water. 8. A method for preparing a local back field N-type solar cell according to any one of claims 1 to 7, characterized in that: in step (6), a front surface is prepared on the front surface and the back surface of the N-type crystalline silicon substrate The method of the electrode and the back electrode is: use silver paste to print the back electrode of the H-type grid line on the back surface of the N-type crystalline silicon substrate and dry it. The width of the rear sub-gate is 40-100μm; the front main grid and the front sub-gate are printed and dried on the front surface of the N-type crystalline silicon substrate with aluminum-doped silver paste, and the front main grid is 0.5-3mm wide, with an equal spacing of 3-6 root, and the width of the front sub-gate is 40-100 μm. 9. A local back field N-type solar cell, comprising an N-type crystalline silicon substrate, the front surface of the N-type crystalline silicon substrate includes a p+ doped region and a passivation anti-reflection film on the front surface from inside to outside in sequence; The back surface of the N-type crystalline silicon substrate includes a local n+ heavily doped region and a passivation film on the back surface sequentially from the inside to the outside; it is characterized in that: the N-type crystalline silicon substrate also includes a back electrode arranged on the back surface, so The back electrode includes a back main gate and a back sub-gate, and the back sub-gate is connected to the local n+ heavily doped region. 10. A partial back field N-type solar cell according to claim 9, characterized in that: the back main grid and the rear sub-grid form an H-shaped grid line, wherein the width of the back main grid is 0.5-3 mm, etc. The spacing is set to 3-6, and the width of the sub-gate on the back is 40-100 μm. 11. A partial back field N-type solar cell according to claim 9, characterized in that: the N-type crystalline silicon substrate further comprises a front electrode arranged on the front surface, and the front electrode comprises a front main grid and a front Auxiliary grids, in which the width of the front main grid is 0.5-3mm, 3-6 are arranged at equal intervals, and the width of the front auxiliary grid is 40-100μm. 12. A partial back field N-type solar cell according to claim 9, characterized in that: the passivation anti _- reflection film is one or more of _SiO2 , _SiNx or _Al2O3 dielectric film, The passivation film is a composite dielectric film composed of SiO ₂ and SiN _x dielectric films; the thickness of the passivation anti-reflection film is 70-110nm; the thickness of the passivation film is not less than 20nm. 13. A partial back field N-type solar cell according to claim 11, characterized in that: the back busbar is a silver back busbar, the back side sub-grid is a silver back side sub-grid; the front side busbar is a silver-aluminum alloy front main grid, and the front sub-grid is a silver-aluminum alloy front sub-grid. 14. A partial back-field N-type solar cell assembly, comprising front layer material, encapsulation material, local back-field N-type solar cell, encapsulation material, and back layer material arranged sequentially from top to bottom, characterized in that: the local The back field N-type solar cell is a partial back field N-type solar cell according to any one of claims 9-13. 15. A partial back field N-type solar cell system, comprising more than one partial back field N-type solar cell components in series, characterized in that: the partial back field N-type solar cell component is one of the ones described in claim 14 Partial back field N-type solar cell module.