CN107195699A - One kind passivation contact solar cell and preparation method - Google Patents

Abstract

The invention relates to a passivated contact back-junction solar cell and a preparation method thereof, comprising an N-type crystalline silicon substrate, and the front surface is sequentially composed of a tunnel oxide layer, an intrinsic polysilicon layer, a locally doped n+ polysilicon region, A passivation anti-reflection film and an n+ metal electrode, the n+ metal electrode is arranged on the locally doped n+ polysilicon region; the back surface of the N-type crystalline silicon substrate is a p+ doped region, passivation a chemical film and a p+ metal electrode, and the p+ metal electrode is arranged on the p+ doped region. Its beneficial effects are: the front surface of the N-type crystalline silicon substrate adopts a local n+ doped polysilicon passivation layer. Compared with the back junction cell covered by the entire n+ polysilicon layer, it can not only reduce the ineffective absorption of incident light by the polysilicon layer, but also improve the efficiency of the battery. The short-circuit current can be achieved, and the passivation contact of the front surface can be realized, which greatly reduces the recombination rate of the front surface of the battery, and improves the open-circuit voltage and short-circuit current.

Description

A kind of passivated contact solar cell and preparation method thereof

technical field

The invention relates to the technical field of solar cells, in particular to a passivated contact solar cell and a preparation method.

Background technique

Surface passivation of crystalline silicon solar cells has always been a top priority in design and optimization. From the early passivation of only the back electric field, to the passivation of silicon nitride on the front, and then to the PERC/PERL design of the passivation local opening contact of the dielectric layer such as silicon oxide, aluminum oxide, and silicon nitride on the back. Although this structure temporarily alleviates the problem of back passivation, it does not eradicate the problem of back passivation. The high recombination rate at the opening still exists, and it further complicates the process. Although the PERC and PERL structure batteries already have a relatively complete surface passivation structure, the contact range on the back is limited to the opening area. In addition to increasing the complexity of the process, the opening process uses different processes and will also affect the surrounding area. The silicon material causes varying degrees of damage, which additionally increases the recombination of the metal contact area. Since the opening restricts the transport path of carriers, it deviates from the shortest path perpendicular to the contact surface and congests at the opening, which increases the loss of fill factor. In recent years, a technology that can achieve passivation on the entire surface without opening contact has become a research hotspot in institutions, which is Passivated Contact technology.

The N-type back-junction cell is under the N-type substrate silicon wafer, the front surface forms an n+ doped region, the back surface forms a p+ emitter, and there is an n+/n junction (front surface) on the light-receiving surface (front surface) of the front contact cell. field). However, its doping concentration and junction depth cannot form a good ohmic contact, resulting in an increase in series resistance and affecting the final fill factor and conversion efficiency. How to make the front surface field can effectively suppress the recombination of photo-generated carriers on the front surface so that more photo-generated carriers can reach the emitter on the back is a huge challenge to improve the conversion efficiency of back-junction cells.

Contents of the invention

The object of the present invention is to overcome the deficiencies of the prior art, and provide a back junction solar cell with local passivation contact and a preparation method.

A kind of back junction solar cell with partial passivation contact provided by the present invention, its technical scheme is:

A passivated contact solar cell, comprising an N-type crystalline silicon substrate, characterized in that: the front surface of the N-type crystalline silicon substrate is sequentially composed of a tunnel oxide layer, an intrinsic polysilicon layer, and locally doped n+ A polysilicon region, a passivation anti-reflection film and an n+ metal electrode, the n+ metal electrode is arranged on the locally doped n+ polysilicon region; the back surface of the N-type crystalline silicon substrate is p+ doped sequentially from the inside to the outside region, a passivation film and a p+ metal electrode, the p+ metal electrode is arranged on the p+ doped region.

The present invention also provides a method for preparing a passivated contact solar cell, comprising the following steps:

(1) Perform doping treatment on the front surface and the back surface of the N-type crystalline silicon substrate respectively, the doping treatment method of the front surface of the N-type crystalline silicon substrate is: grow tunneling on the front surface of the N-type crystalline silicon substrate oxide layer, and grow an intrinsic polysilicon layer or an intrinsic amorphous silicon layer on the tunnel oxide layer, and then selectively locally implant phosphorus ions on the intrinsic polysilicon layer or the intrinsic amorphous silicon layer; the N-type The doping treatment method of the back surface of the crystalline silicon substrate is: depositing borosilicate glass by APCVD, or implanting boron ions by ion implantation;

(2) Selectively clean the N-type crystalline silicon substrate with a weak alkaline solution to remove the intrinsic polysilicon layer or intrinsic amorphous silicon layer in the non-implanted area, and then perform annealing treatment; Form a locally doped n+ polysilicon layer, and form a p+ doped emitter on the back surface of the silicon wafer;

(3), forming a passivation anti-reflection film on the front surface of the N-type crystalline silicon substrate, and forming a passivation film on the back surface of the N-type crystalline silicon substrate;

(4), forming an n+ metal electrode in ohmic contact with the n+ doped region on the front surface of the N-type crystalline silicon substrate, and forming a p+ metal electrode in ohmic contact with the p+ doped region on the back surface of the N-type crystalline silicon substrate , to complete the production of solar cells.

Wherein, in step (1), the tunnel oxide layer on the front surface is SiO ₂ with a thickness of 1-3nm, and the growth method of SiO ₂ is high temperature thermal oxidation, nitric acid oxidation, ozone oxidation or CVD deposition.

Wherein, in step (1), the method for growing an intrinsic polysilicon layer or an intrinsic amorphous silicon layer on the front surface tunnel oxide layer is: put the N-type crystalline silicon substrate into the LPCVD equipment, and tunnel the oxide layer on the front surface An intrinsic polysilicon layer or an intrinsic amorphous silicon layer is grown on the layer.

Wherein, in step (1), phosphorus atoms are selectively implanted on the intrinsic polysilicon layer or intrinsic amorphous silicon layer using an ion implantation mask, and the implantation dose of phosphorus atoms is 1×10 ¹⁵ cm ^-2 ~ 8×10 ¹⁵ cm ^-2 .

Wherein, in step (1), when implanting phosphorus ions on the intrinsic polysilicon layer or the intrinsic amorphous silicon layer, a mask is set between the front surface of the N-type crystalline silicon substrate and the ion beam, and a line-shaped opening is set on the mask , the width of the line-shaped opening is 200-2000um.

Wherein, in step (2), the weak alkaline solution is 1% KOH aqueous solution, the peak temperature of the annealing treatment is 800-1100° C., the annealing time is 30-200 min, and the ambient gas source is N ₂ and O ₂ .

Wherein, in the step (3), the preparation method of the passivation antireflection film is to utilize PECVD equipment to deposit a layer of SiN _x dielectric film with a thickness of 60-80nm on the front surface of the N-type crystalline silicon substrate; the preparation method of the passivation film Yes, use ALD equipment to deposit a layer of Al _{2 O 3 dielectric film with a thickness of 2-10nm on the back surface of the N-type crystalline silicon substrate, and then deposit a layer of Al 2 O 3 dielectric film} with a thickness of 40-80nm on the Al 2 O 3 dielectric film SiN _x dielectric film.

Wherein, in step (4), the preparation method of the metal electrode is to print silver paste on the n+ doped region of the front surface of the N-type crystalline silicon substrate by screen printing, and print silver aluminum on the p+ doped region of the back surface. slurry, followed by sintering.

Wherein, before step (1), the front surface and the back surface of the N-type crystalline silicon substrate are subjected to texturing treatment; the resistivity of the N-type crystalline silicon substrate is 0.5 to 15 Ω cm; the thickness of the N-type crystalline silicon substrate is 50 ~300μm.

Implementation of the present invention comprises following technical effect:

In the passivated contact solar cell provided by the present invention, by using a local n+ doped polysilicon passivation layer on the front surface of the N-type crystalline silicon substrate, compared with the back junction cell covered by the entire n+ polysilicon layer, not only the polysilicon layer can be reduced The ineffective absorption of incident light can increase the short-circuit current of the battery, and can realize the passivation contact of the front surface, greatly reducing the recombination rate of the front surface of the battery, and increasing the open-circuit voltage and short-circuit current. After the back-junction solar cell prepared by the doping treatment method of the present invention is covered with a passivation film on the front and rear surfaces, the implied open circuit voltage (Implied Voc) can reach more than 700mV, the dark saturation current density J ₀ <20fA cm ^-2 , and the printed electrode After the back-junction contact cell is made, the internal quantum efficiency in the short-wave band can reach more than 98%.

Description of drawings

FIG. 1 is a schematic cross-sectional view of the cell structure after step 1 of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

2 is a schematic cross-sectional view of the cell structure after step 2 of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

3 is a schematic cross-sectional view of the cell structure after step 3 of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

4 is a schematic cross-sectional view of the cell structure after step 4 of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

5 is a schematic cross-sectional view of the cell structure after step five of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

6 is a schematic cross-sectional view of the cell structure after step six of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

7 is a schematic cross-sectional view of the cell structure after step 7 of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

FIG. 8 is a schematic cross-sectional view of the cell structure after Step 8 of the method for preparing a passivated contact solar cell in an embodiment of the present invention.

detailed description

The present invention will be described in detail below in conjunction with the embodiments and the accompanying drawings. It should be noted that the described embodiments are only intended to facilitate the understanding of the present invention, rather than limiting it in any way.

Referring to Figures 1 to 8, a method for preparing a passivated contact solar cell provided in this embodiment includes the following steps:

(1), select the N-type crystalline silicon substrate 10, and do texture processing to the front surface and the back surface of the N-type crystalline silicon substrate 10; the resistivity of the N-type crystalline silicon substrate 10 is 0.5～15Ω·cm, preferably 1～ 5Ω·cm; the thickness of the N-type crystalline silicon substrate 10 is 50-300 μm, preferably 120-200 μm; the battery structure after this step is shown in FIG. 1 .

(2), put the N-type crystalline silicon substrate 10 processed in step (1) into an APCVD (atmospheric pressure chemical vapor deposition) machine, use gas as borane, and form a layer of borosilicate glass (BSG) 24 on the back surface ,as shown in picture 2.

(3) A tunnel oxide layer 15 is grown on the front surface of the N-type crystalline silicon substrate 10 after the treatment in step (2). In this embodiment, the tunnel oxide layer 15 is a SiO ₂ layer. The methods for growing the tunneling oxide layer 15 include nitric acid oxidation, high temperature thermal oxidation, dry ozone oxidation and wet ozone oxidation. This embodiment adopts the wet ozone oxidation method, put the N-type crystalline silicon substrate 10 into deionized water, and then pass ozone into the deionized water, so that the ozone concentration reaches 20-50ppm, the reaction temperature is 30-50°C, and the time is 5- After 20 minutes, the thickness of the grown tunnel oxide layer 15 is 1-3 nm. The structure of the battery after this step is shown in FIG. 3 .

(4), the N-type crystalline silicon substrate 10 processed in step (3) is put into LPCVD equipment (low pressure chemical vapor deposition), and the intrinsic polysilicon layer 26 is grown on its front surface, and the thickness of the intrinsic polysilicon layer is greater than 100nm . The battery structure after completing this step is shown in FIG. 4 .

(5), put the N-type crystalline silicon substrate 10 processed in step (4) into the ion implantation equipment, a mask fixture is set between the front surface of the silicon wafer and the ion source, and a linear opening is arranged on the mask, and the opening width is 200～2000um. Phosphorus atoms are selectively implanted on the intrinsic polysilicon layer 26 to form the implanted region 28, and the implantation dose is 1×10 ¹⁵ cm ⁻² to 8×10 ¹⁵ cm ⁻² , preferably 1×10 ¹⁵ cm ⁻² to 3×10 cm ^{−2 2} . The battery structure after this step is shown in FIG. 5 .

(6), put the N-type crystalline silicon substrate 10 processed in step (5) into cleaning equipment, and use KOH aqueous solution with a concentration of 1% for selective cleaning to remove the intrinsic polysilicon and amorphous silicon layers in the non-implanted regions, Finally, drying is carried out; then the N-type crystalline silicon substrate 10 is put into an annealing furnace for high-temperature annealing. The peak temperature of the annealing treatment is 800-1100° C., the annealing time is 30-200 minutes, and the ambient gas source is N ₂ and O ₂ . After the annealing treatment, the non-doped region 26 of the intrinsic polysilicon layer is transformed into the intrinsic polysilicon layer 12 , and the implanted region 28 is transformed into the n+ doped polysilicon region 13 . The structure of the battery after this step is shown in FIG. 6 .

(7) A passivation antireflection film 14 is grown on the front surface of the N-type crystalline silicon substrate 10 after step (6), and a passivation film 18 is grown on the back surface of the N-type crystalline silicon substrate 10 . The passivation anti-reflection film 14 on the front surface is a _SiNx film with a thickness of 60-80nm, and the passivation film 18 on the back surface is one or more of SiO ₂ , SiN _x or Al ₂ O ₃ dielectric films, using ALD The equipment first deposits a layer of Al ₂ O ₃ dielectric film with a thickness of 2-10nm, and then deposits a layer of SiN _x dielectric film with a thickness of 40-80nm on the Al ₂ O ₃ dielectric film. The battery structure after completing this step is shown in FIG. 7 .

(8), use silver paste to print p+ metal electrode 22 on the back surface of N-type crystalline silicon substrate 10 and dry it, and use aluminum-doped silver paste to print n+ metal electrode 20 on the front surface of N-type crystalline silicon substrate 10 and bake it Dry. Both the silver paste and the aluminum-doped silver paste are commonly used in the existing N-type battery technology. The battery structure after completing this step is shown in FIG. 8 .

(9) Transfer the N-type crystalline silicon substrate 10 treated in step (8) into a belt sintering furnace for sintering. The sintering peak temperature is 850-950° C., that is, the preparation of a passivated contact solar cell is completed.

Preferably, the front surface of the N-type crystalline silicon substrate is an N-type crystalline silicon surface; or, the front surface of the N-type crystalline silicon substrate is an intrinsic polysilicon layer grown on a tunnel oxide layer on the front surface of the N-type crystalline silicon Or an intrinsic amorphous silicon layer; when the front surface of the N-type crystalline silicon substrate is an intrinsic polysilicon layer or an intrinsic amorphous silicon layer grown on the tunnel oxide layer on the front surface of the N-type crystalline silicon, the N-type The tunnel oxide layer on the front surface is SiO ₂ with a thickness of 1-3nm. The growth method of SiO ₂ is high temperature thermal oxidation, nitric acid oxidation, ozone oxidation or CVD deposition.

Referring to FIG. 8 , a back-contact solar cell of this embodiment includes an N-type crystalline silicon substrate 10, and the front surface of the N-type crystalline silicon substrate 10 is sequentially composed of a tunnel oxide layer 15 and an intrinsic polysilicon layer from the inside to the outside. 12. The n+ doped polysilicon region 13 on the front surface, the passivation anti-reflection film 14 and the n+ metal electrode 20; the back surface of the N-type crystalline silicon substrate 10 is the back surface p+ doped region 16 and the passivation film 18 from inside to outside. and p+ metal electrode 22, the doped region comprises a front surface n+ doped polysilicon region 13 and a back surface p+ doped region 16, the front surface n+ doped polysilicon region 13 is provided with an n+ metal electrode 20, and the back surface p+ doped region 16 A p+ metal electrode 22 is provided on it.

Preferably, the p+ metal electrode 22 is a silver aluminum back electrode, and the n+ metal electrode 2020 is a silver alloy front electrode. The passivation film 18 is one or more of SiO ₂ , SiN _x or Al ₂ O ₃ dielectric films, the passivation anti-reflection film 14 on the front surface is a SiNx film, and its thickness is 60-80nm, and the passivation film 18 is SiO _2. One or more of SiNx or Al ₂ O ₃ dielectric films, the thickness of the Al ₂ O ₃ dielectric film is 2-10nm, and the thickness of the _SiNx dielectric film is 60-80nm. The p+ metal electrode 22 includes a rear main grid and a rear auxiliary grid (not shown in the figure), and the rear main grid and the rear auxiliary grid form an H-shaped grid line, wherein the rear main grid is 0.5-3 mm wide, and 3-6 are arranged at equal intervals. The sub-gate width on the back is 20-60um. The n+ metal electrode 20 includes a front main grid and a front sub-grid (not shown in the figure), and the front main grid and the front sub-grid form an H-shaped grid line, wherein the front main grid is 0.5-3 mm wide, and 3-6 are arranged at equal intervals. The width of the front sub-gate is 20-60um.

After the passivation contact solar cell with the above structure is covered with the passivation film on the front and rear surfaces, its implied open circuit voltage (Implied Voc) can reach more than 700mV after testing, and the dark saturation current density J ₀ <20fA cm ^-2 . After the back contact battery is completed, the internal quantum efficiency in the short-wave band can reach more than 95%.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting the protection scope of the present invention, although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand , the technical solution of the present invention may be modified or equivalently replaced without departing from the spirit and scope of the technical solution of the present invention.

Claims (10)

1. one kind passivation contact solar cell, including N-type crystalline silicon matrix, it is characterised in that：The N-type crystalline silicon matrix Preceding surface is followed successively by tunnel oxide, intrinsically polysilicon layer, n+ polysilicon regions, the passivated reflection reducing membrane of local doping from inside to outside With n+ metal electrodes, the n+ metal electrodes are arranged on the n+ polysilicon regions of the local doping；The N-type crystalline silicon base The back surface of body is followed successively by p+ doped regions, passivating film and p+ metal electrodes from inside to outside, and the p+ metal electrodes are arranged on institute State on p+ doped regions.

2. a kind of preparation method for being passivated contact solar cell, it is characterised in that：Comprise the steps of：

(1) table before processing, the N-type crystalline silicon matrix, is doped to the preceding surface of N-type crystalline silicon matrix and back surface respectively The doping treatment mode in face is：Grown in the preceding superficial growth tunnel oxide of N-type crystalline silicon matrix, and on tunnel oxide Intrinsically polysilicon layer or intrinsic amorphous silicon layer, it is optionally local to note then in intrinsically polysilicon layer or intrinsic amorphous silicon layer Enter phosphonium ion；The doping treatment mode of the N-type crystalline silicon matrix back surface is：Pyrex are deposited by the way of APCVD, Or boron ion is injected by the way of ion implanting；

(2) N-type crystalline silicon matrix, is subjected to selection cleaning using weakly alkaline solution, the intrinsic polysilicon of non-implanted region is removed Layer or intrinsic amorphous silicon layer, then made annealing treatment；After the completion of annealing, the n+ polysilicons of local doping are formed on the preceding surface of silicon chip Layer, in the emitter stage of silicon chip back surface formation p+ doping；

(3) passivated reflection reducing membrane, is formed on the preceding surface of N-type crystalline silicon matrix, in the back surface formation passivation of N-type crystalline silicon matrix Film；

(4) the n+ metal electrodes contacted with n+ doped region phase Ohmic contacts, are formed on the preceding surface of N-type crystalline silicon matrix, in N-type The back surface formation of crystal silicon substrate and the p+ metal electrodes of p+ doped region phase Ohmic contacts, complete the making of solar cell.

3. a kind of preparation method for being passivated contact solar cell according to claim 2, it is characterised in that：Step (1) In, the tunnel oxide on preceding surface is SiO₂, thickness is 1-3nm, SiO₂Growing method be high-temperature thermal oxidation method, nitric acid oxidation Method, Ozonation or CVD deposition method.

4. a kind of preparation method for being passivated contact solar cell according to claim 2, it is characterised in that：Step (1) In, intrinsically polysilicon layer or the method for intrinsic amorphous silicon layer are grown on the tunnel oxide on preceding surface is：By N-type crystalline silicon base Body is put into LPCVD equipment, and intrinsically polysilicon layer or intrinsic amorphous silicon layer are grown on the tunnel oxide on preceding surface.

5. a kind of preparation method for being passivated contact solar cell according to claim 2, it is characterised in that：Step (1) In, in intrinsically polysilicon layer or intrinsic amorphous silicon layer, using ion implantation mask, phosphorus atoms are selectively implanted, its phosphorus The implantation dosage of atom is 1 × 10¹⁵cm^-2~8 × 10¹⁵cm^-2。

6. a kind of preparation method for being passivated contact solar cell according to claim 2, it is characterised in that：Step (1) In, when injecting phosphonium ion in intrinsically polysilicon layer or intrinsic amorphous silicon layer, N-type crystalline silicon base body front surface and ion beam it Between setting linear opening is set on mask, mask, linear A/F is 200~2000um.

7. a kind of preparation method for being passivated contact solar cell according to claim 2, it is characterised in that：Step (2) In, the weakly alkaline solution is the KOH aqueous solution of concentration 1%, and the peak temperature of annealing is 800~1100 DEG C, during annealing Between be 30~200min, environment source of the gas be N₂And O₂。

8. according to a kind of preparation method of any described passivation contact solar cell of claim 2~6, it is characterised in that： In step (3), the preparation method of passivated reflection reducing membrane is to deposit one layer using PECVD device on the preceding surface of N-type crystalline silicon matrix Thickness is 60-80nm SiN_xDeielectric-coating；The preparation method of passivating film is to be set in the back surface of N-type crystalline silicon matrix using ALD The Al that standby first deposition a layer thickness is 2-10nm₂O₃Deielectric-coating, then in Al₂O₃On deielectric-coating redeposited a layer thickness be 40~ 80nm SiN_xDeielectric-coating.

9. according to a kind of preparation method of any described passivation contact solar cell of claim 2~6, it is characterised in that： In step (4), the preparation method of metal electrode is, by the method for silk-screen printing N-type crystalline silicon matrix preceding surface n+mix Silver paste is printed on miscellaneous region, silver-colored aluminium paste is printed on back surface p+ doped regions, is then sintered.

10. a kind of preparation method for being passivated contact solar cell according to claim 2, it is characterised in that：Walked Suddenly before (1), making herbs into wool processing is made to the preceding surface of N-type crystalline silicon matrix and back surface；The resistivity of N-type crystalline silicon matrix is 0.5~15 Ω cm；The thickness of N-type crystalline silicon matrix is 50~300 μm.