AU2002366673A1 - Mold for used in multi flip-chip underfill encapsulation process - Google Patents
Mold for used in multi flip-chip underfill encapsulation processInfo
- Publication number
- AU2002366673A1 AU2002366673A1 AU2002366673A AU2002366673A AU2002366673A1 AU 2002366673 A1 AU2002366673 A1 AU 2002366673A1 AU 2002366673 A AU2002366673 A AU 2002366673A AU 2002366673 A AU2002366673 A AU 2002366673A AU 2002366673 A1 AU2002366673 A1 AU 2002366673A1
- Authority
- AU
- Australia
- Prior art keywords
- mold
- encapsulation process
- chip underfill
- underfill encapsulation
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000005538 encapsulation Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/17—Component parts, details or accessories; Auxiliary operations
- B29C45/26—Moulds
- B29C45/34—Moulds having venting means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2001-0078746A KR100400496B1 (ko) | 2001-12-13 | 2001-12-13 | 멀티 플립칩의 언더필 인캡슐레이션 공정용 몰드 |
| KR10-2001-0078746 | 2001-12-13 | ||
| PCT/KR2002/002307 WO2003050865A1 (fr) | 2001-12-13 | 2002-12-09 | Moule utilise dans un procede d'encapsulation en remplissage par le dessous pour puces a bosses multiples |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2002366673A1 true AU2002366673A1 (en) | 2003-06-23 |
Family
ID=19716973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2002366673A Abandoned AU2002366673A1 (en) | 2001-12-13 | 2002-12-09 | Mold for used in multi flip-chip underfill encapsulation process |
Country Status (3)
| Country | Link |
|---|---|
| KR (1) | KR100400496B1 (fr) |
| AU (1) | AU2002366673A1 (fr) |
| WO (1) | WO2003050865A1 (fr) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7294533B2 (en) | 2003-06-30 | 2007-11-13 | Intel Corporation | Mold compound cap in a flip chip multi-matrix array package and process of making same |
| NL1024248C2 (nl) * | 2003-09-09 | 2005-03-10 | Fico Bv | Werkwijze en inrichting voor het met behulp van een flexibel drukelement omhullen van elektronische componenten. |
| KR100761387B1 (ko) | 2005-07-13 | 2007-09-27 | 서울반도체 주식회사 | 몰딩부재를 형성하기 위한 몰드 및 그것을 사용한 몰딩부재형성방법 |
| JP2014036119A (ja) * | 2012-08-09 | 2014-02-24 | Apic Yamada Corp | 樹脂モールド装置 |
| US10276424B2 (en) | 2017-06-30 | 2019-04-30 | Applied Materials, Inc. | Method and apparatus for wafer level packaging |
| CN114156190A (zh) * | 2021-11-30 | 2022-03-08 | 深圳市德明新微电子有限公司 | 一种封装用治具及电路元器件的封装方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62122136A (ja) * | 1985-11-08 | 1987-06-03 | Hitachi Ltd | レジンモールド半導体の製造方法および装置 |
| JPH03216309A (ja) * | 1990-01-22 | 1991-09-24 | Matsushita Electric Ind Co Ltd | Tabチップ樹脂封止方法 |
| US5817545A (en) * | 1996-01-24 | 1998-10-06 | Cornell Research Foundation, Inc. | Pressurized underfill encapsulation of integrated circuits |
| JP3352923B2 (ja) * | 1997-10-08 | 2002-12-03 | シャープ株式会社 | 樹脂封止用モールド金型 |
| JPH11121488A (ja) * | 1997-10-15 | 1999-04-30 | Toshiba Corp | 半導体装置の製造方法及び樹脂封止装置 |
| JP3130868B2 (ja) * | 1998-06-30 | 2001-01-31 | 山形日本電気株式会社 | 薄型パッケージの樹脂封止方法 |
| KR100653607B1 (ko) * | 1999-11-16 | 2006-12-05 | 삼성전자주식회사 | 복수의 보조-런너를 갖는 반도체 칩 패키지용 수지 성형장치 |
-
2001
- 2001-12-13 KR KR10-2001-0078746A patent/KR100400496B1/ko not_active Expired - Fee Related
-
2002
- 2002-12-09 AU AU2002366673A patent/AU2002366673A1/en not_active Abandoned
- 2002-12-09 WO PCT/KR2002/002307 patent/WO2003050865A1/fr not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| KR100400496B1 (ko) | 2003-10-08 |
| KR20030048743A (ko) | 2003-06-25 |
| WO2003050865A1 (fr) | 2003-06-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| AU2002349582A1 (en) | Production method for semiconductor chip | |
| AU2001253142A1 (en) | High speed flip chip assembly process | |
| AU2002244124A1 (en) | Self-coplanarity bumping shape for flip chip | |
| AU2003212987A1 (en) | Underfill encapsulant for wafer packaging and method for its application | |
| AU2003207484A1 (en) | Stacked die in die bga package | |
| EP1122776B8 (fr) | Procédé de fabrication de puces semiconductrices | |
| AU2003210985A1 (en) | B-stageable underfill encapsulant and method for its application | |
| AU2003279215A1 (en) | Components, methods and assemblies for multi-chip packages | |
| AU2003296497A1 (en) | Selective underfill for flip chips and flip-chip assemblies | |
| AU5109000A (en) | Semiconductor package, semiconductor device, electronic device and production method for semiconductor package | |
| SG97948A1 (en) | Resin composition for semiconductor encapsulation, semiconductor device comprising the same and process for the production of semiconductor device using the same | |
| EP1408551A4 (fr) | Procede de production de plaquettes de liaison | |
| AU2002243735A1 (en) | High performance silicon contact for flip chip | |
| AU2003216074A1 (en) | No-flow underfill encapsulant | |
| AU2002334044A1 (en) | Method for making an article comprising at least a silicon chip | |
| IL167835A (en) | Solid preparation comprising pioglitazone and biguanide and process for producing the same | |
| AU2002366771A1 (en) | Mold for producing shoe-sole | |
| AU2003248343A1 (en) | Process for producing semiconductor device | |
| AU7987400A (en) | Advanced flip-chip join package | |
| AU2002366673A1 (en) | Mold for used in multi flip-chip underfill encapsulation process | |
| TW540823U (en) | Flip-chip package substrate | |
| TW539238U (en) | Flip-chip packaging substrate | |
| SG117430A1 (en) | Method for flip-chip bonding | |
| AU2001267202A1 (en) | Encapsulation process using isocyanate moieties | |
| AU2002308014A1 (en) | A method of filling a via or recess in a semiconductor substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |