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AU2001273395A1 - Mram architectures for increased write selectivity - Google Patents

Mram architectures for increased write selectivity

Info

Publication number
AU2001273395A1
AU2001273395A1 AU2001273395A AU7339501A AU2001273395A1 AU 2001273395 A1 AU2001273395 A1 AU 2001273395A1 AU 2001273395 A AU2001273395 A AU 2001273395A AU 7339501 A AU7339501 A AU 7339501A AU 2001273395 A1 AU2001273395 A1 AU 2001273395A1
Authority
AU
Australia
Prior art keywords
increased write
write selectivity
magneto
mram architectures
produce
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001273395A
Other languages
English (en)
Inventor
Anthony S. Arrot
William L. Larson
Shaoping Li
Harry Liu
Yong Lu
Theodore Zhu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of AU2001273395A1 publication Critical patent/AU2001273395A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
AU2001273395A 2000-07-18 2001-07-12 Mram architectures for increased write selectivity Abandoned AU2001273395A1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US09/618,504 US6424561B1 (en) 2000-07-18 2000-07-18 MRAM architecture using offset bits for increased write selectivity
US09618504 2000-07-18
US09/618,504 2000-07-18
PCT/US2001/021962 WO2002007166A2 (fr) 2000-07-18 2001-07-12 Architectures pour memoire vive magneto-resistive autorisant une selectivite accrue

Publications (1)

Publication Number Publication Date
AU2001273395A1 true AU2001273395A1 (en) 2002-01-30

Family

ID=24477985

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001273395A Abandoned AU2001273395A1 (en) 2000-07-18 2001-07-12 Mram architectures for increased write selectivity

Country Status (10)

Country Link
US (6) US6424561B1 (fr)
EP (1) EP1301928B1 (fr)
JP (1) JP2004504715A (fr)
KR (1) KR100514338B1 (fr)
CN (1) CN100416698C (fr)
AT (1) ATE285111T1 (fr)
AU (1) AU2001273395A1 (fr)
DE (1) DE60107853T2 (fr)
IL (2) IL153657A0 (fr)
WO (1) WO2002007166A2 (fr)

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JP3879518B2 (ja) * 2002-01-21 2007-02-14 ソニー株式会社 磁気記憶装置およびその製造方法
US6891193B1 (en) * 2002-06-28 2005-05-10 Silicon Magnetic Systems MRAM field-inducing layer configuration
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US6771533B2 (en) * 2002-08-27 2004-08-03 Micron Technology, Inc. Magnetic non-volatile memory coil layout architecture and process integration scheme
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US6836429B2 (en) * 2002-12-07 2004-12-28 Hewlett-Packard Development Company, L.P. MRAM having two write conductors
KR100506932B1 (ko) * 2002-12-10 2005-08-09 삼성전자주식회사 기준 셀들을 갖는 자기 램 소자 및 그 구조체
US6791868B2 (en) * 2003-01-02 2004-09-14 International Business Machines Corporation Ferromagnetic resonance switching for magnetic random access memory
US6917087B2 (en) 2003-02-21 2005-07-12 Micron Technology, Inc. Tilted array geometry for improved MRAM switching
US6775195B1 (en) 2003-02-28 2004-08-10 Union Semiconductor Technology Center Apparatus and method for accessing a magnetoresistive random access memory array
US6765835B1 (en) * 2003-03-21 2004-07-20 Wayne Theel Stabilizing and reducing noise apparatus and methods in MRAM sensing operations
US6816403B1 (en) * 2003-05-14 2004-11-09 International Business Machines Corporation Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices
US6862211B2 (en) * 2003-07-07 2005-03-01 Hewlett-Packard Development Company Magneto-resistive memory device
CN100429721C (zh) * 2004-04-01 2008-10-29 中国科学院物理研究所 一种基于垂直电流写入的磁随机存取存储器及其控制方法
US20070279971A1 (en) * 2004-06-04 2007-12-06 Micron Technology, Inc. Modified pseudo-spin valve (psv) for memory applications
US7173841B2 (en) * 2004-12-03 2007-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Magnetic memory array
US7170775B2 (en) * 2005-01-06 2007-01-30 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM cell with reduced write current
US7371627B1 (en) 2005-05-13 2008-05-13 Micron Technology, Inc. Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines
US7120046B1 (en) 2005-05-13 2006-10-10 Micron Technology, Inc. Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
US7541632B2 (en) * 2005-06-14 2009-06-02 Micron Technology, Inc. Relaxed-pitch method of aligning active area to digit line
US7858458B2 (en) * 2005-06-14 2010-12-28 Micron Technology, Inc. CMOS fabrication
US7888721B2 (en) 2005-07-06 2011-02-15 Micron Technology, Inc. Surround gate access transistors with grown ultra-thin bodies
US7768051B2 (en) 2005-07-25 2010-08-03 Micron Technology, Inc. DRAM including a vertical surround gate transistor
US7696567B2 (en) 2005-08-31 2010-04-13 Micron Technology, Inc Semiconductor memory device
US7557032B2 (en) 2005-09-01 2009-07-07 Micron Technology, Inc. Silicided recessed silicon
US7687342B2 (en) 2005-09-01 2010-03-30 Micron Technology, Inc. Method of manufacturing a memory device
US7416943B2 (en) 2005-09-01 2008-08-26 Micron Technology, Inc. Peripheral gate stacks and recessed array gates
US7471539B2 (en) * 2005-12-20 2008-12-30 Taiwan Semiconductor Manufacturing Co., Ltd. High current interconnect structure for IC memory device programming
FR2899588B1 (fr) * 2006-04-07 2009-02-27 Oreal Utilisation de compose c-glycoside derive de galactose comme agent activateur et regulateur de l'immunite cutanee
DE102006038510A1 (de) * 2006-08-17 2008-02-21 Johann Wolfgang Goethe-Universität Frankfurt am Main MRAM-Zelle und Verfahren zum Einspeichern einer Information in eine MRAM-Zelle
US20080080226A1 (en) * 2006-09-25 2008-04-03 Thomas Mikolajick Memory system and method of operating the memory system
US7719424B2 (en) * 2007-01-19 2010-05-18 Igt Table monitoring identification system, wager tagging and felt coordinate mapping
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
JP5110406B2 (ja) 2010-03-01 2012-12-26 横河電機株式会社 フィールド通信管理装置
US9817087B2 (en) 2012-03-14 2017-11-14 Analog Devices, Inc. Sensor with magnetroesitive and/or thin film element abutting shorting bars and a method of manufacture thereof

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US5734606A (en) * 1996-12-13 1998-03-31 Motorola, Inc. Multi-piece cell and a MRAM array including the cell
US5748519A (en) 1996-12-13 1998-05-05 Motorola, Inc. Method of selecting a memory cell in a magnetic random access memory device
US5804458A (en) 1996-12-16 1998-09-08 Motorola, Inc. Method of fabricating spaced apart submicron magnetic memory cells
US5917749A (en) 1997-05-23 1999-06-29 Motorola, Inc. MRAM cell requiring low switching field
US6104633A (en) 1998-02-10 2000-08-15 International Business Machines Corporation Intentional asymmetry imposed during fabrication and/or access of magnetic tunnel junction devices
US5946228A (en) * 1998-02-10 1999-08-31 International Business Machines Corporation Limiting magnetic writing fields to a preferred portion of a changeable magnetic region in magnetic devices
JPH11306750A (ja) * 1998-04-20 1999-11-05 Univ Kyoto 磁気型半導体集積記憶装置
US6005800A (en) 1998-11-23 1999-12-21 International Business Machines Corporation Magnetic memory array with paired asymmetric memory cells for improved write margin
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US6134139A (en) * 1999-07-28 2000-10-17 Hewlett-Packard Magnetic memory structure with improved half-select margin
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US6424561B1 (en) * 2000-07-18 2002-07-23 Micron Technology, Inc. MRAM architecture using offset bits for increased write selectivity
US6236590B1 (en) * 2000-07-21 2001-05-22 Hewlett-Packard Company Optimal write conductors layout for improved performance in MRAM
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US6809958B2 (en) * 2002-09-13 2004-10-26 Hewlett-Packard Development Company, L.P. MRAM parallel conductor orientation for improved write performance

Also Published As

Publication number Publication date
DE60107853D1 (de) 2005-01-20
WO2002007166A3 (fr) 2002-07-18
US6791856B2 (en) 2004-09-14
WO2002007166A2 (fr) 2002-01-24
IL153657A (en) 2006-10-31
US20040004878A1 (en) 2004-01-08
US20040082082A1 (en) 2004-04-29
KR20030041873A (ko) 2003-05-27
US6424561B1 (en) 2002-07-23
US6756240B2 (en) 2004-06-29
JP2004504715A (ja) 2004-02-12
US6992918B2 (en) 2006-01-31
EP1301928A2 (fr) 2003-04-16
IL153657A0 (en) 2003-07-06
EP1301928B1 (fr) 2004-12-15
US6424564B2 (en) 2002-07-23
US20020012268A1 (en) 2002-01-31
CN100416698C (zh) 2008-09-03
US6522574B2 (en) 2003-02-18
KR100514338B1 (ko) 2005-09-13
ATE285111T1 (de) 2005-01-15
US20030086321A1 (en) 2003-05-08
US20020012269A1 (en) 2002-01-31
CN1465073A (zh) 2003-12-31
DE60107853T2 (de) 2006-01-19

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