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AU2001247263A1 - Memory cell, method of formation, and operation - Google Patents

Memory cell, method of formation, and operation

Info

Publication number
AU2001247263A1
AU2001247263A1 AU2001247263A AU4726301A AU2001247263A1 AU 2001247263 A1 AU2001247263 A1 AU 2001247263A1 AU 2001247263 A AU2001247263 A AU 2001247263A AU 4726301 A AU4726301 A AU 4726301A AU 2001247263 A1 AU2001247263 A1 AU 2001247263A1
Authority
AU
Australia
Prior art keywords
formation
memory cell
cell
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001247263A
Inventor
Bo Jiang
Sucharita Madhukar
Ramachandran Muralidhar
David L. O'meara
Michael Alan Sadd
Srikanth B. Samavedam
Bruce E. White
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of AU2001247263A1 publication Critical patent/AU2001247263A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/687Floating-gate IGFETs having more than two programming levels
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5671Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/688Floating-gate IGFETs programmed by two single electrons
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2216/00Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02Structural aspects of erasable programmable read-only memories
    • G11C2216/08Nonvolatile memory wherein data storage is accomplished by storing relatively few electrons in the storage layer, i.e. single electron memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
AU2001247263A 2000-03-14 2001-03-02 Memory cell, method of formation, and operation Abandoned AU2001247263A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09524916 2000-03-14
US09/524,916 US6320784B1 (en) 2000-03-14 2000-03-14 Memory cell and method for programming thereof
PCT/US2001/006842 WO2001069607A2 (en) 2000-03-14 2001-03-02 Memory cell, method of formation, and operation

Publications (1)

Publication Number Publication Date
AU2001247263A1 true AU2001247263A1 (en) 2001-09-24

Family

ID=24091168

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001247263A Abandoned AU2001247263A1 (en) 2000-03-14 2001-03-02 Memory cell, method of formation, and operation

Country Status (8)

Country Link
US (1) US6320784B1 (en)
EP (1) EP1269477B1 (en)
JP (1) JP2003527747A (en)
KR (1) KR100705301B1 (en)
AU (1) AU2001247263A1 (en)
DE (1) DE60117132T2 (en)
TW (1) TW493268B (en)
WO (1) WO2001069607A2 (en)

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Also Published As

Publication number Publication date
WO2001069607A3 (en) 2002-03-21
US6320784B1 (en) 2001-11-20
KR100705301B1 (en) 2007-04-11
KR20020092383A (en) 2002-12-11
WO2001069607A2 (en) 2001-09-20
DE60117132T2 (en) 2006-07-13
EP1269477B1 (en) 2006-02-08
TW493268B (en) 2002-07-01
DE60117132D1 (en) 2006-04-20
EP1269477A2 (en) 2003-01-02
JP2003527747A (en) 2003-09-16

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