| Survey of hardware protection of design data for integrated circuits and intellectual properties B Colombier, L Bossuet IET Computers & Digital Techniques 8 (6), 274-287, 2014 | 112 | 2014 |
| Laser-induced single-bit faults in flash memory: instructions corruption on a 32-bit microcontroller B Colombier, A Menu, JM Dutertre, PA Moëllic, JB Rigaud, JL Danger 2019 IEEE International Symposium on Hardware Oriented Security and Trust …, 2019 | 98 | 2019 |
| Multi-spot Laser Fault Injection Setup: New Possibilities for Fault Injection Attacks B Colombier, P Grandamme, J Vernay, É Chanavat, L Bossuet, ... 20th Smart Card Research and Advanced Application Conference-CARDIS 2021, 2021 | 61 | 2021 |
| Key reconciliation protocols for error correction of silicon PUF responses B Colombier, L Bossuet, V Fischer, D Hély IEEE Transactions on Information Forensics and Security 12 (8), 1988-2002, 2017 | 50 | 2017 |
| Message-Recovery Laser Fault Injection Attack on the Classic McEliece Cryptosystem PL Cayrel, B Colombier, VF Drăgoi, A Menu, L Bossuet Annual International Conference on the Theory and Applications of …, 2021 | 35 | 2021 |
| Single-bit Laser Fault Model in NOR Flash Memories: Analysis and Exploitation A Menu, JM Dutertre, JB Rigaud, B Colombier, PA Moellic, JL Danger 2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC), 41-48, 2020 | 30 | 2020 |
| Online Performance Evaluation of Deep Learning Networks for Profiled Side-Channel Analysis D Robissout, G Zaid, B Colombier, L Bossuet, A Habrard International Workshop on Constructive Side-Channel Analysis and Secure …, 2020 | 22 | 2020 |
| Profiled Side-channel Attack on Cryptosystems based on the Binary Syndrome Decoding Problem B Colombier, VF Drăgoi, PL Cayrel, V Grosso IEEE Transactions on Information Forensics and Security 17, 3407-3420, 2022 | 20 | 2022 |
| Variable-Length Instruction Set: Feature or Bug? I Alshaer, B Colombier, C Deleuze, V Beroulle, P Maistri 2022 25th Euromicro Conference on Digital System Design (DSD), 464-471, 2022 | 16 | 2022 |
| From secured logic to IP protection B Colombier, L Bossuet, D Hély Microprocessors and Microsystems 47, 44-54, 2016 | 16 | 2016 |
| Message-recovery Profiled Side-channel Attack on the Classic McEliece Cryptosystem. B Colombier, VF Dragoi, PL Cayrel, V Grosso IACR Cryptol. ePrint Arch. 2022, 125, 2022 | 15 | 2022 |
| Transient effect ring oscillators leak too U Mureddu, B Colombier, N Bochard, L Bossuet, V Fischer 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 37-42, 2019 | 14 | 2019 |
| Microarchitectural Insights into Unexplained Behaviors under Clock Glitch Fault Injection I Alshaer, B Colombier, C Deleuze, V Beroulle, P Maistri International Conference on Smart Card Research and Advanced Applications, 3-22, 2023 | 13 | 2023 |
| TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design R Milan, L Bossuet, L Lagadec, CA Lara-Nino, B Colombier 2023 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 1-6, 2023 | 12 | 2023 |
| Reversible denial-of-service by locking gates insertion for IP cores design protection B Colombier, L Bossuet, D Hély 2015 IEEE Computer Society Annual Symposium on VLSI, 210-215, 2015 | 12 | 2015 |
| Online performance evaluation of deep learning networks for side-channel analysis D Robissout, G Zaid, B Colombier, L Bossuet, A Habrard Cryptology ePrint Archive, 2020 | 10 | 2020 |
| Comments on “A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-per-Device Licensing” L Bossuet, B Colombier IEEE Transactions on Information Forensics and Security 11 (11), 2624-2625, 2016 | 10 | 2016 |
| Punctured Syndrome Decoding Problem: Efficient Side-Channel Attacks Against Classic McEliece V Grosso, PL Cayrel, B Colombier, VF Drăgoi International Workshop on Constructive Side-Channel Analysis and Secure …, 2023 | 8 | 2023 |
| Backtracking search for optimal parameters of a PLL-based true random number generator B Colombier, N Bochard, F Bernard, L Bossuet 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2020 | 8 | 2020 |
| Methods for protecting intellectual property of IP cores designers B Colombier Université de Lyon, 2017 | 8 | 2017 |
Lilian BossuetProfessor, University Jean Monnet, Saint-Etienne - Laboratoire Hubert Curien - CNRSVerified email at univ-st-etienne.fr
