| Secure execution via program shepherding V Kiriansky, D Bruening, S Amarasinghe 11th USENIX Security Symposium (USENIX Security 02), 2002 | 802 | 2002 |
| DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors V Kiriansky, I Lebedev, S Amarasinghe, S Devadas, J Emer MICRO'18, 2018 | 452 | 2018 |
| Securing customer virtual machines in a multi-tenant cloud I Ahmad, M Gunti, A Chaturvedi, V Kiriansky US Patent 8,909,928, 2014 | 323 | 2014 |
| Secure execution of a computer program VL Kiriansky, DL Bruening, SP Amarasinghe US Patent 7,594,111, 2009 | 302 | 2009 |
| Speculative buffer overflows: Attacks and defenses V Kiriansky, C Waldspurger arXiv preprint arXiv:1807.03757, 2018 | 274 | 2018 |
| Making caches work for graph analytics Y Zhang, V Kiriansky, C Mendis, S Amarasinghe, M Zaharia 2017 IEEE International Conference on Big Data (Big Data), 293-302, 2017 | 176 | 2017 |
| Secure execution of a computer program using a code cache DL Bruening, VL Kiriansky, SP Amarasinghe US Patent 7,603,704, 2009 | 138 | 2009 |
| Constraint injection system for immunizing software programs against vulnerabilities and attacks SP Amarasinghe, B Chandramohan, C Renert, DL Bruening, VL Kiriansky, ... US Patent 7,945,958, 2011 | 137 | 2011 |
| Sharing and persisting code caches D Bruening, VL Kiriansky US Patent 8,321,850, 2012 | 119 | 2012 |
| 0-touch and 1-touch techniques for improving the availability of computer programs under protection without compromising security S Mantripragada, T Garnett, D Bruening, V Kiriansky, B Chandramohan, ... US Patent 7,735,136, 2010 | 104 | 2010 |
| Secure execution of a computer program VL Kiriansky, DL Bruening, SP Amarasinghe US Patent 7,886,148, 2011 | 87 | 2011 |
| Thread-shared software code caches DL Bruening, VL Kiriansky, T Garnett, S Banerji US Patent 8,402,224, 2013 | 66 | 2013 |
| Optimizing indirect memory references with milk V Kiriansky, Y Zhang, S Amarasinghe Proceedings of the 2016 International Conference on Parallel Architectures …, 2016 | 50 | 2016 |
| Performance Evaluation of HPC Benchmarks on VMware’s ESXi Server Q Ali, V Kiriansky, J Simons, P Zaroo | 41 | 2011 |
| Thread-shared software code caches D Bruening, V Kiriansky, T Garnett, S Banerji International Symposium on Code Generation and Optimization (CGO'06), 11 pp.-38, 2006 | 41 | 2006 |
| Constraint injection system for immunizing software programs against vulnerabilities and attacks SP Amarasinghe, B Chandramohan, C Renert, DL Bruening, V Kiriansky, ... US Patent 8,656,497, 2014 | 39 | 2014 |
| Optimizing cache performance for graph analytics Y Zhang, V Kiriansky, C Mendis, M Zaharia, S Amarasinghe arXiv preprint arXiv:1608.01362, 8, 2016 | 27 | 2016 |
| Process-shared and persistent code caches D Bruening, V Kiriansky Proceedings of the fourth ACM SIGPLAN/SIGOPS international conference on …, 2008 | 27 | 2008 |
| Cimple: Instruction and Memory Level Parallelism V Kiriansky, H Xu, M Rinard, S Amarasinghe PACT'18 preprint, 2018 | 22* | 2018 |
| Memory management using transparent page transformation VL Kiriansky US Patent 9,665,498, 2017 | 21 | 2017 |
Saman AmarasingheMITVerified email at mit.edu
