| Computer arithmetic algorithms I Koren A.K. Peters, Ltd, 2002 | 2058* | 2002 |
| Fault-tolerant systems I Koren, CM Krishna Morgan Kaufmann, 2020 | 1555 | 2020 |
| Fault injection attacks on cryptographic devices: Theory, practice, and countermeasures A Barenghi, L Breveglieri, I Koren, D Naccache Proceedings of the IEEE 100 (11), 3056-3076, 2012 | 803 | 2012 |
| Error analysis and detection procedures for a hardware implementation of the advanced encryption standard G Bertoni, L Breveglieri, I Koren, P Maistri, V Piuri IEEE transactions on Computers 52 (4), 492-505, 2003 | 456 | 2003 |
| Defect tolerance in VLSI circuits: techniques and yield analysis I Koren, Z Koren Proceedings of the IEEE 86 (9), 1819-1838, 2002 | 278 | 2002 |
| Methods and apparatus for detecting defects in imaging arrays by image analysis GH Chapman, I Koren, Z Koren, J Dudas, C Jung US Patent 8,009,209, 2011 | 276 | 2011 |
| System-level power-aware design techniques in real-time systems OS Unsal, I Koren Proceedings of the IEEE 91 (7), 1055-1069, 2003 | 252 | 2003 |
| Complete and partial fault tolerance of feedforward neural nets DS Phatak, I Koren IEEE transactions on neural networks 6 (2), 446-456, 1995 | 225 | 1995 |
| A reconfigurable and fault-tolerant VLSI multiprocessor array I Koren ISCA, 425-442, 1981 | 181 | 1981 |
| Fault tolerance in VLSI circuits I Koren, AD Singh Computer 23 (7), 73-83, 2002 | 151 | 2002 |
| Countermeasures against fault attacks on software implemented AES: effectiveness and cost A Barenghi, L Breveglieri, I Koren, G Pelosi, F Regazzoni Proceedings of the 5th Workshop on Embedded Systems Security, 1-10, 2010 | 140 | 2010 |
| Optimal aspect ratios of building blocks in VLSI S Wimer, I Koren, I Cederbaum IEEE transactions on computer-aided design of integrated circuits and …, 1989 | 123 | 1989 |
| Yield models for defect-tolerant VLSI circuits: A review I Koren, CH Stapper Defect and Fault Tolerance in VLSI Systems: Volume 1, 1-21, 1989 | 122 | 1989 |
| Connectivity and performance tradeoffs in the cascade correlation learning architecture DS Phatak, I Koren IEEE Transactions on Neural Networks 5 (6), 930-935, 1994 | 120 | 1994 |
| Temperature aware floorplanning Y Han, I Koren, CA Moritz Workshop on Temperature Aware Computer Systems 24, 2005 | 117 | 2005 |
| Evaluating elementary functions in a numerical coprocessor based on rational approximations I Koren, O Zinaty IEEE Transactions on Computers 39 (8), 1030-1037, 1990 | 115 | 1990 |
| Hybrid signed-digit number systems: A unified framework for redundant number representations with bounded carry propagation chains DS Phatak, I Koren IEEE Transactions on computers 43 (8), 880-891, 2002 | 114 | 2002 |
| Floorplans, planar graphs, and layouts S Wimer, I Koren, I Cederbaum IEEE Transactions on Circuits and Systems 35 (3), 267-278, 2002 | 114 | 2002 |
| A unified negative-binomial distribution for yield analysis of defect-tolerant circuits I Koren, Z Koren, CH Stepper IEEE Transactions on Computers 42 (6), 724-734, 2002 | 111 | 2002 |
| On area and yield considerations for fault-tolerant VLSI processor arrays I Koren, MA Breuer IEEE Transactions on computers 100 (1), 21-27, 1984 | 108 | 1984 |
Glenn H. ChapmanProfessor School of Engineering Science, Simon Fraser UniversityVerified email at cs.sfu.ca
