| Vibnn: Hardware acceleration of bayesian neural networks R Cai, A Ren, N Liu, C Ding, L Wang, X Qian, M Pedram, Y Wang Proceedings of the Twenty-Third International Conference on Architectural …, 2018 | 146 | 2018 |
| HEIF: Highly efficient stochastic computing-based inference framework for deep neural networks Z Li, J Li, A Ren, R Cai, C Ding, X Qian, J Draper, B Yuan, J Tang, Q Qiu, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 105 | 2018 |
| Adiabatic quantum-flux-parametron: Towards building extremely energy-efficient circuits and systems O Chen, R Cai, Y Wang, F Ke, T Yamae, R Saito, N Takeuchi, ... Scientific reports 9 (1), 10514, 2019 | 64 | 2019 |
| A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology R Cai, A Ren, O Chen, N Liu, C Ding, X Qian, J Han, W Luo, N Yoshikawa, ... Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 61 | 2019 |
| Deep reinforcement learning: Algorithm, applications, and ultra-low-power implementation H Li, R Cai, N Liu, X Lin, Y Wang Nano Communication Networks 16, 81-90, 2018 | 41 | 2018 |
| A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits R Cai, O Chen, A Ren, N Liu, C Ding, N Yoshikawa, Y Wang Proceedings of the 2019 on Great Lakes Symposium on VLSI, 189-194, 2019 | 37 | 2019 |
| Memristor crossbar-based ultra-efficient next-generation baseband processors G Yuan, C Ding, R Cai, X Ma, Z Zhao, A Ren, B Yuan, Y Wang 2017 IEEE 60th international midwest symposium on circuits and systems …, 2017 | 33 | 2017 |
| A buffer and splitter insertion framework for adiabatic quantum-flux-parametron superconducting circuits R Cai, O Chen, A Ren, N Liu, N Yoshikawa, Y Wang 2019 IEEE 37th International Conference on Computer Design (ICCD), 429-436, 2019 | 28 | 2019 |
| Memristor-based discrete Fourier transform for improving performance and energy efficiency R Cai, A Ren, Y Wang, B Yuan 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 643-648, 2016 | 28 | 2016 |
| IDE development, logic synthesis and buffer/splitter insertion framework for adiabatic quantum-flux-parametron superconducting circuits R Cai, X Ma, O Chen, A Ren, N Liu, N Yoshikawa, Y Wang 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 187-192, 2019 | 8 | 2019 |
| A low-computation-complexity, energy-efficient, and high-performance linear program solver based on primal–dual interior point method using memristor crossbars R Cai, A Ren, S Soundarajan, Y Wang Nano communication networks 18, 62-71, 2018 | 6 | 2018 |
| Hardware acceleration of bayesian neural networks using RAM based linear feedback gaussian random number generators R Cai, A Ren, L Wangy, M Pedramy, Y Wang 2017 IEEE International Conference on Computer Design (ICCD), 289-296, 2017 | 6 | 2017 |
| A low-computation-complexity, energy-efficient, and high-performance linear program solver using memristor crossbars R Cai, A Ren, Y Wang, S Soundarajan, Q Qiu, B Yuan, P Bogdan 2016 29th IEEE International System-on-Chip Conference (SOCC), 317-322, 2016 | 6 | 2016 |
| Algorithm-hardware co-optimization of the memristor-based framework for solving SOCP and homogeneous QCQP problems A Ren, S Liu, R Cai, W Wen, PK Varshney, Y Wang 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 788-793, 2017 | 5 | 2017 |
| Emerging opportunities in machine learning hardware acceleration: From advanced neural networks implementation to ultra-efficient deep learning framework using next generation … R Cai Northeastern University, 2020 | 1 | 2020 |
| A Study on Majority Synthesis for Adiabatic Superconducting Logic O Chen, R Cai, Y Wang, N Takeuchi, N Yoshikawa IEICE Technical Report; IEICE Tech. Rep. 119 (10), 13-17, 2019 | | 2019 |
| Abdel Ghany, Mohamed Abdelrehim, Mostafa K Abhishek, D Almasi, AI Azam, M Bai, Z Bai, M Bansal, N Batra, J Bhadra, ... | | |
Yanzhi WangNortheastern UniversityVerified email at northeastern.edu
