| A data-oriented survey of context models C Bolchini, CA Curino, E Quintarelli, FA Schreiber, L Tanca ACM Sigmod Record 36 (4), 19-26, 2007 | 487 | 2007 |
| TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs C Bolchini, A Miele, MD Santambrogio 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007 | 222 | 2007 |
| Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs A Das, A Kumar, B Veeravalli, C Bolchini, A Miele 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 105 | 2014 |
| A novel design methodology for implementing reliability-aware systems on SRAM-based FPGAs C Bolchini, A Miele, C Sandionigi Computers, IEEE Transactions on 60 (12), 1744-1758, 2011 | 98 | 2011 |
| And what can context do for data? C Bolchini, CA Curino, G Orsi, E Quintarelli, R Rosalba, SA Fabio, ... Communications of the ACM 52 (11), 136-140, 2009 | 96 | 2009 |
| Reliability-driven system-level synthesis for mixed-critical embedded systems C Bolchini, A Miele IEEE Transactions on Computers 62 (12), 2489-2502, 2012 | 90 | 2012 |
| Carve: Context-aware automatic view definition over relational databases C Bolchini, E Quintarelli, L Tanca Information Systems, 2012 | 88 | 2012 |
| Context information for knowledge reshaping C Bolchini, CA Curino, E Quintarelli, FA Schreiber, L Tanca International Journal of Web Engineering and Technology 5 (1), 88-103, 2009 | 83 | 2009 |
| A software methodology for detecting hardware faults in VLIW data paths C Bolchini IEEE Transactions on Reliability 52 (4), 458-468, 2004 | 83 | 2004 |
| A methodology for a very small data base design C Bolchini, FA Schreiber, L Tanca Information Systems 32 (1), 61-82, 2007 | 80 | 2007 |
| Context integration for mobile data tailoring C Bolchini, C Curino, FA Schreiber, L Tanca 7th International Conference on Mobile Data Management (MDM'06), 5-5, 2006 | 78 | 2006 |
| Logical and physical design issues for smart card databases C Bolchini, F Salice, FA Schreiber, L Tanca ACM Transactions on Information Systems (TOIS) 21 (3), 254-285, 2003 | 70 | 2003 |
| Design of VHDL-based totally self-checking finite-state machine and data-path descriptions C Bolchini, R Montandon, F Salice, D Sciuto IEEE Transactions on very large scale integration (VLSI) systems 8 (1), 98-103, 2002 | 66 | 2002 |
| SEU mitigation for SRAM-based FPGAs through dynamic partial reconfiguration C Bolchini, D Quarta, MD Santambrogio Proceedings of the 17th ACM Great Lakes symposium on VLSI, 55-60, 2007 | 57 | 2007 |
| Run-time mapping for reliable many-cores based on energy/performance trade-offs C Bolchini, M Carminati, A Miele, A Das, A Kumar, B Veeravalli 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2013 | 52 | 2013 |
| Smart buildings: A monitoring and data analysis methodological framework C Bolchini, A Geronazzo, E Quintarelli Building and environment 121, 93-105, 2017 | 51 | 2017 |
| Automated resource-aware floorplanning of reconfigurable areas in partially-reconfigurable FPGA systems C Bolchini, A Miele, C Sandionigi 2011 21st International Conference on Field Programmable Logic and …, 2011 | 50 | 2011 |
| Context Modeling and Context Awareness: steps forward in the Context− ADDICT project C Bolchini, G Orsi, E Quintarelli, F Schreiber, L Tanca IEEE Data Engineering Bulletin 34 (2), 2011 | 50 | 2011 |
| Workload-aware power optimization strategy for asymmetric multiprocessors E Del Sozzo, GC Durelli, EMG Trainiti, A Miele, MD Santambrogio, ... 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 531-534, 2016 | 46 | 2016 |
| Fast and accurate error simulation for cnns against soft errors C Bolchini, L Cassano, A Miele, A Toschi IEEE Transactions on Computers 72 (4), 984-997, 2022 | 45 | 2022 |
Antonio MielePolitecnico di MilanoVerified email at polimi.it
