Digvijay Anand

202320241 2

Ayan PalchaudhuriIndian Institute of Technology BhubaneswarVerified email at iitbbs.ac.in
Anindya Sundar DharProfessor, Dept. of Electronics and Electrical Communication Engineering, Indian Institute ofVerified email at ece.iitkgp.ernet.in

Digvijay Anand

Student

Verified email at ncsu.edu - Homepage


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FPGA fabric conscious architecture design and automation of speed-area efficient Margolus neighborhood based cellular automata with variegated scan path insertion A Palchaudhuri, D Anand, AS Dhar Journal of Parallel and Distributed Computing 167, 50-63, 2022	3	2022

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