| The promise of reconfigurable computing for hyperspectral imaging onboard systems: A review and trends S Lopez, T Vladimirova, C Gonzalez, J Resano, D Mozos, A Plaza Proceedings of the IEEE 101 (3), 698-722, 2013 | 133 | 2013 |
| Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing C Gonzalez, S Sánchez, A Paz, J Resano, D Mozos, A Plaza Integration 46 (2), 89-103, 2013 | 114 | 2013 |
| FPGA implementation of the N-FINDR algorithm for remotely sensed hyperspectral image analysis C González, D Mozos, J Resano, A Plaza IEEE transactions on geoscience and remote sensing 50 (2), 374-388, 2011 | 90 | 2011 |
| A hybrid prefetch scheduling heuristic to minimize at run-time the reconfiguration overhead of dynamically reconfigurable hardware [multimedia applications] J Resano, D Mozos, F Catthoor Design, Automation and Test in Europe, 106-111, 2005 | 86 | 2005 |
| FPGA implementation of the pixel purity index algorithm for remotely sensed hyperspectral image analysis C González, J Resano, D Mozos, A Plaza, D Valencia EURASIP Journal on Advances in Signal Processing 2010 (1), 969806, 2010 | 85 | 2010 |
| A reconfigurable manager for dynamically reconfigurable hardware J Resano, D Mozos, D Verkest, F Catthoor IEEE Design & Test of Computers 22 (5), 452-460, 2005 | 85 | 2005 |
| FPGA implementation of abundance estimation for spectral unmixing of hyperspectral data using the image space reconstruction algorithm C González, J Resano, A Plaza, D Mozos IEEE Journal of Selected Topics in Applied Earth Observations and Remote …, 2011 | 69 | 2011 |
| Improving accuracy on wave height estimation through machine learning techniques S Gracia, J Olivito, J Resano, B Martin-del-Brio, M De Alfonso, E Álvarez Ocean Engineering 236, 108699, 2021 | 67 | 2021 |
| A hardware implementation of a run-time scheduler for reconfigurable systems JA Clemente, J Resano, C González, D Mozos IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (7 …, 2010 | 63 | 2010 |
| FPGA accelerator for gradient boosting decision trees A Alcolea, J Resano Electronics 10 (3), 314, 2021 | 58 | 2021 |
| Specific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware J Resano, D Mozos Proceedings of the 41st annual Design Automation Conference, 119-124, 2004 | 55 | 2004 |
| Inference in supervised spectral classifiers for on-board hyperspectral imaging: An overview A Alcolea, ME Paoletti, JM Haut, J Resano, A Plaza Remote Sensing 12 (3), 534, 2020 | 50 | 2020 |
| Run-time minimization of reconfiguration overhead in dynamically reconfigurable systems J Resano, D Mozos, D Verkest, S Vernalde, F Catthoor International Conference on Field Programmable Logic and Applications, 585-594, 2003 | 36 | 2003 |
| A novel approach for adapting the standard addition method to single particle-ICP-MS for the accurate determination of NP size and number concentration in complex matrices M Aramendía, JC García-Mesa, EV Alonso, R Garde, A Bazo, J Resano, ... Analytica Chimica Acta 1205, 339738, 2022 | 35 | 2022 |
| Efficiently scheduling runtime reconfigurations J Resano, JA Clemente, C Gonzalez, D Mozos, F Catthoor ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (4 …, 2008 | 35 | 2008 |
| A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs J Resano, D Verkest, D Mozos, S Vernalde, F Catthoor Microprocessors and Microsystems 28 (5-6), 291-301, 2004 | 26 | 2004 |
| An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems JA Clemente, J Resano, D Mozos ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-24, 2014 | 24 | 2014 |
| A task graph execution manager for reconfigurable multi-tasking systems JA Clemente, C González, J Resano, D Mozos Microprocessors and Microsystems 34 (2-4), 73-83, 2010 | 23 | 2010 |
| A hardware task-graph scheduler for reconfigurable multi-tasking systems JA Clemente, C González, J Resano, D Mozos 2008 International Conference on Reconfigurable Computing and FPGAs, 79-84, 2008 | 18 | 2008 |
| Analysis of a pipelined architecture for sparse DNNs on embedded systems AA Moreno, J Olivito, J Resano, H Mecha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (9 …, 2020 | 17 | 2020 |
Daniel MozosProfesor de Informatica (UCM)Verified email at dacya.ucm.es
