| Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL MA Dávila Guzmán, R Nozal, R Gran Tejero, M Villarroya-Gaudó, ... The Journal of Supercomputing 75 (3), 1732-1746, 2019 | 61 | 2019 |
| Adaptive partitioning for irregular applications on heterogeneous CPU-GPU chips A Vilches, R Asenjo, A Navarro, F Corbera, R Gran, M Garzarán Procedia Computer Science 51, 140-149, 2015 | 44 | 2015 |
| Mapping streaming applications on commodity multi-CPU and GPU on-chip processors A Vilches, A Navarro, R Asenjo, F Corbera, R Gran, MJ Garzarán IEEE Transactions on Parallel and Distributed Systems 27 (4), 1099-1115, 2015 | 35 | 2015 |
| Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs A Rodríguez, A Navarro, R Asenjo, F Corbera, R Gran, D Suárez, ... Journal of Systems Architecture 98, 27-40, 2019 | 34 | 2019 |
| Simultaneous multiprocessing in a software-defined heterogeneous FPGA J Nunez-Yanez, S Amiri, M Hosseinabady, A Rodríguez, R Asenjo, ... The Journal of Supercomputing 75 (8), 4078-4095, 2019 | 33* | 2019 |
| Parallel multiprocessing and scheduling on the heterogeneous Xeon+ FPGA platform: A. Rodríguez et al. A Rodríguez, A Navarro, R Asenjo, F Corbera, R Gran, D Suárez, ... The Journal of Supercomputing 76 (6), 4645-4665, 2020 | 23 | 2020 |
| ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache J Albericio, R Gran, P Ibánez, V Viñals, JM Llabería ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012 | 17 | 2012 |
| Gated-CNN: Combating NBTI and HCI aging effects in on-chip activation memories of Convolutional Neural Network accelerators N Landeros Muñoz, A Valero, R Gran Tejero, D Zoni Journal of Systems Architecture, 102553, 2022 | 15 | 2022 |
| Directive-based compilers for GPUs S Ghike, R Gran, MJ Garzarán, D Padua International Workshop on Languages and Compilers for Parallel Computing, 19-35, 2014 | 13 | 2014 |
| Lightweight asynchronous scheduling in heterogeneous reconfigurable systems A Rodríguez, A Navarro, K Nikov, J Nunez-Yanez, R Gran, DS Gracia, ... Journal of Systems Architecture 124, 102398, 2022 | 10 | 2022 |
| ACDC: small, predictable and high-performance data cache J Segarra, C Rodriguez, R Gran, LC Aparicio, V Vinals ACM Transactions on Embedded Computing Systems (TECS) 14 (2), 1-26, 2015 | 10 | 2015 |
| Automatic Safe Data Reuse Detection for the WCET Analysis of Systems With Data Caches J Segarra, J Cortadella, R Gran Tejero, V Viñals-Yúfera IEEE access 8, 192379-192392, 2020 | 9 | 2020 |
| An Analytical Model of Memory-Bound Applications Compiled with High Level Synthesis MA Dávila-Guzmán, R Gran Tejero, M Villarroya-Gaudó, DS Gracia 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom …, 2020 | 9 | 2020 |
| A Cross-Platform OpenVX Library for FPGA Accelerators MA Dávila-Guzmán, R Gran Tejero, M Villarroya-Gaudó, DS Gracia, ... 2021 29th Euromicro International Conference on Parallel, Distributed and …, 2021 | 8 | 2021 |
| Reducing the WCET and analysis time of systems with simple lockable instruction caches A Pedro-Zapater, J Segarra, R Gran Tejero, V Viñals, C Rodríguez PLoS One 15 (3), e0229980, 2020 | 8 | 2020 |
| Hardware architectural support for caching partitioned reconfigurations in reconfigurable systems JA Clemente, R Gran, A Chocano, C del Prado, J Resano IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 530-543, 2015 | 8 | 2015 |
| DC-patch: A microarchitectural fault patching technique for GPU register files A Valero, D Suarez-Gracia, R Gran-Tejero IEEE Access 8, 173276-173288, 2020 | 7 | 2020 |
| A generic framework to integrate data caches in the WCET analysis of real-time systems J Segarra, R Gran Tejero, V Viñals Journal of Systems Architecture, 102304, 2021 | 6 | 2021 |
| Ideal and predictable hit ratio for matrix transposition in data caches A Pedro-Zapater, C Rodríguez, J Segarra, R Gran Tejero, V Viñals-Yúfera Mathematics 8 (2), 184, 2020 | 6 | 2020 |
| A predictable hardware to exploit temporal reuse in real-time and embedded systems R Gran, J Segarra, A Pedro-Zapater, LC Aparicio, V Viñals, C Rodríguez Journal of Systems Architecture 61 (5-6), 227-238, 2015 | 6 | 2015 |
Darío Suárez GraciaProfessor at the Universidad de ZaragozaVerified email at unizar.es
