WO2025235868A1 - Reference timing with 2 timing advance operation in carrier aggregation - Google Patents

Abstract

An apparatus configured to process, based on signals received from a network, a configuration comprising a multiple transmission and reception point (mTRP) configuration, a multiple Downlink Control Information (multi-DCI) configuration with two timing advances (TAs) and a carrier aggregation (CA) configuration, wherein the configuration further comprises a primary timing advance group (pTAG) for a primary cell group (PCG) of the CA configuration and a secondary TAG (sTAG) for a secondary cell group (SCG) of the CA configuration, wherein an active Transmission Control Indicator (TCI) state list for each serving cell of the pTAG and sTAG is associated with a coresetPoolIndex0 and a coresetPoolIndex1 and select a reference cell for each of the coresetPoolIndex0 and the coresetPoolIndex1 of the pTAG and sTAG to determine a reference timing for the corresponding coresetPoolIndex0 and coresetPoolIndex1.

Description

Reference Timing with 2 Timing Advance Operation in Carrier Aggregation

Inventors: Manasa Raghavan, Jie Cui, Qiming Li, Xiang Chen and Yang Tang

Priority/ Incorporation By Reference

[0001] This application claims priority to U.S. Provisional Application Serial No. 63/644,959 filed on May 9, 2024, and entitled "Reference Timing with 2 Timing Advance Operation in Carrier Aggregation," the entirety of which is incorporated by reference herein.

Background

[0002] A user equipment (UE) may communicate with a network using a variety of different operating modes. Fifth Generation (5G) New Radio (NR) networks allow a UE to communicate using multiple transmission and reception points (mTRP) . Control information in mTRP may be sent to the UE using multiple Downlink Control Information (multi-DCI) . Furthermore, to increase throughput between the UE and the network, the UE may be configured with carrier aggregation (CA) . When operating in these modes, the UE may need to understand the timing (e.g., a timing advance (TA) with respect to the multiple TRPs with which the UE is communicating. The UE may do this based on reference signals that are transmitted by a reference cell. However, when operating in CA mTRP CA mode, the UE may have multiple configured cells with which it is communicating. This may lead to ambiguity as to which cell is the reference cell for purposes of timing. Summary

[0003] Some example embodiments are related to an apparatus having processing circuitry coupled to memory, wherein the processing circuitry is configured to process, based on signals received from a network, a configuration comprising a multiple transmission and reception point (mTRP) configuration, a multiple Downlink Control Information (multi-DCI) configuration with two timing advances (TAs) and a carrier aggregation (CA) configuration, wherein the configuration further comprises a primary timing advance group (pTAG) for a primary cell group (PCG) of the CA configuration and a secondary TAG (sTAG) for a secondary cell group (SCG) of the CA configuration, wherein an active Transmission Control Indicator (TCI) state list for each serving cell of the pTAG and sTAG is associated with a coresetPool IndexO and a coresetPoolIndexl and select a reference cell for each of the coresetPoolIndexO and the coresetPoolIndexl of the pTAG and sTAG to determine a reference timing for the corresponding coresetPoolIndexO and coresetPoolIndexl.

[0004] Other example embodiments are related to a method for processing, based on signals received from a network, a configuration comprising a multiple transmission and reception point (mTRP) configuration, a multiple Downlink Control Information (multi-DCI) configuration with two timing advances (TAs) and a carrier aggregation (CA) configuration, wherein the configuration further comprises a primary timing advance group (pTAG) for a primary cell group (PCG) of the CA configuration and a secondary TAG (sTAG) for a secondary cell group (SCG) of the CA configuration, wherein an active Transmission Control Indicator (TCI) state list for each serving cell of the pTAG and sTAG is associated with a coresetPoolIndexO and a coresetPoolIndexl and selecting a reference cell for each of the coresetPoolIndexO and the coresetPoolIndexl of the pTAG and sTAG to determine a reference timing for the corresponding coresetPoolIndexO and coresetPoolIndexl.

Brief Description of the Drawings

[0005] Fig. 1 shows an example network arrangement according to various example embodiments.

[0006] Fig. 2 shows an example user equipment (UE) according to various example embodiments.

[0007] Fig. 3 shows an example base station according to various example embodiments.

[0008] Fig. 4A shows a primary Timing Advance Group (pTAG) where a reference cell is configured with intra-cell multiple transmission/reception point (mTRP) according to various example embodiments .

[0009] Fig. 4B shows a secondary Timing Advance Group (sTAG) where a reference cell is configured with intra-cell multiple mTRP according to various example embodiments.

[0010] Fig. 5A shows a pTAG where a reference cell is configured with inter-cell mTRP according to various example embodiments .

[0011] Fig. 5B shows a sTAG where a reference cell is configured with inter-cell mTRP according to various example embodiments . [0012] Fig. 6A shows a pTAG where a reference cell is not configured with mTRP according to various example embodiments.

[0013] Fig. 6B shows a STAG where a reference cell is not configured with mTRP according to various example embodiments.

[0014] Fig. 7 shows an example method for selecting a reference cell for each of 2 timing advance (TAs) for a UE configured with multi-DCI, mTRP, CA according to various example embodiments .

Detailed Description

[0015] The example embodiments may be further understood with reference to the following description and the related appended drawings, wherein like elements are provided with the same reference numerals. The example embodiments relate to a user equipment (UE) selecting or determining a reference cell for 2 timing advances (TAs) when operating in multi-DCI mTRP CA mode.

[0016] The example embodiments are described with regard to a user equipment (UE) . However, reference to a UE is merely provided for illustrative purposes. The example embodiments may be utilized with any electronic component that may establish a connection to a network and is configured with the hardware, software, and/or firmware to exchange signaling and/or data with the network. Therefore, the UE as described herein is used to represent any electronic component.

[0017] The example embodiments are also described with reference to a 5G New Radio (NR) cellular network. However, the example embodiments may also be implemented in other types of networks, including but not limited to LTE networks, future evolutions of the cellular protocol (e.g., 5G-advanced networks, 6G networks, etc.) , or any other type of network.

[0018] Some example embodiments are also described with reference to carrier aggregation (CA) . In CA, a UE may communicate in the downlink (DL) or uplink (UL) with multiple cells of a network to increase throughput. CA includes the UE associating with a Primary Cell (PCell) and one or more Secondary Cells (SCells) . Different band combinations of CA may be served by the PCell and SCell, e.g., the PCell may serve a first component carrier (CC) of a CA band combination (e.g., CC1) to the UE and the SCell may serve a second CC of the CA band combination (e.g., CC2) to the UE . Thus, in CA, both the PCell and the SCell are considered to be serving cells. CA mode may include multiple SCells.

[0019] In CA, the nodes of cell groups, e.g., primary cell group (PCG) and secondary cell group (SCG) , may be characterized by their roles within their respective cell group. For example, the PCG may comprise a PCell and zero or more SCells. The PCell and the SCells of the PCG may utilize carrier aggregation (CA) technology. Thus, the greater the number of SCells configured in the PCG, the higher the maximum possible bandwidth or data rate that may be achieved by the PCG. The SCG may comprise a primary secondary cell (PSCell) and zero or more SCells. Similarly, the PSCell and the SCells of the SCG may utilize CA technology. Thus, the greater the number of SCells configured in the SCG, the higher the maximum possible bandwidth or data rate that may be achieved by the SCG.

[0020] Some wireless communication networks support multiple transmission/reception point (mTRP) operation to increase network coverage, reliability, and data rates. In these networks, one or more base stations may act as or otherwise utilize multiple TRPs to communicate with a user equipment (UE) . In mTRP operations, one or more base stations may trigger a UE to make two uplink transmissions respectively towards two TRPs based on two downlink control information (DCI) signals. This type of transmission is referred to as multi-DCI transmission. The two DCI signals may each independently configure an uplink transmission from the UE to a TRP, with each uplink transmission associated with a timing advance (TA) value (or timing advance group (TAG) ) provided by the network. The uplink transmissions may be, e.g., physical random access channel (PRACH) transmissions, sounding reference signal (SRS) transmissions, physical uplink control channel (PUCCH) transmissions, or physical uplink shared channel (PUSCH) transmissions.

[0021] The network may, via the one or more base stations, indicate the two TAs to the UE under a unified transmission configuration indication (TCI) framework that provides uplink and downlink beam indications to the UE . Under the unified TCI framework, which has been extended from single-TRP scenarios to mTRP scenarios according to the Third Generation Partnership Project (3GPP) standards, the network may configure a list of up to, for example, 64 or 128 TCI states via radio resource control (RRC) signaling, with each TCI state corresponding to a TA or TAG. The list of TCI states may separately include uplink TCI states and downlink TCI states, or may include joint TCI states for both uplink and downlink transmissions. Accordingly, by indicating an uplink or joint TCI state for the UE to adopt, the network may instruct the UE to use the TA corresponding to the TCI state when transmitting the uplink signals towards the two

TRPs . [0022] In addition to the TAs, the UE may use a timing reference that may be a time when the UE receives a downlink (DL) reference signal for calculating the uplink transmission time. When the network supports two (2) TAs with multi-DCI, the network may support two DL reference timings where each DL reference timing is associated with one TAG, e.g., a first DL reference timing for a first TAG and a second DL reference timing for a second TAG. The TAG identification (TAG ID) may be associated with a UL/joint TCI state. In some example embodiments, the reception (Rx) timing difference between the two DL reference timings may be no larger than a cyclic prefix (CP) length. In other example embodiments, the UE may have the capability to process Rx timing differences between the two DL reference timings that are larger than the CP length (e.g. , the UE supports received timing different (RTD) > CP) .

[0023] In CA scenarios, each TAG may be associated with a CoresetPoolIndex of a primary TAG (pTAG) or a secondary TAG (sTAG) . An issue that arises in the CA scenario is that the reference cell for each TAG under 2 TA CA scenario is not defined. The UE may not understand the which DL reference signal (RS) is to be used as the reference point for the different CoresetPool Index ( es ) of the pTAG or sTAG.

[0024] The example embodiments provide various operations for a UE to determine DL RS for the 2 TA CA scenario to allow the UE to understand the DL reference point that the UE should use to determine the timing for the different TRPs in the mTRP scenario . [0025] Fig. 1 shows an example network arrangement 100 according to various example embodiments. The example network arrangement 100 includes a UE 110. The UE 110 may be any type of electronic component that is configured to communicate via a network, e.g., mobile phones, tablet computers, desktop computers, smartphones, phablets, embedded devices, wearables, Internet of Things (loT) devices, etc. An actual network arrangement may include any number of UEs being used by any number of users. Thus, the example of one UE 110 is merely provided for illustrative purposes.

[0026] The UE 110 may be configured to communicate with one or more networks. In the example of the network arrangement 100, the network with which the UE 110 may wirelessly communicate is a 5G NR radio access network (RAN) 120. However, the UE 110 may also communicate with other types of networks (e.g., 5G cloud RAN, a next generation RAN (NG-RAN) , a legacy cellular network, 6G network, etc.) and the UE 110 may also communicate with networks over a wired connection. With regard to the example embodiments, the UE 110 may establish a connection with the 5G NR RAN 120. Therefore, the UE 110 may have a 5G NR chipset to communicate with the NR RAN 120.

[0027] The 5G NR RAN 120 may be portions of a cellular network that may be deployed by a network carrier (e.g., Verizon, AT&T, T-Mobile, etc.) . The RAN 120 may include cells or base stations that are configured to send and receive traffic from UEs that are equipped with the appropriate cellular chip set. In this example, the 5G NR RAN 120 includes the gNB 120A and the gNB 120B. However, reference to a gNB is merely provided for illustrative purposes, any appropriate base station or cell may be deployed (e.g., Node Bs, eNodeBs, HeNBs, eNBs, gNBs, gNodeBs, macrocells, microcells, small cells, femtocells, etc.) .

[0028] Any association procedure may be performed for the UE 110 to connect to the 5G NR RAN 120. For example, as discussed above, the 5G NR RAN 120 may be associated with a particular network carrier where the UE 110 and/or the user thereof has a contract and credential information (e.g., stored on a SIM card) . Upon detecting the presence of the 5G NR RAN 120, the UE 110 may transmit the corresponding credential information to associate with the 5G NR RAN 120. More specifically, the UE 110 may associate with a specific cell (e.g., gNB 120A or gNB 120B) .

[0029] The network arrangement 100 also includes a cellular core network 130, the Internet 140, an IP Multimedia Subsystem (IMS) 150, and a network services backbone 160. The cellular core network 130 manages the traffic that flows between the cellular network and the Internet 140. The IMS 150 may be generally described as an architecture for delivering multimedia services to the UE 110 using the IP protocol. The IMS 150 may communicate with the cellular core network 130 and the Internet 140 to provide the multimedia services to the UE 110. The network services backbone 160 is in communication either directly or indirectly with the Internet 140 and the cellular core network 130. The network services backbone 160 may be generally described as a set of components (e.g., servers, network storage arrangements, etc.) that implement a suite of services that may be used to extend the functionalities of the UE 110 in communication with the various networks.

[0030] Fig. 2 shows an example UE 110 according to various example embodiments. The UE 110 will be described with regard to the network arrangement 100 of Fig. 1. The UE 110 may represent any electronic device and may include a processor 205, a memory arrangement 210, a display device 215, an input/output (I/O) device 220, a transceiver 225, and other components 230. The other components 230 may include, for example, an audio input device, an audio output device, a battery that provides a limited power supply, a data acquisition device, ports to electrically connect the UE 110 to other electronic devices, sensors to detect conditions of the UE 110, etc.

[0031] The processor 205 may be configured to execute a plurality of engines for the UE 110. For example, the engines may include an mTRP engine 235 for performing operations related to determining reference cells that are to be used for reference timing in mTRP CA operations. The operations may include, but are not limited to, processing a multi-DCI, mTRP CA configuration received from a network, determining reference cells that are to be used for downlink reference timing in mTRP CA operations, performing measurements on the downlink RS from the reference cells and using the reference timing for uplink transmissions. These and other operations will be described in greater detail below.

[0032] The above referenced engine being an application (e.g., a program) executed by the processor 205 is only an example. The functionality associated with the engines may also be represented as a separate incorporated component of the UE 110 or may be a modular component coupled to the UE 110, e.g., an integrated circuit with or without firmware. For example, the integrated circuit may include input circuitry to receive signals and processing circuitry to process the signals and other information. The engines may also be embodied as one application or separate applications. In addition, in some UEs, the functionality described for the processor 205 is split among two or more processors such as a baseband processor and an applications processor. The example embodiments may be implemented in any of these or other configurations of a UE .

[0033] The memory arrangement 210 may be a hardware component configured to store data related to operations performed by the UE 110. The display device 215 may be a hardware component configured to show data to a user while the I/O device 220 may be a hardware component that enables the user to enter inputs. The display device 215 and the I/O device 220 may be separate components or integrated together such as a touchscreen.

[0034] The transceiver 225 may be a hardware component configured to establish a connection with the 5G NR-RAN 120, an LTE-RAN (not pictured) , a legacy RAN (not pictured) , a WLAN (not pictured) , a 6G network (not pictured) , etc. Accordingly, the transceiver 225 may operate on a variety of different frequencies or channels (e.g., set of consecutive frequencies) . The transceiver 225 includes circuitry configured to transmit and/or receive signals (e.g., control signals, data signals) . Such signals may be encoded with information implementing any one of the methods described herein. The processor 205 may be operably coupled to the transceiver 225 and configured to receive from and/or transmit signals to the transceiver 225. The processor 205 may be configured to encode, decode and/or process signals (e.g., signaling from a base station of a network) for implementing any one of the methods described herein. [0035] Fig. 3 shows an example base station 300 according to various example embodiments. The base station 300 may represent the gNB 120A, the gNB 120B or any other access node through which the UE 110 may establish a connection and manage network operations .

[0036] The base station 300 may include a processor 305, a memory arrangement 310, an input/output (I/O) device 315, a transceiver 320, and other components 325. The other components 325 may include, for example, an audio input device, an audio output device, a battery, a data acquisition device, ports to electrically connect the base station 300 to other electronic devices and/or power sources, etc.

[0037] The processor 305 may be configured to execute a plurality of engines for the UE 110. For example, the engines may include an mTRP configuration engine 330 for performing operations related to configurating a UE for multi-DCI, mTRP CA operations. These operations may include, but are not limited to, configuring the UE with a multi-DCI, mTRP CA configuration and configuring the UE with reference cells that are to be used for downlink reference timing in mTRP CA operations. These and other operations will be described in greater detail below.

[0038] The memory arrangement 310 may be a hardware component configured to store data related to operations performed by the base station 300. The I/O device 315 may be a hardware component or ports that enable a user to interact with the base station 300.

[0039] The transceiver 320 may be a hardware component configured to exchange data with the UE 110 and any other UE in the network arrangement 100. The transceiver 320 may operate on a variety of different frequencies or channels (e.g. , set of consecutive frequencies) . The transceiver 320 includes circuitry configured to transmit and/or receive signals (e.g. , control signals, data signals) . Such signals may be encoded with information implementing any one of the methods described herein. The processor 305 may be operably coupled to the transceiver 320 and configured to receive from and/or transmit signals to the transceiver 320. The processor 305 may be configured to encode, decode and/or process signals (e.g. , signaling from a UE) for implementing any one of the methods described herein.

[0040] As stated above, the example embodiments are related to defining timing reference points for transmission of UL signals for a UE in a multi-DCI mTRP CA scenario where two TAs are used. Specifically, the example embodiments may provide the UE with information to determine the timing reference point, e.g., the DL RS that are to be used to determine the reference timing. This may include determining a first timing reference point for CoresetPoolIndexO of a pTAG and a second timing reference point for CoresetPoolIndexl of the pTAG. Further, this may also include determining a first timing reference point for CoresetPoolIndexO of a STAG and a second timing reference point for CoresetPoolIndexl of the STAG. In the example embodiments, each active TCI state list for each serving cell of the pTAG and sTAG is associated with a CoresetPoolIndexO and a CoresetPoolIndexl .

[0041] In the description of the example embodiments, when the reference timing for a PCell is described, it should be understood that this timing may also refer to the timing of a PSCell. In addition, in each of the examples provided below the various coresetPoolIndexes of the pTAGs and sTAGs have a number of activated SCells. This number of activated SCells for each example is only used for illustrative purposes. The coresetPoolIndexes may have any number of activated SCells.

[0042] The following example embodiments are related to a first scenario. In the first scenario, the reference cell may be configured with intra-cell mTRP.

[0043] Fig. 4A shows a pTAG 400 where a reference cell is configured with intra-cell mTRP according to various example embodiments. The pTAG 400 comprises a coresetPoolIndexO 410 and a CoresetPool Indexl 420, each of which correspond to a different TAG ID. The coresetPoolIndexO 410 comprises a PCell serving a CC1 412 from a TRP1, a SCelll serving a CC2 414 from a TRP1 and a SCell2 serving a CC3 416 from a TRP1. The coresetPoolIndexl 420 comprises the PCell (having a same Physical Cell ID (PCI) as the PCell of the coresetPoolIndexO 410) serving a CC1 422 from a TRP2 and the SCelll serving a CC2 424 from a TRP2.

[0044] In some example embodiments, in this scenario, e.g., the reference cell is configured with intra-cell mTRP, for a pTAG, the PCell (or a PSCell) may be the reference cell. Thus, for coresetPoolIndexO 410, the DL reference may be the DL RS associated with the CC1 412 transmitted from the PCell TRP1. For the coresetPoolIndexl 420, the DL reference may be the DL RS associated with the CC1 422 transmitted from the PCell TRP2.

[0045] Fig. 4B shows a STAG 450 where a reference cell is configured with intra-cell mTRP according to various example embodiments. The STAG 450 comprises a coresetPoolIndexO 460 and a CoresetPoolIndexl 470, each of which correspond to a different TAG ID. The coresetPool IndexO 460 comprises a SCelll serving a CC1 462 from a TRP1 and a SCell2 serving a CC2 464 from a TRP1. The CoresetPoolIndexl 470 comprises the SCelll serving a CC1 472 from a TRP2 and a SCell2 serving a CC2 474 from a TRP2.

[0046] In some example embodiments, in this scenario, e.g., the reference cell is configured with intra-cell mTRP, for a sTAG, the reference cell may be any activated SCell. The UE may select the activated SCell to use for the DL reference timing. In the example of Fig. 4, the UE may select the SCelll. Thus, in this example, for coresetPoolIndexO 460, the DL reference may be the DL RS associated with the CC1 462 transmitted from the SCelll TRP1. For the CoresetPoolIndexl 470, the DL reference may be the DL RS associated with the CC1 472 transmitted from the SCelll TRP2. However, since any activated SCell with mTRP may be used, the SCell2 may also be the reference cell and the corresponding RSs may be used.

[0047] The following example embodiments are related to a second scenario. In the second scenario, the reference cell may be configured with inter-cell mTRP. In inter-cell mTRP, the second TRP is not the serving cell but a cell with a different PCI (CDP) or cell with additional PCI that is configured by radio resource control (RRC) signaling. In this second scenario, the reference cell may also be configured with intra-cell mTRP.

[0048] Fig. 5A shows a pTAG 500 where a reference cell is configured with inter-cell mTRP according to various example embodiments. The pTAG 500 comprises a coresetPoolIndexO 510 and a CoresetPoolIndexl 520, each of which have a different TAG ID. The coresetPoolIndexO 510 comprises a PCell serving a CC1 512 from a TRP1, a SCelll serving a CC2 514 from a TRP1 and a SCell2 serving a CC3 516 from a TRP1. The coresetPool Indexl 520 comprises a CDPICell transmitting a CC 522 from a TRP2, a SCelll serving a CC2 524 from a TRP2 and a CDP2Cell transmitting a CC 526 from a TRP2. In this example, the CDPICell may be the CDP cell associated with the inter-cell mTRP configuration of the PCell and the CDP2Cell may be the CDP cell associated with the inter-cell mTRP configuration of the SCell2.

[0049] In some example embodiments, in this scenario, e.g., the reference cell is configured with inter-cell mTRP, for a pTAG, the PCell (or PSCell) for the coresetPoolIndexO 510 may be the reference cell. Thus, for coresetPoolIndexO 510, the DL reference may be the DL RS associated with the CC1 512 transmitted from the PCell TRP1.

[0050] For the coresetPool Indexl 520, there may be various options for the DL reference timing. In a first option, the DL reference may be the DL RS associated with the CC 522 transmitted from the CDPICell TRP2, e.g. , the CDP Cell corresponding the reference cell from coresetPoolIndexO 510. In a second option, the DL reference may be the DL RS associated with any activated SCell operating with intra-cell mTRP. In this example, the SCelll may be operating with intra-cell mTRP. Thus, the DL reference may be the DL RS associated with the CC2 524 transmitted from the SCelll TRP2. In a third option, the network may provide an explicit indication of the reference cell for the DL reference RS, e.g., RRC signaling.

[0051] Fig. 5B shows a STAG 550 where a reference cell is configured with inter-cell mTRP according to various example embodiments. The STAG 550 comprises a coresetPoolIndexO 560 and a CoresetPoolIndexl 570, each of which has a different TAG ID. The coresetPooilndexO 560 comprises a SCelll serving a CC1 562 from a TRP1, a SCell2 serving a CC2 564 from a TRP1 and a SCell3 serving a CC3 from a TRP1. The CoresetPoolIndexl 570 comprises a CDPICell transmitting a CC 572 from a TRP2 and a SCelll serving a CC2 574 from a TRP2. In this example, the CDPICell may be the CDP cell associated with the inter-cell mTRP configuration of the SCelll.

[0052] In some example embodiments, in this scenario, e.g., the reference cell is configured with inter-cell mTRP, for a STAG, for coresetPooilndexO 560, the DL reference may be the DL RS associated with the CGI 562 transmitted by the SCelll from TRP1, e.g., the SCell configured with mTRP.

[0053] For the CoresetPoolIndexl 570, there may be various options for the DL reference timing. In a first option, the DL reference may be the DL RS associated with the CC 572 transmitted by the CDPICell from the TRP2, e.g. , the CDP Cell corresponding to the reference cell from coresetPooilndexO 560. In a second option, the DL reference may be the DL RS associated with any activated SCell operating with intra-cell mTRP. In this example, the SCell2 may be operating with intra-cell mTRP. Thus, the DL reference may be the DL RS associated with the CC2 574 transmitted from the SCell2 TRP2. In a third option, the network may provide an explicit indication of the reference cell for the DL reference RS, e.g., RRC signaling.

[0054] The following example embodiments are related to a third scenario. In the third scenario, the reference cell may not be configured with mTRP. In this third scenario, when it is stated that the reference cell is not configured with mTRP, this means that the PCell or PSCell are not configured with mTRP. As will be described in greater detail below, in various example embodiments, a different reference cell for the pTAG and STAG may be selected based on the PCell or PSCell not being configured with mTRP, and this different reference cell may be configured with mTRP.

[0055] Fig. 6A shows a pTAG 600 where a reference cell is not configured with mTRP according to various example embodiments. The pTAG 600 comprises a coresetPoolIndexO 610 and a CoresetPool Indexl 620, each of which have a different TAG ID.

The coresetPoolIndexO 610 comprises a PCell serving a CC1 612 from a TRP1, a SCelll serving a CC2 614 from a TRP1 and a SCell2 serving a CC3 616 from a TRP1. The coresetPool Indexl 620 comprises a SCelll serving a CC2 624 from a TRP2 and a CDPICell transmitting a CC 626 from a TRP2.

[0056] In some example embodiments, in this scenario, e.g., the reference cell is not configured with mTRP, for a pTAG, the PCell (or PSCell) for the coresetPool IndexO 610 may be the reference cell. Thus, for coresetPoolIndexO 610, the DL reference may be the DL RS associated with the CC1 612 transmitted from the PCell TRP1.

[0057] For the coresetPoolIndexl 620, the DL reference may be the DL RS from any activated SCell with intra-cell mTRP or from any cell with a different PCI if no SCell is configured with intra-cell mTRP. For example, in Fig. 6A, if the SCelll serving the CC2 624 on TRP2 is configured with intra-cell mTRP, the DL reference may be the DL RS associated with the CC2 624 transmitted from the SCelll TRP2. However, if the SCelll serving the CC2 624 from the TRP2 is not configured with intra-cell mTRP, the DL reference may be the DL RS associated with the CC

626 transmitted by the CDPICell TRP2 .

[ 0058 ] In other example embodiments , in this scenario, e . g . , the reference cell is not configured with mTRP, for a pTAG, the DL reference for the coresetPoolIndexO 610 may be the DL RS from an activated SCell configured with intra-cell mTRP or an activated SCell configured with inter-cell mTRP if no activated SCell is configured with intra-cell mTRP . For example , in Fig . 6A, if the SCelll serving the CC2 614 from the TRP1 and/or the SCell2 serving the CC3 616 from the TRP1 is configured with intra-cell mTRP, then the DL RS associated with either the CC2 614 or the CC3 616 may be used as the DL reference . However, i f neither the SCell l serving the CC2 614 from the TRP1 nor the SCell2 serving the CC3 616 from the TRP1 is configured with intra-cell mTRP, but the SCell l serving the CC2 614 from the TRP1 and/or the SCell2 serving the CC3 616 from the TRP1 is configured with inter-cell mTRP, then the DL RS associated with either the CC2 614 or the CC3 616 may be used as the DL reference .

[ 0059] For the coresetPool Indexl 620 , the DL reference may be the DL RS from an activated SCell configured with intra-cell mTRP or an activated SCell configured with inter-cell mTRP if no activated SCell is configured with intra-cell mTRP . For example , in Fig . 6A, i f the SCell l serving the CC2 624 from the TRP2 is configured with intra-cell mTRP, the DL reference may be the DL RS associated with the CC2 624 transmitted from the SCell l TRP2 . However, if the SCelll serving the CC2 624 from the TRP2 is not configured with intra-cell mTRP, but is configured with intercell mTRP, the DL reference may be the DL RS associated with the CC2 624 transmitted from the SCell l TRP2 . [0060] In further example embodiments, the network may configure (e.g., via RRC signaling) the reference cell for the DL RS for both the coresetPoolIndexO 610 and the coresetPool Indexl 620.

[0061] Fig. 6B shows a STAG 650 where a reference cell is not configured with mTRP according to various example embodiments. The STAG 650 comprises a coresetPoolIndexO 660 and a CoresetPoolIndexl 670, each of which has a different TAG ID. The coresetPoolIndexO 660 comprises a SCelll serving a CC1 662 from a TRP1, a SCell2 serving a CC2 664 from a TRP1 and a SCell3 serving a CC3 666 from a TRP1. The CoresetPoolIndexl 670 comprises a SCell2 serving a CC2 674 from a TRP2 and a CDPICell serving a CC 676 from a TRP2.

[0062] In some example embodiments, in this scenario, e.g., the reference cell is not configured with mTRP, for a STAG, for coresetPoolIndexO 560, the DL reference may be the DL RS from any activated SCell. Thus, in the example of Fig. 6B, the DL reference may be the DL RS associated with any of the CC1 662 transmitted by the SCelll from the TRP1, the CC2 664 transmitted by the SCell2 from the TRP1 or the CC3 666 transmitted by the SCell3 from the TRP1.

[0063] For the CoresetPoolIndexl 670, the DL reference may be the DL RS from any activated SCell with intra-cell mTRP or from any cell with a different PCI if no SCell is configured with intra-cell mTRP. For example, in Fig. 6B, if the SCell2 serving the CC2 674 from the TRP2 is configured with intra-cell mTRP, the DL reference may be the DL RS associated with the CC2 674 transmitted from the SCell2 TRP2. However, if the SCell2 serving the CC2 674 from the TRP2 is not configured with intra-cell mTRP, the DL reference may be the DL RS associated with the CC 666 transmitted by the CDPICell TRP2 .

[ 0064 ] In other example embodiments , in this scenario, e . g . , the reference cell is not configured with mTRP, for a STAG, the DL reference for the coresetPoolIndexO 660 may be the DL RS from an activated SCell configured with intra-cell mTRP or an activated SCell configured with inter-cell mTRP if no activated SCell is configured with intra-cell mTRP . For example , in Fig . 6B, if any of the SCell l , SCell2 or SCell3 is configured with intra-cell mTRP, then the DL RS associated with any of the corresponding CCs may be used as the DL reference . However, if none of the SCell l , SCell2 or SCell3 are configured with intra- cell mTRP, then the corresponding CC of any of the SCell l , SCell2 or SCell3 that are configured with inter-cell mTRP may be used as the DL reference .

[ 0065 ] For the coresetPool Indexl 670 , the DL reference may be DL the DL RS from an activated SCell configured with intra-cell mTRP or an activated SCell configured with inter-cell mTRP if no activated SCell is configured with intra-cell mTRP . For example , in Fig . 6B, i f the SCell2 serving the CC2 674 on TRP2 is configured with intra-cell mTRP, the DL reference may be the DL RS associated with the CC2 674 transmitted from the SCell2 TRP2 . However, if the SCell2 serving the CC2 674 on TRP is not configured with intra-cell mTRP, but is configured with intercell mTRP, the DL reference may be the DL RS associated with the CC2 674 transmitted from the SCell2 TRP2 .

[ 0066] In further example embodiments , the network may configure ( e . g . , via RRC signaling) the reference cell for the DL RS for both the coresetPoolIndexO 660 and the coresetPool Indexl 670.

[0067] Fig. 7 shows an example method 700 for selecting a reference cell for each of 2 timing advance (TAs) for a UE configured with multi-DCI, mTRP, CA according to various example embodiments. The method 700 is described from the perspective of the UE.

[0068] In 710, the UE may receive, from the network, one or more configurations. These configurations may configure the UE to operate in a mode that includes mTRP, multi-DCI and CA comprising at least 2 TAs. For example, the UE may be configured with any of the example pTAG or STAG configurations illustrated in Figs . 4- 6.

[0069] In 720, the UE may determine or select the reference cell for each of the TAs, e.g., coresetPoolIndexO and coresetPoolIndexl . Various examples of how the UE may determine or select the reference cell were described in detail above.

[0070] In 730, the UE may use the reference timing determined from the RS of the selected reference cell for each of the TAs to determine the timing for UL transmissions. The UE may then perform UL transmissions based on the reference timing.

[0071] The following provides example Technical Specification language that may be used to capture the above example embodiments. In a first example, the Technical Specification language may state, for multi-DCI based multi-TRP operation with two TAs, for each TAG, the uplink transmission timing takes place (NTA + NTA offset) *Tc before the reception of the first detected path (in time) of one of the corresponding downlink reference signal (s) in the active DL or joint TCI state list of the reference cell or QCLed (Type A or Type C) to RS in the active DL or joint TCI state list of the reference cell associated with a coresetPoolIndex having same TAG as the uplink signal, where NTA is commanded by the network independently for each TAG [TS 38.331] . For serving cells in the pTAG the reference cell is the SpCell if configured with multi-TRP, otherwise for coresetPoolIndex associated with the reference cell, the reference is the SpCell for cells in the pTAG. The reference for other coresetPoolIndex may be any activated SCell with multi-DCI, or cell with a different PCI in case of no activated SCell with multi-DCI. For serving cells in STAG the reference cell is any activated SCell configured with multi-TRP.

[0072] In a second example, the Technical Specification language may state, for multi-DCI based multi-TRP operation with two TAs, for each TAG, the uplink transmission timing takes place (NTA + NTA_offset) *Tc before the reception of the first detected path (in time) of one of the corresponding downlink reference signal (s) in the active DL or joint TCI state list of the reference cell or QCLed (Type A or Type C) to RS in the active DL or joint TCI state list of the reference cell associated with a coresetPoolIndex having same TAG as the uplink signal, where NTA is commanded by the network independently for each TAG [TS 38.331] . For serving cells in the pTAG the reference cell is the SpCell if configured with multi-DCI multi- TRP, or if the SpCell is not configured with multi-TRP any activated SCell configured with intra-cell multi-TRP if present or any activated SCell configured with inter-cell multi-TRP. For serving cells in STAG the reference cell is any activated SCell configured with multi-TRP. Examples

[0073] In a first example, a method, comprising processing, based on signals received from a network, a configuration comprising a multiple transmission and reception point (mTRP) configuration, a multiple Downlink Control Information (multi- DCI) configuration with two timing advances (TAs) and a carrier aggregation (CA) configuration, wherein the configuration further comprises a primary timing advance group (pTAG) for a primary cell group (PCG) of the CA configuration and a secondary TAG (sTAG) for a secondary cell group (SCG) of the CA configuration, wherein an active Transmission Control Indicator (TCI) state list for each serving cell of the pTAG and sTAG is associated with a coresetPoolIndexO and a coresetPoolIndexl and selecting a reference cell for each of the coresetPoolIndexO and the coresetPoolIndexl of the pTAG and sTAG to determine a reference timing for the corresponding coresetPoolIndexO and coresetPoolIndexl .

[0074] In a second example, the method of the first example, wherein the mTRP configuration comprises a primary cell (PCell) or primary secondary cell (PSCell) of the pTAG operating with intra-cell mTRP.

[0075] In a third example, the method of the second example, wherein the PCell or the PSCell is selected as the reference cell for the coresetPoolIndexO of the pTAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexO. [0076] In a fourth example, the method of the third example, wherein the PCell or the PSCell is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexl.

[0077] In a third example, the method of the second example, wherein the mTRP configuration comprises one or more activated secondary cells (SCells) of the STAG operating with intra-cell mTRP .

[0078] In a sixth example, the method of the fifth example, wherein a first one of the one or more activated SCells operating with intra-cell mTRP is selected as the reference cell for the coresetPool IndexO and coresetPoolIndexl of the STAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPoolIndexO and a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPoolIndexl.

[0079] In a seventh example, the method of the first example, wherein the mTRP configuration comprises a primary cell (PCell) or primary secondary cell (PSCell) of the pTAG operating with inter-cell mTRP.

[0080] In an eighth example, the method of the seventh example, wherein the PCell or the PSCell is selected as the reference cell for the coresetPoolIndexO of the pTAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexO .

[0081] In a ninth example, the method of the eighth example, wherein the PCell or PSCell has a Physical Cell Identity (PCI) , wherein a cell with a different PCI (CDP) is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein the CDP is associated with an inter-cell mTRP configuration of the PCell or PSCell and wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPoolIndexl.

[0082] In a tenth example, the method of the eighth example, wherein a first one of one or more activated secondary cells (SCells) of the pTAG operating with intra-cell mTRP is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl.

[0083] In an eleventh example, the method of the eighth example, further comprising processing, based on signals received from the network, an indication of the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the indicated reference cell is used for the reference timing for the coresetPoolIndexl.

[0084] In a twelfth example, the method of the seventh example, wherein the mTRP configuration comprises one or more activated secondary cells (SCells) of the STAG operating with inter-cell mTRP. [ 0085 ] In a thirteenth example, the method of the twel fth example , wherein a first one of the one or more activated SCells operating with inter-cell mTRP is selected as the reference cell for the coresetPool IndexO of the STAG, wherein a downlink ( DL) reference signal (RS ) of a component carrier ( CC ) transmitted from a first TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPool IndexO .

[ 0086] In a fourteenth example, the method of the thirteenth example , wherein the first one of the one or more activated SCells has a Physical Cell Identity ( PCI ) , wherein the processing circuitry selects a cell with a di f ferent PCI ( CDP) as the reference cell for the coresetPool Indexl of the STAG, wherein the CDP is associated with an inter-cell mTRP configuration of the first one of the one or more activated SCells and wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPool Indexl .

[ 0087 ] In a fi fteenth example, the method of the thirteenth example , wherein a second one of one or more activated SCells of the sTAG operating with intra-cell mTRP is selected as the reference cell for the coresetPool Indexl of the sTAG, wherein a DL RS of a CC transmitted from a second TRP by the second one of the one or more activated SCells is used for the reference timing for the coresetPool Indexl .

[ 0088 ] In a sixteenth example, the method of the thirteenth example , further comprising processing, based on signals received from the network, an indication of the reference cell for the coresetPool Indexl of the sTAG, wherein a DL RS of a CC transmitted from a second TRP by the indicated reference cell is used for the reference timing for the coresetPoolIndexl.

[0089] In a seventeenth example, the method of the first example, wherein a primary cell (PCell) or primary secondary cell (PSCell) of the pTAG does not operate in mTRP.

[0090] In an eighteenth example, the method of the seventeenth example, wherein the PCell or the PSCell is selected as the reference cell for the coresetPoolIndexO of the pTAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexO .

[0091] In a nineteenth example, the method of the eighteenth example, wherein, when one or more activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, a first one of the one or more activated SCells operating with intra-cell mTRP is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl.

[0092] In a twentieth example, the method of the eighteenth example, wherein, when no activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, a cell with a different PCI (CDP) is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPoolIndexl. [0093] In a twenty first example, the method of the seventeenth example, wherein, when one or more activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, a first one of the one or more activated SCells operating with intra-cell mTRP is selected as the reference cell for the coresetPool IndexO of the pTAG, wherein a DL RS of a CC transmitted from a first TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPool IndexO .

[0094] In a twenty second example, the method of the seventeenth example, wherein, when there are no activated secondary cells (SCells) of the pTAG operating with intra-cell mTRP, an activated SCell operating with inter-cell mTRP is selected as the reference cell for the coresetPoolIndexO of the pTAG, wherein a DL RS of a CC transmitted from a first TRP by a first one of the activated SCells operating with inter-cell mTRP is used for the reference timing for the coresetPoolIndexO.

[0095] In a twenty third example, the method of the seventeenth example, wherein, when one or more activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, a first one of the one or more activated SCells operating with intra-cell mTRP is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl .

[0096] In a twenty fourth example, the method of the seventeenth example, wherein, when there are no activated secondary cells (SCells) of the pTAG operating with intra-cell mTRP, an activated SCell operating with inter-cell mTRP is selected as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by a first one of the activated SCell operating with inter-cell mTRP is used for the reference timing for the coresetPoolIndexl.

[0097] In a twenty fifth example, the method of the seventeenth example, further comprising processing, based on signals received from the network, an indication of a first reference cell for the coresetPoolIndexO and a second reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a first TRP by the first reference cell is used for the reference timing for the coresetPoolIndexO and a DL RS of a CC transmitted from a second TRP by the second reference cell is used for the reference timing for the coresetPoolIndexO.

[0098] In a twenty sixth example, the method of the seventeenth example, wherein the mTRP configuration comprises one or more activated secondary cells (SCells) of the STAG.

[0099] In a twenty seventh example, the method of the twenty sixth example, wherein a first one of the one or more activated SCells is selected as the reference cell for the coresetPoolIndexO of the STAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPoolIndexO.

[0100] In a twenty eighth example, the method of the twenty seventh example, wherein, when one or more of the activated SCells of the STAG operate with intra-cell mTRP, a first one of the one or more activated SCells operating with intra-cell TRP is selected as the reference cell for the coresetPoolIndexl of the STAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl.

[0101] In a twenty ninth example, the method of the twenty seventh example, wherein, when no activated secondary cells (SCells) of the STAG operate with intra-cell mTRP, a cell with a different PCI (CDP) is selected as the reference cell for the coresetPoolIndexl of the STAG, wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPoolIndexl.

[0102] In a thirtieth example, the method of the twenty sixth example, wherein, when one or more activated secondary cells (SCells) of the STAG operate with intra-cell mTRP, a first one of the one or more activated SCells operating with intra-cell mTRP is selected as the reference cell for the coresetPoolIndexO of the STAG, wherein a DL RS of a CC transmitted from a first TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexO.

[0103] In a thirty first example, the method of the twenty sixth example, wherein, when there are no activated secondary cells (SCells) of the STAG operating with intra-cell mTRP, an activated SCell operating with inter-cell mTRP is selected as the reference cell for the coresetPoolIndexO of the STAG, wherein a DL RS of a CC transmitted from a first TRP by the first one of the activated SCell operating with inter-cell mTRP is used for the reference timing for the coresetPoolIndexO. [0104] In a thirty second example, the method of the twenty sixth example, wherein, when one or more activated secondary cells (SCells) of the STAG operate with intra-cell mTRP, a first one of the one or more activated SCells operating with intra- cell mTRP is selected as the reference cell for the coresetPoolIndexl of the STAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl .

[0105] In a thirty third example, the method of the twenty sixth example, wherein, when there are no activated secondary cells (SCells) of the STAG operating with intra-cell mTRP, an activated SCell operating with inter-cell mTRP is selected as the reference cell for the coresetPoolIndexl of the STAG, wherein a DL RS of a CC transmitted from a second TRP by a first one of the activated SCell operating with inter-cell mTRP is used for the reference timing for the coresetPoolIndexl.

[0106] In a thirty fourth example, the method of the twenty sixth example, further comprising processing, based on signals received from the network, an indication of a first reference cell for the coresetPoolIndexO and a second reference cell for the coresetPoolIndexl of the STAG, wherein a DL RS of a CC transmitted from a first TRP by the first reference cell is used for the reference timing for the coresetPoolIndexO and a DL RS of a CC transmitted from a second TRP by the second reference cell is used for the reference timing for the coresetPoolIndexO.

[0107] In a thirty fifth example, a processor configured to perform any of the methods of the first through thirty fourth examples . [ 0108 ] In a thirty sixth example , a user equipment (UE ) configured to perform any of the methods of the first through thirty fourth examples .

[ 0109] Those skilled in the art will understand that the above-described example embodiments may be implemented in any suitable software or hardware configuration or combination thereof . An example hardware platform for implementing the example embodiments may include , for example, an Intel x86 based platform with compatible operating system, a Windows OS , a Mac platform and MAC OS , a mobile device having an operating system such as iOS , Android, etc . The example embodiments of the above described method may be embodied as a program containing lines of code stored on a non-transitory computer readable storage medium that , when compiled, may be executed on a processor or microprocessor .

[ 0110 ] Although this application described various embodiments each having different features in various combinations , those skilled in the art will understand that any of the features of one embodiment may be combined with the features of the other embodiments in any manner not speci fically disclaimed or which is not functionally or logically inconsistent with the operation of the device or the stated functions of the disclosed embodiments .

[ 0111 ] It is well understood that the use of personally identi fiable information should follow privacy policies and practices that are generally recogni zed as meeting or exceeding industry or governmental requirements for maintaining the privacy of users . In particular, personally identifiable information data should be managed and handled so as to minimi ze risks of unintentional or unauthori zed access or use , and the nature of authori zed use should be clearly indicated to users .

[ 0112 ] It will be apparent to those skilled in the art that various modi fications may be made in the present disclosure , without departing from the spirit or the scope of the disclosure . Thus , it is intended that the present disclosure cover modifications and variations of this disclosure provided they come within the scope of the appended claims and their equivalent .

Claims

What is claimed:

1. An apparatus comprising processing circuitry coupled to memory, wherein the processing circuitry is configured to: process, based on signals received from a network, a configuration comprising a multiple transmission and reception point (mTRP) configuration, a multiple Downlink Control Information (multi-DCI) configuration with two timing advances (TAs) and a carrier aggregation (CA) configuration, wherein the configuration further comprises a primary timing advance group (pTAG) for a primary cell group (PCG) of the CA configuration and a secondary TAG (sTAG) for a secondary cell group (SCG) of the CA configuration, wherein an active Transmission Control Indicator (TCI) state list for each serving cell of the pTAG and sTAG is associated with a coresetPoolIndexO and a coresetPool Indexl ; and select a reference cell for each of the coresetPoolIndexO and the coresetPoolIndexl of the pTAG and sTAG to determine a reference timing for the corresponding coresetPoolIndexO and coresetPoolIndexl .

2. The apparatus of claim 1, wherein the mTRP configuration comprises a primary cell (PCell) or primary secondary cell (PSCell) of the pTAG operating with intra-cell mTRP.

3. The apparatus of claim 2, wherein the processing circuitry selects the PCell or the PSCell as the reference cell for the coresetPoolIndexO of the pTAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexO.

4. The apparatus of claim 3, wherein the processing circuitry selects the PCell or the PSCell as the reference cell for the coresetPool Indexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexl .

5. The apparatus of claim 2, wherein the mTRP configuration comprises one or more activated secondary cells (SCells) of the STAG operating with intra-cell mTRP.

6. The apparatus of claim 5, wherein the processing circuitry selects a first one of the one or more activated SCells operating with intra-cell mTRP as the reference cell for the coresetPoolIndexO and coresetPoolIndexl of the STAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPoolIndexO and a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPoolIndexl .

7. The apparatus of claim 1, wherein the mTRP configuration comprises a primary cell (PCell) or primary secondary cell (PSCell) of the pTAG operating with inter-cell mTRP.

8. The apparatus of claim 7, wherein the processing circuitry selects the PCell or the PSCell as the reference cell for the coresetPool IndexO of the pTAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexO .

9. The apparatus of claim 8, wherein the PCell or PSCell has a Physical Cell Identity (PCI) , wherein the processing circuitry selects a cell with a different PCI (CDP) as the reference cell for the coresetPool Indexl of the pTAG, wherein the CDP is associated with an inter-cell mTRP configuration of the PCell or PSCell and wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPool Indexl .

10. The apparatus of claim 8, wherein the processing circuitry selects a first one of one or more activated secondary cells (SCells) of the pTAG operating with intra-cell mTRP as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl.

11. The apparatus of claim 7, wherein the mTRP configuration comprises one or more activated secondary cells (SCells) of the STAG operating with inter-cell mTRP.

12. The apparatus of claim 11, wherein the processing circuitry selects a first one of the one or more activated SCells operating with inter-cell mTRP as the reference cell for the coresetPool IndexO of the STAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the first one of the one or more activated SCells is used to determine the reference timing for the coresetPoolIndexO .

13. The apparatus of claim 12, wherein the first one of the one or more activated SCells has a Physical Cell Identity (PCI) , wherein the processing circuitry selects a cell with a different PCI (CDP) as the reference cell for the coresetPoolIndexl of the STAG, wherein the CDP is associated with an inter-cell mTRP configuration of the first one of the one or more activated SCells and wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPoolIndexl .

14. The apparatus of claim 12, wherein the processing circuitry selects a second one of one or more activated SCells of the sTAG operating with intra-cell mTRP as the reference cell for the coresetPoolIndexl of the STAG, wherein a DL RS of a CC transmitted from a second TRP by the second one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexl .

15. The apparatus of claim 1, wherein a primary cell (PCell) or primary secondary cell (PSCell) of the pTAG does not operate in mTRP .

16. The apparatus of claim 15, wherein the processing circuitry selects the PCell or the PSCell as the reference cell for the coresetPool IndexO of the pTAG, wherein a downlink (DL) reference signal (RS) of a component carrier (CC) transmitted from a first TRP by the PCell or PSCell is used to determine the reference timing for the coresetPoolIndexO .

17. The apparatus of claim 16, wherein, when one or more activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, the processing circuitry selects a first one of the one or more activated SCells operating with intra-cell mTRP as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPool Indexl .

18. The apparatus of claim 16, wherein, when no activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, the processing circuitry selects a cell with a different PCI (CDP) as the reference cell for the coresetPoolIndexl of the pTAG, wherein a DL RS of a CC transmitted from a second TRP by the CDP is used to determine the reference timing for the coresetPoolIndexl .

19. The apparatus of claim 15, wherein, when one or more activated secondary cells (SCells) of the pTAG operate with intra-cell mTRP, the processing circuitry selects a first one of the one or more activated SCells operating with intra-cell mTRP as the reference cell for the coresetPoolIndexO of the pTAG, wherein a DL RS of a CC transmitted from a first TRP by the first one of the one or more activated SCells is used for the reference timing for the coresetPoolIndexO.

20. The apparatus of claim 15, wherein, when there are no activated secondary cells (SCells) of the pTAG operating with intra-cell mTRP, the processing circuitry selects an activated SCell operating with inter-cell mTRP as the reference cell for the coresetPoolIndexO of the pTAG, wherein a DL RS of a CC transmitted from a first TRP by a first one of the activated SCells operating with inter-cell mTRP is used for the reference timing for the coresetPoolIndexO.