WO2025230513A1

WO2025230513A1 - Methods and apparatus for medical imaging event timing determination and image reconstruction

Info

Publication number: WO2025230513A1
Application number: PCT/US2024/026940
Authority: WO
Inventors: Martin Judenhofer; Joshua Kolb; Benjamin ROEHRS; Harold E. Rothfuss; Nan Zhang
Original assignee: Siemens Medical Solutions USA Inc
Current assignee: Siemens Medical Solutions USA Inc
Priority date: 2024-04-30
Filing date: 2024-04-30
Publication date: 2025-11-06
Anticipated expiration: 2026-10-30

Abstract

Electrical circuits and corresponding methods within nuclear imaging systems that generate timing signals for detected image scanning events, and the reconstruction of images based on the timing signals, are disclosed. In some examples, an image scanner circuit includes derivative logic and peak-hold logic electrically coupled to the derivative logic. The derivative logic is configured to receive an event signal for a detected event from an event detector of an image scanner and, based on the event signal, output a derivative signal of the event signal. The peak-hold logic is configured to receive the derivative signal and, based on a voltage level of the derivative signal, output a peak-hold signal. The peak-hold signal is output at a first voltage level when the voltage level of the derivative signal is increasing, and is output at a second voltage level when the voltage level of the derivative signal is decreasing.

Description

METHODS AND APPARATUS FOR MEDICAL IMAGING EVENT TIMING DETERMINATION AND IMAGE RECONSTRUCTION

FIELD

[0001] Aspects of the present disclosure relate in general to medical diagnostic systems and, more particularly, to determining event timing and reconstructing images in nuclear imaging systems.

BACKGROUND

[0002] Nuclear imaging systems can employ various technologies to capture images. For example, some nuclear imaging systems employ positron emission tomography (PET) to capture images. PET is a nuclear medicine imaging technique that produces tomographic images representing the distribution of positron emitting isotopes within a body. PET systems (e.g., time-of-flight (TOF) PET systems) include a scanner with detector elements that include scintillation crystals which can detect gamma rays during the scanning process. The scintillation crystals detect the gamma rays, and generate signals characterizing the detections. Typically, the nuclear imaging systems attempt to capture the signals and, based on captured signals, determine corresponding times (e.g., timestamps) for the detected events. The nuclear imaging systems may then generate measurement data characterizing an image based on the captured signals and corresponding times (e.g., detection events). There are opportunities, however, to improve the accuracy of event times, thereby allowing for more accurate measurement data and reconstructed images.

SUMMARY

[0003] Systems and methods for more accurate event timing of detected events of nuclear imaging scans allowing for the generation of more accurate measurement data and reconstructed images are disclosed.

[0004] In some embodiments, an image scanner circuit comprises derivative logic and peak-hold logic electrically coupled to the derivative logic. The derivative logic is configured to receive an event signal from an event detector of an image scanner and, based on the event signal, output a derivative signal of the event signal. The peak-hold logic is configured to receive the derivative signal and, based on a voltage level (e.g., voltage polarity) of the derivative signal, output a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing, and output the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

[0005] In some embodiments, a nuclear imaging scanner comprises an image scanner circuit and an image scanner electrically coupled to the image scanner circuit. The image scanner circuit comprises derivative logic and peak-hold logic electrically coupled to the derivative logic. The derivative logic is configured to receive an event signal from an event detector of the image scanner and, based on the event signal, output a derivative signal of the event signal. The peak-hold logic is configured to receive the derivative signal and, based on a voltage level of the derivative signal, output a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing, and output the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

[0006] In some embodiments, a method by an image scanner circuit comprises receiving an event signal from an event detector of an image scanner and, based on the event signal, generating a derivative signal of the event signal. The method also includes outputting, based on a voltage level of the derivative signal, a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing, and outputting the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The following will be apparent from elements of the figures, which are provided for illustrative purposes and are not necessarily drawn to scale.

[0008] FIG. 1 illustrates a nuclear imaging system, in accordance with some embodiments.

[0009] FIG. 2 illustrates a block diagram of an electrical circuit, in accordance with some embodiments.

[0010] FIG. 3 illustrates a block diagram of an electrical circuit, in accordance with some embodiments. [0011] FIG. 4 illustrates a chart of various signals, in accordance with some embodiments.

[0012] FIG. 5 A illustrates a signal in the time domain.

[0013] FIG. 5B illustrates equations representing the signal of FIG. 5A in the time and frequency domains.

[0014] FIG. 5C illustrates a chart of various signals, in accordance with some embodiments.

[0015] FIGS. 6A, 6B, and 6C illustrate flowcharts of exemplary methods, in accordance with some embodiments.

DETAILED DESCRIPTION

[0016] This description of the exemplary embodiments is intended to be read in connection with the accompanying drawings, which are to be considered part of the entire written description. Independent of the grammatical term usage, individuals with male, female, or other gender identities are included within the term.

[0017] The exemplary embodiments are described with respect to the claimed systems as well as with respect to the claimed methods. Furthermore, the exemplary embodiments are described with respect to methods and systems for event detection and image reconstruction. Features, advantages, or alternative embodiments herein can be assigned to the other claimed objects and vice versa. For example, claims for the providing systems can be improved with features described or claimed in the context of the methods, and vice versa. In addition, the functional features of described or claimed methods are embodied by objective units of a providing system.

[0018] Positron emission tomography (PET) imaging systems can include a scanner with various detection elements. Each detection element may house crystals (e.g., scintillation crystals) that detect emitted gamma rays from a scanned subject. For example, silicon photomultiplier (SiPM) detectors can include crystal array architectures (e.g., segmented-SiPM arrays (SSAs)) that can detect photon events based on either “inter-crystal scatter (ICS)” or “light-sharing (LS)” technology. Typically, when a crystal detects an event, one or more signals may be generated (e. ., based on photonelectrons from the photoelectric or Compton scatter events). For example, the system may generate a first signal characterizing an energy associated with the detected event. The system may additionally generate a second signal characterizing a first dimension location of the detection (e.g., X-axis location of the detecting crystal), and a third signal characterizing a second dimension location of the detection (e.g., a Y-axis location of the detecting crystal).

[0019] Each of these signals (e.g., the first signal, the second signal, and the third signal) may characterize a pulse, where the height of the signal at any given point in time indicates an associated energy value, such as a kilo-electron volts (KeV) value. To determine a time of a received pulse, conventional systems may rely on a static voltage threshold. For examples, the conventional systems may include logic to compare the voltage level of a signal to a static voltage level. When the signal’s voltage level reaches the static voltage level, the system may generate a time (e.g., timestamp) for the event. The signals, however, may differ. For example, the signals may have varying amplitudes and rise times. As a result, the system can suffer from time-walk (e.g., time skew), timing resolution, and/or timing accuracy deficiencies.

[0020] To address these and other deficiencies, the embodiments described herein are directed to electrical circuits (e.g., leading edge discriminator (LED) circuits) that can more accurately and reliably generate timing signals for detected events. The embodiments can provide for a dynamic trigger reference where each signal has a corresponding trigger point that can differ from trigger references of other signals. The trigger references may be based on each signal’s maximum slope point, where any timing jitter (e.g., noise-to-slope ratio) may be lowest. Indeed, among other advantages, the resulting timing trigger signal may not need further timewalk correction, and/or may have improved signal-to-noise ratios (NSRs).

[0021] Referring now to the figures, FIG. 1 illustrates a nuclear imaging system 100 that includes an image scanning system 102 and an image reconstruction system 104. Nuclear imaging system 100 may be, for example, a PET nuclear imaging system. In some examples, nuclear imaging system 100 can capture PET images as well as images from a co-modality, such as computed tomography (CT) or Magnetic Resonance Imaging (MRI), and can produce images that show information from both PET scans and co-modality scans. For instance, nuclear imaging system 100 may be a PET/CT nuclear imaging system or PET/MR nuclear imaging system.

[0022] As illustrated, image scanning system 102 includes an image scanner 150, event detection with dynamic time-walk correction (EDDTW) circuitry, analog-to-digital converter (ADC) engine 152, time-to-digital converter (TDC) 156, and measurement data generation engine 160. In some examples, all or parts of image scanning system 102 are implemented in hardware, such as in one or more Field-Programmable Gate Arrays (FPGAs), one or more System-on-Chips (SoCs), one or more application-specific integrated circuits (ASICs), one or more state machines, one or more computing devices, digital circuitry, or any other suitable circuitry. For example, all or parts of EDDTW circuitry 142, ADC engine 152, TDC 156, and measurement data generation engine 160 may be implemented within one or more FPGAs and/or SoCs. In some examples, at least parts of image scanning system 102 can be implemented in software as executable instructions such that, when executed by one or more processors, cause the one or more processors to perform respective functions as described herein. The instructions can be stored in a non-transitory, computer-readable storage medium, and can be read and executed by the one or more processors. For instance, in some examples, one or more portions of any of EDDTW circuitry 142, ADC engine 152, TDC 156, and measurement data generation engine 160 can be implemented by one or more processors executing instructions. The one or more processors may include, for instance, a microcontroller, a graphics processing unit (GPU), a central processing unit (CPU), a digital signal processor (DSP), a soft core, or any other suitable processing device.

[0023] Referring back to FIG. 1, the image scanner 150 includes a scanning device 140 and EDDTW circuitry 142. The scanning device 140 may detector elements (e.g., SSAs) that include crystals (e.g., scintillation crystals) which can detect gamma rays during the scanning (e.g., imaging) process. For each detection event, scanning device 140 may generate one or more event signals 141 (e.g., a signal for each of one or more detection channels) that characterize the energy and location of the detection (e.g., a X-axis and Y-axis location of the detecting scintillation crystal). For instance, event signals 141 may include a first signal characterizing detected energy levels (e.g., energy depositions), a second signal characterizing a first dimension position (e.g., X-axis position) of the detecting crystal, and a third signal characterizing a second dimension position (e.g., Y-axis position) of the detecting crystal. The scanning device 140 may transmit the event signals 141 to the EDDTW circuitry 142.

[0024] As described further herein, EDDTW circuitry 142 includes a circuit, such as a Leading-Edge Discriminator (LED) circuit, that allows for dynamic trigger references of the event signals 141. EDDTW circuitry 142 can receive an event signal 141, and can generate a derivative signal of the event signal 141. The derivative signal characterizes a slope of the event signal 141. Further, and based on the derivative signal, the EDDTW circuitry 142 can generate and output a peak-hold signal 151 that indicates a time (e.g., timestamp) of a corresponding event.

[0025] For instance, in some examples, the EDDTW circuitry 142 generates and outputs the peak-hold signal 151 at a first voltage level as the voltage level of the derivative signal is increasing. The first voltage level may be the voltage level of the derivative signal, for instance. In other words, the first voltage level may “track” the voltage level of the derivative signal as the derivative signal’ s voltage level is increasing (i.e., the height of the derivative signal is increasing). In addition, and based on the derivative signal, the EDDTW circuitry 142 can generate and output the peak-hold signal 151 at a second voltage level as the voltage level of the derivative signal is decreasing. The second voltage level may correspond to a maximum voltage level of the derivative signal (e.g., corresponding to a point in time where the slope of the derivative signal is zero).

[0026] For example, FIG. 5A illustrates an event signal 502 in the time domain where the x-axis represents time, and the y-axis represents voltage level. As illustrated, the event signal 502 includes various time regions including region a, region b, region c, region d, and region e. As illustrated, the event signal 502 begins to rise (i.e., increase) in region a, and continues to rise in region b, and rises further still in region c, although at a decreased rate (e.g., lesser slopes) than in region b. The event signal 502 then begins to fall (e.g., decrease) in region d, and continues to decrease in region e, although at a decreased rate (e.g., increased slope) compared to region d. [0027] FIG. 5B illustrates equation (1), which characterizes the event signal 502 in the time domain. In equation (1), R is a gain scaling factor. In addition, TO is a time constant associated with the portion of the pulse leading edge (i.e., rising edge) of the event signal 502 in region a. Further, TI is a first exponential time constant associated with the portion of the pulse leading edge of the event signal 502 in region Z>, and 12 is a second exponential time constant associated with the portion of the pulse leading edge of the event signal 502 in region c. Additionally, T3 is a third exponential time constant associated with the portion of the pulse leading edge of the event signal 502 in region c, and T4 is a fourth exponential time constant associated with the portion of the pulse leading edge of the event signal 502 in region d. FIG. 5B also illustrates equation (2), which characterizes the event signal 502 in the frequency domain. Indeed, equation (2) is the Laplace transform of equation (1).

[0028] FIG. 5C illustrates an exemplary event signal 552 in the time domain where the x- axis represents time, and the y-axis represents voltage level. As illustrated, the event signal 552 includes various time regions including region a, region b, region c, region d, and region e. Graph (B) of FIG. 5C illustrates a derivative signal 564 of the event signal 552. As illustrated, the voltage level of the derivative signal 564 increases in regions a and b because the slope of the event signal 552 increases in those regions. As illustrated in graph (C) of FIG. 5C, an event detection signal 574 increases in regions a and Z>, which “tracks” the derivative signal 564 in those regions.

[0029] In region c, however, the voltage level of the derivative signal 564 decreases because the slope of the event signal 552 begins to decrease in region c. Indeed, at time 556 where region b meets region c, the height of the derivative signal 564 is maximum. In region d, the derivative signal 564 begins to fall below the time axis, and continues falling until region e. At region e, the derivative signal 564 begins to rise again, but is still below the time axis until the end of region e. As illustrated in graph (C), the event detection signal 574 holds at a constant voltage level in region c and in at least a portion of region d before being reset (e.g., the corresponding circuit receives a “RESET” signal). In other words, the event detection signal 574 begins to hold at a constant voltage level at a time 566 corresponding to when the derivative signal 564 is maximum, and continues to hold at the constant voltage level until the corresponding circuit is reset. [0030] Referring back to FIG. 1, in other examples, as described herein, the EDDTW circuitry 142 generates and outputs the peak-hold signal 151 at a first voltage level when the derivative signal is at or above a threshold voltage (e.g., 0 Volts). The first voltage level may be the voltage level of the derivative signal, for instance. In other words, the first voltage level may “track” the voltage level of the derivative signal when the derivative signal is at or above the threshold voltage. In addition, the EDDTW circuitry 142 generates and outputs the peak-hold signal 151 at a second voltage when the derivative signal is below the threshold voltage. In some examples, the EDDTW circuitry 142 generates and outputs the peak-hold signal 151 at the second voltage level after a predetermined amount of time (e.g., upon receiving a reset signal generated based on a timer).

[0031] For example, graph (A) of FIG. 4 illustrates an exemplary event signal 402 in the time domain where the x-axis represents time, and the y-axis represents voltage level. As illustrated, the event signal 402 includes various time regions including region a, region b, region c, and region d. Graph (B) of FIG. 4 illustrates a derivative signal 414 of the event signal 402. As illustrated, the voltage level of the derivative signal 414 increases in region a because the slope of the event signal 402 increases in region a. In region b, however, the voltage level of the derivative signal 414 decreases because the slope of the event signal 402 begins to decrease in region b. Indeed, at time 416 where region a meets region b, the height of the derivative signal 414 is maximum. The area under the derivative signal 414 in regions a and b form a “positive region” at or above the time axis (e.g., at or above 0 Volts). As illustrated in graph (C) of FIG. 4, an event detection signal 424 increases in this “positive region” (i.e., regions a and b), thereby “tracking” the event signal 402 in regions a and b.

[0032] As illustrated in graph (B), in region c, the derivative signal 414 falls below the time axis, and continues falling until region d. Indeed, the derivative signal 414 falls below the time axis corresponding to the time that the event signal 402 has a negative slope. At region d, the derivative signal 414 begins to rise again due to an increase in slope of the event signal 402, but is still below the time axis until the end of region d, as the slope of the event signal 402 is still negative. The area under the derivative signal 414 in regions c and d form a “negative region” below the time axis (e.g., less than 0 Volts). As illustrated in graph (C), the event detection signal 424 holds at a relatively constant voltage level in this “negative region” (i.e., regions c and d) until, at the end of region d, the derivative signal 414 reaches the time axis (e.g, 0 Volts). In some examples, the event detection signal 424 holds at the relatively constant voltage level for a predetermined amount of time (e.g., until a reset signal is received). Among other advantages, the event detection signal 424 may experience low droop during this peak-hold phase.

[0033] Referring back to FIG. 1, the EDDTW circuitry 142 transmits the peak-hold signal 151 to the TDC 156, and TDC may generate time data 157 characterizing a corresponding digital time. For instance, TDC 156 may receive the peak-hold signal 151 and, in response, sample a system time. TDC 156 may sample the system time based on detecting a threshold voltage level of the peak-hold signal 151, and may generate the time data 157 based on the sampled system time. TDC 156 may transmit the time data 157 to measurement data generation engine 160.

[0034] Furthermore, the ADC engine 152 may receive each event signal 141, and may sample the event signal 141 to generate ADC data 153. For instance, the ADC engine 152 may include an analog-to-digital converter (ADC) that samples each event signal 141 at a sample rate to generate ADC data 153 characterizing the sampled event signal 141. For example, ADC engine 152 may sample each event signal 141 at a Nyquist rate, such as every 20 nano-seconds, every 50 nano-seconds, or at any other suitable rate. Based on the sampling, the ADC engine 152 may generate ADC data 153 characterizing corresponding voltage levels of the event signal 141. ADC engine 152 may transmit the ADC data 153 for each event signal 141 to measurement data generation engine 160.

[0035] Measurement data generation engine 160 may receive the ADC data 153 and the time data 157 and, based on the ADC data 153 and the time data 157, may generate PET measurement data 111. The PET measurement data 111 identifies detected crystal pulses (e.g., time-coincident data pairs) as well as corresponding times (e.g, time offsets between detection events). For example, measurement data generation engine 158 may perform any suitable processes (e.g., machine learning based processes) to generate time-coincident data pairs (e.g, antiparallel pairs of photon detections that fall within a coincidence timing window) based on the ADC data 153 and the time data 157. Measurement data generation engine 158 may generate the PET measurement data 111 to include the determined time-coincident data pairs, as well as time offsets between the time-coincident data pairs.

[0036] Further, and as illustrated, image reconstruction system 104 may receive the PET measurement data 111 from the image scanning system 102. Image reconstruction system 104 may perform operations to reconstruct an image based on the PET measurement data 111, and may generate final image volume 191 characterizing the reconstructed image. For example, reconstruction can be based on analytic or iterative algorithms or, more recently, deep learning algorithms. In some instances, image reconstruction system 104 receives an attenuation map 105 from the image scanning system 102. The image reconstruction system 104 may perform operations to correct the PET measurement data 111, for example for attenuation, based on the attenuation map 105. For instance, the image reconstruction system 104 may apply one or more attenuation correction processes to the PET measurement data 111 based on the attenuation map 105 to generate the final image volume 191.

[0037] Image reconstruction system 104 may transmit the final image volume 191 characterizing the reconstructed image. For instance, image reconstruction system 104 and may transmit the final image volume 191 to monitor 172 for display, and/or may store the final image volume within data repository 174.

[0038] FIG. 2 is an LED electrical circuit 200 that allows for dynamic time-walk correction by providing pulse-based trigger reference points rather than a static trigger point. For instance, LED electrical circuit 200 may correct time-walk related to inter-crystal scattering (ICS) event timing recovery for SiPM time-of-flight (ToF) PET detectors with segmented SiPM array readouts.

[0039] As illustrated, an SiPM array 202 is electrically connected to a capacitor 204. The SiPM array 202 can generate a timing signal 203 (e.g., based on photon detections), and can transmit the timing signal 203 to the capacitor 204. The capacitor 204 is electrically connected to analog comparator 206, delay logic 208, and derivative logic 220. The capacitor 204 can filter the timing signal 203, and provide a filtered timing signal 205 (e.g., high-pass filtered timing signal) to each of the analog comparator 206, the delay logic 208, and the derivative logic 220. [0040] The derivative logic 220 is configured to generate a derivative signal 221 based on the filtered timing signal 205. For instance, the derivative logic 220 may include a capacitor 220A and a resistor 220B to form a high-pass filter (HPF). For a given timing signal 203, the peak of the derivative signal 221 corresponds to a point in time when the timing signal 203 has the largest slope. Further, peak-hold logic 222 is electrically coupled to the derivative logic 220, and receives the derivative signal 221 from the derivative logic 220. The peak-hold logic 222 is configured to output a peak-hold signal 223 at a first voltage level as the derivative signal 221 increases, and output the peak-hold signal 223 at a second voltage level as the derivative signal 221 decreases. For instance, the first voltage level of the peak-hold signal 223 may “track” the voltage level of the derivative signal 221 as the derivative signal 221 increases. When the derivative signal 221 begins to decrease, indicating a peak of the derivative signal 221, the peakhold logic 222 may output the peak-hold signal 223 at the second voltage level, where the second voltage level is constant e.g., the voltage level of the derivative signal 221 at its peak). Among other advantages, the peak-hold signal 223 may experience low droop during this peak-hold phase.

[0041] Fine-tune logic 230 and, optionally, a low-pass filter (LPF) 232, are each electrically coupled to the peak-hold logic 222. The fine-tune logic 230 may include a first resistor 230A and a second resistor 230B to form a voltage divider. The fine-tune logic 230 is configured to adjust (e.g., fine tune) a voltage level of the peak-hold signal 223. For example, the fine-tune logic 230 may lower a voltage of the peak-hold signal 223. In some examples, the LPF 232 receives and filters the adjusted peak-hold signal 223.

[0042] Delay logic 208 is configured to delay the filtered timing signal 205. For instance, delay logic 208 may be configured to delay the filtered timing signal 205 by any delay caused by derivative logic 220, peak-hold logic 222, fine-tune logic 230, and, in some examples, LPF 232.

[0043] A timing trigger comparator 234 is electrically coupled to the delay logic 208 and the peak-hold signal 223. The timing trigger comparator 234 receives the filtered timing signal 205 after being delayed by delay logic 208, as well as the peak-hold signal 223. The timing trigger comparator 234 is configured to output a clock signal 235 based on the voltage levels of the peak-hold signal 223 and filtered timing signal 205. In other words, the timing trigger comparator 234 uses the peak-hold signal 223 as a trigger threshold to determine the voltage level of the clock signal 235. For instance, when the voltage level of the peak-hold signal 223 is less than the voltage level of the filtered timing signal 205, the timing trigger comparator 234 may output the clock signal 235 at a first voltage level (e. ., 0 Volts). When the voltage level of the peak-hold signal 223 is the same or greater than the voltage level of the filtered timing signal 205, the timing trigger comparator 234 may output the clock signal 235 at a second voltage level (e.g., 3.3 Volts). In some examples, while the peak-hold signal 223 and the filtered timing signal 205 are analog signals, the clock signal 235 is a digital signal (e.g., “0” and “1” binary logic).

[0044] As such, the derivative logic 220 and peak-hold logic 222 can correct for timewalk of the timing signal 203 by causing the timing trigger comparator 234 to trigger based on when the peak of the corresponding derivative signal 221 is detected, and thereby allow for a pulse-specific trigger point rather than a static trigger point.

[0045] The analog comparator 206 is electrically coupled to the capacitor 204 and to a digital-to-analog converter (DAC) 210, and receives the filtered timing signal 205 from the capacitor 204, and an output analog signal 211 from the DAC 210. The input to the DAC 210 may be provided by an another circuit, such as by an FPGA or SoC. The analog comparator 206 may generate a data signal 207 based on the filtered timing signal 205 and the output analog signal 211. For example, when the voltage level of the output analog signal 211 is less than the voltage level of the filtered timing signal 205, the analog comparator 206 may output the data signal 207 at a first voltage level (e.g., 0 Volts). When the voltage level of the output analog signal 211 is the same or greater than the voltage level of the filtered timing signal 205, the analog comparator 206 may output the data signal 207 at a second voltage level (e.g., 3.3 Volts). The data signal 207 may be an analog signal.

[0046] The electrical circuit 200 also includes a flip-flop 240 (e.g., a D flip-flop) that is electrically coupled to the analog comparator 206 (e.g., arming comparator) and the timing trigger comparator 234. Specifically, the data signal 207 from the analog comparator 206 is electrically coupled to a data input of the flip-flop 240, and the clock signal 235 from the timing trigger comparator 234 is electrically coupled to a clock input of the flip-flop 240. The flip-flop 240 is configured to output the data signal 207 as event timestamp signal 241 based on the clock signal 235. For example, the flip-flop 240 may clock out the data signal 207 as the event timestamp signal 241 when an active edge (e.g., positive edge, negative edge) of the clock signal 235 is received. The flip-flop 240 may hold the event timestamp signal 241 at a corresponding voltage level (e.g., 0 Volts, 3.3 Volts) until the next active edge of the clock signal 235 is received. For instance, if the data signal 207 is 3.3 Volts, the flip-flop 240 may hold the event timestamp signal 241 at 3.3 Volts. When the next active edge of the clock signal 235 is received, the flip-flop 240 again clocks out the data signal 207 as the event timestamp signal 241. For instance, if the data signal 207 is now 0 Volts, the flip-flop 240 may hold the event timestamp signal 241 at 0 Volts. The flip-flop 240 may be reset based on receiving an active pulse (e.g., edge triggered, level triggered) from reset signal 243.

[0047] The event timestamp signal 241 may be transmitted to determine an event time of a corresponding detection event. For example, the LED electrical circuit 200 may transmit the event timestamp signal 241 to TDC 156 as peak-hold signal 151 to generate a timestamp for the corresponding event. As described herein, coincidence timing data can be generated based on the timestamp, and can be included within the generated measurement data, such as PET measurement data 111.

[0048] FIG. 3 is an electrical circuit 300 that allows for dynamic time-walk correction. The electrical circuit 300 includes automatic track-and-hold trigger generation logic 302 that can generate pulse-based trigger reference points. As illustrated, the automatic track-and-hold trigger generation logic 302 includes an analog buffer 304, derivative logic 306, and a comparator 308. An input of the analog buffer 304 is electrically coupled to an input signal 301 (indicated as “Vin”). The input signal 301 may be, for instance, a timing signal received from a scanning device (e.g., scanning device 140). The analog buffer 304 receives the input signal 301 and outputs an buffered signal 305. The derivative logic 306 is electrically coupled to the output of the analog buffer 304, and receives the buffered signal 305.

[0049] Specifically, the derivative logic 306 includes a capacitor 306A and a resistor 306B in parallel with the capacitor 306 A to form a high-pass filter (HPF). The derivative logic 306 is configured to generate a derivative signal 307 based on the buffered signal 305. For a given buffered signal 305, the peak of the derivative signal 307 corresponds to a point in time when the buffered signal 305 has the largest slope (e.g., similar to how derivative signal 564 of FIG. 5C has a peak at time 566 where the event signal 552 has the largest slope). The comparator 308 (e.g., zero-cross comparator) receives the derivative signal 307, and is configured to output a control signal 309 based on the voltage levels of the derivative signal 307 and a reference signal (e.g., the “zero” reference signal). In this example, the reference signal is ground. The comparator 308 changes the state of the control signal 309 when the derivative signal 307 crosses the zero reference voltage. For instance, the comparator 308 may output a first voltage (e.g., 3.3 Volts, logic “1”) on the control signal 309 when the derivative signal 307 crosses from a negative voltage to a non-negative (e.g., positive) voltage, and may output a second voltage (e.g., 0 Volts, logic “0”) on the control signal 309 when the derivative signal 307 crosses from a positive voltage to a negative voltage or, in some examples, based on a reset signal.

[0050] The electrical circuit 300 also includes sampling operational transconductance amplifier (SOTA) logic 320 and operational transconductance amplifier (OTA) logic 330. As illustrated, the SOTA logic 320 includes switching logic 322 and an amplifier 324 (“hold” amplifier 324). The amplifier 324 receives, at a first input (e.g., the “positive” input), the input signal 301 and, at a second input (e.g., the “negative” input), a collector-side signal 333 of the OTA logic 330, which is described further below. In this example, the electrical circuit 300 further includes a first resistor 312 (RT) and a second resistor 314 (Rsi) that are electrically coupled to the input signal 301. The first resistor 312 is in parallel, and the second resistor 314 is in series, with the first input of the amplifier 324. The amplifier 324 provides an output signal 325 at a first voltage (e.g., positive saturation level of the amplifier 324, such as 3.3 Volts) when the input signal 301 at the first input is the same as or greater than the collector-side signal 333 at the second input. Similarly, the amplifier 324 provides the output signal 325 at a second voltage (e.g., negative saturation level of the amplifier 324, such as 0 Volts) when the input signal 301 at the first input is less than the collector-side signal 333 at the second input.

[0051] The switching logic 320 is electrically coupled to the comparator 308 and receives the control signal 309 as an input. Based on the control signal 309, the switching logic 322 will either close (i.e., short) or open an electrical connection 321 between the output signal 325 and the OTA logic 330. For example, the switching logic 322 may close the electrical connection 321 when the control signal 309 is at or above a threshold voltage, and may open the electrical connection when the control signal 309 is below the threshold voltage.

[0052] As illustrated, the electrical circuit 300 includes a capacitor 318 (“hold” capacitor CH) and a third resistor 316 (Rs2) which, together, can filter the input signal to the OTA logic 330. One terminal (e.g., the positive terminal) of the third resistor 316 is electrically coupled to the capacitor 318, and the other terminal (e.g., the negative terminal) of the third resistor 316 is electrically coupled to an input of the OTA logic 330. When the control signal 309 causes the switching logic 322 to close, the SOTA logic 320 current output, i.e., the output signal 325, can charge and discharge the capacitor 318. For example, the output signal 325 can charge the capacitor 318 to its peak voltage level. When the control signal 309 causes the switching logic 320 to open, the capacitor 318 holds the peak voltage level of the output signal 325.

[0053] In this example the OTA logic 330 uses a common-emitter topology. As illustrated, the OTA logic 330 includes a transistor 332 where its base terminal is electrically coupled to the third resistor 316. Further, the base terminal receives the voltage provided by the output signal 325 when the switching logic 322 is closed, and receives the voltage provided by the capacitor 318 when the switching logic 322 is open. The collector terminal of the transistor 332 provides the col lector- si de signal 333 and is electrically coupled to a fourth resistor 336 (R2), to a fifth resistor 346 (Rss), and to an input of an output amplifier 338. The emitter terminal of the transistor 332 is electrically coupled to a first terminal of a sixth resistor 334 (Ri), where a second terminal of the sixth resistor 334 is electrically connected to ground. The voltage gain provided by the OTA logic 330 can be measured according to R2/R1. The output amplifier 338 receives the collector-side signal 333, and applies a corresponding gain to the collector-side signal 333 to output, through a seventh resistor 340, a final output signal 341 (indicated as “Vout”).

[0054] The final output signal 341 may be transmitted to determine an event time of a corresponding detection event. For example, the electrical circuit 300 may transmit the final output signal 341 to the peak-hold logic 222 of the LED electrical circuit 200 200 as peak-hold signal 223 to generate the event timestamp signal 241 for the corresponding event. As described herein, coincidence timing data can be generated based on the generated timestamp (e.g, the event timestamp signal 241), and be included within measurement data, such as PET measurement data 111.

[0055] FIG. 6A is a flowchart of an example method 600 to generate a peak-hold signal characterizing a time for a scanner detection event. The method can be performed by one or more of the electrical circuits described herein, such as by an electrical circuit of the image scanning system 102.

[0056] Beginning at block 602, an event signal is received from a scanning device of an image scanner. At block 604, a derivative signal of the event signal is generated. The derivative signal (e.g, derivative signal 414, derivative signal 564) characterizes a derivative of the event signal. For example, the height (i.e., voltage level) of the derivative signal may increase as the slope of the event signal increases, and may decrease as the slope of the event signal decreases.

[0057] Further, at block 606, a peak-hold signal is output based on a voltage level (e.g, voltage polarity) of the derivative signal. The peak-hold signal is output at a first voltage level when the voltage level of the derivative signal is increasing, and at a second voltage level when the voltage level of the derivative signal is decreasing. For instance, the first voltage level may “track” the voltage level of the event signal, and the second voltage level may be a constant voltage level (e.g., 5 Volts). In some examples, the second voltage level may correspond to a maximum voltage level of the event signal (e.g., as described with respect to FIG. 4). In other examples, the second voltage level may correspond to a maximum voltage level of the derivative signal (e.g, as described with respect to FIG. 5C). At block 608, the peak-hold signal is transmitted to detect a time of the event. For instance, as described herein the peak-hold signal may be transmitted to a time-to-digital converter, such as TDC 156, to generate a timestamp for the event.

[0058] FIG. 6B is a flowchart of an exemplary method 650 to generate a time for a scanner detection event. The method can be performed by one or more of the electrical circuits described herein, such as by TDC 156 of the image scanning system 102. [0059] Beginning at block 652, a peak-hold signal is received. For example, the peakhold signal may be received from EDDTW circuitry 142. The peak-hold signal may be generated as described with respect to FIG. 6A. At block 654, a time of an event is detected based on the peak-hold signal. For example, TDC 156 may receive the peak-hold signal 151 and, in response, sample a system time. TDC 156 may generate time data 157 based on the sampled system time. At block 656, the time is transmitted for generating measurement data. For example, TDC 156 may transmit the time data 157 to measurement data generation engine 160 to generate PET measurement data 111.

[0060] FIG. 6C is a flowchart of an exemplary method 660 to generate measurement data. The method can be performed by one or more of the electrical circuits described herein, such as by an electrical circuit of the image scanning system 102.

[0061] Beginning at block 662, a detected time for an event is received. For example, measurement data generation engine 160 may receive time data 157 from TDC 156. TDC 156 may have generated the time data 157 as described with respect to FIG. 6B. At block 664, ADC data, such as ADC data 153, for the event is received. The ADC data characterizes detected events corresponding to the event times of the received time data. Further, at block 666, measurement data is generated based on the ADC data and the detected time. For instance, as described herein, measurement data generation engine 160 may receive ADC data 153 and time data 157 and, based on the ADC data 153 and the time data 157, may generate PET measurement data 111. The PET measurement data 111 can include time-coincident data pairs as well as corresponding time offsets between detection events, as described herein.

[0062] The following is a list of non-limiting illustrative embodiments disclosed herein:

[0063] Illustrative Embodiment 1 : An image scanner circuit comprising: derivative logic configured to: receive an event signal from an event detector of an image scanner; and based on the event signal, output a derivative signal of the event signal; and peak-hold logic configured to: receive the derivative signal; and based on a voltage level of the derivative signal: output a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and output the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

[0064] Illustrative Embodiment 2: The image scanner circuit of illustrative embodiment 1, wherein the peak-hold logic configured to output the peak-hold signal at the first voltage level to track a voltage of the derivative signal.

[0065] Illustrative Embodiment 3 : The image scanner circuit of any of illustrative embodiments 1-2, wherein the peak-hold logic configured to output the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

[0066] Illustrative Embodiment 4: The image scanner circuit of illustrative embodiment 3, wherein the derivative logic is configured to detect a maximum output slope of the event signal and, based on the detection, output the derivative signal at the maximum voltage level.

[0067] Illustrative Embodiment 5: The image scanner circuit of any of illustrative embodiments 1-4, wherein the derivative logic comprises a capacitor and a resistor in parallel with the capacitor, and wherein the capacitor is configured to receive the event signal and output the derivative signal.

[0068] Illustrative Embodiment 6: The image scanner circuit of any of illustrative embodiments 1-5, wherein the peak-hold logic is configured to output the peak-hold signal to timing logic, the timing logic configured to detect a time of the event signal based on the peakhold signal.

[0069] Illustrative Embodiment 7: The image scanner circuit of any of illustrative embodiments 1-6, wherein the peak-hold logic comprises a comparator configured to output the peak-hold signal based on a voltage level of the derivative signal and a voltage level of a reference signal. [0070] Illustrative Embodiment 8: The image scanner circuit of illustrative embodiment 7, wherein the reference signal is electrically connected to ground, and the comparator is configured to output the peak-hold signal at the second voltage level when the voltage level of the derivative signal is greater than ground.

[0071] Illustrative Embodiment 9: The image scanner circuit of any of illustrative embodiments 1-8 further comprising switching logic configured to receive the peak-hold signal and, based on the second voltage level of the peak-hold signal, close an electrical connection to a capacitor, the closed connection causing the capacitor to charge over the electrical connection.

[0072] Illustrative Embodiment 10: The image scanner circuit of illustrative embodiment 9 wherein the switching logic is configured to open the electrical connection to the capacitor when the first voltage level of the peak-hold signal is below a threshold voltage.

[0073] Illustrative Embodiment 11: A nuclear imaging scanner comprising: an image scanner; and an image scanner circuit electrically coupled to the image scanner, wherein the image scanner circuit comprises: derivative logic configured to: receive an event signal from the image scanner; and based on the event signal, output a derivative signal of the event signal; and peak-hold logic configured to: receive the derivative signal; and based on a voltage level of the derivative signal: output a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and output the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing. [0074] Illustrative Embodiment 12: The nuclear imaging scanner of illustrative embodiment 11, wherein the peak-hold logic configured to output the peak-hold signal at the first voltage level to track a voltage of the derivative signal.

[0075] Illustrative Embodiment 13: The nuclear imaging scanner of any of illustrative embodiments 11-12, wherein the peak-hold logic configured to output the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

[0076] Illustrative Embodiment 14: The nuclear imaging scanner of illustrative embodiment 13, wherein the derivative logic is configured to detect a maximum output slope of the event signal and, based on the detection, output the derivative signal at the maximum voltage level.

[0077] Illustrative Embodiment 15: The nuclear imaging scanner of any of illustrative embodiments 11-14, wherein the peak-hold logic is configured to output the peak-hold signal to timing logic, the timing logic configured to detect a time of the event signal based on the peakhold signal.

[0078] Illustrative Embodiment 16: A method by an image scanner circuit, comprising: receiving an event signal from an event detector of an image scanner; based on the event signal, generating a derivative signal of the event signal; outputting, based on a voltage level of the derivative signal, a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and outputting the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

[0079] Illustrative Embodiment 17: The method of illustrative embodiment 16, comprising outputting the peak-hold signal at the first voltage level to track a voltage of the derivative signal. [0080] Illustrative Embodiment 18: The method of any of illustrative embodiments 16- 17, comprising outputting the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

[0081] Illustrative Embodiment 19: The method of illustrative embodiment 18, comprising detecting a maximum output slope of the event signal and, based on the detection, outputting the derivative signal at the maximum voltage level.

[0082] Illustrative Embodiment 20: The method of any of illustrative embodiments 16- 19, comprising outputting the peak-hold signal based on a voltage level of the derivative signal and a voltage level of a reference signal.

[0083] Illustrative Embodiment 21: A logic circuit comprising: a means for receiving an event signal from an event detector of an image scanner; a means for generating, based on the event signal, a derivative signal of the event signal; a means for outputting, based on a voltage level of the derivative signal, a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and a means for outputting the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

[0084] Illustrative Embodiment 22: The logic circuit of illustrative embodiment 21, comprising a means for outputting the peak-hold signal at the first voltage level to track a voltage of the derivative signal.

[0085] Illustrative Embodiment 23: The logic circuit of any of illustrative embodiments 21-22, comprising a means for outputting the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

[0086] Illustrative Embodiment 24: The logic circuit of illustrative embodiments 23, comprising a means for detecting a maximum output slope of the event signal and, based on the detection, outputting the derivative signal at the maximum voltage level. [0087] Illustrative Embodiment 25: The logic circuit of any of illustrative embodiments 21-24, comprising a means for outputting the peak-hold signal based on a voltage level of the derivative signal and a voltage level of a reference signal.

[0088] The apparatuses and processes are not limited to the specific embodiments described herein. In addition, components of each apparatus and each process can be practiced independent and separate from other components and processes described herein.

[0089] The previous description of embodiments is provided to enable any person skilled in the art to practice the disclosure. The various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without the use of inventive faculty. The present disclosure is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

What is claimed is:

1. An image scanner circuit comprising: derivative logic configured to: receive an event signal from an event detector of an image scanner; and based on the event signal, output a derivative signal of the event signal; and peak-hold logic configured to: receive the derivative signal; and based on a voltage level of the derivative signal: output a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and output the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

2. The image scanner circuit of claim 1, wherein the peak-hold logic configured to output the peak-hold signal at the first voltage level to track a voltage of the derivative signal.

3. The image scanner circuit of claim 1, wherein the peak-hold logic configured to output the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

4. The image scanner circuit of claim 3, wherein the derivative logic is configured to detect a maximum output slope of the event signal and, based on the detection, output the derivative signal at the maximum voltage level.

5. The image scanner circuit of claim 1, wherein the derivative logic comprises a capacitor and a resistor in parallel with the capacitor, and wherein the capacitor is configured to receive the event signal and output the derivative signal.

6. The image scanner circuit of claim 1, wherein the peak-hold logic is configured to output the peak-hold signal to timing logic, the timing logic configured to detect a time of the event signal based on the peak-hold signal.

7. The image scanner circuit of claim 1, wherein the peak-hold logic comprises a comparator configured to output the peak-hold signal based on a voltage level of the derivative signal and a voltage level of a reference signal.

8. The image scanner circuit of claim 7, wherein the reference signal is electrically connected to ground, and the comparator is configured to output the peak-hold signal at the second voltage level when the voltage level of the derivative signal is greater than ground.

9. The image scanner circuit of claim 1 further comprising switching logic configured to receive the peak-hold signal and, based on the second voltage level of the peak-hold signal, close an electrical connection to a capacitor, the closed connection causing the capacitor to charge over the electrical connection.

10. The image scanner circuit of claim 9 wherein the switching logic is configured to open the electrical connection to the capacitor when the first voltage level of the peak-hold signal is below a threshold voltage.

11. A nuclear imaging scanner comprising: an image scanner; and an image scanner circuit electrically coupled to the image scanner, wherein the image scanner circuit comprises: derivative logic configured to: receive an event signal from the image scanner; and based on the event signal, output a derivative signal of the event signal; and peak-hold logic configured to: receive the derivative signal; and based on a voltage level of the derivative signal: output a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and output the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

12. The nuclear imaging scanner of claim 11 , wherein the peak-hold logic configured to output the peak-hold signal at the first voltage level to track a voltage of the derivative signal.

13. The nuclear imaging scanner of claim 11, wherein the peak-hold logic configured to output the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

14. The nuclear imaging scanner of claim 13, wherein the derivative logic is configured to detect a maximum output slope of the event signal and, based on the detection, output the derivative signal at the maximum voltage level.

15. The nuclear imaging scanner of claim 11, wherein the peak-hold logic is configured to output the peak-hold signal to timing logic, the timing logic configured to detect a time of the event signal based on the peak-hold signal.

16. A method by an image scanner circuit, comprising: receiving an event signal from an event detector of an image scanner; based on the event signal, generating a derivative signal of the event signal; outputting, based on a voltage level of the derivative signal, a peak-hold signal at a first voltage level when the voltage level of the derivative signal is increasing; and outputting the peak-hold signal at a second voltage level when the voltage level of the derivative signal is decreasing.

17. The method of claim 16, comprising outputting the peak-hold signal at the first voltage level to track a voltage of the derivative signal.

18. The method of claim 16, comprising outputting the peak-hold signal at the second voltage level based on a maximum voltage level of the derivative signal.

19. The method of claim 18, comprising detecting a maximum output slope of the event signal and, based on the detection, outputting the derivative signal at the maximum voltage level.

20. The method of claim 16, comprising outputting the peak-hold signal based on a voltage level of the derivative signal and a voltage level of a reference signal.