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WO2025204961A1 - Procédé de fabrication de dispositif électronique et dispositif électronique - Google Patents

Procédé de fabrication de dispositif électronique et dispositif électronique

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Publication number
WO2025204961A1
WO2025204961A1 PCT/JP2025/009535 JP2025009535W WO2025204961A1 WO 2025204961 A1 WO2025204961 A1 WO 2025204961A1 JP 2025009535 W JP2025009535 W JP 2025009535W WO 2025204961 A1 WO2025204961 A1 WO 2025204961A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductor
insulator
group
electronic component
bonding layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2025/009535
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English (en)
Japanese (ja)
Inventor
誠 志水
大吾 一戸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JSR Corp
Original Assignee
JSR Corp
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Filing date
Publication date
Application filed by JSR Corp filed Critical JSR Corp
Publication of WO2025204961A1 publication Critical patent/WO2025204961A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

Definitions

  • the present invention relates to a method for manufacturing an electronic device and an electronic device.
  • a technique for hybrid bonding semiconductor substrates having an organic insulating film and electrodes on one surface of the base body in which a resin material with a predetermined glass transition temperature and surface roughness is used for the organic insulating film, and heating and pressing are performed at a predetermined high temperature to bond the organic insulating films and the electrodes together (Patent Document 1).
  • the present invention aims to realize an electronic device in which a group of electronic components are easily and effectively joined.
  • a method for manufacturing an electronic device including the steps of: preparing a first electronic component having a first insulator and a first conductor on a first surface; preparing a second electronic component having a second insulator and a second conductor on a second surface; providing a bonding layer made of an organic compound on the first insulator; opposing the first surface and the second surface via the bonding layer so that the first insulator and the second insulator face each other and the first conductor and the second conductor face each other; and performing a heat treatment to bond the first insulator and the second insulator together via the bonding layer and to bond the first conductor and the second conductor together by contact within the bonding layer due to thermal expansion.
  • an electronic device comprising: a first electronic component having a first insulator and a first conductor on a first surface; a second electronic component having a second insulator and a second conductor on a second surface opposite the first surface, with the second insulator facing the first insulator and the second conductor facing the first conductor; and a bonding layer provided between the first insulator and the second insulator, made of an organic compound, bonding the first insulator and the second insulator together, wherein the first conductor and the second conductor are bonded together within the bonding layer.
  • FIG. 1 is a diagram illustrating an example of an electronic device.
  • 1A to 1C are diagrams (part 1) illustrating an example of a method for manufacturing an electronic device.
  • 10A to 10C are diagrams (part 2) illustrating an example of a method for manufacturing an electronic device.
  • 10A to 10C are diagrams (part 3) illustrating an example of a method for manufacturing an electronic device.
  • 10A to 10C are diagrams (part 4) illustrating an example of a method for manufacturing an electronic device.
  • 1A to 1C are diagrams illustrating an example of a conventional method for manufacturing an electronic device.
  • FIG. 1 is a diagram illustrating an example of the configuration of an electronic device.
  • FIG. 1 is a diagram illustrating an example of an electronic device, which diagrammatically shows a cross-sectional view of a main part of the example of the electronic device.
  • the electronic device 1 shown in FIG. 1 includes a first electronic component 10 and a second electronic component 20 that are arranged opposite to each other, and a bonding layer 30 that is interposed between the first electronic component 10 and the second electronic component 20 .
  • the first electronic component 10 may be any of a variety of electronic components, such as a semiconductor chip, semiconductor package, semiconductor wafer, or circuit board.
  • the first electronic component 10 includes a first body 11, a first insulator 12, and a first conductor 13.
  • the first body 11 has a predetermined configuration according to the form of the first electronic component 10, for example, a configuration in which various elements such as semiconductor elements such as transistors, semiconductor chips equipped with semiconductor elements, and conductor portions such as wiring or vias are built in.
  • a first insulator 12 and a first conductor 13 are provided on the first body 11 having a predetermined configuration.
  • the first insulator 12 and the first conductor 13 are provided on the first surface 10a side of the first electronic component 10.
  • the first insulator 12 functions as a surface layer or protective layer of the first body 11.
  • Various insulating materials are used for the first insulator 12.
  • inorganic insulating materials such as silicon oxide (SiO 2 ), silicon nitride (SiN), silicon carbide (SiC), nitrogen-doped silicon oxide (SiON), and carbon-doped silicon oxide (SiOC) are used for the first insulator 12.
  • organic insulating materials such as epoxy, polyimide, polyamide, polyamideimide, bismaleimide, benzocyclobutene, and polybenzoxazole may also be used for the first insulator 12.
  • the first conductor 13 is arranged to protrude from the first insulator 12.
  • the first conductor 13 is electrically connected to a predetermined element built into the first body 11.
  • the first conductor 13 functions as an external connection terminal for the first electronic component 10.
  • Various conductive materials, such as metals, are used for the first conductor 13.
  • copper (Cu) is used as the metal for the first conductor 13.
  • Other metals that may be used for the first conductor 13 include aluminum (Al), gold (Au), silver (Ag), and nickel (Ni).
  • the first conductor 13 may contain two or more metals.
  • the first conductor 13 may be an alloy containing two or more metals, or a laminate formed by stacking multiple layers of different types, each containing one or more metals.
  • the second electronic component 20 may be any of a variety of electronic components, such as a semiconductor chip, semiconductor package, semiconductor wafer, or circuit board.
  • the second electronic component 20 includes a second body 21, a second insulator 22, and a second conductor 23.
  • the second body 21 has a predetermined configuration according to the form of the second electronic component 20, for example, a configuration in which various elements such as semiconductor elements such as transistors, semiconductor chips equipped with semiconductor elements, and conductor portions such as wiring or vias are built in.
  • the second body 21, which has a predetermined configuration, is provided with a second insulator 22 and a second conductor 23.
  • the second insulator 22 and the second conductor 23 are provided on the second surface 20a of the second electronic component 20, which faces the first surface 10a of the first electronic component 10.
  • the second insulator 22 functions as a surface layer or protective layer of the second body 21.
  • Various insulating materials are used for the second insulator 22.
  • inorganic insulating materials such as SiO 2 , SiN, SiC, SiON, and SiOC are used for the second insulator 22.
  • organic insulating materials such as epoxy, polyimide, polyamide, polyamideimide, bismaleimide, benzocyclobutene, and polybenzoxazole may also be used for the second insulator 22.
  • the second conductor 23 is arranged to protrude from the second insulator 22.
  • the second conductor 23 is electrically connected to a predetermined element built into the second body 21.
  • the second conductor 23 functions as an external connection terminal for the second electronic component 20.
  • Various conductive materials, such as metals, are used for the second conductor 23.
  • Cu is used as the metal for the second conductor 23.
  • Other metals such as Al, Au, Ag, and Ni may also be used as the metal for the second conductor 23.
  • the second conductor 23 may contain two or more metals. In this case, the second conductor 23 may be an alloy containing two or more metals, or a laminate formed by stacking multiple layers of different types, each containing one or more metals.
  • the first electronic component 10 and the second electronic component 20 are arranged so that their first surfaces 10a and second surfaces 20a face each other.
  • a bonding layer 30 is interposed between the first insulator 12 and the second insulator 22 of the opposing first electronic component 10 and second electronic component 20.
  • the first conductor 13 protruding from the first insulator 12 and the second conductor 23 protruding from the second insulator 22 are directly bonded and integrated within the bonding layer 30.
  • the bonding layer 30 functions as an adhesive that bonds (bonds) the first insulator 12 of the first electronic component 10 to the second insulator 22 of the second electronic component 20, and also functions as a spacer between the first insulator 12 and the second insulator 22.
  • the bonding layer 30 is formed from an organic compound bonding material.
  • the uncured bonding material used to form the bonding layer 30 is placed on the surface of the first insulator 12, the surface of the second insulator 22, or both the surfaces of the first insulator 12 and the second insulator 22.
  • the first electronic component 10 and the second electronic component 20 are arranged facing each other with the bonding material interposed therebetween.
  • the bonding material is then cured at room temperature or by heating through heat treatment or by light irradiation, and the first insulator 12 and the second insulator 22 are bonded together by the cured bonding material, i.e., the bonding layer 30 formed from the bonding material.
  • the thickness of the bonding layer 30 is set to a thickness corresponding to the amount of thermal expansion that occurs in the first conductor 13 and the second conductor 23 when the first conductor 13 and the second conductor 23 come into contact and are bonded due to thermal expansion by a predetermined heat treatment.
  • the bonding layer 30 is formed by applying a bonding material containing compound ⁇ to the bonding object to form a coating, which is then dried and hardened. Below, examples of bonding materials used to form the bonding layer 30 and the compound ⁇ contained in the bonding material are described in detail.
  • R 1 is a hydrogen atom, an alkyl group having 1 to 12 carbon atoms, a phenyl group, an alkoxy group having 1 to 12 carbon atoms, or a hydroxy group.
  • Each of the multiple R 2s is independently a hydrogen atom, a halogen atom, or a monovalent organic group.
  • X 1 is an azide group, an azidosulfonyl group, or a diazomethyl group.
  • Y 1 is a single bond, an ester group, an ether group, a thioether group, an amide group, a urethane group, a urea group, a group represented by -NHR 3 -, or a group represented by the following formula (3a) or (3b).
  • R 3 is an alkyl group having 1 to 6 carbon atoms.
  • Z 1 is a single bond, a methylene group, an alkylene group having 2 to 12 carbon atoms, or a group containing one or more groups selected from -NH-, -O-, -S-, and -S(O)- at the terminal or between the carbon-carbon bonds of the alkylene group having 2 to 12 carbon atoms.
  • m is an integer of 1 to 3.
  • the plurality of R 4 s , R 5 s , and R 6 s are each independently a hydrogen atom, an alkyl group having 1 to 12 carbon atoms, a phenyl group, an alkoxy group having 1 to 12 carbon atoms, or a hydroxy group, and at least one of the plurality of R 4 s , R 5 s , and R 6 s is an alkoxy group having 1 to 12 carbon atoms.
  • the plurality of R 7 s are each independently a hydrogen atom, a halogen atom, or a monovalent organic group.
  • X 2 is an azide group, an azidosulfonyl group, or a diazomethyl group.
  • the plurality of Z 2 s are each independently a single bond, a methylene group, an alkylene group having 2 to 12 carbon atoms, or a group containing one or more groups selected from -NH-, -O-, -S-, and -S(O)- at the terminal or between the carbon-carbon bonds of the alkylene group having 2 to 12 carbon atoms.
  • R 8 is a hydrogen atom or a methyl group.
  • alkyl group having 1 to 12 carbon atoms represented by R 1 , R 4 , R 5 and R 6 include a methyl group, an ethyl group, a propyl group, a butyl group and an octyl group.
  • Examples of the alkoxy group having 1 to 12 carbon atoms represented by R 1 , R 4 , R 5 and R 6 include a methoxy group, an ethoxy group and a benzyloxy group.
  • Examples of the halogen atom represented by R2 and R7 include a fluorine atom, a chlorine atom, and a bromine atom.
  • Examples of the monovalent organic group represented by R2 and R7 include a monovalent hydrocarbon group, an alkoxy group, a group represented by -Y1- Z1 - Si - R13 ( Y1 , Z1 , and R1 are respectively defined as Y1 , Z1 , and R1 in formula (1)), -COO-N-(- Z2 -SiR4R5R6 ) 2 ( Z2 , R4 , R5 , and R6 are respectively defined as Z2 , R4 , R5 , and R6 in formula (2)), and a group represented by formula (14) described below.
  • R 1 is preferably an alkoxy group having 1 to 12 carbon atoms, more preferably an alkoxy group having 1 to 6 carbon atoms, and even more preferably an alkoxy group having 1 to 3 carbon atoms.
  • R2 is preferably a hydrogen atom.
  • Z1 is preferably an alkylene group having 2 to 12 carbon atoms, and more preferably an alkylene group having 2 to 6 carbon atoms.
  • m is preferably 3.
  • R 4 , R 5 and R 6 are preferably alkoxy groups having 1 to 12 carbon atoms, more preferably alkoxy groups having 1 to 6 carbon atoms, and even more preferably alkoxy groups having 1 to 3 carbon atoms.
  • J 11 , J 12 and J 13 are each independently a methylene group, an alkylene group having 2 to 12 carbon atoms or a group containing an oxygen atom (-O-) between the carbon-carbon bond of the alkylene group having 2 to 12 carbon atoms.
  • Y 15 is a group represented by -R 15 or -OA 15.
  • Y 16 is a group represented by -R 16 or -OA 16.
  • a 10 , A 15 and A 16 are each independently an alkyl group having 1 to 4 carbon atoms, a benzyl group or a hydrogen atom.
  • R 10 , R 15 and R 16 are each independently an alkyl group having 1 to 4 carbon atoms or a benzyl group.
  • k is an integer of 0 to 2.
  • alkenyl group represented by Rd include a vinyl group, a 3-acryloxypropyl group, a 3-methacryloxypropyl group, etc.
  • aryl group represented by Rd and R e include a phenyl group, a tolyl group, a p-hydroxyphenyl group, a p-methoxyphenyl group, a 1-(p-hydroxyphenyl)ethyl group, a 2-(p-hydroxyphenyl)ethyl group, a 4-hydroxy-5-(p-hydroxyphenylcarbonyloxy)pentyl group, and a naphthyl group.
  • Examples of the organic group having a reactive group represented by Rd include an isocyanate group and a group having an isocyanurate structure and an alkoxysilyl group.
  • the number of carbon atoms in the organic group having a reactive group represented by Rd is preferably 1 or more and 40 or less.
  • a specific example of the acyl group represented by R e is an acetyl group.
  • hydrolyzable silane compound represented by formula (C) include tetrafunctional silanes such as tetramethoxysilane, tetraethoxysilane, tetrapropoxysilane, tetraacetoxysilane, and tetraphenoxysilane, methyltrimethoxysilane, methyltriethoxysilane, methyltriisopropoxysilane, methyltri-n-butoxysilane, ethyltrimethoxysilane, ethyltriethoxysilane, ethyltriisopropoxysilane, ethyltri-n-butoxysilane, n-propyltrimethoxysilane, n-propyltriethoxysilane, n-butyltrimethoxysilane, n-butyltriethoxysilane, n-hexyltrimethoxysilane, and n-
  • hydrolyzable silane compounds represented by formula (C) also include compounds having five or more alkoxy groups bonded to silicon atoms, such as 1,3,5-tris[3-(trimethoxysilyl)propyl]isocyanurate.
  • the hydrolyzable silane compounds may be used alone or in combination of two or more.
  • the weight average molecular weight (Mw) of the compound ⁇ 2 is not particularly limited, but is preferably 1,000 to 100,000, more preferably 2,000 to 50,000, in terms of polystyrene, as measured by GPC (gel permeation chromatography).
  • Compound ⁇ 2 can be obtained by (i) hydrolysis and condensation of a hydrolyzable silane compound containing compound ⁇ 1, or (ii) a method of obtaining a hydrolyzed condensate of a hydrolyzable silane compound by reacting a compound having structural unit B with "a compound X having a reactive group capable of bonding with an amino group, a benzene ring, and at least one group selected from the group consisting of an azide group, an azidosulfonyl group, and a diazomethyl group” (such as azidobenzoic acid, azidosulfonylbenzoic acid, or diazomethylbenzoic acid).
  • the amino group in structural unit B reacts with compound X to form structural unit A.
  • acid catalysts and base catalysts are preferred.
  • acid catalysts include hydrochloric acid, nitric acid, sulfuric acid, hydrofluoric acid, phosphoric acid, acetic acid, trifluoroacetic acid, formic acid, polycarboxylic acids or their anhydrides, and ion exchange resins.
  • base catalysts include triethylamine, tripropylamine, tributylamine, tripentylamine, trihexylamine, triheptylamine, trioctylamine, diethylamine, triethanolamine, diethanolamine, sodium hydroxide, potassium hydroxide, alkoxysilanes having amino groups, and ion exchange resins.
  • the amount of catalyst added is preferably 0.01 to 10 parts by mass per 100 parts by mass of hydrolyzable silane compound.
  • the solution after hydrolysis and condensation does not contain a catalyst, and the catalyst can be removed as necessary.
  • the removal method includes water washing or treatment with an ion exchange resin.
  • Water washing is a method in which the solution is diluted with an appropriate hydrophobic solvent, then washed several times with water, and the resulting organic layer is concentrated using an evaporator.
  • Treatment with an ion exchange resin is a method in which the solution is brought into contact with an appropriate ion exchange resin.
  • compounds having an alcoholic hydroxyl group include acetol, 3-hydroxy-3-methyl-2-butanone, 4-hydroxy-3-methyl-2-butanone, 5-hydroxy-2-pentanone, 4-hydroxy-4-methyl-2-pentanone (diacetone alcohol), ethyl lactate, butyl lactate, propylene glycol monomethyl ether, propylene glycol monoethyl ether, propylene glycol mono-n-propyl ether, propylene glycol mono-n-butyl ether, propylene glycol mono-t-butyl ether, diethylene glycol monomethyl ether, diethylene glycol monoethyl ether, dipropylene glycol monomethyl ether, dipropylene glycol monoethyl ether, 3-methoxy-1-butanol, and 3-methoxy-3-methyl-1-butanol.
  • These compounds having an alcoholic hydroxyl group may be used alone or in combination of two or more.
  • solvents may be used in addition to the compound having an alcoholic hydroxyl group.
  • examples of other solvents include esters such as ethyl acetate, n-propyl acetate, isopropyl acetate, n-butyl acetate, isobutyl acetate, propylene glycol monomethyl ether acetate, 3-methoxy-1-butyl acetate, 3-methyl-3-methoxy-1-butyl acetate, and ethyl acetoacetate; ketones such as methyl isobutyl ketone, diisopropyl ketone, diisobutyl ketone, and acetylacetone; ethers such as diethyl ether, diisopropyl ether, di-n-butyl ether, diphenyl ether, diethylene glycol methyl ethyl ether, and diethylene glycol dimethyl ether; gamma-butyrolactone, gamma-val
  • examples of compound ⁇ 1 and compound ⁇ 2 include compounds represented by the following formulas (15), (16), (17), (18a), (18b), (18c), and (19).
  • Compounds represented by formulas (15), (16), (17), (18a), (18b), and (18c) are specific examples of compound ⁇ 1.
  • Compounds represented by formula (19) are specific examples of compound ⁇ 2.
  • Et represents an ethyl group.
  • this compound is water-soluble except when the value of the ratio 1/(m+n) is close to 0 (for example, less than 0.2 or less than 0.1). That is, from the viewpoint of water solubility, the lower limit of the value of the ratio 1/(m+n) is preferably 0.2, more preferably 0.5, and even more preferably 1. The upper limit of the value of the ratio 1/(m+n) is preferably 5, and more preferably 2.
  • the compound ⁇ includes a compound ⁇ 3 represented by the following formula (5) and a compound ⁇ 4 obtained by hydrolyzing and condensing a hydrolyzable silane compound containing the compound ⁇ 3.
  • the compound ⁇ 3 is a compound represented by the following formula (5).
  • X 21 is a first functional group.
  • X 22 is a first functional group or a group represented by -N(R 21 ) 2.
  • the multiple R 21 are each independently a hydrogen atom, a hydrocarbon group having from 1 to 24 carbon atoms, or a group represented by -R 22 -Si(OR 23 ) 3-p (R 24 ) p .
  • R 22 is a methylene group or an alkylene group having from 2 to 12 carbon atoms.
  • R 23 is a hydrogen atom or an alkyl group having from 1 to 4 carbon atoms.
  • R 24 is an alkyl group having from 1 to 4 carbon atoms.
  • p is an integer of from 0 to 2.
  • at least one of the multiple R 21 in the compound represented by formula (5) is a group represented by -R 22 -Si(OR 23 ) 3-p (R 24 ) p .
  • the first functional group represented by X 21 or X 22 is preferably an amino group, a thiol group, an azide group, an azidosulfonyl group or a diazomethyl group, more preferably an azide group, an azidosulfonyl group or a diazomethyl group, and even more preferably an azide group.
  • compound ⁇ 3 examples include 2,4-diazido-6-(3-triethoxysilylpropyl)amino-1,3,5-triazine (hereinafter referred to as "IMB-P"), 2,4-diazido-6-(4-triethoxysilylbutyl)amino-1,3,5-triazine, 6-(3-triethoxysilylpropyl)amino-1,3,5-triazine-2,4-dithiol, and 2,4-diamino-6-(3-triethoxysilylpropyl)amino-1,3,5-triazine.
  • IMB-P 2,4-diazido-6-(3-triethoxysilylpropyl)amino-1,3,5-triazine
  • the compound ⁇ 4 is a compound obtained by hydrolysis and condensation of a hydrolyzable silane compound including the compound ⁇ 3.
  • the compound ⁇ 4 is a hydrolysis and condensation product similar to the compound ⁇ 2, except that the compound ⁇ 3 is used instead of the compound ⁇ 1.
  • the compound ⁇ can be used alone or in combination of two or more.
  • the bonding material containing compound ⁇ is usually a solution containing compound ⁇ and a solvent.
  • the solvent include alcohols such as methanol, ethanol, isopropanol, ethylene glycol, propylene glycol, cellosolve, carbitol, and 3-methoxy-3-methyl-1-butanol; ketones such as acetone, methyl ethyl ketone, and cyclohexanone; aromatic hydrocarbons such as benzene, toluene, and xylene; aliphatic hydrocarbons such as hexane, octane, decane, dodecane, and octadecane; esters such as ethyl acetate, methyl propionate, and methyl phthalate; ethers such as tetrahydrofuran (THF), ethyl butyl ether, anisole, and propylene
  • the concentration of compound ⁇ in the bonding material (solution containing compound ⁇ ) is preferably 0.05% by mass or more and 5% by mass or less. By setting the concentration of compound ⁇ within this range, it is possible to effectively form a bonding layer 30 containing compound ⁇ of an appropriate thickness, thereby improving the bond (adhesion) between the first insulator 12 and the second insulator 22, and the contact and bonding between the first conductor 13 and the second conductor 23, which are joined within the bonding layer 30 due to thermal expansion.
  • the bonding material may contain other components in addition to compound ⁇ and the solvent.
  • other components include unreacted materials from the synthesis of compound ⁇ , by-reaction products, surfactants, etc.
  • the content of compound ⁇ relative to the total solid content of the bonding material is preferably 50% by mass or more, more preferably 70% by mass or more, and even more preferably 90% by mass or more.
  • the content of compound ⁇ relative to the total solid content of the bonding material may be 100% by mass.
  • Methods for applying the bonding material to the surface of the substrate include conventional coating methods such as inkjet coating, gravure coating, kiss coating, die coating, lip coating, comma coating, blade coating, roll coating, knife coating, spray coating, bar coating, spin coating, dip coating, and mist CVD.
  • dip coating the immersion time is preferably, for example, between 3 and 60 seconds.
  • the bonding layer 30 can exhibit stronger bonding properties by undergoing at least one or a combination of the following processes: heating the bonding layer 30 or its bonding material, applying pressure, irradiating with ultraviolet light, and irradiating with plasma.
  • the bonding layer 30 uses, for example, an oligomer having multiple functional groups, i.e., an oligomer having two types of first and second functional groups, such as the azide group and alkoxyl group described above.
  • an oligomer having multiple functional groups i.e., an oligomer having two types of first and second functional groups, such as the azide group and alkoxyl group described above.
  • the bonding layer 30 is provided between the first insulator 12 and the second insulator 22
  • the two types of first and second functional groups possessed by the oligomer are chemically bonded to the opposing surfaces of the first insulator 12 and the second insulator 22.
  • the first insulator 12 and the second insulator 22 can be bonded by chemical bonding of the first and second functional groups of the oligomer, which has a shorter main chain length than a polymer.
  • the bonding layer 30 for bonding the first insulator 12 and the second insulator 22 can be made thin, on the order of nanometers.
  • the bonding layer 30 can firmly bond the first insulator 12 and the second insulator 22 even when it is thin, on the order of nanometers.
  • the bonding layer 30 provided between the first insulator 12 and the second insulator 22 may contain other components such as a solvent, a curing agent, a viscosity adjuster, etc. in addition to the oligomer having two types of first and second functional groups bonded to the main chain as described above, depending on the specifications of the bonding layer 30, the specifications of the electronic device 1 in which the bonding layer 30 is used, and the specifications of its manufacturing process.
  • the surfaces of the first insulator 12 and the second insulator 22, which are joined via the bonding layer 30, are, for example, both flat surfaces. Note that this "flat surface” includes surfaces with a surface roughness below a certain level. Additionally, at least one of the surfaces of the first insulator 12 and the second insulator 22 may have concave or convex portions (concave or convex portions exceeding a certain surface roughness) partially or entirely.
  • the first insulator 12 and the second insulator 22 are joined via the bonding layer 30. Therefore, the surfaces of the first insulator 12 and the second insulator 22 do not necessarily need to be as highly flat as when they are joined directly.
  • the first insulator 12 and the second insulator 22 can also be joined by the bonding layer 30, which is provided to fill the gap between the surfaces, at least one of which has concave or convex portions. If at least one of the surfaces of the first insulator 12 and the second insulator 22 has a concave or convex portion, the bonding area, i.e., the area in contact with the bonding layer 30, increases, thereby enhancing the bonding strength between the first insulator 12 and the second insulator 22. Furthermore, when obtaining the surface of the first insulator 12 or the surface of the second insulator 22 through a planarization process, it becomes possible to reduce the level of flatness.
  • the recesses or protrusions may be formed unavoidably when the first insulator 12 is formed, or may be formed intentionally by etching after the formation of the first insulator 12 or by depositing a further material, etc.
  • the recesses or protrusions may be formed unavoidably when the second insulator 22 is formed, or may be formed intentionally by etching after the formation of the second insulator 22 or by depositing a further material, etc.
  • FIGS. 2 to 5 are diagrams illustrating an example of a method for manufacturing an electronic device.
  • Figures 2(A) and 2(B), 3(A) to 3(C), 4(A) and 4(B), and 5(A) and 5(B) each show a schematic cross-sectional view of a main part of an example of each step in the manufacturing of an electronic device.
  • the first electronic component 10 includes a first body 11, a first insulator 12, and a first conductor 13.
  • the first body 11 has a predetermined configuration according to the form of the first electronic component 10 (semiconductor chip, semiconductor package, semiconductor wafer, circuit board, etc.).
  • a first insulator 12 made of SiO2 , resin, etc., and a first conductor 13 made of Cu, etc., are provided on the first body 11.
  • the first insulator 12 and the first conductor 13 are provided on one side, a first surface 10a, of the first electronic component 10.
  • the first conductor 13 is provided so as to be exposed from the first insulator 12.
  • the first surface 10a of the first electronic component 10 is a flat surface.
  • this "flat surface” includes surfaces with a certain level of surface roughness or less.
  • the surface 12a of the first insulator 12 and the surface 13a of the first conductor 13 are located within the flat first surface 10a.
  • the flat first surface 10a is formed by a planarization process such as a polishing method such as CMP (Chemical Mechanical Polishing) or etching, or a combination of a polishing method such as CMP and etching.
  • first surface 10a may be treated with a chemical solution or gas depending on the materials of the first insulator 12 and the first conductor 13 to clean the surfaces 12a and 13a, for example, to remove an oxide film (natural oxide film) present on the surface 13a of the first conductor 13.
  • a chemical solution or gas depending on the materials of the first insulator 12 and the first conductor 13 to clean the surfaces 12a and 13a, for example, to remove an oxide film (natural oxide film) present on the surface 13a of the first conductor 13.
  • the second electronic component 20 includes a second body 21, a second insulator 22, and a second conductor 23.
  • the second body 21 has a predetermined configuration according to the form of the second electronic component 20 (e.g., semiconductor chip, semiconductor package, semiconductor wafer, or circuit board).
  • a second insulator 22 made of SiO 2 or resin, and a second conductor 23 made of Cu, are provided on the second body 21.
  • the second insulator 22 and the second conductor 23 are provided on one side of the second surface 20a of the second electronic component 20.
  • the second insulator 22 and the second conductor 23 of the second electronic component 20 are provided at positions corresponding to the first insulator 12 and the first conductor 13 of the first electronic component 10, respectively.
  • the second conductor 23 is provided so as to be exposed from the second insulator 22.
  • the second surface 20a of the second electronic component 20 is a flat surface.
  • this "flat" surface includes a surface with a certain degree of surface roughness.
  • the surface 22a of the second insulator 22 and the surface 23a of the second conductor 23 are located within the flat second surface 20a.
  • the flat second surface 20a is formed by a planarization process such as a polishing method such as CMP, etching, or a combination of a polishing method such as CMP and etching.
  • the second surface 20a may be treated with a chemical solution or gas appropriate to the materials of the second insulator 22 and the second conductor 23 to clean the surfaces 22a and 23a, for example, to remove an oxide film (natural oxide film) present on the surface 23a of the second conductor 23.
  • a chemical solution or gas appropriate to the materials of the second insulator 22 and the second conductor 23 to clean the surfaces 22a and 23a, for example, to remove an oxide film (natural oxide film) present on the surface 23a of the second conductor 23.
  • a bonding material 31 (a bonding material containing the compound ⁇ ) for forming the bonding layer 30 is formed on one of the first electronic components 10 by the steps shown in Figures 3(A) to 3(C).
  • a resist 100 is formed on the surface 13a of the first conductor 13 of the first electronic component 10 using photolithography technology.
  • Various resist compositions can be used for the resist 100.
  • an uncured bonding material 31 is formed on the first surface 10a of the first electronic component 10.
  • liquid bonding material 31 is applied to the first surface 10a using a method such as spraying, dipping, printing, or dripping.
  • the bonding material 31 may be subjected to a heat treatment (pre-baking) at a predetermined temperature and atmosphere, or may be brought into a semi-cured state by the heat treatment.
  • the bonding material 31 is formed so as to cover the first insulator 12 and the resist 100.
  • the thickness of the bonding material 31 is set based on the amount of thermal expansion that occurs in the first conductor 13 and the second conductor 23 when the first conductor 13 and the second conductor 23 come into contact and are bonded due to thermal expansion by the heat treatment described below.
  • a stripping liquid may be used that can remove the oxide film (natural oxide film) present on the surface 13a of the first conductor 13 while removing the resist 100.
  • a stripping liquid may be a stripping liquid such as that described in JP 2004-302271 A.
  • ashing using oxygen plasma or the like may be performed before contact with the stripping liquid, and stripping conditions such as the temperature and contact time of the stripping liquid may be adjusted.
  • the exposed surface 13a of the first conductor 13 may be treated with a specified chemical solution or gas to remove any oxide film present on the surface 13a.
  • the first surface 10a of the first electronic component 10 on which the bonding material 31 has been formed is opposed to the second surface 20a of the second electronic component 20.
  • the first surface 10a and the second surface 20a are opposed so that the first insulator 12 of the first electronic component 10 and the second insulator 22 of the second electronic component 20 face each other, and the first conductor 13 of the first electronic component 10 and the second conductor 23 of the second electronic component 20 face each other.
  • the surface 13a of the first conductor 13 of the first electronic component 10 and the surface 23a of the second conductor 23 of the second electronic component 20 may be activated by ion bombardment with an inert gas.
  • corona treatment or plasma treatment may be performed to remove oxide films and impurities from the surfaces 13a and 23a, resulting in highly active, clean surfaces with high surface energy.
  • Activating the surfaces 13a and 23a makes it easier to achieve solid-state diffusion bonding between the first conductor 13 and the second conductor 23 by heat treatment, as described below, and reduces the resistance between the joined first conductor 13 and second conductor 23.
  • the opposed first electronic component 10 and second electronic component 20 are brought close together, and as shown in FIG. 4(B), the bonding material 31 provided on the surface 12a of the first insulator 12 of the first electronic component 10 comes into contact with the second insulator 22 of the second electronic component 20.
  • heat treatment is performed in a predetermined atmosphere at a temperature ranging from 150°C to 220°C. This heat treatment hardens the bonding material 31, forming a bonding layer 30 that bonds the first insulator 12 and the second insulator 22.
  • this heat treatment thermally expands the first conductor 13 of the first electronic component 10 and the second conductor 23 of the second electronic component 20, bringing them into contact and bonding them within the bonding layer 30.
  • the first conductor 13 and the second conductor 23 may not be able to thermally expand sufficiently, which may make it impossible to achieve contact and solid-state diffusion bonding as described below. Furthermore, if the heat treatment temperature is above 220°C, the thermal expansion of the first conductor 13 and the second conductor 23 may become so great that the gap between the first electronic component 10 and the second electronic component 20 widens, resulting in an increase in the size of the electronic device 1, or the first electronic component 10 and the second electronic component 20 may be thermally damaged, resulting in performance degradation or breakage.
  • Figure 5(A) schematically shows an example of the state of the first electronic component 10 and the second electronic component 20 at part P1 in Figure 4(B) before they are joined.
  • Figure 5(B) schematically shows an example of the state of the first electronic component 10 and the second electronic component 20 at part P1 in Figure 4(B) after they are joined.
  • the first conductor 13 of the first electronic component 10 and the second conductor 23 of the second electronic component 20 thermally expand in a direction in which the first conductor 13 protrudes from the first insulator 12 and the second conductor 23 protrudes from the second insulator 22 due to the heat treatment performed when forming the bonding layer 30 from the bonding material 31.
  • the first conductor 13 and the second conductor 23 thermally expand in directions in which they approach each other.
  • first conductor 13 and the second conductor 23 come into contact, as shown in FIG. 5(B). If heat treatment is continued while the conductors are in this contact state, solid-state diffusion occurs between the contacting first conductor 13 and second conductor 23, and the first conductor 13 and the second conductor 23 are bonded together, i.e., solid-state diffusion bonded. As a result, the first conductor 13 and the second conductor 23 are bonded together and integrated, and electrically connected. The first electronic component 10 and the second electronic component 20 are electrically connected through the bonded and integrated first conductor 13 and second conductor 23.
  • the amount of thermal expansion can be absorbed by deformation (thickness increase, etc.) of the bonding layer 30, thereby maintaining the bond between the first insulator 12 and the second insulator 22.
  • the thickness T1 of the bonding layer 30 is set to a value corresponding to the amounts of thermal expansion t1 and t2 that occur in the first conductor 13 and the second conductor 23, respectively, when the first conductor 13 and the second conductor 23 come into contact and are bonded due to thermal expansion by heat treatment.
  • the thickness of the bonding material 31 provided on the first insulator 12 is set by the process shown in Figures 3(A) to 3(C) above so that a bonding layer 30 of such thickness T1 is obtained when the first insulator 12 and the second insulator 22 are bonded by the bonding layer 30 and when the first conductor 13 and the second conductor 23 are bonded by heat treatment.
  • the first electronic component 10 When joining the first insulator 12 and the second insulator 22 with the bonding layer 30, and when joining the first conductor 13 and the second conductor 23 by thermal expansion, the first electronic component 10 may be pressurized toward the second electronic component 20, or the second electronic component 20 may be pressurized toward the first electronic component 10.
  • This pressurization may improve the adhesion between the bonding layer 30 and the first insulator 12 and the second insulator 22, or the bonding between the first insulator 12 and the second insulator 22 by the bonding layer 30, or may adjust the thickness of the bonding layer 30 interposed between the first insulator 12 and the second insulator 22.
  • the bonding of the first conductor 13 and the second conductor 23 due to thermal expansion may be achieved by performing a separate heat treatment after the heat treatment used to form the bonding layer 30 (hardening the bonding material 31).
  • the conditions for the heat treatment used to form the bonding layer 30 may be the same as or different from the conditions for the heat treatment used to bond the first conductor 13 and the second conductor 23.
  • the heat treatment used to bond the first conductor 13 and the second conductor 23 is performed, for example, in a predetermined atmosphere at a temperature ranging from 150°C to 220°C.
  • the prior formation of the bonding layer 30 does not necessarily have to be performed by heat treatment, and may instead be performed by irradiation with light such as ultraviolet light.
  • the electronic device 1 is manufactured through the steps shown in Figures 2(A) and 2(B), 3(A) to 3(C), 4(A) and 4(B), and 5(A) and 5(B).
  • the first insulator 12 of the first electronic component 10 and the second insulator 22 of the second electronic component 20 are joined using a bonding layer 30 formed from an IMB bonding material 31.
  • the first conductor 13 and the second conductor 23 which thermally expand due to heat treatment, are brought into contact and joined by solid-state diffusion bonding.
  • the first electronic component 10 and the second electronic component 20 are electrically connected via the first conductor 13 and the second conductor 23.
  • the manufacturing method described above realizes an electronic device 1 in which the first electronic component 10 and the second electronic component 20 are simply and satisfactorily joined.
  • a first electronic component 10 having a flat first surface 10a and a second electronic component 20 having a flat second surface 20a are prepared (FIGS. 2(A) and 2(B)), and these are used to bond via a bonding layer 30 (FIGS. 3(A) to 3(C), 4(A) and 4(B), and 5(A) and 5(B)).
  • a bonding layer 30 FIGGS. 3(A) to 3(C), 4(A) and 4(B), and 5(A) and 5(B)
  • at least the surface 12a of the first insulator 12 of the first surface 10a, or at least the surface 22a of the second insulator 22 of the second surface 20a may have a concave or convex portion.
  • first insulator 12 and the second insulator 22 are bonded via the bonding layer 30, their surfaces 12a and 22a do not necessarily need to be highly flat, as in the case of direct bonding.
  • the first insulator 12 and the second insulator 22 may be bonded via a bonding layer 30 that is provided to fill the gap between the surfaces 12a and 22a. If at least one of the surfaces 12a and 22a has a recess or protrusion, the contact area of the bonding layer 30 increases, thereby enhancing the bonding strength between the first insulator 12 and the second insulator 22. Furthermore, when the surface 12a of the first insulator 12 or the surface 22a of the second insulator 22 is obtained by a planarization process, the level of flatness can be reduced.
  • the recessed or protruding portions may be provided on the surface 13a of the first conductor 13 or the surface 23a of the second conductor 23. Even if there are recessed or protruding portions on the surface 13a or surface 23a, contact due to thermal expansion and solid-state diffusion bonding after contact are possible.
  • the first electronic component 10 may have, on the side opposite the first surface 10a (the side opposite the side of the second electronic component 20 to which it is joined), an insulator and conductor similar to the first insulator 12 and first conductor 13 on the first surface 10a.
  • the insulator and conductor on the opposite side of the first electronic component 10 may be further joined and electrically connected to another electronic component according to the example above.
  • the second electronic component 20 may have, on the side opposite the second surface 20a (the side opposite the side of the first electronic component 10 to which it is joined), an insulator and conductor similar to the second insulator 22 and second conductor 23 on the second surface 20a.
  • the insulator and conductor on the opposite side of the second electronic component 20 may be further joined and electrically connected to another electronic component according to the example above.
  • Figure 6 is a diagram illustrating an example of a conventional method for manufacturing electronic devices.
  • Figure 6(A) shows a schematic cross-sectional view of a key portion of an example of a group of electronic components in a conventional method.
  • Figures 6(B) and 6(C) show schematic examples of the state of electronic components before and after bonding, respectively, in a conventional method.
  • Electronic component 210 has a configuration in which conductor 213 having surface 213a is provided at a position recessed from surface 212a of insulator 212.
  • Electronic component 220 similarly has a configuration in which conductor 223 having surface 223a is provided at a position recessed from surface 222a of insulator 222.
  • electronic components 210 and 220 having such a configuration are formed using a polishing method such as CMP, utilizing the dishing of conductors 213 and 223 that occurs during this process.
  • a polishing method such as CMP
  • dishing can result in variations between the amount of recession s1 of surface 213a of conductor 213 relative to surface 212a of insulator 212 and the amount of recession s2 of surface 223a of conductor 223 relative to surface 222a of insulator 222.
  • the insulators 212 and 222 are directly bonded together.
  • the insulators 212 and 222 are directly bonded together by plasma activation (dangling bond formation), water rinsing (cleaning), room temperature pressure welding, and condensation (siloxane condensation formation).
  • recess amount s2 exceeds the amount of thermal expansion due to the heat treatment, it is possible that conductors 213 and 223 will not come into contact and will not be joined, as shown in FIG. 6(C).
  • the manufacturing method for the electronic device 1 shown in Figures 2 to 5 does not require dishing or other methods to recess the first conductor 13 of the first electronic component 10 and the second conductor 23 of the second electronic component 20 below the first insulator 12 and second insulator 22, respectively.
  • the first insulator 12 of the first electronic component 10 and the second insulator 22 of the second electronic component 20 are not directly bonded, but are bonded using a bonding layer 30 formed from an IMB bonding material 31. Then, within the bonding layer 30, the first conductor 13 and second conductor 23, which thermally expand due to heat treatment, are brought into contact and bonded by solid-state diffusion bonding.
  • the manufacturing method for the electronic device 1 does not require dishing the first conductor 13 and the second conductor 23 to a predetermined recess amount, or processing for directly bonding the first insulator 12 and the second insulator 22.
  • the manufacturing method for the electronic device 1 makes it possible to easily and satisfactorily bond the first electronic component 10 and the second electronic component 20.
  • 7A to 7D are diagrams illustrating examples of the configuration of an electronic device, each of which schematically shows a cross-sectional view of a main part of the example of the configuration of an electronic device.
  • the first electronic component 10 and the second electronic component 20 of the electronic device 1 may each be a semiconductor chip, a semiconductor package, a semiconductor wafer, a circuit board, or the like.
  • 7A shows an example of the electronic device 1.
  • the electronic device 1A includes a semiconductor device 10A and a semiconductor device 20A.
  • the semiconductor device 10A is a semiconductor chip or a semiconductor package, and is an example of the first electronic component 10.
  • the semiconductor device 20A is a semiconductor chip or a semiconductor package, and is an example of the second electronic component 20.
  • the insulator 12A and conductor 13A provided on the body 11A of the semiconductor device 10A face the insulator 22A and conductor 23A provided on the body 21A of the semiconductor device 20A.
  • the insulator 12A and the insulator 22A are joined by a bonding layer 30A, and the conductor 13A and the conductor 23A are directly joined within the bonding layer 30A.
  • the semiconductor devices 10A and 20A are electrically connected through the conductor 13A and the conductor 23A.
  • an electronic device 1B as shown in FIG. 7(B) is realized.
  • This electronic device 1B has a configuration using semiconductor devices 10B, 20B, and 40B.
  • Electronic device 1B is an example of a three-dimensional stacked device.
  • Semiconductor device 10B is a semiconductor chip or a semiconductor package.
  • Semiconductor device 20B is a semiconductor chip or a semiconductor package.
  • Semiconductor device 40B is a semiconductor chip or a semiconductor package, or a circuit board such as an interposer.
  • Semiconductor device 10B and semiconductor device 40B are examples of the first electronic component 10 and second electronic component 20, respectively.
  • semiconductor device 40B and semiconductor device 20B are examples of the first electronic component 10 and second electronic component 20, respectively.
  • the insulator 12Ba and the insulator 42Ba are joined by a bonding layer 30Ba, and the conductor 13Ba and the conductor 43B are directly joined within the bonding layer 30Ba.
  • the insulator 42Bb and the insulator 22B are joined by a bonding layer 30Bb, and the conductor 43B and the conductor 23B are directly joined within the bonding layer 30Bb.
  • Semiconductor device 10B, semiconductor device 40B, and semiconductor device 20B are electrically connected through conductor 13Ba, conductor 43B, and conductor 23B.
  • the semiconductor device 10B may have an insulator 12Bb and a conductor 13Bb provided on the other side of the main body 11B.
  • These insulators 12Bb and conductors 13Bb may further be joined to electronic components such as other semiconductor devices or circuit boards, following the example above, and electrically connected via the conductors 13Bb.
  • an electronic device 1C as shown in FIG. 7(C) is realized.
  • This electronic device 1C has a configuration using a substrate 10C and a semiconductor device 20C.
  • the substrate 10C is a semiconductor wafer or circuit board, and is an example of the first electronic component 10.
  • the semiconductor device 20C is a semiconductor chip or semiconductor package, and is an example of the second electronic component 20.
  • the insulator 12C and conductor 13C provided on the main body 11C of the substrate 10C face the insulator 22C and conductor 23C provided on the main body 21C of the semiconductor device 20C.
  • the insulator 12C and the insulator 22C are bonded by a bonding layer 30C, and the conductor 13C and the conductor 23C are directly bonded within the bonding layer 30C.
  • the substrate 10C and the semiconductor device 20C are electrically connected through the conductor 13C and the conductor 23C.
  • electronic device 1D as shown in FIG. 7(D) is realized.
  • This electronic device 1D has a configuration using substrate 10D and substrate 20D.
  • Substrate 10D is a semiconductor wafer or a circuit board, and is an example of the first electronic component 10.
  • Substrate 20D is a semiconductor wafer or a circuit board, and is an example of the second electronic component 20.
  • the insulators 12D and 22D are joined by a bonding layer 30D, and the conductors 13D and 23D are directly joined within the bonding layer 30D.
  • the substrates 10D and 20D are electrically connected via the conductors 13D and 23D.
  • first electronic component 10 and second electronic component 20 can be used for electronic device 1 such as that shown in Figure 1 above.
  • the manufacturing method shown in Figures 2 to 5 above can be applied to joining first electronic component 10 and second electronic component 20 of various types.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)

Abstract

L'invention concerne un dispositif électronique dans lequel un groupe de composants électroniques est lié de manière simple et satisfaisante.　Un premier composant électronique (10) ayant un premier isolant (12) et un premier conducteur (13) sur un côté de première surface (10a), ainsi qu'un second composant électronique (20) ayant un second isolant (22) et un second conducteur (23) sur un côté de seconde surface (20a), sont préparés. Une couche de liaison (30) composée d'un composé organique est disposée sur le premier isolant (12), et la première surface (10a) et la seconde surface (20a) sont amenées à se faire face, la couche de liaison (30) étant interposée entre celles-ci de telle sorte que le premier isolant (12) et le second isolant (22) se font face et que le premier conducteur (13) et le second conducteur (23) se font face. Un traitement thermique est effectué, le premier isolant (12) et le second isolant (22) sont liés par la couche de liaison (30), et le premier conducteur (13) et le second conducteur (23) sont mis en contact et liés à l'intérieur de la couche de liaison (30) par dilatation thermique. On obtient ainsi un dispositif électronique (1) dans lequel le premier composant électronique (10) et le second composant électronique (20) sont liés.
PCT/JP2025/009535 2024-03-29 2025-03-13 Procédé de fabrication de dispositif électronique et dispositif électronique Pending WO2025204961A1 (fr)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004302271A (ja) * 2003-03-31 2004-10-28 Nippon Zeon Co Ltd レジスト用剥離液及び剥離方法
JP2011200933A (ja) * 2010-03-26 2011-10-13 Panasonic Electric Works Co Ltd 接合方法
JP2018195656A (ja) * 2017-05-16 2018-12-06 ソニーセミコンダクタソリューションズ株式会社 半導体装置の製造方法及び半導体装置
WO2024029390A1 (fr) * 2022-08-01 2024-02-08 三井化学株式会社 Procédé de production de stratifié de substrat et dispositif à semi-conducteur

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004302271A (ja) * 2003-03-31 2004-10-28 Nippon Zeon Co Ltd レジスト用剥離液及び剥離方法
JP2011200933A (ja) * 2010-03-26 2011-10-13 Panasonic Electric Works Co Ltd 接合方法
JP2018195656A (ja) * 2017-05-16 2018-12-06 ソニーセミコンダクタソリューションズ株式会社 半導体装置の製造方法及び半導体装置
WO2024029390A1 (fr) * 2022-08-01 2024-02-08 三井化学株式会社 Procédé de production de stratifié de substrat et dispositif à semi-conducteur

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