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WO2025202477A1 - Composant optoélectronique, et procédé de production d'un composant optoélectronique - Google Patents

Composant optoélectronique, et procédé de production d'un composant optoélectronique

Info

Publication number
WO2025202477A1
WO2025202477A1 PCT/EP2025/058598 EP2025058598W WO2025202477A1 WO 2025202477 A1 WO2025202477 A1 WO 2025202477A1 EP 2025058598 W EP2025058598 W EP 2025058598W WO 2025202477 A1 WO2025202477 A1 WO 2025202477A1
Authority
WO
WIPO (PCT)
Prior art keywords
optoelectronic
substrates
semiconductor chips
arrangements
optoelectronic semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/EP2025/058598
Other languages
German (de)
English (en)
Inventor
Gunnar Petersen
Daniel Richter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram International GmbH
Original Assignee
Ams Osram International GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ams Osram International GmbH filed Critical Ams Osram International GmbH
Publication of WO2025202477A1 publication Critical patent/WO2025202477A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00
    • H01L25/0753—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes

Definitions

  • ADB modules with discrete chip packages are known.
  • the chip packages must be arranged very close to one another during the production of an ADB headlight, since the design of a CSP always results in a certain distance between the luminous surfaces, which is usually larger than typical distances between surface-mounted chips (SMTs).
  • SMTs surface-mounted chips
  • An optoelectronic component comprises at least one module with a plurality of optoelectronic arrangements.
  • Each optoelectronic arrangement comprises a substrate having a top side and a bottom side opposite the top side, and an optoelectronic semiconductor chip arranged on the top side of the substrate and configured to emit electromagnetic radiation at an emission surface facing away from the top side.
  • the optoelectronic arrangements are arranged laterally adjacent to one another and mechanically connected to one another by means of at least one connecting element.
  • the optoelectronic component is based on the idea of providing a module comprising a plurality of optoelectronic arrangements, which can also be referred to as image points or pixels.
  • the optoelectronic component advantageously addresses the problem of placement accuracy of the individual pixels, as prefabricated modules can be used to construct larger arrays in which the pixels are already arranged at small intervals from one another. Since the use of modules eliminates the need to arrange the individual pixels at close intervals, manufacturing costs can also be saved.
  • An optoelectronic component with multiple modules can, for example, be designed as an ADB headlight. In this case, the modules can also be referred to as ADB modules.
  • the optoelectronic components can first be arranged on a temporary carrier and then mechanically and electrically connected to the first leadframe sections.
  • the temporary carrier can then be removed.
  • the first leadframe sections are embedded in a molding material arranged on the upper sides of the substrates and are exposed on a side facing away from the upper sides of the substrates.
  • the molding material extends between the optoelectronic arrangements and mechanically connects them to one another.
  • a module can be electrically contacted at the exposed surfaces of the first leadframe sections.
  • the first leadframe sections can also be referred to as leadframe strips.
  • the molding material advantageously offers protection against short circuits.
  • the first leadframe sections do not necessarily have to be embedded in the molding material.
  • the substrates each have a first upper and a second upper contact surface on their upper sides and a first lower and a second lower contact surface on their lower sides.
  • the first upper contact surfaces are each electrically connected to the first lower contact surfaces and the second upper contact surfaces are each electrically connected to the second lower contact surfaces.
  • the further substrate is formed by a lead frame substrate.
  • the lead frame substrate has a further molding material arranged on the lower sides of the substrates, a plurality of second lead frame sections and a third lead frame section.
  • the second lead frame sections and the third lead frame section are exposed on a side facing the lower sides of the substrates and the third lead frame section is exposed on a side facing away from the lower sides of the substrates.
  • the optoelectronic semiconductor chips are arranged in the region above the third lead frame section. First lower and second lower contact surfaces of immediately adjacent optoelectronic arrangements are mechanically and electrically connected to one another by means of the second lead frame sections.
  • the second leadframe sections can form contact surfaces for the module facing the undersides of the substrates.
  • the optoelectronic semiconductor chips can be electrically connected to one another via the common third leadframe section.
  • the third leadframe section forms a continuous thermal path for all optoelectronic semiconductor chips of the Module, whereby heat dissipation during operation of the optoelectronic semiconductor chips is significantly improved compared to separate thermal sinks.
  • the optoelectronic arrangements are arranged on the second and third leadframe sections, which are embedded in the further molding material, and are mechanically and electrically connected to them.
  • the connecting element or the further substrate in this case comprises the second and third leadframe sections and the further molding material. In one embodiment, however, the further molding material can also be omitted.
  • a contact pad is arranged on each of the emission surfaces of the optoelectronic semiconductor chips.
  • the contact pads are each connected to a second upper contact surface by means of a bonding wire.
  • the contact pad can also be referred to as an upper contact pad.
  • the optoelectronic semiconductor chips can have a lower contact pad on their mounting surfaces facing away from the emission surfaces.
  • the lower contact pad is arranged on the first upper contact surface.
  • a solder material is arranged between the first upper contact surface and the lower contact pad and mechanically and electrically connects the optoelectronic semiconductor chips to the first upper contact surfaces.
  • the bonding wires are each connected to one another on the top sides of the substrates and partly on the emitters. ons surfaces of the optoelectronic semiconductor chips arranged encapsulation embedded.
  • the optoelectronic arrangements are embedded in an additional encapsulation.
  • the emission surfaces of the optoelectronic semiconductor chips or surfaces facing away from the emission surfaces of a wavelength-converting material arranged on the emission surfaces are each exposed. This advantageously protects the entire optoelectronic arrangement mechanically and against dust and moisture. If lower contact surfaces are provided that are electrically connected to the upper contact surfaces, the lower contact surfaces are exposed and are not covered by the additional encapsulation.
  • the optoelectronic semiconductor chips each have mounting surfaces opposite their emission surfaces and side facets each extending between the mounting surfaces and the emission surfaces.
  • the substrates each have side surfaces extending between their undersides and their top sides.
  • the optoelectronic semiconductor chips are arranged on the top sides of the substrates in such a way that three side facets of the optoelectronic semiconductor chips are flush with three side surfaces of the substrates or protrude beyond the side surfaces of the substrates. Alternatively, only two side faces can be cettes be flush with the side surfaces or protrude beyond the side surfaces.
  • the optoelectronic component comprises a plurality of modules, each comprising a plurality of at least mechanically interconnected optoelectronic arrangements according to one of the described embodiments.
  • the modules are arranged laterally adjacent to one another on a carrier.
  • the carrier can be designed, for example, as a printed circuit board (PCB).
  • the carrier can comprise a ceramic material.
  • Fig. 3 optoelectronic arrangements according to a third embodiment in a plan view and a side sectional view
  • Fig. 4 optoelectronic arrangements according to a fourth embodiment in a plan view
  • Fig. 6 an optoelectronic component according to a second embodiment in a top view, a bottom view and a side sectional view;
  • Fig. 9 an optoelectronic component according to a fifth embodiment in a plan view and a side sectional view;
  • Fig. 10 an optoelectronic component according to a sixth embodiment in a plan view, a side sectional view and a side view;
  • Fig . 11 a further optoelectronic component according to a in a plan view .
  • Fig. 1 schematically shows an optoelectronic arrangement 1 according to a first exemplary embodiment in a plan view and in a side sectional view along a sectional plane shown in the plan view.
  • the substrate 2 is designed as a ceramic substrate, comprising, for example, aluminum nitride (AIN), with electrical feedthroughs 11.
  • the electrical feedthroughs 11 extend from the underside 4 to the top side 3 of the substrate 2 and electrically connect the first upper and the first lower contact surface 5, 8 and the second upper and the second lower contact surface 6, 9 to one another.
  • the feedthroughs 11 and the contact surfaces 5, 6, 8, 9 comprise at least one metallic material.
  • the contact surfaces 5, 6, 8, 9 can comprise copper.
  • the contact surfaces 5, 6, 8, 9 can have a gold coating, for example.
  • the substrate 2 is designed as a lead frame which, for example, comprises copper and optionally has a gold coating to prevent oxidation.
  • upper and lower contact surfaces 5, 6, 8, 9 which are electrically connected to one another are formed by a common section of the lead frame.
  • the first upper and the first lower contact surface 5, 8 are formed by a common section of the lead frame which extends from the underside 4 to the top side 3.
  • no electrical feedthroughs 11 are required since the substrate 2 itself is electrically conductive and the contact surfaces 5, 6, 8, 9 are formed by surfaces of the lead frame.
  • An optoelectronic semiconductor chip 12 is arranged on the first upper contact surface 5 and is electrically connected to the first contact surface 5.
  • the optoelectronic semiconductor chip 12 is designed to emit electromagnetic radiation.
  • the optoelectronic semiconductor chip 12 can be designed, for example, as a light-emitting diode (LED).
  • the optoelectronic semiconductor chip 12 can be designed as a laser diode.
  • a solder material can be arranged between the first upper contact surface 5 and the optoelectronic semiconductor chip 12, as a result of which the optoelectronic semiconductor chip 12 is integrally connected to the first upper contact surface 5, i.e., is fixed to it and electrically connected to it.
  • the first upper contact surface 5 protrudes beneath the optoelectronic semiconductor chip 12.
  • the optoelectronic semiconductor chip 12 does not cover the entire first upper contact surface 5.
  • a portion of the first upper contact surface 5 not covered by the optoelectronic semiconductor chip 12 is arranged laterally next to the second upper contact surface 6.
  • both the first upper and the second upper contact surfaces 5, 6 are exposed and can be electrically contacted.
  • the lower contact surfaces 8, 9 and the feedthroughs 11 can also be omitted.
  • a wavelength-converting material 14 is arranged on an emission surface 13 of the optoelectronic semiconductor chip 12 facing away from the upper side 3 of the substrate 2.
  • the wavelength-converting material 14 comprises a phosphor, which, for example, It is embedded in a plastic, such as silicone.
  • the phosphor is designed to absorb electromagnetic radiation emitted by the optoelectronic semiconductor chip 12 during operation and to emit electromagnetic radiation of a longer wavelength. Overall, this results in the emission of electromagnetic radiation that corresponds to a superposition of the emission spectrum of the optoelectronic semiconductor chip and the emission spectrum of the phosphor, whereby, for example, white light can be generated.
  • the efficiency of the conversion depends on the concentration of the phosphor and the thickness of the wavelength-converting material 14 relative to the emission surface 13 of the optoelectronic semiconductor chip 12.
  • the wavelength-converting material 14 can, for example, have a thickness that is greater than the thickness of the optoelectronic semiconductor chip 12.
  • different thicknesses of the wavelength-converting material 14 are possible.
  • the wavelength-converting material 14 can also be omitted.
  • an electrical contact pad 15 is arranged on the emission surface 13 of the optoelectronic semiconductor chip 12.
  • the contact pad 15 is connected to the second upper contact surface 6 by means of a bonding wire 16.
  • the bonding wire 16 can comprise gold, for example.
  • the bonding wire 16 is embedded in an encapsulation 17.
  • the encapsulation 17 comprises a dielectric material, for example silicone, silicon dioxide, titanium dioxide or aluminum oxide. The encapsulation 17 can therefore be either soft or hard.
  • the encapsulation 17 is arranged partly on the upper side 3 of the substrate 2 and partly on the emission surface 13 of the optoelectronic semiconductor chip 12. As a result, the optoelectronic semiconductor chip 12 is at least partially embedded in the encapsulation 17.
  • the optoelectronic semiconductor chip 12 has a rectangular cross-section parallel to the substrate 2.
  • the optoelectronic semiconductor chip 12 has side facets 18 which extend perpendicular to the emission surface 13 and perpendicular to the top side 3 of the substrate 2.
  • the optoelectronic semiconductor chip 12 is arranged on the top side 3 of the substrate 2 in such a way that three side facets 18 of the optoelectronic semiconductor chip 12 are flush with a respective side surface 19 of the substrate 2.
  • a lateral distance between the optoelectronic semiconductor chip 12 and the side surfaces 19 in three directions parallel to the substrate 2 is zero except for error tolerances.
  • the three side surfaces 18 are not exactly flush with the substrate edge 19.
  • three side facets 18 can protrude beyond the side surfaces 19.
  • the optoelectronic semiconductor chip 12 Since the optoelectronic semiconductor chip 12, the first upper contact surfaces 5 and the second upper contact surfaces 6 of the optoelectronic arrangement 1 are arranged laterally next to one another and three side surfaces 18 of the optoelectronic semiconductor chip 12 are formed flush with the side surfaces 19, a non-luminous surface of the optoelectronic arrangement 1 is essentially formed by a total surface of the Section of the first upper contact surface 5 which is not covered by the optoelectronic semiconductor chip 12, the second upper contact surfaces 5, 6 and a surface formed between the first and the second upper contact surfaces 5, 6. This non-luminous surface is formed between a further side facet 18 of the optoelectronic semiconductor chip 12, which is not flush with a further side surface 19 of the substrate 2, and the further side surface 19.
  • This surface/this region shall be referred to as the non-luminous edge 20 of an optoelectronic arrangement 1.
  • the substrates 2 each have a side surface 19 facing away from the optoelectronic semiconductor chips.
  • the non-luminous edge 20 is formed between the optoelectronic semiconductor chip 12 and the side surface 19 facing away from the optoelectronic semiconductor chip 12.
  • Fig. 2 schematically shows an optoelectronic arrangement 1 according to a second embodiment in a side sectional view and a top view.
  • the optoelectronic arrangement 1 of Fig. 2 has similarities to the optoelectronic arrangement 1 of Fig. 1. In the following, only differences from the optoelectronic arrangement 1 of Fig. 1 are explained. The reference numerals are retained for similar or identical elements.
  • the wavelength-converting material 14 is, for example, thicker than the wavelength-converting material 14 of Fig. 1, in particular, it is, for example, thicker than the optoelectronic semiconductor chip 12. This can improve conversion efficiency.
  • the first upper and the second upper contact surface 5, 6 are completely embedded in the encapsulation 17.
  • the encapsulation 17 extends over the entire non-luminous edge 20 of the optoelectronic arrangement 1.
  • the wavelength-converting material 14 adjoins a region extending from the upper side 3 of the substrate 2 facing away from the housing 17 , which is not absolutely necessary but has the advantage of a planar upper side of the optoelectronic arrangement 1 , on which , for example , fewer dust particles can accumulate .
  • Fig. 3a schematically shows an optoelectronic arrangement 1 according to a third embodiment in a side sectional view and a top view.
  • the optoelectronic arrangement 1 of Fig. 3a has similarities to the optoelectronic arrangement 1 of Fig. 2. In the following, only differences from the optoelectronic arrangement 1 of Fig. 2 are explained. The reference numerals are retained for similar or identical elements.
  • the optoelectronic arrangement 1 according to Fig. 3a in contrast to the embodiment of Fig. 2, has a temporary encapsulation 21 in addition to the permanent encapsulation 17.
  • the temporary encapsulation 21 has two separate sections which are arranged on the first upper contact surface 5 and on the second upper contact surface 6 and extend from the first and second upper contact surfaces 5, 6, each perpendicular to the upper side 3 of the substrate 2, through the encapsulation 17.
  • the temporary encapsulation 21 is removable.
  • the temporary encapsulation 21 can be dissolved or etched, while the encapsulation 17 remains. The removal of the temporary encapsulation 21 enables electrical contact to be made between the first and second upper contact surfaces 5, 6.
  • Fig. 3b schematically shows an optoelectronic arrangement 1 according to a third embodiment in a side sectional view and a top view.
  • the optoelectronic arrangement 1 of Fig. 3b has similarities to the optoelectronic arrangement 1 of Fig. 3a. In the following, only differences from the optoelectronic arrangement 1 of Fig. 3a are explained. The reference numerals are retained for similar or identical elements.
  • the removal of the temporary encapsulation 21 enables the electrical contacting of the first and second upper contact surfaces 5, 6.
  • the optoelectronic arrangement 1 of Fig. 3b therefore comprises additional contacts 39 which are arranged in cavities of the encapsulation 17 which remain after the removal of the temporary encapsulation 21.
  • the additional contacts 39 can, for example, comprise silicon, copper or aluminum.
  • the additional contacts 39 are exposed on a surface of the encapsulation 17 facing away from the upper side 3 of the substrate 2 in order to enable electrical contacting.
  • the first and second contact surfaces 5, 6 are completely embedded in the encapsulation 17 since they do not have to be contacted in the region of the upper side 3 of the substrate 2, but rather at the exposed additional contacts 39.
  • the lower contact surfaces 8, 9 and thus also the electrical feedthroughs 11 can be omitted.
  • Fig. 3c schematically shows an optoelectronic arrangement 1 according to a third embodiment in a side sectional view and a top view.
  • the optoelectronic arrangement 1 of Fig. 3c has similarities to the optoelectronic arrangement 1 of Fig. 3b. In the following, only differences from the optoelectronic arrangement 1 of Fig. 3b are explained. The reference numerals are retained for similar or identical elements.
  • the optoelectronic arrangement 1 of Fig. 3c has no lower contact surfaces 8, 9 and no electrical feedthroughs 11. Instead, a connecting layer 43 is arranged on the underside 4, which can be electrically conductive or insulating.
  • the connecting layer 43 can, for example, comprise a metal.
  • the connecting layer 43 can also be designed as an adhesive.
  • the optoelectronic arrangement 1 of Fig. 3c can be arranged on a further substrate. The material of the connecting layer 43 can depending on the connection method to the other substrate.
  • Fig. 4 schematically shows an optoelectronic arrangement 1 according to a second embodiment in a top view.
  • the optoelectronic arrangement 1 of Fig. 4 has similarities to the optoelectronic arrangement 1 of Fig. 1. In the following, only differences from the optoelectronic arrangement 1 of Fig. 1 are explained. The reference numerals are retained for similar or identical elements.
  • the module has, for example, four optoelectronic arrangements 1 according to Fig. 1. Fewer than four or more than four optoelectronic arrangements 1 may be provided, for example twenty-four.
  • the optoelectronic arrangements 1 are arranged laterally next to one another and are mechanically and electrically connected to one another by means of first lead frame sections 23.
  • first and second upper contact surfaces 5, 6 of immediately adjacent optoelectronic arrangements 1 are mechanically and electrically connected to one another by means of the first lead frame sections 23.
  • the first lead frame sections 23 have, for example, copper and a gold coating, but they can also have a different metallic material or an alloy. The coating can also have a different material or can be omitted.
  • the first leadframe sections 23 are embedded in a molding material 24.
  • the molding material 24 is arranged on the upper sides 3 of the substrates 2, extends between the optoelectronic arrangements 1 and additionally connects them to one another in a mechanical manner.
  • the molding material 24 is arranged in the region of the non-luminous edge 20 and outside the encapsulation 17 on the upper side 3 of the substrate 2. Accordingly, the first leadframe sections 23 are also arranged in the region of the non-luminous edge 20 and outside the encapsulation 17.
  • the first leadframe sections 23 are embedded in the molding material 24 such that they are exposed on a side of the module facing away from the upper sides 3 of the substrates 2. As a result, the module can be contacted in the region of the exposed first leadframe sections 23, for example by means of a bonding wire.
  • the molding material 24 can, for example, comprise an epoxy or another plastic.
  • the molding material 24 can also be omitted.
  • Fig. 6 schematically shows an optoelectronic component 22 according to a further embodiment in a top view, a bottom view and a side sectional view, wherein the top view and the sectional view are shown on the left side and the bottom view on the right side.
  • the sectional view runs along a cutting plane drawn in the top view.
  • the optoelectronic component 22 of Fig. 6 has similarities to the optoelectronic component 22 of Fig. 5. Only differences from the optoelectronic component of Fig. 3 are explained below. The reference numerals are retained for similar or identical elements.
  • first and second upper contact surfaces 5, 6, but first and second lower contact surfaces 8, 9 of immediately adjacent optoelectronic arrangements 1 are mechanically and electrically connected to one another by means of second leadframe sections 25 arranged on the undersides 4 of the substrates 2.
  • the first leadframe sections 23 are omitted in this case.
  • the molding material 24 is also omitted.
  • the encapsulation 17 extends according to Fig. 2 completely over the non-luminous edge 20, i.e. the second and third upper contact surfaces are embedded in the encapsulation 17 or are covered by it.
  • the optoelectronic component 22 according to Fig. 6 therefore has optoelectronic arrangements 1 according to Fig. 2.
  • first lower contact surfaces 8 of the optoelectronic arrangements 1 are connected to one another by means of a third lead frame section 26.
  • All optoelectronic semiconductor chips 12 are arranged in the region above the third lead frame section 26, i.e. the third lead frame section 26 is provided for all optoelectronic semiconductor chips 12 and is arranged on the undersides 4 of the substrates 2 in regions of the first lower contact surfaces 8, wherein the third lead frame section 26 extends between the first lower contact surfaces 8 or between the optoelectronic semiconductor chips 12, i.e. between the optoelectronic arrangements 1.
  • the second and the third leadframe sections 25, 26 are embedded in a further molding material 27 arranged on the undersides 4 of the substrates 2 and are located on a side facing the undersides 4 of the substrates 2, respectively free, i.e. that the second leadframe sections 25 and the third leadframe section 26 in the region of the undersides 4 of the substrates 2 are not covered by the further molding material 27, so that electrical and mechanical contact with the first and second lower contact surfaces 8, 9 is enabled.
  • the further molding material 27 can, for example, comprise an epoxy or another plastic.
  • the third leadframe section 26 is also exposed on a side facing away from the undersides 4 of the substrates 2, as a result of which heat can be dissipated during operation of the optoelectronic semiconductor chips 12.
  • the second leadframe sections 25, on the other hand, are not exposed on the side facing away from the undersides 4 of the substrates 2 and are embedded in the further molding material 27 or are covered by the further molding material 27. Since the second leadframe sections 25 are exposed on the side of the further molding material 27 facing the undersides 4, they can be used for electrical contacting on the top side, for example by means of bonding wires.
  • the second leadframe sections 25 are also located on the side of the further molding material facing away from the undersides 4 of the substrates 2. than 27. This allows the second leadframe sections 25 to be used for electrically contacting the underside of the module, wherein the contacting can again be effected, for example, by means of bonding wires.
  • Fig. 8 schematically shows an optoelectronic component 22 according to a further embodiment in a plan view. Previously used reference numerals are retained.
  • a plurality of optoelectronic arrangements 1 according to Fig. 3b or 3c are arranged next to one another on a further substrate 42.
  • the further substrate 42 can comprise aluminum or copper, for example.
  • the optoelectronic arrangements 1 are arranged on the further substrate 42 such that the undersides 4 of the substrates 2 face the further substrate 42.
  • the lower contact surfaces 8, 9 are not required in this case and can be omitted.
  • the optoelectronic arrangements 1 can be fixed to the further substrate 42, for example, by means of an adhesive.
  • the optoelectronic arrangements 1 are each arranged laterally next to one another with the undersides 4 of the substrates 2 on a further substrate 42, which forms a connecting element.
  • the further substrate 42 comprises, for example, a metallic material.
  • the further substrate 42 is formed by a ceramic substrate.
  • the further substrate 42 is formed by a leadframe substrate.
  • the leadframe substrate has the further molding material 27, the second leadframe sections 25 embedded in the further molding material 27, and the third leadframe section 26 embedded in the further molding material 27.
  • the further substrate 42 is a metal core circuit board is formed.
  • the lead frame substrate is omitted.
  • the metal core circuit board comprises a metallic material and conductor tracks insulated from the metallic material.
  • the conductor tracks are arranged on a surface of the metal core circuit board.
  • the optoelectronic assemblies 1 are arranged with the undersides 4 of the substrates 2 on the conductor tracks.
  • the metal core board has first conductor tracks.
  • the metal core board has a second conductor track.
  • First and second lower contact surfaces 8, 9 of immediately adjacent optoelectronic assemblies 1 are each electrically connected to one another by means of the first conductor tracks. In this case, the mechanical connection of the optoelectronic assemblies 1 is mediated by the metal core board on which the optoelectronic assemblies 1 are arranged.
  • first lower contact surfaces 8 of the optoelectronic arrangements 1 are connected to one another by means of the second conductor track, i.e., the second conductor track of the metal-core circuit board is provided for all optoelectronic semiconductor chips 12 and is arranged on the undersides 4 of the substrates 2 in regions of the first lower contact surfaces 8, wherein the second conductor track extends between the first lower contact surfaces 8 of the optoelectronic semiconductor chips 12 of the optoelectronic arrangements 1.
  • Such conductor tracks can be provided not only in a metal-core circuit board, but also in other further substrates 42, for example, in the ceramic substrate.
  • the further substrate 42 is formed by a lead frame.
  • the further molding material 27 is omitted.
  • the lead frame has the second lead frame sections 25 and the third lead frame section 26.
  • the lead frame sections 25, 26 are not embedded in the further molding material 27.
  • Fig. 9 schematically shows an optoelectronic component 22 according to a further embodiment in a top view and a side sectional view.
  • the optoelectronic component 22 of Fig. 9 comprises the elements of the optoelectronic component 22 of Fig. 5 and additional elements. Only the additional elements are described below. The reference numerals are retained for similar or identical elements.
  • the optoelectronic component 22 has an integrated circuit 28 which is arranged in the region above the first lead frame sections 23 with respect to the substrates 2.
  • the integrated circuit 28 is therefore arranged on the upper sides 3 of the substrates 2 and outside the encapsulation 17 in the region of the non-luminous edge 20.
  • the integrated circuit 28 can also be referred to as a logic layer which can have different functionalities.
  • the integrated circuit 28 can be designed as a driver.
  • the integrated circuit 28 can have a bus system, for example.
  • the integrated circuit 28 can also comprise other functions.
  • a first rewiring layer 29 is arranged between the first leadframe sections 23 and the integrated circuit 28 and is electrically contacted with the first leadframe sections 23 and the integrated circuit 28.
  • a second rewiring layer 30 is arranged on a side of the integrated circuit 28 facing away from the first rewiring layer 29 and is electrically contacted with the integrated circuit 28.
  • a contact layer 31 is arranged on a side of the second rewiring layer 30 facing away from the integrated circuit 28.
  • the contact layer 31 has further leadframe sections 32, which are embedded in an additional molding material 33, which comprises, for example, an epoxy. and are exposed both on a side of the contact layer 31 facing the second rewiring layer 30 and on a side of the contact layer 31 facing away from the second rewiring layer 30.
  • the further leadframe sections 32 are electrically contacted with the second rewiring layer 30, as a result of which the integrated circuit 28 can be contacted via the further leadframe sections 32 exposed on the side of the contact layer 31 facing away from the second rewiring layer 30.
  • the contact layer 31 can be referred to as an upper contact layer, while the first leadframe sections 23 embedded in the mold material 24 and the mold material 24 can be referred to as a lower contact layer.
  • Fig. 10 schematically shows an optoelectronic component 22 according to a further embodiment in a plan view, a side sectional view and a side view, the plan view and the sectional view being shown on the left side and the side view on the right side.
  • the optoelectronic component 22 of Fig. 10 has similarities to the optoelectronic component 22 of Fig. 9. In the following, only differences from the optoelectronic component of Fig. 9 are explained. The reference numerals are retained for similar or identical elements.
  • the additional encapsulation 34 may comprise, for example, silicone, silicon dioxide, titanium dioxide, or aluminum oxide. In this case, the encapsulation 17 may be omitted. However, both the encapsulation 17 and the additional encapsulation 34 may be provided.
  • Fig. 11 schematically shows a further optoelectronic component 38 in a plan view.
  • the previously used reference numerals are retained.
  • the further optoelectronic component 38 of Fig. 11 has a plurality of modules, each having a plurality of optoelectronic arrangements 1 that are at least mechanically connected to one another.
  • the modules can be designed according to one of Figs. 5 to 10, while the optoelectronic arrangements 1 can be designed according to one of Figs. 1 to 4.
  • the modules are arranged laterally next to one another on a carrier 35.
  • Fig. 11 shows, by way of example, that a total of four modules, each with twenty-four optoelectronic arrangements 1, are arranged next to one another in rows.
  • the further optoelectronic component 38 can have any desired number of modules, wherein the modules can each have any desired number of optoelectronic arrangements 1.
  • the further optoelectronic component 38 according to Fig. 11 can alternatively have twenty-four modules, each with four optoelectronic arrangements 1.
  • the modules can be embedded in an additional encapsulation 35 arranged on the carrier 34, although this is not absolutely necessary.
  • the modules and the additional encapsulation 35 are arranged centrally on the carrier 35.
  • a contact region 37 with a plurality of further contact pads for electrically contacting the modules is arranged in an edge region of the carrier 35.
  • Two opposing contact regions 37 are formed purely as an example.
  • the modules can be connected in series with one another, as a result of which the optoelectronic arrangements 1 are also connected in series.
  • the further optoelectronic component 38 according to Fig. 11 can be designed, for example, as an ADB headlight.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Led Device Packages (AREA)

Abstract

L'invention concerne un composant optoélectronique (22) comprenant au moins un module comprenant une pluralité d'ensembles optoélectroniques (1). Chaque ensemble optoélectronique (1) comprend un substrat (2) ayant une face supérieure (3) et une face inférieure (4) en regard de la face supérieure (3), et une puce semi-conductrice optoélectronique (12) qui est située sur la face supérieure (3) du substrat (2) et est conçue pour émettre un rayonnement électromagnétique sur une surface d'émission (13) qui fait face à l'opposé de la face supérieure (3). Les ensembles optoélectroniques (1) sont disposés latéralement les uns à côté des autres et sont interconnectés mécaniquement au moyen d'au moins un élément de connexion (23, 24, 25, 26, 27, 42).
PCT/EP2025/058598 2024-03-28 2025-03-28 Composant optoélectronique, et procédé de production d'un composant optoélectronique Pending WO2025202477A1 (fr)

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DE102024108981.4A DE102024108981A1 (de) 2024-03-28 2024-03-28 Optoelektronisches bauelement und verfahren zum herstellen eines optoelektronischen bauelements

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DE102024108981A1 (de) 2024-03-28 2025-10-02 Ams-Osram International Gmbh Optoelektronisches bauelement und verfahren zum herstellen eines optoelektronischen bauelements

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2354630A2 (fr) * 2010-02-08 2011-08-10 Kabushiki Kaisha Toshiba Module DEL
DE102019104325A1 (de) * 2019-02-20 2020-08-20 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronisches Halbleiterbauteil und Herstellungsverfahren für optoelektronische Halbleiterbauteile
DE102021117414A1 (de) * 2021-07-06 2023-01-12 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronisches halbleiterbauteil und herstellungsverfarhen
DE102024108981A1 (de) 2024-03-28 2025-10-02 Ams-Osram International Gmbh Optoelektronisches bauelement und verfahren zum herstellen eines optoelektronischen bauelements

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013204291A1 (de) * 2013-03-12 2014-10-02 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement
WO2021002158A1 (fr) * 2019-07-04 2021-01-07 日亜化学工業株式会社 Procédé de fabrication de dispositif électroluminescent et procédé de fabrication de module électroluminescent, et dispositif électroluminescent et module électroluminescent

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2354630A2 (fr) * 2010-02-08 2011-08-10 Kabushiki Kaisha Toshiba Module DEL
DE102019104325A1 (de) * 2019-02-20 2020-08-20 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronisches Halbleiterbauteil und Herstellungsverfahren für optoelektronische Halbleiterbauteile
DE102021117414A1 (de) * 2021-07-06 2023-01-12 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronisches halbleiterbauteil und herstellungsverfarhen
DE102024108981A1 (de) 2024-03-28 2025-10-02 Ams-Osram International Gmbh Optoelektronisches bauelement und verfahren zum herstellen eines optoelektronischen bauelements

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