WO2025201656A1

WO2025201656A1 - Optical see-through display

Info

Publication number: WO2025201656A1
Application number: PCT/EP2024/058600
Authority: WO
Inventors: Alexander Hunt; Katja SZYBEK
Original assignee: Telefonaktiebolaget LM Ericsson AB
Current assignee: Telefonaktiebolaget LM Ericsson AB
Priority date: 2024-03-28
Filing date: 2024-03-28
Publication date: 2025-10-02
Anticipated expiration: 2026-09-28

Abstract

An optical see-through display device includes a main display (100), a dimming display (110), a frame buffer (210), a main display driver, a comparator (260), and a dimming display driver The main display (100) has pixels controllable to display images overlaid on the real world when viewed by a user through the main display (100). The dimming display (110) is rigidly connected to the main display (100) and arranged on an opposite side of the main display (100) from the user when viewing the displayed images overlaid on the real-world. The frame buffer (210) stores pixel values of an image frame. The main display driver converts the pixel values into signals driving pixels of the main display (100). The comparator (260) compares the pixel values to at least one threshold value to generate comparator output values. The dimming display driver converts the comparator output values into signals driving pixels of the dimming display (110) to control light transmissivity.

Description

OPTICAL SEE-THROUGH DISPLAY

TECHNICAL FIELD

[0001] The present disclosure relates to optical see-through display devices which can be used for augmented reality and other applications.

BACKGROUND

[0002] A display device has a collection of components that work together to create images on a display panel. The main components of a display device are a display microprocessor, a display driver integrated circuit (IC), and the display panel.

[0003] The display microprocessor is responsible for sending pixel data to the display driver IC (display driver). The pixel data is the information that determines what color each pixel on the display panel should be. The display microprocessor receives the pixel data in an image (e.g., picture or video) communicated by a source computer or other device for display on the display panel. Pixel data may be received from different sources and combined to form one image with, e.g., three color channels (RGB). The combined pixel data is then sent to the display driver. Optionally, the display microprocessor may compress the image and send it to the display driver, which then operates to decompress the image before controlling the pixels of the display.

[0004] The display driver is responsible for sending the pixel data to the display panel. The display driver converts the pixel data from the display microprocessor from a digital representation into an analog signal that is used to drive pixels of the display panel (e.g., Liquid Crystal Display (LCD) panels can be voltage-driven, whereas Organic Light-Emitting Diode (OLED) panels can be current-driven). The display driver also controls the timing of the refresh cycle, which is the time it takes for the display panel to update the displayed image. The display driver can include its own memory which stores pixel data for part of an image (frame) or an entire image (frame).

[0005] The display panel is the physical device which displays the image for viewing by a user. The display panel is made up of a grid of pixels, each of which may emit light of a different color. The display panel receives the analog signal from the display driver and uses it to drive the intensity of the light emitted by each pixel.

[0006] In a simplified overview of the process, a computer or other device sends image data for an image (e.g., photo or video) to the display microprocessor. The display microprocessor collects the image data, e.g., from multiple application instances in the computer/device, which is combined into pixel data for an image that is to be displayed on the display panel. The display driver converts the pixel data into an analog signal that is sent to the display panel. The display panel uses the analog signal to control the intensity of the light emitted by each pixel. A user can thereby see the image displayed by the display panel. [0007] This is a simplified overview of the process, and the specific details of how a display device works can vary depending on the type of display panel. For example, LCD and OLED displays work in different ways.

[0008] LCD includes a backlight (usually LEDs) to illuminate a display panel. The backlight is always on while the display panel is in use. The display panel includes one or more layers of liquid crystals, sandwiched between polarizing filters, that do not emit light by themselves but which can be biased to align at differing angles relative to the polarizing filters responsive to the signal from the display driver. In contrast, OLED includes organic materials that emit light responsive to electric current of the signal from the display driver. Each pixel in the OLED produces its own light and so there is no need for a backlight.

[0009] An optical see-through (OST) display device is a central component of an Augmented Reality (AR) system which displays virtual images as an overlay on what the user sees in the real-world through the OST display device. AR can be experienced through various devices such as smartphones, tablets, and AR headsets. AR headsets can provide a high sense of immersion and thus have been receiving the greatest commercial attention. An AR headset includes an OST head mounted display (HMD) that can use a combination of a micro display and free-space or waveguide combiners.

[0010] Because AR systems display virtual images as an overlay on what the user sees in the real-world, combiner optics used in AR are limited in their ability to show black virtual images or draw shadows or darken the real world in an attempt to provide high image contrast. Instead, AR systems try to display sufficiently bright virtual images relative to the real-world in order to be visible to users in various lighting environments, including bright outdoor environments.

[0011] Achieving sufficient display brightness while maintaining power efficiency and avoiding overheating is a technical challenge.

[0012] Various dimming technologies have been proposed to attempt to improve image contrast. However, existing dimming technologies are stand alone and need to be controlled through separate microprocessor s) from a main display, which necessitates use of additional hardware components, additional computational capabilities, and additional power consumption, which causes other design and operational issues. SUMMARY

[0013] Some embodiments of the present disclosure are directed to a see-through display device that includes a main display, a dimming display, a frame buffer, a main display driver, a comparator, and a dimming display driver. The main display has pixels controllable to display images overlaid on the real world when viewed by a user through the main display. The dimming display is rigidly connected to the main display and arranged on an opposite side of the main display from the user when viewing the displayed images overlaid on the real-world. The frame buffer is operative to store pixel values of an image frame. The main display driver is operative to convert the pixel values into signals driving pixels of the main display. The comparator is operative to compare the pixel values to at least one threshold value to generate comparator output values. The dimming display driver is operative to convert the comparator output values into signals driving pixels of the dimming display to control light transmissivity.

[0014] Numerous potential advantages are provided by these and other embodiments disclosed herein. For example, because the dimming display and the main display use the same pixel frames provided from the frame buffer, there is no need to have a complicated dimming device driver for the dimming display. No microprocessor is needed to run the dimming display, and instead relatively low complexity digital logic circuitry can be used which results in a less complex design and power savings.

[0015] Other optical see-through display devices and corresponding methods according to embodiments will be or become apparent to one with skill in the art upon review of the following drawings and detailed description. It is intended that all such additional embodiments be included within this description and protected by the accompanying claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Aspects of the present disclosure are illustrated by way of example and are not limited by the accompanying drawings. In the drawings:

[0017] Figure 1 illustrates a dimming display arranged and connected to a main display to control light transmissivity from the real-world that reaches pixels of the main display, according to some embodiments of the present disclosure;

[0018] Figure 2 illustrates components of an optical see-through display device configured to operate according to some embodiments of the present disclosure; [0019] Figure 3 illustrates a plurality of pixels of the dimming display that are driven to overlap and provide dimming of real-world light reaching pixels of the main display according to some embodiments of the present disclosure;

[0020] Figure 4 is a block diagram illustrating pixel value and signal flow between components of an optical see-through display device according to some embodiments of the present disclosure;

[0021] Figure 5 illustrates another configuration of the dimming display with 16 pixels providing dimming for ten pixels of the main display according to some embodiments of the present disclosure;

[0022] Figure 6 illustrates a flowchart of logical operations to generate the comparator output values for conversion to signals that drive pixels of the main display according to some embodiments of the present disclosure; and

[0023] Figure 7 is a block diagram illustrating the flow of pixel values from the frame buffer through the comparator to registers for clocking out for conversion to signals that drive pixels of the main display according to some embodiments of the present disclosure.

DETAILED DESCRIPTION

[0024] Inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which examples of embodiments of inventive concepts are shown. Inventive concepts may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of various present inventive concepts to those skilled in the art. It should also be noted that these embodiments are not mutually exclusive. Components from one embodiment may be tacitly assumed to be present or used in another embodiment.

[0025] Example embodiments of the present disclosure are directed to an optical see- through display device, such as the example display devices shown Figures 1 to 4.

[0026] Figure 1 illustrates a dimming display 110 arranged and connected to a main display 100 to control light transmissivity from the real -world that reaches pixels of the main display 100. Figure 2 illustrates components of the optical see-through display device 200. Figure 3 illustrates a plurality of pixels of the dimming display 110 that are driven to overlap and provide dimming of real -world light reaching pixels of the main display 100. Figure 4 is a block diagram illustrating pixel value and signal flow between components of the optical see-through display device 200. [0027] Referring initially to Figures 1 and 2, the optical see-through display device 200 includes the main display 100 and the dimming display 110. The main display 100 has pixels that are controllable to display images overlaid on the real world 101, as virtual content, when viewed by a user through the main display 100. The main display 100 thereby operates as a combiner element so that the user's view of the real world 101 is combined (augmented) with the light from images displayed on the main display 100.

[0028] A power management unit 240 can operate to supply needed voltages and currents to the components of the display device 200.

[0029] The dimming display 110 is rigidly connected to the main display 100 and arranged on an opposite side of the main display 100 from the user when viewing the displayed images overlaid on the real -world 101. A frame buffer 210 is operative to store pixel values of an image frame. The frame buffer 210 may be a portion of random-access memory (RAM) or other memory that provides pixel values to the main display driver 220 without storage in another buffer or other memory. The pixel values may correspond to a bitmap of a video frame, and may represent a monochrome or color picture, e.g., red (R), green (G), blue (B). The main display driver 220 is operative to convert the pixel values into signals driving pixels of the main display 100. A comparator 260 is operative to compare the pixel values to at least one threshold value to generate comparator output values. A dimming display driver 222 is operative to convert the comparator output values into signals driving pixels of the dimming display (110) to control light transmissivity. Pixels of the dimming display 110 thereby adjust how much light from the real world 101 is allowed to pass through to corresponding (e.g., adjacent aligned) pixels of the main display 100 and, in turn, therethrough to the user. The pixels of the dimming display 110 can thereby operate to selectively increase the contrast of the virtual content viewed by a user on the main display 100.

[0030] The see-through display device 200 can be configured as a headset, such as an augmented reality headset, which is configured to be worn by the user. For example, the main display 100 and the dimming display 110 can be rigidly connected to the headset. The dimming display 110 is arranged on an opposite side of the main display 100 from the user when wearing the headset.

[0031] Circuitry is operative to provide pixel values from the frame buffer 210 to the main display driver 220 and to the comparator 260. In some embodiments, the circuitry operates to provide pixel values from the frame buffer 210 in parallel to the main display driver 220 and to the comparator 260. The circuitry may be part of the main display controller 220, the comparator 260, and/or separate therefrom. For example, an applicationspecific integrated circuit (ASIC) may be configured to read one or more pixel values from the frame buffer 210 at a rate of a clock signal (CLK) from a clock circuit 230, and provide the read pixel value(s) simultaneously to the main display driver 220 and to the comparator 260. Providing a pixel value from the frame buffer 210 simultaneously to both the main display driver 220 and to the comparator 260 can reduce power consumption of the device 200, since each read and write operation consumes power, and can reduce hardware configuration and operational complexity of the device 200.

[0032] As shown in the example of Figure 4, the clock circuit 230 outputs a first clock signal with a first frequency, which is divided by a clock divider 232 (which may be part of the clock circuit 230) to output a second clock signal with a second frequency which is less than the first frequency. The main display driver 220 updates pixels of the main display 100 at the first frequency of the first clock signal. The dimming display driver 222 updates pixels of the dimming display 110 at the second frequency of the second clock signal.

[0033] In some embodiments, the clock divider 232 is configured to divide the first frequency of the first clock signal by a ratio of a resolution of the main display 100 to the dimming display 110. Normally there is no need to separately dim each color of the main display 100 and thus the dimming display 110 can have a second frequency of the second clock signal that is one-third the first frequency of the first clock signal so that each dimming display 110 pixel covers the RGB in the main display 100. The dimming display 110 may have less resolution, such where one pixel corresponds to (e.g., adjacent and aligned with) four pixels on the main display 100, which can result in the clock divider 232 being configured to divide the first frequency of the first clock signal by 12 to generate the second frequency of the second clock signal.

[0034] The comparator 260 operates, when one of the pixel values of the image frame exceeds a threshold value, to generate a comparator output value that is converted by the dimming display driver 222 into a signal that drivers at least one pixel of the dimming display 110 to be substantially transmissive. The comparator 260 further operates, when one of the pixel values of the image frame does not exceed the threshold value, to generate a comparator output value that is converted by the dimming display driver 222 into a signal that drivers at least one pixel of the dimming display 110 to be substantially opaque.

[0035] The comparator 260 can be relatively simple comparator circuitry, such as digital circuitry that is not part of a microprocessor executing instructions sequentially read from a memory. The comparator 260 may, for example, include one or more operational amplifiers that are configured to compare a pixel value (e.g., converted to a voltage by a digital to analog circuit) to a threshold value (e.g., voltage).

[0036] The comparator 260 can be configured to cause for a same pixel value, different levels of dimming (different levels of light transmissivity) for pixels of the dimming display 110 corresponding to a defined central area of the image frame versus pixels of the dimming display 110 corresponding to a defined peripheral area outside of the defined central area of the image frame. For example, greater dimming can be provided in the central area of the image frame which is typically more centrally located in the user's eye focus than is provided in the peripheral area of the image frame which is typically more peripherally outside the user's eye focus.

[0037] Differing levels of dimming in different areas can be provided through the comparator 260 using different threshold values for comparison in the different areas. In some embodiments, the comparator 260 is operative to compare a first threshold value to the pixel values that correspond to a defined central area of the image frame, and to compare a second threshold value, which is different than the first threshold value, to the pixel values that correspond to a defined peripheral area outside of the defined central area of the image frame. In a further embodiment, the first threshold value when exceeded by a particular pixel value controls the comparator 260 to cause through the dimming display driver 222 greater decrease in light transmissivity through the pixels of the dimming display 110 relative to when the second threshold value is exceeded by the particular pixel value.

[0038] For example, light transmissivity (opaqueness) of some pixels of the dimming display 110 may be set to 0% (by operation of the comparator 260) if the brightness of the corresponding pixels of the main display 100 is below a first threshold. Similarly, light transmissivity (opaqueness) of those pixels of the dimming display 110 may be set to 50% if the brightness of the corresponding pixels of the main display 100 is above the first threshold but below a second threshold. Further, light transmissivity (opaqueness) of those pixels of the dimming display 110 may be set to 100% if the brightness of the corresponding pixels of the main display 100 is above the second threshold.

[0039] In some other embodiments, instead of decreasing light transmissivity (increasing opaqueness) of some pixels of the dimming display 110 responsive to increasing brightness of the main display 100 pixels, the light transmissivity (opaqueness) of those pixels of the dimming display 110 may be set (by operation of the comparator 260) to 0% if the brightness of the corresponding pixels of the main display 100 is below a first threshold (e.g., nothing is displayed by those pixels of the main display 100), to 100% if the brightness of those pixels of the main display 100 is above the first threshold but below a second threshold (e.g., content is displayed with low brightness by those pixels of the main display 100), and to 50% if the brightness of those pixels of the main display 100 is above the second threshold (content is displayed with high brightness by those pixels of the main display 100).

[0040] Optionally, a light sensor 250 may provide input to the comparator 260 which adjusts, e.g., biases, the amount of dimming provided by the comparator 260. For example, the threshold value(s) used by the comparator 260 may be adjusted responsive to output of the light sensor 250 and/or operation of the comparator 260 may otherwise be adjusted. In one embodiment, the level of light transmissivity (opaqueness) of all pixels of the dimming display 110 can be adjusted based on the amount of light from the real -world sensed by the light sensor 250.

[0041] Some further embodiments are directed to configuring the comparator 260 and dimming display driver 222 to provide an amount overlap by pixels of the dimming display 110 to pixels of the main display 100. In the example illustration of Figure 3, the pixel count (resolution) of the dimming display 110 is 1/3 of the pixel count of the main display 100. For example, each pixel of the dimming display 110 has a size and is adjacent and aligned to dim three pixels of the main display 100 which collectively provide the three primary colors (RGB). The first frequency of the first clock signal output by the clock circuit 230 to operate the main display 100 is divided (via the clock divider 232) by 3 to provide the second frequency of the second clock signal provided to operate the dimming display 110. This results in one pixel of the dimming display 110 being updated by the dimming display driver 222 after every third pixel of the main display 100 which is overlapped by that pixel of the dimming display 110.

[0042] The comparator 260 compares the RGB pixel values to a threshold value stored in a register. In some embodiments, three RGB pixel values (one pixel value for R, another for G, and another for B) each are between 0 and 255, which are compared individually or combined (e.g., summed) to the threshold value. For comparison, one of the three RGB pixel values, the sum of the three RGB pixel values, the average or mean of the three RGB pixel values, or the max of the three RGB pixel values, may be compared by the comparator 260 to the threshold value. In one embodiment, if one of the RGB pixel values is above 0, i.e., content information will be displayed on the main display 100, the comparator 260 drives the dimming display 110 pixel through the dimming display driver 222 to block light from the real -world from reaching those RGB pixels of the main display 100. In another embodiment, threshold value is set to a value in which lower RGB pixel values low displaying lower intensity content on the main display 100 does not cause the comparator 260 to drive the dimming display 110 pixel to block light from the real -world from reaching those RGB pixels of the main display 100. It is noted that RGB pixels are mentioned as one non-limiting example. Other color or non-color pixel combinations may be used. For example, AMOLED displays may use a matrix of red, green, and blue subpixels in which there can be twice as many green pixels as red and blue. Other color combinations of subpixels can include, without limitation: cyan, magenta, yellow, and black; red, green blue, and white; etc. Subpixels may be arranged in any pattern.

[0043] Figure 3 also illustrates that a plurality of dimming display 110 pixels can be controlled to provide extra overlap adjacent to individual RGB pixels of the main display 100. Such overlap can avoid creation of optical phenomena at the edge of the displayed graphics for the virtual content. Providing overlap can reduce or prevent real- world light mixing and creating unwanted optical effects to the virtual image output by the main display 100 pixels. Another benefit of being able to add extra overlap pixels is that if there is a gap between the main display 100 and dimming display 110 there can be relative angles where pixels of the dimming display 110 would not otherwise dim the light from the real -world incident toward pixels of the main display 100.

[0044] In the illustrated example, five dimming display 110 pixels are driven by the dimming display driver 222 responsive to the comparator 260 comparing to the threshold value one or more of the RGB values for the single group of RGB pixels of the main display 100. The number of extra dimming display 110 pixels that are driven to provide overlap to single group of RGB pixels of the main display 100, can vary depending upon location on the main display 100 (e.g., where on the main display 100 the virtual content is displayed). For example, in the illustrated example, no extra dimming display 110 pixels are operated in the central region of the main display 100, and five extra display 110 pixels are operated in the peripheral region of the main display 100.

[0045] Figure 5 illustrates another configuration of the dimming display with 16 pixels providing dimming for 10 pixels of the main display which are displaying graphics of virtual content. The dimming display is driven to use the six extra pixels around sides of the pixels of the main display to provide overlap that can reduce or prevent real-world light mixing and creating unwanted optical effects to the graphics displayed by the main display, and can reduce or prevent light bypassing the dimming display pixels and passing through the main display pixels if there is a gap between the main display 100 and dimming display 110. [0046] For each extra pixel that the circuits are to use to extend beyond an edge pixel of the main display pixel, the dimming display 110 may need to lag in time a clock cycle compared to the main display 100. For example, if the circuits begin writing (driving) content in pixel position 0,0 on the main display 100 and are to provide overlap of three pixels on the dimming display 110, then the circuits should be configured to let the main display 100 write pixel position 1, 2, and 3, before the dimming display 110 starts writing to pixels. The circuits add in total six pixels to the dimming display 110 per group of active pixels on the main display 100. The delay could be created by operation of the main display 100 as well, but because the main display 100 likely has more pixels, it can be cheaper and less complex to include circuitry for creating the delay in components associated with the dimming display 110 side. The approach according to some embodiments is directed to providing overlap of pixels in the horizontal direction, which can use registers or other electronics to store values for the number of pixels that are to be overlapped. In the example in Figure 5, registers (e.g., sample and hold registers) can be used to store values used to drive three pixels at a defined bit-depth before and after the main display 100 graphics, which results in use of a number of registers capable of storing values used to drive six pixels at the defined bit-depth.

[0047] Some further embodiments are directed to providing extra (overlap) vertical dimming using registers that store a pixel value for one pixel extra in the vertical direction also store pixel values for one row before starting the dimming display and registers that keep pixel values for one extra row after the main display ceases to display graphics at that position.

[0048] Figure 7 illustrates a circuit element configuration in which a sequence of pixel values of an image frame from the frame buffer 210 is compared by the comparator 260 to a threshold value, and distributed through a pair of multiplexers 710 (Mux end and Mux start) to one or more registers 720 which, in turn, which output values through a digital-to-analog converter (DAC) 730 as signals that drive a corresponding sequence of pixels of the dimming display 110. The registers 720 are illustrated as being sample and hold registers, but can be any type of value storing register.

[0049] More particularly, with reference to Figure 7, a start-group of registers 720 (the lower four registers connected to receive output of Mux start) are connected daisy chained in a sequence and operative to sequentially transfer values from a first one of the registers 720 in the sequence through any intervening ones of the registers 720 in the sequence to a last one of the registers 720 in the sequence. The daisy chained stepwise movement of values can be triggered by cycles of a clock signal. A distribution circuit 710 is operative to distribute to the registers 720 in the start-group a sequence of the comparator output values generated by the comparator 260 from the pixel values of the image frame. When a current comparator output value in the sequence is above a threshold value and an immediately prior comparator output value in the sequence is below the threshold value (as determined by the comparator 260), the distribution circuit 710 distributes the current comparator output value to each of the registers 720 in the start-group. While further ones of the comparator output values in the sequence remain above the threshold value, the distribution circuit 710 distributes the further ones of the comparator output values to the first one of the registers 720 in the start-group. The last one of the registers 720 in the start-group outputs a value to the DAC 730 for conversion to an analog signal that is used to drive pixels of the dimming display 110 that correspond (aligned to overlap) to the sequence of pixel values of the image frame being read from the frame buffer 210.

[0050] In a further embodiment, the circuit element configuration further includes an end- group of registers 720 (the upper four registers connected to receive output of Mux end) that are connected daisy chained in a sequence and operative to sequentially transfer values from a first one of the end-group of registers 720 in the sequence through any intervening ones of the end-group of registers 720 in the sequence to a last one of the end-group of registers 720 in the sequence. When a current comparator output value in the sequence is below the threshold value and an immediately prior comparator output value in the sequence is above the threshold value, the distribution circuit 710 distributes the current comparator output value to each of the end-group of registers 720. While further ones of the comparator output values in the sequence remain below the threshold value, the distribution circuit 710 distributes the further ones of the comparator output values to the first one of the registers 720 in the end-group.

[0051] In one embodiment, the number of the registers 720 in the start-group and the number of the registers 720 in the end-group are equal to the number of pixels of the dimming display 110 that have light transmissivity controlled by the comparator 260 based on a pixel value mapped to an individual one of the pixels of the main display 100 to provide overlap between the number of pixels of the dimming display 110 and a pixel of the main display 100.

[0052] As explained in earlier embodiments, the comparator 260 may compare a pixel value to a single threshold value to generate a comparator output value, or may compare a pixel value to a plurality of threshold values to generate a comparator output value based on which of the threshold values are exceeded. Moreover, the one or more threshold values that are used by the comparator 260 may be changed or adapted based on where the pixel value corresponds to within the image frame, e.g., in a centra region or a peripheral region. The threshold value(s) may be stored in a register or obtained from a look-up table (LUT). For example, pixels of the dimming display 110 can be switched between 0 and 100% opaqueness, or between two values in between 0 and 100%, e.g., between 20% and 80% (if pixels of the dimming display 110 can be controlled to have an intermediate opaqueness, i.e., other than fully transparent and blocking). If more than one threshold is used, which may include using more than one comparator, pixels of the dimming display 110 can be controlled to acquire different opaqueness values.

[0053] As will be explain further below, the circuitry can control a plurality of dimming display 110 pixels relative to each pixel of the main display 100. In one embodiment, the dimming display driver 222 is operative to convert individual ones of comparator output values into signals driving a group of pixels of the dimming display 110 to control light transmissivity. The number of dimming display 110 pixels controlled for each main display 100 pixel value is based on whether the pixel is in a central area or a peripheral area of the main display 100. In one embodiment, the dimming display driver 222 is operative to convert individual ones of the comparator output values generated by the comparator 260, from pixel values that correspond to a defined central area of the image frame, into signals driving a first group of pixels of the dimming display 110 to control light transmissivity. The dimming display driver 222 is further operative to convert individual ones of the comparator output values generated by the comparator 260, from pixel values that correspond to defined peripheral area outside of the defined central area of the image frame, into signals driving a second group of pixels of the dimming display 110 to control light transmissivity.

[0054] In some embodiments, the first group of pixels of the dimming display 110 is greater than the second group of pixels of the dimming display 110.

[0055] As will be explained in further detail below, logical circuits can set flags that control if the comparator output value will frow through Mux start, Mux end or directly to the DAC 730 for conversion to a signal to drive a pixel of the dimming display 110.

[0056] Figure 6 illustrates a flowchart of logical operations that can are performed by logic circuits which can reside in the comparator 260 and other digital circuitry to generate the comparator output values and to distribute the comparator output values through the multiplexers to the registers 720 for sequential stepwise clocking to the DAC 730 for conversion. [0057] Referring to Figures 6 and 7, an amount of overlap is setup 600 to be provided by pixels of the dimming display 110 to pixels of the main display 100, and which defines a number of registers which are daisy chained in Figure 7. The one or more threshold values to be used by the comparator 260 are setup 602 in one or more registers and/or in a look-up table (LUT) accessible to provide the threshold value(s) to the comparator 260.

[0058] A sequence of the main display pixel values starts or continues 604 to be read (obtained) from the frame buffer 210 for an image frame and provided to the main display driver 220 for driving pixels of the main display (MD) 100.

[0059] When a MD pixel value in the sequence is determined 606 to not exceed a threshold value, and is further determined 608 to be the first MD pixel value that equals 0 (i.e., a MD pixel is not driven to display content) then the registers 720 are filled 610 with a dimming level value (output by the comparator 260) based on the immediately prior (last) MD pixel value, and the logical flow then waits 612 for the next MD pixel value to be read from the frame buffer 210.

[0060] When the decision 608 was instead that the first MD pixel value does not equal 0 (i.e., a MD pixel is driven to display content), a zero dimming level value is set 620 and sent 622 through the multiplexers 710 to the first registers 720 in the daisy chained sequences.

[0061] When the decision 606 was that the MD pixel value did not exceed the threshold, and the first MD pixel value is determined 614 to be greater than zero (i.e., a MD pixel is driven to display content) then the registers 720 are filled 616 with a dimming level value (output by the comparator 260) based on the first MD pixel value, and the logical flow then waits 612 for the next MD pixel value to be read from the frame buffer 210.

[0062] When the first MD pixel value is determined 614 to not be greater than zero (i.e., a MD pixel is not driven to display content), the logic sets 618 the dimming level value (output by the comparator 260) based on the MD pixel value and the dimming level is sent 622 through the multiplexers 710 to the first registers 720 in the daisy chained sequences.

[0063] The oldest (last) register 720 in the daisy chain sequences is sent 624 to the DAC 730 for conversion 626 to an analog signal to drive pixel of the dimming display (DD) 110.

[0064] Numerous potential advantages are provided by these and other embodiments disclosed herein. For example, because the dimming display 110 and the main display 100 work as one system, there is no need to have a complicated dimming device driver for the dimming display 110 because it is controlled by the pixel value content of the main display 100. The number of dimming display pixels overlapping or underlapping pixel of the main display can be configured based on user and/or manufacturer preferences, and can set dynamically responsive defined condition(s) or by the developer in hardware or software depending on design choices.

[0065] No microprocessor is needed to run the dimming display 110, and instead relatively low complexity digital logic circuitry can be used which results in power savings and cost savings, e.g., using XNOR gates or other digital logical gates or combinations thereof. Very little extra hardware circuitry is used to run the dimming display 110 compared to a stand-alone implementation. No need for extra memory storage (using the same graphical pixel values) for the dimming display 110, except for temporarily buffering (in registers) the additional pixel values and that can be re-used per line of pixel values in the image frame. So, a 3-pixel overlap of dimming display pixels to a main display pixel can be provided using 6-pixels of extra register memory in total. Depending on design choice this register memory may be from 1 bit deep to the bit depth as a single color bit depth of the main display 100.

[0066] The dimming display 110 and the main display 100 can be driven based on the same pixel clock, with a clock divider being used to obtain the correct clock for the dimming display 110 when the main display 100 is driven by, e.g., RGB pixel values. One dimming display pixel can be used to control light transmissivity to the group of RGB sub-pixels of the main display 100.

[0067]

[0068] Further Definitions and Embodiments:

[0069] In the above-description of various embodiments of present inventive concepts, it is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of present inventive concepts. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which present inventive concepts belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense expressly so defined herein.

[0070] When an element is referred to as being “connected”, “coupled”, “responsive”, or variants thereof to another element, it can be directly connected, coupled, or responsive to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected”, “directly coupled”, “directly responsive”, or variants thereof to another element, there are no intervening elements present. Like numbers refer to like elements throughout. Furthermore, “coupled”, “connected”, “responsive”, or variants thereof as used herein may include wirelessly coupled, connected, or responsive. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Well-known functions or constructions may not be described in detail for brevity and/or clarity. The term “and/or” includes any and all combinations of one or more of the associated listed items.

[0071] It will be understood that although the terms first, second, third, etc. may be used herein to describe various elements/operations, these elements/operations should not be limited by these terms. These terms are only used to distinguish one element/operation from another element/operation. Thus, a first element/operation in some embodiments could be termed a second element/operation in other embodiments without departing from the teachings of present inventive concepts. The same reference numerals or the same reference designators denote the same or similar elements throughout the specification.

[0072] As used herein, the terms “comprise”, “comprising”, “comprises”, “include”, “including”, “includes”, “have”, “has”, “having”, or variants thereof are open-ended, and include one or more stated features, integers, elements, steps, components or functions but does not preclude the presence or addition of one or more other features, integers, elements, steps, components, functions or groups thereof. Furthermore, as used herein, the common abbreviation “e.g ”, which derives from the Latin phrase “exempli gratia,” may be used to introduce or specify a general example or examples of a previously mentioned item, and is not intended to be limiting of such item. The common abbreviation “i.e.”, which derives from the Latin phrase "id est," may be used to specify a particular item from a more general recitation.

[0073] Example embodiments are described herein with reference to block diagrams and/or flowchart illustrations of computer-implemented methods, apparatus (systems and/or devices) and/or computer program products. It is understood that a block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by computer program instructions that are performed by one or more computer circuits. These computer program instructions may be provided to a processor circuit of a general purpose computer circuit, special purpose computer circuit, and/or other programmable data processing circuit to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, transform and control transistors, values stored in memory locations, and other hardware components within such circuitry to implement the functions/acts specified in the block diagrams and/or flowchart block or blocks, and thereby create means (functionality) and/or structure for implementing the functions/acts specified in the block diagrams and/or flowchart block(s).

[0074] These computer program instructions may also be stored in a tangible computer- readable medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instructions which implement the functions/acts specified in the block diagrams and/or flowchart block or blocks. Accordingly, embodiments of present inventive concepts may be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.) that runs on a processor such as a digital signal processor, which may collectively be referred to as “circuitry,” “a module” or variants thereof.

[0075] It should also be noted that in some alternate implementations, the functions/acts noted in the blocks may occur out of the order noted in the flowcharts. For example, two blocks shown in succession may in fact be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Moreover, the functionality of a given block of the flowcharts and/or block diagrams may be separated into multiple blocks and/or the functionality of two or more blocks of the flowcharts and/or block diagrams may be at least partially integrated. Finally, other blocks may be added/inserted between the blocks that are illustrated, and/or blocks/operations may be omitted without departing from the scope of inventive concepts. Moreover, although some of the diagrams include arrows on communication paths to show a primary direction of communication, it is to be understood that communication may occur in the opposite direction to the depicted arrows.

[0076] Many variations and modifications can be made to the embodiments without substantially departing from the principles of the present inventive concepts. All such variations and modifications are intended to be included herein within the scope of present inventive concepts. Accordingly, the above disclosed subject matter is to be considered illustrative, and not restrictive, and the appended examples of embodiments are intended to cover all such modifications, enhancements, and other embodiments, which fall within the spirit and scope of present inventive concepts. Thus, to the maximum extent allowed by law, the scope of present inventive concepts are to be determined by the broadest permissible interpretation of the present disclosure including the following examples of embodiments and their equivalents, and shall not be restricted or limited by the foregoing detailed description.

Claims

CLAIMS:

1. An optical see-through display device (200) comprising: a main display (100) having pixels controllable to display images overlaid on the real world when viewed by a user through the main display (100); a dimming display (110) rigidly connected to the main display (100) and arranged on an opposite side of the main display (100) from the user when viewing the displayed images overlaid on the real-world; a frame buffer (210) operative to store pixel values of an image frame; a main display driver (220) operative to convert the pixel values into signals driving pixels of the main display (100); a comparator (260) operative to compare the pixel values to at least one threshold value to generate comparator output values; and a dimming display driver (222) operative to convert the comparator output values into signals driving pixels of the dimming display (110) to control light transmissivity.

2. The optical see-through display device (200) of Claim 1, further comprising circuitry operative to provide pixel values from the frame buffer (210) in parallel to the main display driver (220) and to the comparator (260).

3. The optical see-through display device (200) of Claim 2, wherein the circuitry is part of the main display driver (220) or the comparator (260).

4. The optical see-through display device (200) of any of Claims 1 to 3, wherein: the main display (100) and the dimming display (110) are rigidly connected to a headset configured to be worn by the user; the dimming display (110) is arranged on an opposite side of the main display (100) from the user when wearing the headset.

5. The optical see-through display device (200) of any of Claims 1 to 4, wherein: the comparator (260) is operative, when one of the pixel values of the image frame exceeds a threshold value, to generate a comparator output value that is converted by the dimming display driver (222) into a signal that drivers at least one pixel of the dimming display (110) to be substantially transmissive, and operative, when one of the pixel values of the image frame does not exceed the threshold value, to generate a comparator output value that is converted by the dimming display driver (222) into a signal that drivers at least one pixel of the dimming display (110) to be substantially opaque.

6. The optical see-through display device (200) of any of Claims 1 to 5, wherein: the comparator (260) is operative to compare a first threshold value to the pixel values that correspond to a defined central area of the image frame, and to compare a second threshold value, which is different than the first threshold value, to the pixel values that correspond to a defined peripheral area outside of the defined central area of the image frame.

7. The optical see-through display device (200) of Claim 6, wherein: the first threshold value, when exceeded by a particular pixel value, controls the comparator (260) to cause through the dimming display driver (222) greater decrease in light transmissivity through the pixels of the dimming display (110) relative to when the second threshold value is exceeded by the particular pixel value.

8. The optical see-through display device (200) of any of Claims 1 to 7, wherein: the dimming display driver (222) is further operative to convert individual ones of comparator output values into signals driving a group of pixels of the dimming display (110) to control light transmissivity.

9. The optical see-through display device (200) of any of Claims 1 to 8, wherein: the dimming display driver (222) is further operative to: convert individual ones of the comparator output values generated by the comparator (260), from pixel values that correspond to a defined central area of the image frame, into signals driving a first group of pixels of the dimming display (110) to control light transmissivity, and convert individual ones of the comparator output values generated by the comparator (260), from pixel values that correspond to defined peripheral area outside of the defined central area of the image frame, into signals driving a second group of pixels of the dimming display (110) to control light transmissivity.

10. The optical see-through display device (200) of Claim 9, wherein: the first group of pixels of the dimming display (110) is greater than the second group of pixels of the dimming display (110).

11. The optical see-through display device (200) of any of Claims 1 to 10, further comprising: a start-group of registers (720) connected daisy chained in a sequence and operative to sequentially transfer values from a first one of the registers (720) in the sequence through any intervening ones of the registers (720) in the sequence to a last one of the registers (720) in the sequence; and a distribution circuit (710) operative to distribute to the registers (720) in the start- group a sequence of the comparator output values generated by the comparator (260) from the pixel values of the image frame, wherein when a current comparator output value in the sequence is above a threshold value and an immediately prior comparator output value in the sequence is below the threshold value, the distribution circuit (710) distributes the current comparator output value to each of the registers (720) in the start-group, wherein while further ones of the comparator output values in the sequence remain above the threshold value, the distribution circuit (710) distributes the further ones of the comparator output values to the first one of the registers (720) in the start-group.

12. The optical see-through display device (200) of Claim 11, further comprising: an end-group of registers (720) connected daisy chained in a sequence and operative to sequentially transfer values from a first one of the end-group of registers (720) in the sequence through any intervening ones of the end-group of registers (720) in the sequence to a last one of the end-group of registers (720) in the sequence, wherein when a current comparator output value in the sequence is below the threshold value and an immediately prior comparator output value in the sequence is above the threshold value, the distribution circuit (710) distributes the current comparator output value to each of the end-group of registers (720), wherein while further ones of the comparator output values in the sequence remain below the threshold value, the distribution circuit (710) distributes the further ones of the comparator output values to the first one of the registers (720) in the end-group.

13. The optical see-through display device (200) of any of Claims 11 to 12, wherein: a number of the registers (720) in the start-group is equal to a number of pixels of the dimming display (110) that have light transmissivity controlled by the comparator (260) based on a pixel value mapped to an individual one of the pixels of the main display (100) to provide overlap between the number of pixels of the dimming display (110) and a pixel of the main display (100).

14. The optical see-through display device (200) of any Claims 1 to 13, further comprising: a clock circuit (230) that outputs a first clock signal with a first frequency, and outputs a second clock signal with a second frequency which is less than the first frequency, wherein the main display driver (220) updates pixels of the main display (100) at the first frequency of the first clock signal, and wherein the dimming display driver (222) updates pixels of the dimming display (110) at the second frequency of the second clock signal.

15. The optical see-through display device (200) of any Claims 1 to 14, wherein the comparator (260) is configured as digital circuitry that is not part of a microprocessor.