WO2025250817A1 - Methods and systems for the deposition of n-polar iii-nitrides on silicon substrates - Google Patents
Methods and systems for the deposition of n-polar iii-nitrides on silicon substratesInfo
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- the current disclosure relates to structures and devices based on N-polar group-III nitrides, and in particular transistors based on N-polar GaN.
- Transistors based on N-polar GaN have become the leading technology for high frequency transistors, demonstrating output power and efficiency values at 94 GHz more than twice as high compared to the conventional Ga-polar technology.
- the N-polar group-III nitride heterostructures for transistor applications are deposited by metal-organic chemical vapor deposition (MOCVD) onto silicon carbide or sapphire substrates.
- MOCVD is the method of choice for the deposition of group-III nitrides, and MOCVD tools allowing the deposition on multiple 6” or 8” substrates are widely available, largely driven by the high demand for Ill-nitride optoelectronic devices such as LEDs and LDs.
- Molecular beam epitaxy (MBE) is an alternative method for the epitaxy of Ill-nitrides, which is less common and if, than typically used for the fabrication of electronic devices.
- a method includes providing a silicon substrate and forming, using metal-organic chemical vapor deposition, an N-polar device structure on top of the silicon substrate.
- the N-polar device structure includes a first layer comprising N-polar AIN and one or more following layers comprising N-polar group-III nitrides, in particular N-polar GaN. DESCRIPTION OF DRAWINGS
- Figures 1 A and IB are cross-sectional views of an example layer structure for an N-polar transistor structure on a (111) silicon substrate.
- Figure 2 is a flow diagram of an example MOCVD process for N-polar Ill-nitrides on miscut (111) silicon substrates.
- Figure 3 A is a cross-sectional view of an example N-polar AlN-on- miscut (111) Si template fabricated by ALD or PLD, for example.
- Figure 3B is a cross-section view of an example layer structure after deposition of an N-polar transistor structure on (111) silicon substrate by MOCVD.
- Figure 4 is a flow diagram of an example MOCVD process for N-polar Ill-nitrides on AlN-on (111) silicon templates.
- SiC is an excellent substrate for group-III nitride transistors it is also very expensive. For this reason, standard Ga-polar transistors are more and more fabricated on silicon substrates which are very cheap and available in diameters up to 12”.
- the epitaxial growth on silicon substrates is typically initiated with the deposition of an AIN nucleation layer to prevent the formation of gallium silicide, which hampers the growth of a low defectivity epitaxial layer structure.
- the likelihood of gallium silicide formation increases with increasing growth temperature, making a separation of the silicon substrate from the main gallium nitride layer a necessity when using MOCVD as growth technique, where typical substrate temperatures are above 900 °C. Note that epitaxy by MOCVD is performed at about 200 °C higher temperatures compared to MBE. Under MBE growth conditions gallium silicide formation typically does not occur.
- Mg While buried deep in the epitaxial layer structure, Mg is known for its diffusion along the cores of treading dislocations and may become a risk factor for the transistor reliability.
- N-polar AIN films were obtained by controlling the Al metal coverage on the silicon substrates in the initial stage of growth prior to deposition of the AIN layer [3],
- the silicon surface was exposed to an Al flux corresponding to the deposition of 3 or 7.5 monolayer (MLs) of AIN prior to the growth of the actual AIN layer, N-polar AIN formed.
- the Al exposure corresponded to a 0.75 ML thick AIN layer, conventional Al- polar AIN formed.
- the metal precursors are provided as trimethyl compounds, and not as atoms as using MBE, it is difficult to obtain pure metal coverage of the silicon substrate in the standard MOCVD process using the precursor trimethylaluminum (A1(CH3)3, TMA1) as Al precursor.
- the standard aluminum precursor TMA1 typically decomposes under formation of aluminum films which contain very high amounts of carbon, often close to stoichiometric AI4C3.
- an alternative Al precursor for example triisobutylaluminum is used in the initial stage of growth to provide Al coverage on the silicon substrate comparable to the one enabling the deposition of N-polar AIN on (111 )Si by MBE, equivalent to 2 to 20 ML of AIN when growing AIN. Note, here only Al atoms are deposited on the surface, no ammonia is supplied in this initial step.
- the miscut (111) Si substrates is cleaned using solvents and treated with HF to remove the natural surface oxide using standard silicon cleaning procedures. Afterwards the wafer is immediately loaded into the MOCVD growth chamber or the oxygen and water free load lock system of the MOCVD tool to prevent re-oxidation of the Si surface.
- the Si surface is heated up in a carrier gas, typically hydrogen
- Al Prior to the growth of the AIN layer, Al is injected using an alternative precursor such as triisobutylaluminum to establish the optimum Al coverage of the Si substrate surface for the growth of N-polar AIN, equivalent to 2 to 20 ML of AIN when growing AIN.
- an alternative precursor such as triisobutylaluminum to establish the optimum Al coverage of the Si substrate surface for the growth of N-polar AIN, equivalent to 2 to 20 ML of AIN when growing AIN.
- N-polar AIN by adding NH3 to the growth chamber
- the subsequent AIN layer growth can be continued as in the standard growth process using TMA1 as precursor. All following layers can be grown as normal.
- Example process (2) In addition to the example process (1) an Al rich surface can be established after exposure of the (111) Si surface to NH3 resulting in the deposition of N-polar AIN. All following Ill-nitride layers can again be deposited as normal.
- the epitaxial process can also be conducted in 2 steps, where the N-polar AIN nucleation layers are deposited ex- situ on miscut (111) Si substrates using methods such as atomic layer deposition (ALD) or pulsed laser deposition (PLD).
- ALD atomic layer deposition
- PLD pulsed laser deposition
- the AIN covered miscut silicon substrates are transferred into the MOCVD growth chamber afterwards, serving as template for the MOCVD growth of the desired epitaxial layer structure.
- Example (2) N-polar AIN on silicon template fabrication using
- PLD is a widely used technique for the deposition of aluminum metal layers using high purity Al metal targets. Similarly aluminum compounds such as aluminum oxide and aluminum nitride were deposited using corresponding polycrystalline targets.
- the wafer can be annealed in an external oven (face to face) to annihilate defects in the PLD AIN layer afterwards.
- PLD AIN film prior to annealing in an external oven.
- Example (3) N-polar AIN on silicon template fabrication using
- Atomic Layer Deposition allows excellent control of the deposition process on a layer-by-layer basis.
- the technique has been used for the deposition of thin Al films as well as aluminum oxide and Al-polar aluminum nitride.
- Al precursors trimethyl aluminum is often used, but can result in a high carbon content of the layers when not used together with a hydrogen plasma.
- alternative precursors such as trimethylamine alane or dimethylethyl alane, for example, are used, which do not possess any Al-C bonds, allowing the deposition of films with lower C impurity concentrations. Low C contents have also been observed using trisisobutylaluminum.
- the wafer can be annealed again in an external oven (face to face) to annihilate defects in the ALD AIN layer afterwards.
- the Al coverage can also be established using the standard precursor TMA1 and the methyl groups are removed using hydrogen plasma or other suitable plasma.
- a thin surface passivation layer for example a thin GaN layer can be deposited on top of the N-polar AIN layer to protect the AIN layer from oxidation.
- the passivation layer can be etched off using hydrogen, for example, providing a clean AIN surface for consecutive MOCVD growth.
- the PVD or ALD layers can be fabricated pseudo-in-situ by using a cluster tool, where the PVD or ALD chambers and the MOCVD chamber are connected, and the sample transfer is conducted such that no ambient exposure of the sample occurs.
- deposition techniques such as RF sputtering, reactive sputtering, or Ion beam deposition techniques can be used to establish the optimum Al coverage on the silicon substrate surface to set the stage for N-polar growth of the subsequent AIN layer using the above techniques.
- the initial N-polar AIN layer can also be grown by molecular beam epitaxy (MBE).
- MBE offers precise control over atomic layer deposition and has been demonstrated to produce N-polar AIN films on silicon substrates by adjusting the initial Al surface coverage. For example, exposing a miscut (111) silicon surface to an Al flux corresponding to 2 to 20 monolayers of AIN prior to the introduction of nitrogen can promote the formation of N-polar AIN.
- the resulting N-polar-AlN-on-silicon template may then be transferred into a metalorganic chemical vapor deposition (MOCVD) chamber for subsequent deposition of additional Ill-nitride layers.
- MOCVD metalorganic chemical vapor deposition
- a protective passivation layer such as a thin GaN layer, may be deposited over the AIN film prior to transfer, and optionally removed in situ using a hydrogen treatment or thermal desorption process.
- silicon substrate can be exposed to a nitrogen precursor such as NH3 in order to form silicon nitride on the silicon surface prior to the exposure to Al in an amount corresponding to 2 to 20 monolayers of AIN.
- a nitrogen precursor such as NH3
- FIG. lA is a cross-sectional view of a semiconductor device 100 in which N-polarity is achieved through Mg-induced inversion.
- the device is formed on a silicon substrate 102, which may be a (lll)-oriented silicon wafer.
- the substrate 102 is a miscut silicon wafer, having a surface misorientation angle of 2 to 10 degrees off the (111) on-axis orientation, to suppress the formation of surface defects during epitaxial growth.
- substrates miscut by 2 to 10 degrees from the (111) on-axis surface are preferred to mitigate surface defect formation, other orientations and miscut angles may also be used depending on the desired device characteristics.
- the epitaxial stack referred to collectively as the N-polar device structure 104, is grown on the silicon substrate 102.
- the structure begins with an Al- polar AIN nucleation layer 106, which serves as a buffer to reduce interfacial reactions and lattice mismatch.
- an Al -polar Al GaN transition layer 108 is deposited to further bridge lattice and thermal expansion differences between silicon and the subsequent GaN-based layers.
- a Mg-induced inversion layer 110 is introduced above the Al-polar layers to convert the polarity from Ga-polar to N-polar.
- This layer is typically formed by doping with magnesium during the growth of the (Al,Ga)N stress management layers. While effective in achieving N-polarity, this approach may pose long-term reliability risks due to Mg diffusion along threading dislocations.
- N-polar group Ill-nitride layers transitions to N-polar group Ill-nitride layers.
- An N-polar AlGaN layer 112 is first deposited, followed by a semiinsulating N-polar GaN layer 114, which may serve as a buffer or isolation layer.
- An AlGaN layer 116 typically functioning as a barrier layer, is grown on top of the semi-insulating GaN.
- a GaN channel layer 120 is formed as the uppermost epitaxial layer. If desired additional layers can be deposited on top of the GaN channel layer.
- a two-dimensional electron gas (2DEG) 118 forms at the heterointerface between the AlGaN barrier 116 and the GaN channel layer 120, depending on the device design. This 2DEG 118 provides a high-mobility conduction channel that may be useful for high-speed and high-power transistor operation.
- FIG. IB is a cross-sectional view of an alternative embodiment of a semiconductor device 140 in which N-polarity is defined during the initial stages of epitaxy, eliminating the need for Mg-induced inversion.
- the structure is formed on a silicon substrate 102, which may be a (111)- oriented silicon wafer.
- the substrate 102 is a miscut (111) silicon substrate, with a surface misorientation angle of 2 to 10 degrees to reduce hexagonal defect formation during Ill-nitride growth.
- the N-polar device structure 104 is grown directly over the silicon substrate 102. Rather than beginning with an Al-polar buffer and relying on polarity inversion, this approach uses an initial Al preflow step to directly promote N-polar nucleation. Specifically, an N-polar AIN layer 142 is deposited as the first layer over the substrate following exposure of the silicon surface to an alternative aluminum precursor, such as triisobutylaluminum. This precursor provides an Al coverage equivalent to 1 to 20 monolayers of AIN, enabling the direct formation of N-polar AIN when followed by the introduction of ammonia.
- an alternative aluminum precursor such as triisobutylaluminum. This precursor provides an Al coverage equivalent to 1 to 20 monolayers of AIN, enabling the direct formation of N-polar AIN when followed by the introduction of ammonia.
- a semi -insulating N-polar AlGaN layer 144 is deposited to provide electrical isolation and support subsequent device layers. This is followed by an AlGaN barrier layer 116 and a GaN channel layer 120, similar to the structure shown in FIG. 1A.
- a two-dimensional electron gas (2DEG) 118 is formed at the interface between the AlGaN barrier 116 and the GaN layer 120, providing a high-mobility conduction path for the device.
- the device 140 of FIG. IB avoids the use of Mg doping and the associated reliability risks. Instead, it achieves N-polar growth by controlling surface chemistry at the nucleation stage, which may facilitate a cleaner, more stable epitaxial interface and simplify the layer structure.
- FIG. 2 is a flow diagram illustrating an example MOCVD process 200 for fabricating an N-polar III -nitride device structure on a miscut (111) silicon substrate.
- the process begins with cleaning the silicon substrate (202) using standard semiconductor cleaning techniques, which may include solvent cleaning followed by an HF dip to remove native oxide from the silicon surface.
- the cleaned substrate is loaded into the MOCVD growth chamber (204), for example, through a load lock system that minimizes exposure to oxygen and moisture.
- the substrate is heated in a carrier gas atmosphere, such as hydrogen, to the desired temperature for precursor exposure (206).
- triisobutylaluminum is introduced as a preflow to the chamber to form a thin aluminum-containing surface layer equivalent to 1 to 20 monolayers of AIN (208).
- This pre-deposition step modifies the silicon surface to promote the direct growth of N-polar aluminum nitride.
- TMA1 trimethylaluminum
- FIGS. 3 A and 3B are cross-sectional views illustrating an alternative fabrication approach for N-polar device structures on silicon substrates using a two- step growth process.
- FIG. 3 A shows a substrate structure, referred to herein as an N-polar- AlN-on-silicon template 150, in which an N-polar AIN layer 142 has been deposited on a miscut (111) silicon substrate 102 using an ex-situ technique, such as atomic layer deposition (ALD) or pulsed laser deposition (PLD).
- the silicon substrate 102 may be misoriented by 2 to 10 degrees from the (111) on-axis orientation to suppress surface defects.
- the AIN layer 142 is formed by first establishing aluminum coverage on the cleaned silicon surface (equivalent to approximately 1 to 20 monolayers of AIN) followed by nitride formation through the introduction of a nitrogen source such as ammonia or nitrogen plasma.
- the resulting AIN layer 142 serves as a template for subsequent MOCVD growth.
- This intermediate structure may be annealed or further treated prior to additional layer deposition.
- FIG. 3B illustrates the result of loading the AlN-on-silicon template 150 into an MOCVD growth chamber, where additional layers of the N-polar device structure 104 are formed.
- a regrowth interface 146 marks the boundary between the ex-situ AIN layer 142 and the subsequent MOCVD-grown epitaxial layers. These include a semi-insulating N-polar AlGaN layer 144, which provides electrical isolation, followed by an AlGaN barrier layer 116 and the GaN channel layer 120.
- a two-dimensional electron gas (2DEG) 118 forms at the heterointerface between the AlGaN and GaN layers, enabling high electron mobility for transistor operation.
- This two-step growth process allows for the establishment of N-polar epitaxy without necessarily requiring in-situ preflow or Mg-induced polarity inversion, potentially offering improved control over interface quality and reduced contamination risk.
- the regrowth interface 146 may be optimized to minimize defects and facilitate seamless integration of the MOCVD-grown layers with the ex- si tu AIN template.
- FIG. 4 is a flow diagram illustrating an example two-step fabrication method 400 for growing N-polar Ill-nitride device structures on AlN-on-silicon templates. This method decouples the formation of the N-polar AIN nucleation layer from the subsequent high -temperature MOCVD growth, enabling more precise control over initial polarity and interface quality.
- the process begins by cleaning a (111) silicon substrate 102 using standard wet cleaning techniques, including a final hydrofluoric acid (HF) dip to remove native oxide (402).
- HF hydrofluoric acid
- the cleaned substrate is then loaded into a deposition chamber for ex-situ growth, such as an atomic layer deposition (ALD) or pulsed laser deposition (PLD) system (404).
- ALD atomic layer deposition
- PLD pulsed laser deposition
- Al is introduced to the silicon surface to establish the desired Al coverage (406).
- This surface conditioning corresponds to the amount of Al equivalent to approximately 1 to 20 monolayers of AIN, setting the stage for N-polar nucleation.
- an AIN layer 142 is deposited using ALD or PLD techniques (408). This AIN layer acts as a template for subsequent epitaxial growth.
- the wafer is transferred into a metalorganic chemical vapor deposition (MOCVD) growth chamber (410). Care may be taken to limit ambient exposure during transfer to preserve surface quality. Inside the MOCVD chamber, additional Ill-nitride layers (such as AlGaN, GaN, or other layers tailored for specific device applications) are deposited as desired (412).
- MOCVD metalorganic chemical vapor deposition
- the method 400 may be useful for the formation of a high-quality N- polar AIN template using low-temperature, low-carbon processes, followed by conventional high-growth-rate MOCVD for the remainder of the device structure. This separation may improve interface quality, reduce defect densities, and eliminate the need for Mg doping or other polarity-conversion techniques.
Abstract
Semiconductor devices and methods for fabricating semiconductor devices. In some examples, a method includes providing a silicon substrate and forming, using metal-organic chemical vapor deposition, an N-polar device structure on top of the silicon substrate. The N-polar device structure includes a first layer comprising N-polar AlN and one or more following layers comprising N-polar GaN or other group III nitrides.
Description
METHODS AND SYSTEMS FOR THE DEPOSITION OF N-POLAR III- NITRIDES ON SILICON SUBSTRATES
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of priority to U.S. Provisional Patent Application 63/654,166 filed May 31, 2024, the entire contents of which are hereby incorporated herein by reference.
TECHNICAL FIELD
[0002] The current disclosure relates to structures and devices based on N-polar group-III nitrides, and in particular transistors based on N-polar GaN.
BACKGROUND
[0003] Transistors based on N-polar GaN have become the leading technology for high frequency transistors, demonstrating output power and efficiency values at 94 GHz more than twice as high compared to the conventional Ga-polar technology. Typically, the N-polar group-III nitride heterostructures for transistor applications are deposited by metal-organic chemical vapor deposition (MOCVD) onto silicon carbide or sapphire substrates. MOCVD is the method of choice for the deposition of group-III nitrides, and MOCVD tools allowing the deposition on multiple 6” or 8” substrates are widely available, largely driven by the high demand for Ill-nitride optoelectronic devices such as LEDs and LDs. Molecular beam epitaxy (MBE) is an alternative method for the epitaxy of Ill-nitrides, which is less common and if, than typically used for the fabrication of electronic devices.
SUMMARY
[0004] This document describes semiconductor devices and methods for fabricating semiconductor devices. In some examples, a method includes providing a silicon substrate and forming, using metal-organic chemical vapor deposition, an N-polar device structure on top of the silicon substrate. The N-polar device structure includes a first layer comprising N-polar AIN and one or more following layers comprising N-polar group-III nitrides, in particular N-polar GaN.
DESCRIPTION OF DRAWINGS
[0005] Figures 1 A and IB are cross-sectional views of an example layer structure for an N-polar transistor structure on a (111) silicon substrate.
[0006] Figure 2 is a flow diagram of an example MOCVD process for N-polar Ill-nitrides on miscut (111) silicon substrates.
[0007] Figure 3 A is a cross-sectional view of an example N-polar AlN-on- miscut (111) Si template fabricated by ALD or PLD, for example. Figure 3B is a cross-section view of an example layer structure after deposition of an N-polar transistor structure on (111) silicon substrate by MOCVD.
[0008] Figure 4 is a flow diagram of an example MOCVD process for N-polar Ill-nitrides on AlN-on (111) silicon templates.
DETAILED DESCRIPTION
[0009] Most epitaxial layer structures for N-polar transistors have been grown by MOCVD as well and are commercially available on SiC substrates. Excellent performance was also demonstrated for transistors on sapphire substrates.
[0010] While SiC is an excellent substrate for group-III nitride transistors it is also very expensive. For this reason, standard Ga-polar transistors are more and more fabricated on silicon substrates which are very cheap and available in diameters up to 12”.
[0011] Largely independent of the final layer structure, the epitaxial growth on silicon substrates is typically initiated with the deposition of an AIN nucleation layer to prevent the formation of gallium silicide, which hampers the growth of a low defectivity epitaxial layer structure. The likelihood of gallium silicide formation increases with increasing growth temperature, making a separation of the silicon substrate from the main gallium nitride layer a necessity when using MOCVD as growth technique, where typical substrate temperatures are above 900 °C. Note that epitaxy by MOCVD is performed at about 200 °C higher temperatures compared to MBE. Under MBE growth conditions gallium silicide formation typically does not occur.
[0012] Growth procedures for N-polar GaN on silicon substrates were developed in the past as well, using both, MBE and MOCVD, and DC transistors were demonstrated using MOCVD [1],
[0013] In the MOCVD process for N-polar nitrides on silicon substrates, the polarity was converted from metal- to N-polar by introducing Mg during the growth of the (Al,Ga)N stress management layers which are a standard component when growing typical metal -polar GaN on silicon [1, 2], These stress management layers are needed to prevent cracking of the epitaxial layer stack during cool down, caused by the large difference in the thermal expansion coefficients of silicon and GaN.
[0014] While buried deep in the epitaxial layer structure, Mg is known for its diffusion along the cores of treading dislocations and may become a risk factor for the transistor reliability.
[0015] In contrast, using MBE as growth technique, N-polar AIN films were obtained by controlling the Al metal coverage on the silicon substrates in the initial stage of growth prior to deposition of the AIN layer [3], When the silicon surface was exposed to an Al flux corresponding to the deposition of 3 or 7.5 monolayer (MLs) of AIN prior to the growth of the actual AIN layer, N-polar AIN formed. When the Al exposure corresponded to a 0.75 ML thick AIN layer, conventional Al- polar AIN formed.
[0016] Since in the MOCVD process the metal precursors are provided as trimethyl compounds, and not as atoms as using MBE, it is difficult to obtain pure metal coverage of the silicon substrate in the standard MOCVD process using the precursor trimethylaluminum (A1(CH3)3, TMA1) as Al precursor. The standard aluminum precursor TMA1 typically decomposes under formation of aluminum films which contain very high amounts of carbon, often close to stoichiometric AI4C3.
[0017] Since C also forms strong bonds with Si under formation of SiC its presence perturbs the formation of an Al layer on the silicon substrate surface. [0018] Pure aluminum films can be deposited using alternative aluminum precursors such as, for example, trimethylaminealane, dimethylethylaminealane, or triisobutylaluminum. The molecules trimethylaminealane and dimethylethylaminealane do not contain any Al-C bonds at all, and the Al-C bond in triisobutylaluminum is considerably weaker than the AI-CH3 bond in standard trimethylaluminum [4, 5], Using both alternative precursors, low carbon containing Al films have been demonstrated in the past by atomic layer deposition (ALD), for example [4],
[0019] Most alternative Al precursors have a significantly lower vapor pressure compared to TMA1 resulting in very low growth rates and are not attractive for use in the standard MOCVD process as the attainable growth rates would be too low. For this reason, the alternative precursors have not been used for the epitaxy of AIN films by MOCVD in the past. However, for the establishment of the Al surface coverage required for the nucleation of N-polar AIN, the vapor pressure of the alternative precursors is sufficient.
[0020] This document describes examples of Mg free methods for the MOCVD growth of N-polar GaN on miscut silicon substrates.
[0021] Example MOCVD-Based Growth Methods
[0022] In the process described here an alternative Al precursor, for example triisobutylaluminum is used in the initial stage of growth to provide Al coverage on the silicon substrate comparable to the one enabling the deposition of N-polar AIN on (111 )Si by MBE, equivalent to 2 to 20 ML of AIN when growing AIN. Note, here only Al atoms are deposited on the surface, no ammonia is supplied in this initial step.
[0023] The remainder of the epitaxial layer structure is then deposited with the standard precursor TMA1.
[0024] Similar to the previous approach using Mg to establish N-polar (Al,Ga)N films on silicon by MOCVD [1,2], (111) silicon substrates with a misorientation angle of 2 - 10 deg are used to prevent the formation of hexagonal surface defects commonly observed when growing on axis substrates [1],
Example process (1):
The miscut (111) Si substrates is cleaned using solvents and treated with HF to remove the natural surface oxide using standard silicon cleaning procedures. Afterwards the wafer is immediately loaded into the MOCVD growth chamber or the oxygen and water free load lock system of the MOCVD tool to prevent re-oxidation of the Si surface.
Inside the MOCVD chamber, the Si surface is heated up in a carrier gas, typically hydrogen
Prior to the growth of the AIN layer, Al is injected using an alternative precursor such as triisobutylaluminum to establish the optimum Al coverage of the Si substrate surface for the growth of N-polar AIN, equivalent to 2 to 20 ML of AIN when growing AIN.
Deposit N-polar AIN by adding NH3 to the growth chamber
The subsequent AIN layer growth can be continued as in the standard growth process using TMA1 as precursor. All following layers can be grown as normal.
[0025] Example process (2): In addition to the example process (1) an Al rich surface can be established after exposure of the (111) Si surface to NH3 resulting in the deposition of N-polar AIN. All following Ill-nitride layers can again be deposited as normal.
[0026] 2 Step process for the fabrication of N-polar (Al,Ga)N epitaxial layer stacks
[0027] Instead of growing all layers by MOCVD, the epitaxial process can also be conducted in 2 steps, where the N-polar AIN nucleation layers are deposited ex- situ on miscut (111) Si substrates using methods such as atomic layer deposition (ALD) or pulsed laser deposition (PLD). The AIN covered miscut silicon substrates are transferred into the MOCVD growth chamber afterwards, serving as template for the MOCVD growth of the desired epitaxial layer structure.
[0028] While Al -polar AIN films have been demonstrated on silicon substrates by ALD and PLD in the past, no N-polar AIN films have been fabricated and no epitaxial layer structures have been fabricated on such films to the best of applicant’s knowledge.
[0029] To allow the fabrication of N-polar or (000-1) AIN on miscut silicon, special procedures need to be applied again when using ALD or PLD, which ensure the establishment of the optimum Al coverage prior to the growth of AIN in order to obtain N-polar AIN.
[0030] Example (2): N-polar AIN on silicon template fabrication using
Pulsed Laser Deposition
[0031] PLD is a widely used technique for the deposition of aluminum metal layers using high purity Al metal targets. Similarly aluminum compounds such as aluminum oxide and aluminum nitride were deposited using corresponding polycrystalline targets.
[0032] Deposition procedure example for N-polar AIN on miscut (111 )Si using PLD:
Standard wet cleaning of the (111) Si substrate with final HF treatment
Loading of cleaned substrate into PLD chamber
Bring chamber to low pressure and outgas at ambient temperature Increase substrate temperature to 300 °C or higher and anneal substrate Deposit aluminum using Al target, where Al is supplied equivalent to the growth of 1 to 20 monolayers of AIN.
Deposit 20 - 500 nm of AIN using AIN target
[0033] If desired the wafer can be annealed in an external oven (face to face) to annihilate defects in the PLD AIN layer afterwards.
[0034] Furthermore, if desired a thicker AIN layer can be sputtered on top of the
PLD AIN film prior to annealing in an external oven.
[0035] Example (3): N-polar AIN on silicon template fabrication using
Atomic Layer Deposition or Plasma Enhanced Atomic Layer Deposition
[0036] Atomic Layer Deposition allows excellent control of the deposition process on a layer-by-layer basis. The technique has been used for the deposition of thin Al films as well as aluminum oxide and Al-polar aluminum nitride. As Al precursors, trimethyl aluminum is often used, but can result in a high carbon content of the layers when not used together with a hydrogen plasma. When depositing aluminum films by thermal ALD, alternative precursors such as trimethylamine alane or dimethylethyl alane, for example, are used, which do not possess any Al-C bonds, allowing the deposition of films with lower C impurity concentrations. Low C contents have also been observed using trisisobutylaluminum.
[0037] Deposition procedure example for N-polar AIN on miscut (111 )Si using ALD:
Standard wet cleaning of the (111) Si substrate with final HF treatment Loading of cleaned substrate into ALD chamber
Bring chamber to low pressure and outgas at ambient temperature Increase substrate temperature to 300 °C or higher and anneal substrate Establish desired Al coverage on (111) silicon substrate, equivalent to 2 to 20 ML of AIN when growing AIN.
Deposit 20 - 500 nm of AIN by introducing both, the Al-precursor and the N-precursor (typically NH3, or N2 plasma)
[0038] If desired the wafer can be annealed again in an external oven (face to face) to annihilate defects in the ALD AIN layer afterwards.
[0039] As mentioned above using plasma enhanced ALD, PEALD, the Al coverage can also be established using the standard precursor TMA1 and the methyl groups are removed using hydrogen plasma or other suitable plasma.
[0040] Independent of the chosen AlN-on-silicon template fabrication process, a thin surface passivation layer, for example a thin GaN layer can be deposited on top of the N-polar AIN layer to protect the AIN layer from oxidation. After loading of the AlN-on-silicon template into the MOCVD growth chamber, the passivation layer can be etched off using hydrogen, for example, providing a clean AIN surface for consecutive MOCVD growth.
[0041] Instead of an ex-situ process, the PVD or ALD layers can be fabricated pseudo-in-situ by using a cluster tool, where the PVD or ALD chambers and the MOCVD chamber are connected, and the sample transfer is conducted such that no ambient exposure of the sample occurs.
[0042] In addition, other deposition techniques such as RF sputtering, reactive sputtering, or Ion beam deposition techniques can be used to establish the optimum Al coverage on the silicon substrate surface to set the stage for N-polar growth of the subsequent AIN layer using the above techniques.
[0043] Furthermore, the initial N-polar AIN layer can also be grown by molecular beam epitaxy (MBE). MBE offers precise control over atomic layer deposition and has been demonstrated to produce N-polar AIN films on silicon substrates by adjusting the initial Al surface coverage. For example, exposing a miscut (111) silicon surface to an Al flux corresponding to 2 to 20 monolayers of AIN prior to the introduction of nitrogen can promote the formation of N-polar AIN. The resulting N-polar-AlN-on-silicon template may then be transferred into a metalorganic chemical vapor deposition (MOCVD) chamber for subsequent deposition of additional Ill-nitride layers. If desired, a protective passivation layer, such as a thin GaN layer, may be deposited over the AIN film prior to transfer, and optionally removed in situ using a hydrogen treatment or thermal desorption process.
[0044] If desired, silicon substrate can be exposed to a nitrogen precursor such as NH3 in order to form silicon nitride on the silicon surface prior to the exposure to Al in an amount corresponding to 2 to 20 monolayers of AIN.
[0045] FIG. lA is a cross-sectional view of a semiconductor device 100 in which N-polarity is achieved through Mg-induced inversion. The device is formed on a
silicon substrate 102, which may be a (lll)-oriented silicon wafer. In some implementations, the substrate 102 is a miscut silicon wafer, having a surface misorientation angle of 2 to 10 degrees off the (111) on-axis orientation, to suppress the formation of surface defects during epitaxial growth. Although substrates miscut by 2 to 10 degrees from the (111) on-axis surface are preferred to mitigate surface defect formation, other orientations and miscut angles may also be used depending on the desired device characteristics.
[0046] The epitaxial stack, referred to collectively as the N-polar device structure 104, is grown on the silicon substrate 102. The structure begins with an Al- polar AIN nucleation layer 106, which serves as a buffer to reduce interfacial reactions and lattice mismatch. Above the AIN layer 106, an Al -polar Al GaN transition layer 108 is deposited to further bridge lattice and thermal expansion differences between silicon and the subsequent GaN-based layers.
[0047] A Mg-induced inversion layer 110 is introduced above the Al-polar layers to convert the polarity from Ga-polar to N-polar. This layer is typically formed by doping with magnesium during the growth of the (Al,Ga)N stress management layers. While effective in achieving N-polarity, this approach may pose long-term reliability risks due to Mg diffusion along threading dislocations.
[0048] Above the inversion layer 110, the structure transitions to N-polar group Ill-nitride layers. An N-polar AlGaN layer 112 is first deposited, followed by a semiinsulating N-polar GaN layer 114, which may serve as a buffer or isolation layer. An AlGaN layer 116, typically functioning as a barrier layer, is grown on top of the semi-insulating GaN. A GaN channel layer 120 is formed as the uppermost epitaxial layer. If desired additional layers can be deposited on top of the GaN channel layer. [0049] A two-dimensional electron gas (2DEG) 118 forms at the heterointerface between the AlGaN barrier 116 and the GaN channel layer 120, depending on the device design. This 2DEG 118 provides a high-mobility conduction channel that may be useful for high-speed and high-power transistor operation.
[0050] FIG. IB is a cross-sectional view of an alternative embodiment of a semiconductor device 140 in which N-polarity is defined during the initial stages of epitaxy, eliminating the need for Mg-induced inversion. As with the device shown in FIG. 1A, the structure is formed on a silicon substrate 102, which may be a (111)- oriented silicon wafer. In some implementations, the substrate 102 is a miscut (111)
silicon substrate, with a surface misorientation angle of 2 to 10 degrees to reduce hexagonal defect formation during Ill-nitride growth.
[0051] The N-polar device structure 104 is grown directly over the silicon substrate 102. Rather than beginning with an Al-polar buffer and relying on polarity inversion, this approach uses an initial Al preflow step to directly promote N-polar nucleation. Specifically, an N-polar AIN layer 142 is deposited as the first layer over the substrate following exposure of the silicon surface to an alternative aluminum precursor, such as triisobutylaluminum. This precursor provides an Al coverage equivalent to 1 to 20 monolayers of AIN, enabling the direct formation of N-polar AIN when followed by the introduction of ammonia.
[0052] Above the N-polar AIN layer 142, a semi -insulating N-polar AlGaN layer 144 is deposited to provide electrical isolation and support subsequent device layers. This is followed by an AlGaN barrier layer 116 and a GaN channel layer 120, similar to the structure shown in FIG. 1A. A two-dimensional electron gas (2DEG) 118 is formed at the interface between the AlGaN barrier 116 and the GaN layer 120, providing a high-mobility conduction path for the device.
[0053] Compared to the structure of FIG. 1 A, the device 140 of FIG. IB avoids the use of Mg doping and the associated reliability risks. Instead, it achieves N-polar growth by controlling surface chemistry at the nucleation stage, which may facilitate a cleaner, more stable epitaxial interface and simplify the layer structure.
[0054] FIG. 2 is a flow diagram illustrating an example MOCVD process 200 for fabricating an N-polar III -nitride device structure on a miscut (111) silicon substrate. The process begins with cleaning the silicon substrate (202) using standard semiconductor cleaning techniques, which may include solvent cleaning followed by an HF dip to remove native oxide from the silicon surface.
[0055] Next, the cleaned substrate is loaded into the MOCVD growth chamber (204), for example, through a load lock system that minimizes exposure to oxygen and moisture. Inside the growth chamber, the substrate is heated in a carrier gas atmosphere, such as hydrogen, to the desired temperature for precursor exposure (206).
[0056] To establish the conditions for N-polar nucleation, triisobutylaluminum is introduced as a preflow to the chamber to form a thin aluminum-containing surface layer equivalent to 1 to 20 monolayers of AIN (208). This pre-deposition step
modifies the silicon surface to promote the direct growth of N-polar aluminum nitride.
[0057] Following the Al preflow, ammonia is injected into the chamber (210), initiating the growth of an N-polar AIN layer directly on the silicon substrate. After completion of the AIN nucleation, the triisobutylaluminum flow is stopped and replaced by trimethylaluminum (TMA1) as the aluminum precursor (212). This switch allows the remainder of the Ill-nitride epitaxial layers to be grown under conventional MOCVD conditions, using standard precursors and growth parameters appropriate to the device application (214).
[0058] FIGS. 3 A and 3B are cross-sectional views illustrating an alternative fabrication approach for N-polar device structures on silicon substrates using a two- step growth process.
[0059] FIG. 3 A shows a substrate structure, referred to herein as an N-polar- AlN-on-silicon template 150, in which an N-polar AIN layer 142 has been deposited on a miscut (111) silicon substrate 102 using an ex-situ technique, such as atomic layer deposition (ALD) or pulsed laser deposition (PLD). The silicon substrate 102 may be misoriented by 2 to 10 degrees from the (111) on-axis orientation to suppress surface defects. The AIN layer 142 is formed by first establishing aluminum coverage on the cleaned silicon surface (equivalent to approximately 1 to 20 monolayers of AIN) followed by nitride formation through the introduction of a nitrogen source such as ammonia or nitrogen plasma. The resulting AIN layer 142 serves as a template for subsequent MOCVD growth. This intermediate structure may be annealed or further treated prior to additional layer deposition.
[0060] FIG. 3B illustrates the result of loading the AlN-on-silicon template 150 into an MOCVD growth chamber, where additional layers of the N-polar device structure 104 are formed. A regrowth interface 146 marks the boundary between the ex-situ AIN layer 142 and the subsequent MOCVD-grown epitaxial layers. These include a semi-insulating N-polar AlGaN layer 144, which provides electrical isolation, followed by an AlGaN barrier layer 116 and the GaN channel layer 120. A two-dimensional electron gas (2DEG) 118 forms at the heterointerface between the AlGaN and GaN layers, enabling high electron mobility for transistor operation. [0061] This two-step growth process allows for the establishment of N-polar epitaxy without necessarily requiring in-situ preflow or Mg-induced polarity
inversion, potentially offering improved control over interface quality and reduced contamination risk. The regrowth interface 146 may be optimized to minimize defects and facilitate seamless integration of the MOCVD-grown layers with the ex- si tu AIN template.
[0062] FIG. 4 is a flow diagram illustrating an example two-step fabrication method 400 for growing N-polar Ill-nitride device structures on AlN-on-silicon templates. This method decouples the formation of the N-polar AIN nucleation layer from the subsequent high -temperature MOCVD growth, enabling more precise control over initial polarity and interface quality.
[0063] The process begins by cleaning a (111) silicon substrate 102 using standard wet cleaning techniques, including a final hydrofluoric acid (HF) dip to remove native oxide (402). The cleaned substrate is then loaded into a deposition chamber for ex-situ growth, such as an atomic layer deposition (ALD) or pulsed laser deposition (PLD) system (404).
[0064] Once inside the chamber, aluminum is introduced to the silicon surface to establish the desired Al coverage (406). This surface conditioning corresponds to the amount of Al equivalent to approximately 1 to 20 monolayers of AIN, setting the stage for N-polar nucleation. Following this, an AIN layer 142 is deposited using ALD or PLD techniques (408). This AIN layer acts as a template for subsequent epitaxial growth.
[0065] After the AIN template is complete, the wafer is transferred into a metalorganic chemical vapor deposition (MOCVD) growth chamber (410). Care may be taken to limit ambient exposure during transfer to preserve surface quality. Inside the MOCVD chamber, additional Ill-nitride layers (such as AlGaN, GaN, or other layers tailored for specific device applications) are deposited as desired (412).
[0066] The method 400 may be useful for the formation of a high-quality N- polar AIN template using low-temperature, low-carbon processes, followed by conventional high-growth-rate MOCVD for the remainder of the device structure. This separation may improve interface quality, reduce defect densities, and eliminate the need for Mg doping or other polarity-conversion techniques.
[0067] Various devices and their material structures have been described above, along with methods of forming the devices and material structures. However, it should be understood that they have been presented by way of example only, and not
limitation. The implementations have been particularly shown and described, but it will be understood that various changes in form and details may be made. For example, for any of the transistors described herein, a gate insulator or gate dielectric can be included between the gate metal and the underlying semiconductor material. Accordingly, other implementations are within the scope of the following claims.
[0068] References:
[1] S. Keller, Y. Dora, S. Chowdhury, F. Wu, X. Chen, S. P. DenBaars, J. S. Speck, U.K. Mishra, Phys. Stat. Sol. C 8, 2086 (2011).
[2] S. Keller, Y. Dora, F. Wu, X. Chen, S. Chowdury, S. P. DenBaars, J. S. Speck, U.K. Mishra, Appl. Phys. Lett. 97, 142109 (2010).
[3] S. Dasgupta, F. Wu, J. S. Speck, U. K. Mishra, Appl. Phys. Lett. 94, 151906 (2009). [4] K. J. Blakeney, C. H. Winter, Chem. Mater. 30, 1844 (2018).
[5] M. Kamp, F. Konig, G. Morsch, H. Luth, J. Cryst. Growth 120, 124 (1992).
Claims
1. A method for fabricating a semiconductor device, the method comprising: providing a silicon substrate; and forming, using metal-organic chemical vapor deposition, an N-polar device structure on top of the silicon substrate; wherein the N-polar device structure comprises a first layer comprising N- polar AIN and one or more following layers comprising N-polar group III nitride layers.
2. The method of claim 1, wherein one or more N-polar group III nitride layers comprise GaN.
3. The method of any one of claims 1 or 2, wherein the silicon substrate comprises (111) silicon.
4. The method of any one of claims 1-3, wherein the silicon substrate is misoriented by 2 to 10 degrees from the (111) on-axis surface.
5. The method of any one of claims 1-4, wherein the semiconductor device comprises a transistor, a light emitting diode, a laser diode, a photodetector, or a sensor.
6. The method of any one of claims 1-5, comprising establishing an Al coverage prior to deposition of the first layer, wherein Al is supplied that is substantially equivalent to the deposition of 1 to 20 monolayers of AIN.
7. The method of claim 6, wherein establishing the Al coverage comprises using a precursor which allows the deposition of Al with a carbon content less than 50%.
8. The method of claim 7, wherein the precursor comprises trimethylaminealane, dimethylethylaminealane, or triisobutylaluminum.
9. The method of claim 6, comprising forming a silicon nitride layer on the silicon substrate prior to establishing the Al coverage.
10. A method of fabricating a semiconductor device, the method comprising: providing a silicon substrate; forming a first layer of N-polar AIN on the silicon substrate using a first deposition method; forming an N-polar device structure having one or more following layers of N-polar GaN on top of the first layer using a second deposition method.
11. The method of claim 10, wherein the N-polar-AlN-on-silicon template is used for the second deposition method, and wherein the N-polar- AlN-on-silicon template is fabricated by atomic layer deposition.
12. The method of any one of claims 10-11, comprising establishing an Al coverage prior to deposition of the first layer, wherein Al is supplied that is substantially equivalent to the deposition of 1 to 20 monolayers of AIN.
13. The method of any one of claims 10-12, wherein establishing the Al coverage comprises using a precursor which allows the deposition of Al with a carbon content less than 50%.
14. The method of claim 13, wherein the precursor comprises trimethylaminealane, dimethylethylaminealane, or triisobutylaluminum.
15. The method of claim 13, comprising forming a silicon nitride layer on the silicon substrate prior to establishing the Al coverage.
16. The method of any one of claims 10-15, wherein the N-polar-AlN-on-silicon template is fabricated by pulsed layer deposition.
17. The method of any one of claims 10-16, wherein the N-polar-AlN-on-silicon template is fabricated by molecular beam epitaxy.
18. A semiconductor device comprising: a silicon substrate; and a N-polar device structure on top of the substrate; wherein the N-polar device structure comprises a first layer of N-polar AIN and one or more following layers of N-polar group III nitride layers.
19. The semiconductor device of claim 18, wherein one or more N-polar group III nitride layers comprise GaN.
20. The semiconductor device of any one of claims 18-19, wherein the silicon substrate comprises (111) silicon.
21. The semiconductor device of claim 20, wherein the silicon substrate is misoriented by 2 to 10 degrees from the (111) on-axis surface.
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