WO2025241943A1 - Communication method, and apparatus - Google Patents

Abstract

A communication method, and an apparatus, which relate to the technical field of communications, and can determine a PC equation to improve the error correction performance. The method comprises: according to a reliability corresponding to a first sequence having a length of N, a transmitting end device determining a second sequence having a length of M; according to the second sequence, determining a check bit position set and an information bit position set; according to one or more first check equations, the check bit position set and the information bit position set, performing polar coding on an information bit sequence to obtain a coded bit sequence; and outputting one or more bits of the coded bit sequence, wherein the second sequence comprises positions other than positions of pre-frozen bits and positions of rate matching bits in the first sequence, N and M are positive integers, and the one or more first check equations are determined according to one or more of the following: one or more preset check equation sets, the check bit position set, the information bit position set, a code rate, or a rate matching mode.

Description

Communication methods and devices

This application claims priority to Chinese Patent Application No. 202410628804.X, filed on May 20, 2024, entitled "Communication Method and Apparatus", the entire contents of which are incorporated herein by reference.

Technical Field

This application relates to the field of communication technology, and in particular to communication methods and apparatus.

Background Technology

In communication systems, parity-check polar codes (PC-Polar codes) can be used to encode information bit sequences. In this encoding method, a PC-Polar code can include information bits, freeze bits, PC bits, and rate matching bits. The value of the PC bit can be determined based on the values of the information bits preceding it according to the PC equation. The rate matching bit does not need to be transmitted to the channel.

When the length of the information bit sequence is different, the value of the PC bit can be determined according to different PC equations. Therefore, how to determine the PC equation to improve the error correction performance has become an urgent technical problem to be solved.

Summary of the Invention

This application provides a communication method and apparatus that can flexibly determine PC equations to improve error correction performance.

Firstly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: the transmitting device determining a second sequence of length M based on the reliability corresponding to a first sequence of length N; determining a set of check bit positions and a set of information bit positions based on the second sequence; polar encoding the information bit sequence according to one or more first check equations, the set of check bit positions, and the set of information bit positions to obtain an encoded bit sequence; and outputting one or more bits of the encoded bit sequence. The second sequence includes positions in the first sequence excluding the positions of pre-frozen bits and rate-matching bits; N and M are positive integers; the one or more first check equations are determined according to one or more of the following: one or more preset check equation sets, a set of check bit positions, a set of information bit positions, a code rate, or a rate-matching method.

Based on the first aspect, one or more first check equations can be determined according to one or more of the following: one or more preset check equation sets, check bit position sets, information bit position sets, code rates, or rate matching methods. One or more first check equations can be dynamically determined according to the actual communication scenario, which can improve the flexibility and diversity of determining one or more first check equations. Furthermore, the one or more first check equations determined above can better meet the error correction performance requirements of ultra-short code intervals, improve New Radio (NR) compatibility, and also improve decoding performance, thereby enhancing communication performance.

Secondly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: the receiving device receiving information to be decoded from a transmitting device; determining a second sequence of length M based on the reliability corresponding to a first sequence of length N; determining a set of check bit positions and a set of information bit positions based on the second sequence; and decoding the information to be decoded based on one or more first check equations, the set of check bit positions, and the set of information bit positions. The second sequence includes positions in the first sequence excluding the positions of pre-frozen bits and rate-matching bits; N and M are positive integers; and one or more first check equations are determined based on one or more of the following: one or more preset check equation sets, a set of check bit positions, a set of information bit positions, a code rate, or a rate-matching method.

Based on the second aspect, one or more first check equations can be determined according to one or more of the following: one or more preset check equation sets, check bit position sets, information bit position sets, code rates, or rate matching methods. One or more first check equations can be dynamically determined according to the actual communication scenario, which can improve the flexibility and diversity of determining one or more first check equations. Furthermore, the one or more first check equations determined above can better meet the error correction performance requirements of ultra-short code intervals, improve New Radio (NR) compatibility, and also improve decoding performance, thereby enhancing communication performance.

In combination with the first and second aspects, in one possible implementation, the preset check equation set includes one or more preset check equations, the preset check equations include check bit positions and one or more bit positions checked by the check bit positions, and the difference between the number of the check bit position and the number of each bit position in the one or more bit positions is less than a first threshold.

Combining the first and second aspects, in one possible implementation, the first threshold is 21.

Based on the two possible implementations mentioned above, by limiting the difference between the number of the check bit position and the number of each bit position in one or more bit positions to be less than a first threshold, the search space can be greatly reduced, and the optimality can be reduced as little as possible while improving the code spectrum characteristics.

In conjunction with the first and second aspects, in one possible implementation, the parity bit position is numbered as one or more of the following: 5, 9, 10, 11, 13, 17, 18, 19, 21, 23, 25, 26, 27, or 29.

In conjunction with the first and second aspects, in one possible implementation, the numbering of one or more bit positions is one or more of the following: 4, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 20, 22, 24, or 28.

Based on the two possible implementations mentioned above, by determining the number of the parity bit position and the number of one or more bit positions, the search space can be greatly reduced, and the optimality can be reduced as little as possible while improving the code spectrum characteristics. In addition, a preset parity equation set can be determined based on the number of the above positions, which can improve the flexibility and diversity of determining the preset parity equation set.

Combining the first and second aspects, in one possible implementation, the check bit positions in the first check equation are included in the check bit position set.

In a possible implementation, combining the first and second aspects, at least one bit position from one or more bit positions in the first check equation is included in the information bit position set; wherein, the one or more bit positions are one or more bit positions checked by the check bit positions in the first check equation.

Based on the two possible implementations mentioned above, a feasible solution is provided for determining the first set of verification equations.

In a possible implementation, combining the first and second aspects, when the code rate is greater than 7/16, one or more first check equations are determined according to a first preset check equation set, a check bit position set, and an information bit position set; or, when the code rate is less than or equal to 7/16, one or more first check equations are determined according to a second preset check equation set, a check bit position set, and an information bit position set; wherein, the multiple preset check equation sets include a first preset check equation set and a second preset check equation set, and the first preset check equation set is different from the second preset check equation set.

Based on the above possible implementations, the preset check equation set can be determined more precisely according to the code rate. Then, one or more first check equations can be determined based on the determined preset check equation set, the check bit position set, and the information bit position set. This can improve decoding performance and better meet the error correction performance requirements of ultra-short code intervals.

In one possible implementation, combining the first and second aspects, when the rate matching method is shortening, one or more first verification equations are determined based on a first preset verification equation set, a set of verification bit positions, and a set of information bit positions; or, when the rate matching method is puncturing or the lengths N and E of the first sequence are the same, one or more first verification equations are determined based on a second preset verification equation set, a set of verification bit positions, and a set of information bit positions, where E is the length after rate matching; wherein, the multiple preset verification equation sets include a first preset verification equation set and a second preset verification equation set, and the first preset verification equation set is different from the second preset verification equation set.

Based on the above possible implementations, the preset check equation set can be determined more precisely according to the rate matching method. Then, one or more first check equations can be determined according to the determined preset check equation set, the check bit position set, and the information bit position set, which can improve decoding performance and better meet the error correction performance requirements of ultra-short code intervals.

In conjunction with the first and second aspects, in one possible implementation, the number of the check bit position in at least one preset check equation in the first preset check equation set is one or more of the following: 5, 9, 10, 11, 13, 17, 18, 19, 21, or 25.

In conjunction with the first and second aspects, in one possible implementation, the number of one or more bit positions checked in at least one preset check equation in the first preset check equation set is one or more of the following: 4, 6, 7, 8, 10, 12, 13, 14, 15, 16, 18, 19, 20, 22, 23, or 24.

Based on the two possible implementations mentioned above, by determining the number of the check bit position and the number of one or more bit positions in the first preset check equation set, the search space can be greatly reduced, and the optimality can be reduced as little as possible while improving the code spectrum characteristics. In addition, the first preset check equation set can be determined according to the above position numbers, which can improve the flexibility and diversity of determining the first preset check equation set.

In conjunction with the first and second aspects, in one possible implementation, the number of the check bit position in at least one preset check equation in the second preset check equation set is one or more of the following: 17, 18, 19, 21, 23, 25, 26, 27, or 29.

Combining the first and second aspects, in one possible implementation, the number of all bit positions checked in all preset check equations in the second preset check equation set is greater than or equal to the second threshold.

Combining the first and second aspects, in one possible implementation, the second threshold is 12.

In conjunction with the first and second aspects, in one possible implementation, the number of one or more bit positions checked in at least one preset check equation in the second preset check equation set is one or more of the following: 12, 14, 15, 16, 20, 22, or 24.

Based on the above four possible implementations, by determining the number of the check bit position and the number of one or more bit positions in the second preset check equation set, the search space can be greatly reduced, and the optimality can be reduced as little as possible while improving the code spectrum characteristics. In addition, the second preset check equation set can be determined according to the above position numbers, which can improve the flexibility and diversity of determining the second preset check equation set.

Thirdly, embodiments of this application provide a communication device that can be applied to the transmitting end device described in the first aspect to realize the functions performed by the transmitting end device. The communication device can be the transmitting end device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting end device, etc. The communication device can execute the functions performed by the transmitting end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

For example, the processing module is used to determine a second sequence of length M based on the reliability corresponding to a first sequence of length N; wherein the second sequence includes positions in the first sequence excluding the positions of pre-frozen bits and rate-matching bits; N and M are positive integers; the processing module is also used to determine a set of check bit positions and a set of information bit positions based on the second sequence; the processing module is also used to perform polar coding on the information bit sequence according to one or more first check equations, the set of check bit positions, and the set of information bit positions to obtain a coded bit sequence; wherein one or more first check equations are determined according to one or more of the following: one or more preset check equation sets, the set of check bit positions, the set of information bit positions, the code rate, or the rate-matching method; the transceiver module is used to output one or more bits of the coded bit sequence.

Optionally, the transceiver module and processing module of the communication device in the third aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

Fourthly, embodiments of this application provide a communication device that can be applied to the receiving device described in the second aspect to realize the functions performed by the receiving device. The communication device can be the receiving device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving device. The communication device can execute the functions performed by the receiving device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

For example, the transceiver module is used to receive the information to be decoded from the transmitting device; the processing module is used to determine a second sequence of length M based on the reliability corresponding to a first sequence of length N; wherein the second sequence includes positions in the first sequence excluding the positions of pre-frozen bits and rate matching bits; N and M are positive integers; the processing module is also used to determine a set of check bit positions and a set of information bit positions based on the second sequence; the processing module is also used to decode the information to be decoded based on one or more first check equations, the set of check bit positions, and the set of information bit positions; wherein one or more first check equations are determined based on one or more of the following: one or more preset check equation sets, the set of check bit positions, the set of information bit positions, the code rate, or the rate matching method.

Optionally, the transceiver module and processing module of the communication device in the fourth aspect may also perform the corresponding functions in the second aspect or any possible design of the second aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

Fifthly, embodiments of this application provide a communication device, which includes one or more processors; the one or more processors are configured to run computer programs or instructions, such that when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to second aspects is performed.

In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and/or transmitting information.

In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

In a sixth aspect, embodiments of this application provide a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used for inputting and/or outputting information; the logic circuit is used for executing the communication method as described in either the first or second aspect, processing and/or generating information based on the information.

In a seventh aspect, embodiments of this application provide a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in either the first or second aspect to be performed.

Eighthly, embodiments of this application provide a computer program product containing computer instructions that, when run on a computer, causes the communication method described in either the first or second aspect to be executed.

Ninthly, embodiments of this application provide a computer program that, when run on a computer, causes the communication method described in either the first or second aspect to be executed.

In a tenth aspect, embodiments of this application provide a chip, including: a processor coupled to a memory, the memory being used to store programs or instructions, wherein when the program or instructions are executed by the processor, a communication method as described in either the first or second aspect is executed.

The technical effects of any of the design methods in aspects three through ten are similar to those in aspects one and two above, and will not be elaborated upon further.

Eleventhly, embodiments of this application provide a communication system that may include communication means for performing the communication as described in the first aspect or any possible design of the first aspect, and communication means for performing the communication as described in the second aspect or any possible design of the second aspect.

Attached Figure Description

Figure 1 is a schematic diagram of an LTE-RM code decoding process provided in an embodiment of this application;

Figure 2 is a schematic diagram of an upper triangular matrix provided in an embodiment of this application;

Figure 3 is a schematic diagram of a communication system provided in an embodiment of this application;

Figure 4 is a schematic diagram of encoding and decoding performed by a transmitting end device and a receiving end device according to an embodiment of this application;

Figure 5 is a schematic diagram of the composition of a communication device provided in an embodiment of this application;

Figure 6 is an interactive schematic diagram of a communication method provided in an embodiment of this application;

Figure 7 is a simulation diagram illustrating the performance of different encoding methods provided in an embodiment of this application;

Figure 8 is a simulation diagram illustrating the performance of different encoding methods provided in the embodiments of this application;

Figure 9 is a simulation diagram illustrating the performance of different encoding methods provided in an embodiment of this application;

Figure 10 is a schematic diagram of the structure of a transmitting device provided in an embodiment of this application;

Figure 11 is a schematic diagram of the structure of a receiving device provided in an embodiment of this application;

Figure 12 is a schematic diagram of another communication device provided in an embodiment of this application.

Detailed Implementation

Before describing the embodiments of this application, the technical terms involved in the embodiments of this application will be described.

Long Term Evolution-Reed-Muller (LTE-RM) coding: The transmitting device can encode ultra-short bit sequences of 3 to 11 bits in the following manner:

Step 1: Encode the information bit sequence _c0 , _c1 , ..., _cK-1 of length K to obtain the encoded sequence _d0 , _d1 , ..., dN _-1 of length N.

Where K and N are positive integers.

For example, K can be any value from 3 to 11, and N can be 32.

in, The values of M _{_i,k} can be determined according to Table 1 below, where i = 0, 1, 2, ..., N-1.

Table 1

Step 2: Perform rate matching on the encoded sequence _d0 , _d1 , ..., _dN-1 of length N to obtain a rate matching sequence _f0 , _f1 , ..., fE _-1 of length E.

Here, E represents the actual transmitted code length after rate matching, or can be described as the transmitted code length after rate matching, or the length after rate matching. E can be determined based on rate matching related information.

When it is determined that E is not equal to the encoding length N (e.g., E is not equal to 32), the following rate matching method can be adopted: when E is less than N (e.g., E is less than 32), punch holes from back to front; when E is greater than N (e.g., E is greater than 32), repeat from front to back.

For example, the rate-matching sequence _f0 , _f1 , ..., fE _-1 can be obtained as follows:

for k = 0 to E-1

_{f_k} = d_k _{mod N} ;

end for

Step 3: Send the rate matching sequence _f0 , _f1 , ..., fE _-1 .

LTE-RM Decoding: The receiving device can refer to the decoding process diagram shown in Figure 1 to decode the encoded result of the 3-11 bit ultra-short information bit sequence in the following manner:

Step 1: Perform a simple decision (such as a hard decision) on the received sequence, and then interleave the codewords (such as bipolar codewords) or soft bit information after the simple decision to obtain the processed received codewords.

The received sequence can be the rate-matching sequence mentioned above.

Optionally, if the codeword length after simple decision is not equal to N, high-order zeros can be added.

For example, if the codeword after simple decision is _b0 , _b1 , ..., _b19 of length 20, then 12 zeros can be padded in the high bits to obtain a codeword of length N = 32: 0, ..., ₀ , b0, _b1 , ..., _b19 .

Step 2: Interleave the received codewords processed in Step 1 according to the mask vector.

The interleaving process is the same as the interleaving process in step 1 above.

For example, 128 mask vectors can be generated based on 7 basic mask sequences. These 128 mask vectors are then multiplied by the received codewords processed in step 1 (i.e., demasking is performed) to obtain 128 bipolar sequences of length 32.

Step 3: Perform a fast Hadamard transform (FHT) on the bipolar sequence obtained in Step 2 and the 32nd order Hadamard matrix to obtain a 128×32 correlation value matrix.

Step 4: Find the number with the largest absolute value from the correlation matrix obtained in Step 3. The binary form corresponding to the row number of this number with the largest absolute value is the 2nd to 6th bits of the information bit sequence, and the binary form corresponding to the column number is the 7th to 13th bits of the information bit sequence.

Step 5: The first bit of the information bit sequence is determined based on the actual sign of the number with the largest absolute value. That is, if it is positive, it is translated as 0; if it is negative, it is translated as 1.

In steps 4 and 5 above, bits 1 to 13 define the information bit sequence starting from bit 1. It is understood that the information bit sequence can also be defined starting from bit 0, that is, bit 1, bit 2, ..., bit 13 above can be replaced with bit 0, bit 1, ..., bit 12 respectively, without restriction.

However, the LTE-RM decoding method described above uses FHT. When the information bit sequence length is greater than 6 bits, it is necessary to enumerate the mask vector and perform demasking, resulting in high complexity and power consumption for the LTE-RM decoding scheme to achieve maximum likelihood (ML) decoding performance. In addition, when the rate matching length E is small, the number of punctures is large, which can lead to performance defects and affect decoding performance.

Parity-check polar codes (PC-Polar codes) can include information bits, freeze bits, PC bits, and rate-matching bits.

Among these, a subset of frozen bits can be selected as PC bits. The values of these PC bits differ from other frozen bits; they are not fixed at 0, but determined by the values of the preceding information bits using the PC equation. Therefore, PC bits can also be called dynamic frozen bits (i.e., their position originates from frozen bits, but their value is not fixed at 0). Rate matching bits do not need to be transmitted to the channel.

The reliability of each bit can be determined by the reliability sequence. The larger the reliability value, the more reliable the bit corresponding to that reliability. The length of the reliability sequence can be N, where N is a positive integer.

For example, taking a reliability sequence with a length N of 32 as an example, the reliability sequence can be the reliability sequence shown in Table 2 below, where, Indicates reliability. Bits representing reliability:

Table 2

For example, when the length of the information bit sequence is 3, the three positions with the highest reliability in Table 2 can be selected as message bits, that is, the 31st, 30th, and 29th bits of the PC-Polar code (at this time, the starting position of the PC-Polar code is the 0th bit); or, when the length of the information bit sequence is 11, the eleven positions with the highest reliability in Table 2 can be selected as message bits, that is, the 31st, 30th, 29th, 27th, 23rd, 15th, 22nd, 13th, 14th, 11th, and 28th bits of the PC-Polar code (at this time, the starting position of the PC-Polar code is the 0th bit).

The transmitting device can encode ultra-short information bit sequences of 3 to 11 bits based on PC-Polar codes with nested PC equations (pre-transformation) and reliability sequences in the following manner (with N = 32 and the information bit sequence being...). The encoded codeword sequence is For example, where 0 ≤ k ≤ K, and K is the maximum length of the information bit sequence:

Step 1: The sending device selects the K positions with the highest reliability from Table 2 as message bits from positions 0 to 31, and the remaining positions are used as freeze bits. Mapping these bits onto message bits, the remaining 32-K bits are set to 0 to obtain the sequence.

Step 2: The sending device will send the sequence Multiplying with the upper triangular matrix T _{_pre} yields the sequence after the upper triangular pre-transformation.

The upper triangular matrix T _{_pre} can be a 32×32 matrix, as shown in Figure 2. The horizontal axis represents the rows of the upper triangular matrix T _{_pre}, and the vertical axis represents the columns of the upper triangular matrix T_{_pre}. Black dots indicate that the element at that position has a value of 1, and the elements at other positions have a value of 0.

Step 3: Perform pre-transformation on the upper triangular sequence. Polar encoding is performed to obtain the codeword sequence.

Where _G32 is the Polar coding matrix, _{and G32} is the 5th Kronecker product of _G2 .

However, during Polar coding, rate matching needs to be redesigned when the lengths of the information bit sequences are different, and it does not support rate matching for sub-block interleaving as in the NR standard. Furthermore, the information bit positions also need to be redesigned, and it does not support message sequences as in the NR standard. Additionally, the PC equations in the NR standard cannot meet the error correction performance requirements of ultra-short code intervals.

Therefore, how to flexibly determine the PC equations to improve error correction performance has become an urgent technical problem to be solved.

This application provides a communication method, comprising: a transmitting device determining a second sequence of length M based on the reliability corresponding to a first sequence of length N; determining a set of check bit positions and a set of information bit positions based on the second sequence; polar encoding the information bit sequence according to one or more first check equations, the set of check bit positions, and the set of information bit positions to obtain an encoded bit sequence; and outputting one or more bits of the encoded bit sequence. The second sequence includes positions in the first sequence excluding the positions of pre-frozen bits and rate-matching bits; N and M are positive integers; the one or more first check equations are determined according to one or more of the following: one or more preset check equation sets, a set of check bit positions, a set of information bit positions, a code rate, or a rate-matching method.

In this embodiment, one or more first check equations can be determined based on one or more of the following: one or more preset check equation sets, check bit position sets, information bit position sets, code rate, or rate matching. One or more first check equations can be dynamically determined according to the actual communication scenario, improving the flexibility and versatility of determining one or more first check equations. Furthermore, the one or more first check equations determined above can better meet the error correction performance requirements of ultra-short code intervals, improve NR compatibility, and also improve decoding performance, thereby enhancing communication performance.

The embodiments of this application will now be described in detail with reference to the accompanying drawings.

The communication method provided in this application embodiment can be used in any communication system, such as a third-generation partnership project (3GPP) communication system, for example, a long-term evolution (LTE) system, a fifth-generation (5G) mobile communication system, a hybrid LTE and 5G network system, a new radio (NR) system, a vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an internet of things (IoT) system, a narrowband internet of things (NB-IoT) system, a global system for mobile communications (GSM), or an enhanced data rate for GSM evolution system. The following systems are included: EDGE (Electronic Design Equipment), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access 2000 (CDMA2000), Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Enhanced Mobile Broadband (eMBB), Ultra-Reliable and Low-Latency Communication (URLLC), Enhanced Machine-Type Communication (eMTC), and various types of next-generation communication systems, such as sixth-generation (6G) mobile communication systems. These systems can also include non-terrestrial network (NTN) systems (such as satellite communication systems), non-3GPP communication systems, etc., without restriction.

The communication method provided in this application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

The communication system provided in the embodiments of this application will be described below with reference to Figure 3.

Figure 3 is a schematic diagram of a communication system provided in an embodiment of this application. As shown in Figure 3, the communication system may include at least one terminal device and at least one network device.

In Figure 3, the terminal device can be located within the beam/cell coverage area of the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device, and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device, and the network device is the receiving device). It is understood that when network devices communicate with each other, or when terminal devices communicate with each other, communication can also be based on channel coding; that is, the transmitting and receiving devices can both be network devices or both be terminal devices, without restriction.

The terminal device in Figure 3 can be a device with wireless transceiver capabilities or a chip or chip system that can be configured on the device. It allows users to access the network and is used to provide voice and/or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

For example, the terminal device in Figure 3 can be a mobile phone, tablet computer, or computer with wireless transceiver capabilities. The terminal device can also be a user station, mobile station, remote station, remote terminal device, mobile terminal device, user terminal device, wireless communication device, user agent, user device, cellular phone, cordless phone, session initiation protocol (SIP) phone, wireless local loop (WLL) station, personal digital assistant (PDA), handheld device with wireless communication capabilities, computing device, processing device connected to a wireless modem, in-vehicle device, wearable device, terminal device in the Internet of Things (IoT), home appliance, or virtual reality (VR) terminal. The following are not restricted: augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in telemedicine, wireless terminals in smart grids, wireless terminals in smart cities, wireless terminals in smart homes, vehicles with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicles, drones with UAV-to-UAV (U2U) communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs).

In Figure 3, the network device can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system that can be configured within such a device, a logical node or module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network device can be either a wired access device or a wireless access device.

For example, a network device may consist of one or more access network (AN)/radio access network (RAN) nodes. AN/RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, unmanned aerial vehicle (UAV) stations, wireless backhaul nodes, base band units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network equipment can be either ground-based or non-ground-based (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, the names of network equipment with base station functionality may differ in communication systems employing different wireless access technologies; this application does not impose any restrictions on this.

In another example, network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in a central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

In another example, the network device can also include centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, DU, and RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radio access network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

Optionally, in this embodiment of the application, the transmitting device (or source) and the receiving device (or sink) can use the process shown in Figure 4 below for encoding and decoding. The transmitting device can be any terminal device or network device in the communication system shown in Figure 3, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 3.

In this process, the transmitting device performs source coding on its generated bits to obtain a source bit stream. Then, it performs channel coding on the source bit stream, modulates it, and transmits the modulated symbols to the receiving device through a noisy channel. When the receiving device receives the modulated symbols through the noisy channel, it demodulates them, performs channel decoding to recover the source bit stream, and then performs source recovery to obtain the decoded result.

In specific implementation, as shown in Figure 3, each terminal device and network device can adopt the composition structure shown in Figure 5, or include the components shown in Figure 5. Figure 5 is a schematic diagram of the composition of a communication device 500 provided in an embodiment of this application. The communication device 500 can be a terminal device or a chip or system-on-a-chip in a terminal device; it can also be a network device or a chip or system-on-a-chip in a network device. As shown in Figure 5, the communication device 500 includes a processor 501, a transceiver 502, and a communication line 503.

Furthermore, the communication device 500 may also include a memory 504. The processor 501, memory 504, and transceiver 502 can be connected via a communication line 503.

The processor 501 can be a central processing unit (CPU), a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 501 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

Transceiver 502 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area network (WLAN), etc. Transceiver 502 can be a module, circuit, transceiver, or any device capable of enabling communication.

Communication line 503 is used to transmit information between the components included in communication device 500.

Memory 504 is used to store instructions. These instructions can be computer programs.

The memory 504 can be a read-only memory (ROM) or other type of static storage device that can store static information and/or instructions; it can also be a random access memory (RAM) or other type of dynamic storage device that can store information and/or instructions; it can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices, etc., without limitation.

It should be noted that the memory 504 can exist independently of the processor 501 or can be integrated with the processor 501. The memory 504 can be used to store instructions, program code, or some data, etc. The memory 504 can be located inside or outside the communication device 500, without limitation. The processor 501 is used to execute the instructions stored in the memory 504 to implement the communication method provided in the following embodiments of this application.

In one example, processor 501 may include one or more CPUs, such as CPU0 and CPU1 in Figure 5.

As an optional implementation, the communication device 500 may include multiple processors, for example, in addition to the processor 501 in FIG. 5, it may also include a processor 507.

As an optional implementation, the communication device 500 also includes an output device 505 and an input device 506. For example, the input device 506 is a device such as a keyboard, mouse, microphone, or joystick, and the output device 505 is a device such as a display screen or speaker.

It should be noted that the communication device 500 can be a desktop computer, a portable computer, a web server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device with a similar structure to that shown in Figure 5. Furthermore, the composition shown in Figure 5 does not constitute a limitation on the communication device. In addition to the components shown in Figure 5, the communication device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

The communication method provided in the embodiments of this application will be described below with reference to the communication system shown in Figure 3 and Figure 6. The transmitting device can be any terminal device or network device in the communication system shown in Figure 3, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 3. The transmitting or receiving device described in the following embodiments may include the components shown in Figure 5.

Figure 6 is an interaction diagram of a communication method provided in an embodiment of this application. As shown in Figure 6, the method may include:

Step 601: The transmitting device determines a second sequence of length M based on the reliability corresponding to the first sequence of length N.

Where N is the length of the master code for data transmission, and the second sequence includes all positions in the first sequence except for the positions of the pre-frozen bits and the rate matching bits. M is a positive integer.

For example, the transmitting device can determine the mother code length N = max(min([ _{N_M} , _NR , _{N_max} ]), 32, based on the length K of the information bit sequence and the length E after rate matching. _{N_M} is related to the code rate R = K/E and _{N_DM} . If E ≤ 9/8 × _NDM /2 and R < 9/16, then _NM = _NDM /2; otherwise, _NM = _NDM . _NR is related to K and the minimum bit rate _Rmin . R _min =1/8. N _max =1024.

in, This is for rounding up.

The information bit sequence may include information bits, CRC bits, or the information bit sequence may include only information bits themselves. K may be the sum of the number of information bits and the number of CRC bits included in the information bit sequence. Alternatively, K may be the number of information bits included in the information bit sequence.

The transmitting device can determine the reliability of the first sequence based on the reliability sequence of length N, and then determine the second sequence of length M.

The reliability sequence can be used to indicate the reliability of each bit position in the sequence. The higher the reliability value, the more reliable the position corresponding to that reliability.

Optionally, the reliability sequence can be predefined by the protocol. The sending device can select a reliability sequence of length N from one or more predefined reliability sequences.

For example, taking the sending device determining N to be 32 as an example, the reliability sequence of length 32 can be the reliability sequence shown in Table 2 above. It is understood that Table 2 above is defined starting from 0 bits, or it can be defined starting from 1 bit, that is, 0, 1, ..., 31 can be replaced with 1, 2, ..., 32 respectively, without restriction.

Based on the above reliability sequence, the transmitting device can determine the position of the pre-frozen bit and the position of the rate matching bit in the first sequence according to the reliability corresponding to the first sequence of length N, and determine the positions in the first sequence other than the positions of the pre-frozen bit and the rate matching bit as the second sequence.

The position of the rate matching bit can be determined based on the rate matching method.

For example, the rate matching method can be determined based on the length E after rate matching and the length N of the master code. For instance, if E > N, the rate matching method is determined to be repetition, meaning that after the transmitting device sends a master code of length N, it retransmits (E-N) bits. If E < N, the transmitting device can determine whether to puncture or shorten based on the current code rate R = K/E. If R < 7/16, rate matching is performed according to the puncturing method, i.e., puncturing (N-E) bits; otherwise, shortening (N-E) bits.

For example, taking the length N of the first sequence as 32, the first sequence can be sorted from low to high reliability as follows: {1 2 3 5 9 17 4 6 10 7 18 11 19 13 21 11 8 12 20 14 15 22 27 12 23 29 16 10 28 30 31 32}. Assuming the positions of the rate matching bit and the pre-freeze bit are {1 2}, the second sequence can be {3 5 9 17 4 6 10 7 18 11 19 13 21 11 8 12 20 14 15 22 27 12 23 29 16 10 28 30 31 32}. Alternatively, assuming the positions of the rate matching bit and the pre-freeze bit are {13 21 11 20 14 15 22 27 12 23 29 16 10 28 30 31 32}, the second sequence can be {1 2 3 5 9 17 4 6 10 7 18 11 19 8 12}.

Step 602: The transmitting device determines the set of check bit positions and the set of information bit positions based on the second sequence.

The set of check bit positions includes a first set of check bit positions and a second set of check bit positions. The first set of check bit positions includes the most reliable bit position in the first set whose row weight is equal to w _min. The second set of check bit positions includes the least reliable position from the first set of positions. One position.

The first position set includes the (K+n _PC ) most reliable positions in the second sequence, where K is the length of the information bit sequence, n _PC is the number of check bits, and w _min is the minimum row weight corresponding to the K most reliable positions in the first position set.

Optionally, _nPC can be less than or equal to the difference between M and K. For example, if M equals 30 and K equals 11, then _nPC is less than or equal to 19.

In one example, taking the second sequence {3 5 9 17 4 6 10 7 18 11 19 13 21 11 8 12 20 14 15 22 27 12 23 29 16 10 28 30 31 32} as an example, assuming K equals 11 and _nPC equals 19, then the set of the first position can be {3 5 9 17 4 6 10 7 18 11 19 13 21 11 8 12 20 14 15 22 27 12 23 29 16 10 28 30 31 32}.

In another example, taking the second sequence as {1 2 3 5 9 17 4 6 10 7 18 11 19 8 12} as an example, assuming K equals 8 and _nPC equals 7, then the first position set can be {1 2 3 5 9 17 4 6 10 7 18 11 19 8 12}.

Optional, It can be determined based on one or more of the following: K, E, or bit rate.

The bitrate can be referred to in the above description of bitrate, and will not be repeated here.

For example, It can be determined based on K, for example, when K is greater than or equal to 3 and less than or equal to 6. It can be 0. Or, when K is greater than 6 (or K is greater than or equal to 7) and less than or equal to 11, It can be determined based on one or more of the following: bitrate, EK, for example, when the bitrate is less than or equal to 7/16 (i.e., K/E ≤ 7/16, or R ≤ 7/16), It can be 4; for example, when the bitrate is greater than 7/16, It can be determined based on EK (e.g., when EK is less than or equal to 5 (i.e., EK≤5)). It can be Alternatively, when EK is greater than 5 (i.e., EK>5), It can be EK-6).

In one example, with K equal to 11, _nPC equal to 19, and the first position set being {3 5 9 17 4 6 10 7 18 11 19 13 21 11 8 12 20 14 15 22 27 12 23 29 16 10 28 30 31 32}, the row weight of {32} in this first position set is 32, the row weight of {16 10 28 30 31} is 16, the row weight of {8 12 20 14 15 22 27 12 23 29} is 8, and the row weight of {3 5 9 17 4 6 10 7 18 11 19 13 21 11} is 4. The most reliable K=11 positions in the first position set are {22 27 12}. Given the sequence 23 29 16 10 28 30 31 32, the minimum row weight _wmin corresponding to these 11 positions is 8. Assume... If the value is 4, then the most reliable value in the first position set is the row weight equal to _wmin = 8. Positions {27 26 23 29} represent the first set of check bit positions. The least reliable position in this first set is... The positions are {3 5 9 17 4 6 10 7 18 11 19 13 21 25 8}, which is the set of positions for the second check bit.

The set of check bit positions can be {3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 27 26 23 29}.

In another example, assuming K equals 8, _nPC equals 7, and the first position set is {1 2 3 5 9 17 4 6 10 7 18 11 19 8 12}, the row weight of {16 10 28 30 31} in this first position set is 4, and the row weight of {8 12} is 8. The most reliable K = 8 positions in the first position set are {6 10 7 18 11 19 8 12}. Therefore, the minimum row weight _wmin corresponding to these 11 positions is 4. Assume... If the value is 1, then the most reliable value in the first position set is the row weight equal to _wmin = 4. The set of positions {19} represents the first check bit positions. The least reliable position in the first set is... The positions are {1 2 3 5 9 17}, which is the set of positions for the second check bit.

The set of check bit positions can be {1 2 3 5 9 17 19}.

The information bit location set includes the locations in the first location set excluding the check bit location set.

In one example, taking the first position set as {2 4 8 16 3 5 9 6 17 10 18 12 20 10 7 11 19 13 14 21 12 11 22 28 15 23 27 29 30 31} and the check bit position set as {3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 27 26 23 29}, the information bit position set can be {12 20 14 15 22 16 10 28 30 31 32}.

In another example, taking the first position set as {1 2 3 5 9 17 4 6 10 7 18 11 19 8 12} and the check bit position set as {1 2 3 5 9 17 19} as an example, the information bit position set can be {4 6 10 7 18 11 8 12}.

Step 603: The transmitting device performs polar coding on the information bit sequence according to one or more first check equations, check bit position sets, and information bit position sets to obtain the coded bit sequence.

The first parity check equation is used to determine the value of the parity bit. For example, taking the first parity check equation as [6,8,10], the parity bit position number (or sequence number) is 10, and the positions of the bits being checked are numbered 6 and 8. The parity bit value (i.e., the bit value corresponding to bit position 10) can be determined by the bit values corresponding to bit positions 6 and 8. For instance, when the bit values corresponding to bit positions 6 and 8 are 11 or 00, the parity bit value can be determined to be 0 (i.e., the bit value corresponding to bit position 10 is 0) based on parity check (i.e., the number of bits with a value of 1 is even); or when the bit values corresponding to bit positions 6 and 8 are 10 or 01, the parity bit value can be determined to be 1 (i.e., the bit value corresponding to bit position 10 is 1) based on parity check (i.e., the number of bits with a value of 1 is odd).

Optionally, one or more first check equations can be determined according to one or more of the following: one or more preset check equation sets, check bit position sets, information bit position sets, code rate, or rate matching methods.

The preset check equation set may include one or more preset check equations, and each preset check equation includes a check bit position and one or more bit positions checked by the check bit position. For example, the check bit position may be located at the last position of the preset check equation, and the check bit position may be located at any position other than the last position of the preset check equation.

Optionally, the difference between the parity bit position number and the number of each of the one or more bit positions is less than a first threshold. By limiting the difference between the parity bit position number and the number of each of the one or more bit positions to less than a first threshold, the search space can be greatly reduced, and optimality can be minimized while improving code spectrum characteristics.

For example, the first threshold can be 21.

For example, the parity bit position number can be one or more of the following: 5, 9, 10, 11, 13, 17, 18, 19, 21, 23, 25, 26, 27, or 29.

For example, the numbering of one or more bit positions can be one or more of the following: 4, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 20, 22, 24, or 28.

For example, taking the check bit position number as 29 and the first threshold as 21, the number of one or more bit positions can be one or more of the following: 15 (i.e., 29-15 = 14 < 21), 22 (i.e., 29-22 = 7 < 21), 28 (i.e., 29-28 = 1 < 21).

Understandably, the preset check equation set can be determined based on the numbering of the above positions, which can improve the flexibility and diversity of determining the preset check equation set.

It is understood that one or more first check equations can be determined based on a preset check equation set, a check bit position set, and an information bit position set, or they can be determined based on at least two preset check equation sets, a check bit position set, an information bit position set, a code rate, and a rate matching method. For details, please refer to the following description of one or more first check equations, which will not be repeated here.

Step 604: The transmitting device outputs one or more bits of the encoded bit sequence; correspondingly, the receiving device receives the decoding information from the transmitting device.

The length of the information bit sequence corresponding to the information to be decoded is K.

In this process, one or more bits in the encoded bit sequence sent by the transmitting device to the receiving device may be affected by noise and other interference during transmission through the channel. The information to be decoded received by the receiving device is one or more bits in the encoded bit sequence that have been affected by noise and other interference.

Step 605: The receiving device determines the second sequence of length M based on the reliability corresponding to the first sequence of length N.

Step 606: The receiving device determines the set of check bit positions and the set of information bit positions based on the second sequence.

The method by which the receiving device determines the set of check bit positions and the set of information bit positions based on steps 605 and 606 can be referred to the method by which the sending device determines the set of check bit positions and the set of information bit positions based on steps 601 and 602, and will not be repeated here.

Step 607: The receiving device decodes the information to be decoded according to one or more first check equations, check bit position sets, and information bit position sets.

The first parity check equation is used to decode the parity bit. For example, taking the first parity check equation as [6,8,10], bit position 10 can be decoded using bit position 6 and bit position 8. For instance, when the bit value corresponding to bit position 6 and bit position 8 is 11 or 00, bit position 10 can be decoded as 0; or when the bit value corresponding to bit position 6 and bit position 8 is 10 or 01, bit position 10 can be decoded as 1.

Based on the communication method shown in Figure 6, one or more first check equations can be determined according to one or more of the following: one or more preset check equation sets, check bit position sets, information bit position sets, code rate, or rate matching. One or more first check equations can be dynamically determined according to the actual communication scenario, which can improve the flexibility and diversity of determining one or more first check equations. Furthermore, the one or more first check equations determined above can better meet the error correction performance requirements of ultra-short code intervals, improve NR compatibility, and also improve decoding performance, thereby enhancing communication performance.

Based on the communication method shown in Figure 6 above, optionally, the check bit positions in the first check equation are included in the check bit position set.

The first check equation can be selected from one or more preset check equation sets. During the selection process, it must be ensured that the position of the check bit in the first check equation is included in the check bit position set. For example, if there are four preset check equations [4,5], [4,6,9], [8,10] and [6,7,8,11], and the check bit position set includes {11} but does not include {5,9,10}, then [6,7,8,11] can be used as the first check equation.

Optionally, the check bit positions in the first check equation are included in the set of check bit positions, and at least one bit position among one or more bit positions in the first check equation is included in the set of information bit positions. Alternatively, the check bit positions in the first check equation are included in the set of check bit positions, and one or more bit positions in the first check equation are included in the set of information bit positions. Wherein, the one or more bit positions are one or more bit positions checked by the check bit positions in the first check equation.

For example, taking the existence of four preset check equations [4,5], [4,6,9], [8,10], and [6,7,8,11] as an example, assuming that the set of check bit positions includes {11} but not {5,9,10}, and the set of information bit positions includes {6} but not {7,8}, then [6,11] can be used as the first check equation; or, assuming that the set of check bit positions includes {11} but not {5,9,10}, and the set of information bit positions includes {6,7,8}, then [6,7,8,11] can be used as the first check equation.

Based on the above, this application proposes two possible designs for determining one or more first verification equations:

In the first possible design, when there is a preset set of check equations, one or more first check equations can be determined based on the preset set of check equations, the set of check bit positions, and the set of information bit positions.

For example, a pre-defined set of verification equations can be represented as:
[4,5]
[4,6,9]
[8,10]
[6,7,8,11]
[6,7,10,12,13]
[8,10,12,13,14,17]
[4,7,14,18]
[4,6,7,10,16,19]
[4,6,7,11,12,15,20,21]
[16,22,23]
[6,8,12,15,20,22,25]
[15,20,24,26]
[12,14,15,20,27]
[15,22,28,29]

Each row can represent a preset check equation. Taking the first preset check equation (i.e. [4,5]) as an example, the position of the check bit in the preset check equation is 5, and the position of the bit to be checked is 4.

When determining one or more first check equations, the positions of the check bits in each first check equation can be included in the check bit position set, and simultaneously, one or more bits in each first check equation can be included in the information bit position set. Here, the one or more bit positions are the one or more bit positions verified by the check bit positions in the first check equation.

For example, taking the preset check equation set in the above example, with the check bit position set as {3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 27 26 23 29}, the check bit positions in the first to fourth preset check equations are not in the check bit position set, while the check bit positions in the fifth to fourteenth preset check equations are included in the check bit position set. In addition, at least one bit position in one or more bit positions in the fifth to fourteenth preset check equations is included in the information bit position set. One or more first check equations can be determined from the fifth to fourteenth preset check equations. For example, taking the fifth preset check equation as an example, the number of the check bit position in the fifth preset check equation is 13, and the number of the check bit position is 6, 7, 10, and 12. It can be determined that [12, 13] is the first check equation.

Based on the first possible design, this application proposes a possible embodiment. Taking the set of check bit positions as {3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 27 26 23 29} and the set of information bit positions as {12 20 14 15 22 16 10 28 30 31 32} as an example, multiple first check equations can be determined from the preset check equation set in the above example based on the set of check bit positions and the set of information bit positions. These multiple first check equations can be:
[12,13]
[12,14,17]
[14,18]
[16,19]
[12,15,20,21]
[16,22,23]
[12,15,20,22,25]
[15,20,24,26]
[12,14,15,20,27]
[15,22,28,29]

Figure 7 illustrates a performance comparison of simulation results for LTE-RM codes (curve 1) and Polar codes (curves 2 and 3) with the same code length and the length after rate matching. Curve 2 corresponds to the Polar code determined based on the above possible embodiments, and curve 3 corresponds to the Polar code determined based on the shift register. The horizontal axis represents the length after rate matching (i.e., E), and the vertical axis represents the signal-to-noise ratio (SNR).

As can be seen from Figure 7, the Polar code determined based on the above possible embodiments has better decoding performance under SCL8 decoding, which is significantly better than the ML decoding performance of LTE-RM code under SCL8 decoding, as well as the decoding performance of Polar code determined based on shift register.

In the second possible design, when there are multiple preset check equation sets (such as a first preset check equation set and a second preset check equation set), one or more first check equations can be determined based on multiple preset check equation sets, check bit position set, information bit position set, and code rate; or, one or more first check equations can be determined based on multiple preset check equation sets, check bit position set, information bit position set, and rate matching.

The first preset verification equation set is different from the second preset verification equation set.

For example, the number of the check bit position in at least one preset check equation in the first preset check equation group can be one or more of the following: 5, 9, 10, 11, 13, 17, 18, 19, 21, or 25.

For example, the number of one or more bit positions checked in at least one preset check equation in the first preset check equation set can be one or more of the following: 4, 6, 7, 8, 10, 12, 13, 14, 15, 16, 18, 19, 20, 22, 23, or 24.

It is understandable that by determining the numbers of the check bit positions and one or more bit positions in the first preset check equation set, the search space can be greatly reduced, and the optimality can be reduced as little as possible while improving the code spectrum characteristics. In addition, the first preset check equation set can be determined based on the above position numbers, which can improve the flexibility and diversity of determining the first preset check equation set.

For example, the first preset set of verification equations can be:
[4,5]
[7,9]
[6,8,10]
[6,7,10,11]
[4,6,8,12,13]
[7,13,14,16,17]
[6,7,8,14,15,18]
[4,7,10,15,16,18,19]
[4,7,15,18,19,21]
[4,14,16,20,22,23,24,25]

For example, the number of the check bit position in at least one preset check equation in the second preset check equation set can be one or more of the following: 17, 18, 19, 21, 23, 25, 26, 27, or 29.

For example, in the second preset check equation group, the numbers of all bit positions checked in all preset check equations are greater than or equal to the second threshold.

For example, the second threshold can be 12.

For example, the number of one or more bit positions checked in at least one preset check equation in the second preset check equation group is one or more of the following: 12, 14, 15, 16, 20, 22, or 24.

It is understandable that by determining the numbers of the check bit positions and one or more bit positions in the second preset check equation set, the search space can be greatly reduced, and the optimality can be reduced as little as possible while improving the code spectrum characteristics. In addition, the second preset check equation set can be determined based on the above position numbers, which can improve the flexibility and diversity of determining the second preset check equation set.

For example, the second preset set of verification equations can be:
[12,17]
[14,18]
[16,19]
[14,21]
[14,16,23]
[12,14,15,25]
[12,15,22,24,26]
[14,15,22,27]
[14,15,20,22,29]

Based on the second possible design, this application proposes two possible implementations for determining one or more first verification equations:

In one possible implementation, one or more first check equations can be determined based on multiple preset check equation sets, check bit position sets, information bit position sets, and code rate.

Specifically, when the code rate is greater than 7/16, one or more first check equations are determined based on a first preset check equation set, a check bit position set, and an information bit position set. When the code rate is less than or equal to 7/16, one or more first check equations are determined based on a second preset check equation set, a check bit position set, and an information bit position set.

When determining one or more first check equations, the positions of the check bits in each first check equation can be included in the check bit position set, and simultaneously, the one or more bit positions in each first check equation can be included in the information bit position set. Here, the one or more bit positions are the one or more bit positions verified by the check bit positions in the first check equations.

Based on the first possible implementation, this application proposes a possible embodiment, taking E equal to 30, K equal to 11, the set of check bit positions as {3 5 9 17 4 6 10 7 18 11 19 13 21 25 8 27 26 23 29}, and the set of information bit positions as {12 20 14 15 22 16 10 28 30 31 32} as an example. Based on the ratio of K to E (i.e., the code rate is less than 7/16), a second preset check equation set can be determined. Multiple first check equations can be determined from the second preset check equation set in the above example. These multiple first check equations can be:
[12,17]
[14,18]
[16,19]
[14,21]
[14,16,23]
[12,14,15,25]
[12,15,22,24,26]
[14,15,22,27]
[14,15,20,22,29]

Figure 8 illustrates a performance comparison of simulation results for LTE-RM codes (curve 1) and Polar codes (curves 2 and 3) with the same code length and rate-matched length. Curve 2 corresponds to the Polar code determined based on a possible embodiment in the first possible implementation, and curve 3 corresponds to the Polar code determined based on a shift register. The horizontal axis represents the rate-matched length (E), and the vertical axis represents the SNR.

As can be seen from Figure 8, the Polar code determined based on the possible embodiments in the first possible implementation has better decoding performance under SCL8 decoding, which is significantly better than the ML decoding performance of LTE-RM code under SCL8 decoding, as well as the decoding performance of Polar code determined based on shift register.

In a second possible implementation, one or more first check equations can be determined based on multiple preset check equation sets, check bit position sets, information bit position sets, and rate matching methods.

Specifically, when the rate matching method is shortening, one or more first check equations are determined based on a first preset check equation set, a check bit position set, and an information bit position set. When the rate matching method is puncturing or N (i.e., the length of the first sequence) and E (i.e., the length after rate matching) are the same, one or more first check equations are determined based on a second preset check equation set, a check bit position set, and an information bit position set.

When determining one or more first check equations, the positions of the check bits in each first check equation can be included in the check bit position set, and simultaneously, the one or more bit positions in each first check equation can be included in the information bit position set. Here, the one or more bit positions are the one or more bit positions verified by the check bit positions in the first check equations.

Based on the second possible implementation, this application proposes a possible embodiment, taking a shortened rate matching method (e.g., E equals 15), a check bit position set of {1 2 3 5 9 17 19}, and an information bit position set of {4 6 10 7 18 11 8 12} as an example. A preset check equation set can be determined as the first preset check equation set according to the rate matching method. Multiple first check equations can be determined from the first preset check equation set in the above example. These multiple first check equations can be:
[4,5]
[7,9]
[7,17]
[4,7,10,18,19]

Figure 9 illustrates a performance comparison of simulation results for LTE-RM codes (curve 1) and Polar codes (curves 2 and 3) with the same code length and rate-matched length. Curve 2 corresponds to the Polar code determined based on a possible embodiment in the second possible implementation, and curve 3 corresponds to the Polar code determined based on a shift register. The horizontal axis represents the rate-matched length (E), and the vertical axis represents the SNR.

As can be seen from Figure 9, the Polar code determined based on the possible embodiments in the second possible implementation has better decoding performance under SCL8 decoding, which is significantly better than the ML decoding performance of LTE-RM code under SCL8 decoding, as well as the decoding performance of Polar code determined based on shift register.

It should be noted that the various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict, the terminology and/or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and/or software modules for executing each function. Those skilled in the art should readily recognize that, based on the algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

Figure 10 shows a transmitting device 100 when each functional module is divided according to its corresponding function. The transmitting device 100 can perform the actions performed by the transmitting device in the method shown in Figure 6 above. All relevant content of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiment, and will not be repeated here.

The transmitting device 100 may include a transceiver module 1001 and a processing module 1002. Exemplarily, the transmitting device 100 may be a communication device, or a chip or other combination device or component having the aforementioned transmitting device functions applied in a communication device. When the transmitting device 100 is a communication device, the transceiver module 1001 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1002 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 100 is a component having the aforementioned transmitting device functions, the transceiver module 1001 may be a radio frequency unit; the processing module 1002 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 100 is a chip system, the transceiver module 1001 may be an input/output interface of a chip (e.g., a baseband chip); the processing module 1002 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1001 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1002 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

For example, the transceiver module 1001 can be used to execute all the transceiver operations performed by the sending device in the embodiment shown in FIG6, and/or to support other processes of the technology described herein; the processing module 1002 can be used to execute all operations other than the transceiver operations performed by the sending device in the embodiment shown in FIG6, and/or to support other processes of the technology described herein.

Figure 11 shows a receiving device 110, which can perform the actions performed by the receiving device in the method shown in Figure 6 above. All relevant content of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and the technical effects that can be obtained can be referred to the above method embodiment, which will not be repeated here.

The receiving device 110 may include a transceiver module 1101 and a processing module 1102. For example, the receiving device 110 may be a communication device, or a chip or other combination device or component having the aforementioned receiving device functions. When the receiving device 110 is a communication device, the transceiver module 1101 may be a transceiver, which may include an antenna and radio frequency circuits; the processing module 1102 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the receiving device 110 is a component having the aforementioned receiving device functions, the transceiver module 1101 may be a radio frequency unit; the processing module 1102 may be a processor (or processing circuit), such as a baseband processor. When the receiving device 110 is a chip system, the transceiver module 1101 may be an input/output interface of a chip (e.g., a baseband chip); the processing module 1102 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1101 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1102 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

For example, the transceiver module 1101 can be used to perform all the transceiver operations performed by the receiving device in the embodiment shown in FIG6, and/or to support other processes of the technology described herein; the processing module 1102 can be used to perform all operations other than the transceiver operations performed by the receiving device in the embodiment shown in FIG6, and/or to support other processes of the technology described herein.

As another possible implementation, the transceiver module 1001 in Figure 10 can be replaced by a transceiver unit that integrates the functions of the transceiver module 1001; the processing module 1002 can be replaced by a processor that integrates the functions of the processing module 1002. Furthermore, the transmitting end device 100 shown in Figure 10 may also include a memory. Alternatively, the transceiver module 1101 in Figure 11 can be replaced by a transceiver unit that integrates the functions of the transceiver module 1101; the processing module 1102 can be replaced by a processor that integrates the functions of the processing module 1102. Furthermore, the receiving end device 110 shown in Figure 11 may also include a memory.

Alternatively, when the processing module 1002 is replaced by a processor and the transceiver module 1001 is replaced by a transceiver, the transmitting end device 100 involved in the embodiments of this application can also be the communication device 120 shown in FIG12. Or, when the processing module 1102 is replaced by a processor and the transceiver module 1101 is replaced by a transceiver, the receiving end device 110 involved in the embodiments of this application can also be the communication device 120 shown in FIG12.

The processor can be logic circuit 1201, and the transceiver can be interface circuit 1202. Furthermore, the communication device 120 shown in FIG12 may also include a memory 1203.

This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending end and/or a data receiving end) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

It should be noted that the terms "first" and "second," etc., in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

It should be understood that in this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And/or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and/or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character "/" generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. Both "...when" and "if" indicate that a corresponding action will be taken under certain objective circumstances. They are not time limits, nor do they require a judgment action to be taken when the action is taken, nor do they imply any other limitations.

In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims (20)

A communication method, characterized in that it includes: Based on the reliability corresponding to the first sequence of length N, a second sequence of length M is determined; wherein, the second sequence includes the positions in the first sequence excluding the positions of the pre-frozen bits and the rate matching bits; and N and M are positive integers. Based on the second sequence, determine the set of check bit positions and the set of information bit positions; According to one or more first check equations, the check bit position set, and the information bit position set, the information bit sequence is polar-coded to obtain the encoded bit sequence; wherein, the one or more first check equations are determined according to one or more of the following: one or more preset check equation sets, the check bit position set, the information bit position set, the code rate, or the rate matching method. Output one or more bits of the encoded bit sequence. A communication method, characterized in that it includes: Receive the information to be decoded from the sending device; Based on the reliability corresponding to the first sequence of length N, a second sequence of length M is determined; wherein, the second sequence includes the positions in the first sequence excluding the positions of the pre-frozen bits and the rate matching bits; and N and M are positive integers. Based on the second sequence, determine the set of check bit positions and the set of information bit positions; The information to be decoded is decoded according to one or more first check equations, the set of check bit positions, and the set of information bit positions; wherein the one or more first check equations are determined according to one or more of the following: one or more preset check equation sets, the set of check bit positions, the set of information bit positions, the code rate, or the rate matching method. The method according to claim 1 or 2, characterized in that, The preset check equation set includes one or more preset check equations. The preset check equation includes a check bit position and one or more bit positions checked by the check bit position. The difference between the number of the check bit position and the number of each bit position in the one or more bit positions is less than a first threshold. The method according to claim 3, characterized in that, The first threshold is 21. The method according to claim 3 or 4, characterized in that, The check bit position number is one or more of the following: 5, 9, 10, 11, 13, 17, 18, 19, 21, 23, 25, 26, 27, or 29. The method according to any one of claims 3-5, characterized in that, The numbering of the one or more bit positions is one or more of the following: 4, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 20, 22, 24, or 28. The method according to any one of claims 1-6, characterized in that, The check bit positions in the first check equation are included in the set of check bit positions. The method according to any one of claims 1-7, characterized in that, At least one bit position from one or more bit positions in the first check equation is included in the set of information bit positions; wherein, the one or more bit positions are one or more bit positions checked by the check bit positions in the first check equation. The method according to any one of claims 1-8 is characterized in that, when there are multiple preset verification equation sets, When the code rate is greater than 7/16, the one or more first check equations are determined based on the first preset check equation set, the check bit position set, and the information bit position set; or When the code rate is less than or equal to 7/16, the one or more first check equations are determined according to the second preset check equation set, the check bit position set, and the information bit position set; The plurality of preset verification equation sets include the first preset verification equation set and the second preset verification equation set, wherein the first preset verification equation set and the second preset verification equation set are different. The method according to any one of claims 1-9 is characterized in that, when there are multiple preset verification equation sets, When the rate matching method is shortening, the one or more first check equations are determined based on the first preset check equation set, the check bit position set, and the information bit position set; or When the rate matching method is punching or the lengths N and E of the first sequence are the same, the one or more first verification equations are determined according to the second preset verification equation set, the verification bit position set, and the information bit position set, where E is the length after rate matching; The plurality of preset verification equation sets include the first preset verification equation set and the second preset verification equation set, wherein the first preset verification equation set and the second preset verification equation set are different. The method according to claim 9 or 10, characterized in that, The check bit position number in at least one of the following preset check equations in the first preset check equation group is one or more of the following: 5, 9, 10, 11, 13, 17, 18, 19, 21, or 25. The method according to any one of claims 9-11, characterized in that, The number of one or more bit positions checked in at least one preset check equation in the first preset check equation group is one or more of the following: 4, 6, 7, 8, 10, 12, 13, 14, 15, 16, 18, 19, 20, 22, 23, or 24. The method according to any one of claims 9-12, characterized in that, The check bit position in at least one of the preset check equations in the second preset check equation set is numbered as one or more of the following: 17, 18, 19, 21, 23, 25, 26, 27, or 29. The method according to any one of claims 9-13, characterized in that, In the second preset check equation group, the check bit positions in all preset check equations are greater than or equal to the second threshold. The method according to claim 14, characterized in that, The second threshold is 12. The method according to any one of claims 9-15, characterized in that, The number of one or more bit positions checked in at least one preset check equation in the second preset check equation group is one or more of the following: 12, 14, 15, 16, 20, 22, or 24. A communication device, characterized in that the communication device includes a processor; the processor is configured to run a computer program or instructions to cause the communication method as described in any one of claims 1, 3-16 to be executed, or to cause the communication method as described in any one of claims 2-16 to be executed. A communication device, characterized in that the communication device includes an interface circuit and a logic circuit; the interface circuit is used for inputting and/or outputting information; the logic circuit is used for executing the communication method as described in any one of claims 1, 3-16, or executing the communication method as described in any one of claims 2-16, processing and/or generating the information based on the information. A computer-readable storage medium, characterized in that the computer-readable storage medium stores computer instructions or programs that, when executed on a computer, cause the communication method as described in any one of claims 1, 3-16 to be executed, or cause the communication method as described in any one of claims 2-16 to be executed. A computer program product, characterized in that the computer program product includes computer instructions; when some or all of the computer instructions are executed on a computer, they cause the communication method as described in any one of claims 1, 3-16 to be executed, or cause the communication method as described in any one of claims 2-16 to be executed.