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WO2025121537A1 - Circuit neuronal d'un réseau neuronal artificiel, ayant une fonction de compensation de variations de tension de seuil - Google Patents

Circuit neuronal d'un réseau neuronal artificiel, ayant une fonction de compensation de variations de tension de seuil Download PDF

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Publication number
WO2025121537A1
WO2025121537A1 PCT/KR2024/000358 KR2024000358W WO2025121537A1 WO 2025121537 A1 WO2025121537 A1 WO 2025121537A1 KR 2024000358 W KR2024000358 W KR 2024000358W WO 2025121537 A1 WO2025121537 A1 WO 2025121537A1
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WO
WIPO (PCT)
Prior art keywords
threshold voltage
neural network
artificial neural
neuron circuit
capacitor
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PCT/KR2024/000358
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English (en)
Korean (ko)
Inventor
이수연
박준형
윤유민
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SNU R&DB Foundation
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Seoul National University R&DB Foundation
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means

Definitions

  • the present disclosure relates to an artificial neural network neuron circuit and a driving method thereof, and more specifically, to an artificial neural network neuron circuit that compensates for threshold voltage fluctuations due to element mutation and external environment and a driving method thereof.
  • ANN Artificial Neural Network
  • An ANN technology is a computer algorithm that imitates the neural network of the human brain.
  • An ANN technology is one of the important concepts used in the fields of machine learning and artificial intelligence.
  • An ANN consists of multiple neurons that accept input data, multiply weights, and apply activation functions to generate output.
  • driver transistors are actual hardware elements that are involved in the integration and output of information to the membrane capacitor.
  • driver transistors are a key hardware component in the operation of artificial neurons.
  • ANN artificial neural networks
  • the change in the threshold voltage value of the driving transistor i.e., an undesired change, can make it difficult to adjust the weights and prevent accurate processing of input data.
  • the main factors that cause the threshold voltage of the transistor in these artificial neuron circuits include manufacturing process condition deviations, temperature fluctuations, and voltage fluctuations.
  • the present disclosure proposes an artificial neural network neuron circuit and a driving method that performs accurate activation function operation by compensating for threshold voltage fluctuations of a device.
  • the present disclosure proposes an artificial neural network neuron circuit and driving method capable of compensating for both threshold voltage fluctuations due to external environmental changes and threshold voltage fluctuations due to device mutations.
  • An artificial neural network neuron circuit comprises: a threshold voltage storage unit storing a threshold voltage of an output transistor in a threshold voltage capacitor (C vth ); a threshold voltage compensation unit compensating for the potential of the threshold voltage capacitor (C vth ) with a unique threshold voltage of the output transistor; and an output unit transmitting a constant output value to a next synapse through the compensated threshold voltage.
  • the neuron circuit can provide a constant output value by compensating for both threshold voltage fluctuations due to mutations of elements and changes in the external environment.
  • the device further comprises a synaptic storage unit that receives an output value of a previous synapse and stores the received output value in a storage capacitor (C mem ); wherein the threshold voltage capacitor (C vth ) and the storage capacitor (C mem ) may be connected in series with a node in between to which the output value of the previous synapse is input.
  • a synaptic storage unit that receives an output value of a previous synapse and stores the received output value in a storage capacitor (C mem ); wherein the threshold voltage capacitor (C vth ) and the storage capacitor (C mem ) may be connected in series with a node in between to which the output value of the previous synapse is input.
  • the threshold voltage compensation unit may include a fifth transistor (T5), a second transistor (T2), and a third transistor (T3) formed between a first node connected to a source of the output transistor and one electrode of the threshold voltage capacitor (C vth ).
  • the synaptic storage unit may include a fourth transistor (T4) connected in parallel with the storage capacitor (C mem ).
  • the output unit can deliver an output value corresponding to the stored value of the storage capacitor (C mem ).
  • the threshold voltage compensation unit may further include a transistor formed between a second node connected to the other electrode of the threshold voltage capacitor (C vth ) and a gate of the output transistor.
  • a reference voltage terminal may be provided at a second node connected to the other electrode of the threshold voltage capacitor (C vth ), and a third transistor (T3) may be included between the second node and the reference voltage terminal.
  • a sixth transistor may be included for connecting an intermediate base voltage to a source of the output transistor.
  • a neuromorphic device is a neuromorphic computing device including an array structure in which a plurality of synaptic elements are connected to each other, and includes an artificial neural network neuron circuit that receives an output value of a previous synaptic element among the synaptic elements, compensates for a threshold voltage variation, and transmits it to a next synapse, wherein the artificial neural network neuron circuit may be an artificial neural network neuron circuit according to one aspect of the present invention.
  • a driving method of an artificial neural network neuron circuit having a compensation function for threshold voltage variation may include an initial value setting step of storing an initial threshold voltage in a threshold voltage capacitor (C vth ) for driving a gate of an output transistor in an artificial neural network neuron circuit; a threshold voltage compensation step of detecting a unique threshold voltage of an output transistor and compensating the voltage of the initial value with the unique threshold voltage; a storage capacitor (C mem ) initialization step of initializing a potential of the storage capacitor (C mem ) to 0; a storage step of integrating a value input from a synapse and accumulating the result in the storage capacitor (C mem ); and an output step of driving an output transistor based on the threshold voltage compensated in the threshold voltage compensation step to transmit an output value corresponding to a charge of the storage capacitor (C mem ).
  • the initial value setting step may be a step of setting the initial values to an adjustable range for values stored in the storage capacitor (C mem ) and the threshold voltage capacitor (C vth ) by a reference voltage applied to one electrode of the threshold voltage capacitor (C vth ) and a base voltage applied to one electrode of the storage capacitor (C mem ).
  • the output step may be a step of driving the gate of the output transistor by the compensated threshold voltage of the threshold voltage capacitor (C vth ) to transmit the output value according to the charge of the storage capacitor (C mem ) to the next synapse.
  • the present invention configures a display compensation circuit with an analog-based neuron circuit, so that it is possible to dynamically compensate for the threshold voltage of the transistor within the circuit.
  • both element mutation and threshold voltage fluctuation can be compensated for in real time, so that there is a compensation effect for mutations occurring during operation.
  • all neurons can compensate for threshold voltage variations occurring in the external environment or process, so that uniform activation function results can always be transmitted to the hidden layer, thereby maintaining the inference accuracy at a constant level.
  • the concept of the present invention can be applied to systems such as artificial neural networks, spiking neural networks, and circuits or sensors that require a specific result value to be maintained constant.
  • FIG. 1 is a circuit diagram of an artificial neural network neuron circuit according to one embodiment of the present invention.
  • FIG. 2 is a circuit diagram of an initial value setting step of an artificial neural network neuron circuit according to one embodiment of the present invention and a signal timing diagram in the initial value setting step.
  • FIG. 3 is a circuit diagram of a threshold voltage compensation step of an artificial neural network neuron circuit according to one embodiment of the present invention and a signal timing diagram in the threshold voltage compensation step.
  • FIG. 4 is a circuit diagram of a storage capacitor (Cmem) initialization step of an artificial neural network neuron circuit according to one embodiment of the present invention and a signal timing diagram in the storage capacitor (Cmem) initialization step.
  • FIG. 5 is a circuit diagram of a storage step of an artificial neural network neuron circuit according to one embodiment of the present invention and a signal timing diagram in the storage step.
  • FIG. 6 is a circuit diagram of an output stage of an artificial neural network neuron circuit according to one embodiment of the present invention and a signal timing diagram at the output stage.
  • the present invention relates to an artificial neural network neuron circuit having a compensation function for threshold voltage fluctuation.
  • the artificial neural network neuron circuit can compensate for changes in the threshold voltage of the device caused by deterioration of device characteristics over time, temperature, and external environment during the process or over time by using a threshold voltage capacitor that stores the threshold voltage value of the output transistor, thereby maintaining the threshold voltage value at a constant value, and can sense the threshold voltage value of the output transistor, which plays the most important role in performing the activation function operation through the compensation step.
  • the neuron circuit according to the present invention can set the threshold voltage compensation period to a desired period through signal control. Since the circuit operation can be controlled through an external signal, the controllability, such as changing the activation function operating point, can be increased.
  • the number of compensations per input data can be optimized and controlled according to the size of the capacitor or the manufactured circuit, as well as the method of compensating for each input.
  • the neuron circuit since it can be composed of an n-type transistor using a-IGZO (Amorphous Indium Gallium Zinc Oxide), the circuit can be manufactured using a low-temperature process. In addition, due to the IGZO material characteristic of very low leakage current, the standby power consumption of the neuron can be made very small.
  • IGZO Amorphous Indium Gallium Zinc Oxide
  • a pixel compensation circuit of a display into an analog-based neuron circuit, it is possible to dynamically compensate for the threshold voltage of a transistor within the circuit. Through this, it is possible to dynamically adjust the value of the threshold voltage to be compensated according to the voltage that changes depending on the situation.
  • the analog-based neuron circuit of the present invention is suitable for processing continuous values and thus has the advantage of being suitable for precisely correcting the threshold voltage of pixels. In addition, it has high precision and can support real-time data processing and real-time pixel compensation.
  • an artificial neural network neuron circuit having a threshold voltage variation compensation function may include a synaptic storage unit (100), an output unit (200), a threshold voltage storage unit (300), and a threshold voltage compensation unit (400).
  • the synaptic accumulation unit (100) includes a storage capacitor (C mem ) that integrates and stores a synaptic output value
  • the output unit (200) includes an output transistor (T1) that transmits an output value corresponding to the potential of the charge accumulated in the storage capacitor (C mem )
  • the threshold voltage storage unit (300) may include a threshold voltage capacitor (C vth ) that stores a gate threshold voltage (potential of threshold voltage) for driving the output transistor (T1).
  • the above threshold voltage compensation unit (400) can detect the unique threshold voltage of the output transistor (T1) and compensate the potential (voltage) of the initial charge stored in the threshold voltage capacitor (C vth ) to match the unique threshold voltage.
  • the above compensation can be achieved by a fifth transistor (T5) connecting an electrical path between one electrode (first node) of a threshold voltage capacitor (C vth ) and the source of the output transistor (T1).
  • One electrode of the threshold voltage capacitor (C vth ) may be connected to a first node, and the first node may mean a lower node connected to the threshold voltage capacitor on the circuit diagram presented in Fig. 1.
  • the other electrode of the threshold voltage capacitor (C vth ) may be connected to a second node, and the second node is an upper node connected to the threshold voltage capacitor on the circuit diagram presented in Fig. 1.
  • one electrode of the storage capacitor (C mem ) may be connected to the opposite side of the threshold voltage capacitor of the first node.
  • the other electrode of the storage capacitor (C mem ) may be connected to a base voltage terminal (V SS ).
  • the synaptic output value mentioned above can be a value received from a previous neuron circuit or a value received from the outside.
  • the above synaptic accumulation unit (100) may include a fourth transistor (T4) that initializes the storage capacitor (C mem ) by switching the two electrodes of the storage capacitor (C mem ) to the same potential.
  • the above output unit (200) may include the above output transistor (T1).
  • the above threshold voltage storage unit (300) may include the above threshold voltage capacitor (C vth ).
  • the above threshold voltage compensation unit (400) may include switching transistors that control the voltage across the storage capacitor (C mem ) that stores the threshold voltage.
  • the switching transistors may be the second transistor (T2), the third transistor (T3), and the fifth transistor (T5).
  • the threshold voltage compensation unit may include a second transistor (T2) located between a second node connected to the other electrode of the threshold voltage capacitor (C vth ) and a gate of the output transistor (T1), a third transistor (T3) connected to the opposite side of the second transistor of the second node.
  • the threshold voltage compensation unit may include a fifth transistor (T5) located between a first node connected to one electrode of the threshold voltage capacitor (C vth ) and a node located between the output transistor (T1) of the output unit and the output switch.
  • the above second transistor can perform the role of switching the gate voltage to the output transistor (T1) of the output section.
  • the threshold voltage compensation unit (400) can compensate the initial threshold voltage to the unique threshold voltage of the output transistor (T1) in a state where a turn-on voltage higher than the threshold voltage is applied to the gate of the output transistor (T1) and a drain-source channel is opened. At this time, when the channel of the fifth transistor (T5) located between the first node connected to the threshold voltage capacitor (C vth ) and the node connected to the source of the output transistor (T1) is opened, the source of the output transistor (T1) and one electrode of the threshold voltage capacitor (C vth ) can be switched to the same ground potential.
  • the voltage of the first node which is the source voltage of the output transistor (T1)
  • the voltage applied to the gate of the output transistor (T1) may be constant.
  • the drain-source of the output transistor (T1) may be closed.
  • the circuit may be driven in such a way that the voltage of the threshold voltage capacitor (C vth ) becomes identical to the inherent threshold voltage of the output transistor (T1) and has a compensated threshold voltage value.
  • an input value coming from a previous synapse array can be connected to the first node connected to one electrode of the storage capacitor (C mem ) of the synapse accumulation unit (100). And the other electrode of the storage capacitor (C mem ) can be directly connected to a base voltage terminal (V SS ).
  • the source and drain of the fourth transistor (T4) may be connected to form a parallel structure with the storage capacitor (C mem ) between the line through which the input value enters the first node and the base voltage terminal (V ss ).
  • the potential of the storage capacitor (C mem ) may be initialized to 0.
  • the drain of the output transistor (T1) is connected to a driving voltage terminal (V DD ), and the source of the output transistor (T1) can be selectively connected to an intermediate base voltage terminal (V SS2 ).
  • a sixth transistor can be selectively positioned between the source of the output transistor and the intermediate base voltage terminal.
  • the second transistor (T2) of the threshold voltage compensation unit (400) may be positioned between the other electrode of the threshold voltage capacitor (C vth ) and the gate of the output transistor (T1). At this time, the second transistor may turn on and off a signal of an electrical path between the threshold voltage capacitor (C vth ) and the gate of the output transistor (T1).
  • a first node to which one electrode of the threshold voltage capacitor (C vth ) is connected may be connected to a first node of the storage capacitor (C mem ).
  • a reference voltage terminal to which a reference voltage (V ref ) is applied may be connected to a second node to which the other electrode of the threshold voltage capacitor (C vth ) is connected.
  • the fifth transistor (T5) may be connected between the first node located between the threshold voltage capacitor and the storage capacitor and the third node located between the source of the output transistor (T1) and the output switch.
  • the third node may also be connected to the sixth transistor described above.
  • FIG. 2 is a circuit diagram of an initial value setting step and a signal timing diagram in the initial value setting step according to one embodiment of the present invention.
  • the above initial value setting step is a step of storing the initial threshold voltage in the threshold voltage capacitor (C vth ) for driving the gate of the output transistor (T1).
  • the above initial value setting step is a process of setting the value stored in the capacitor within the circuit as the initial value.
  • an initialization step of removing the charge stored in the storage capacitor (C mem ) may also be performed.
  • the fourth transistor (T4) is turned on, the positive node value of the storage capacitor (C mem ) becomes V SS and is reset to potential 0, and the threshold voltage capacitor (C vth ) is connected to the base voltage terminal (V SS ).
  • V ref -V ss can be a voltage value for initializing to a constant value before storing the threshold voltage of the actual transistor.
  • FIG. 3 is a circuit diagram of a threshold voltage compensation step and a signal timing diagram in the threshold voltage compensation step according to one embodiment of the present invention.
  • the above threshold voltage compensation step may be a step of detecting the unique threshold voltage of the output transistor (T1) and compensating the initial threshold voltage of the threshold voltage capacitor (C vth ) with the unique threshold voltage of the output transistor.
  • the potential applied to the second node connected to the threshold voltage capacitor (C vth ) and the gate of the output transistor (T1) may be the reference voltage V ref .
  • V ref is applied to the gate of the output transistor (T1), the output transistor (T1) is turned on and current flows, and therefore, the potential of the first node located between the storage capacitor (C mem ) and the threshold voltage capacitor (C vth ) may gradually increase.
  • the output transistor (T1) When the potential value of the first node becomes V ref -V th , at the moment when the gate-source voltage (V gs ) of the output transistor (T1) becomes the V th value, the output transistor (T1) is turned off, and the potential of the threshold voltage capacitor (C vth ) may be adjusted to the value of V th (inherent threshold voltage).
  • the potential of the first node becomes V ref -V th and the potential of the second node becomes V SS , so that V ref -V th -V SS can be stored in the storage capacitor (C mem ) located between the two.
  • FIG. 4 is a circuit diagram of a storage capacitor (C mem ) initialization step and a signal timing diagram in the storage capacitor (C mem ) initialization step according to one embodiment of the present invention.
  • the above storage capacitor (C mem ) initialization step may be a step of initializing the storage capacitor (C mem ) before receiving an input value from a previous synapse.
  • the node values at both ends of the storage capacitor (C mem ) become V SS and can be initialized to 0.
  • the fourth transistor (T4) is turned on and the two electrodes of the storage capacitor become the same potential, so that the storage capacitor (C mem ) can be initialized.
  • FIG. 5 is a circuit diagram of a storage step and a signal timing diagram in the storage step according to one embodiment of the present invention.
  • the above storage step is a step of receiving the output value of the previous synapse as an input value and integrating and accumulating it in the storage capacitor (C mem ).
  • a current when a current is input from the previous synapse array, it can be integrated and stored through the storage capacitor (C mem ) connected thereto.
  • a V mem value can be formed at the first node and a V th + V mem value can be formed at the second node with a threshold voltage capacitor in between.
  • FIG. 6 is a circuit diagram of an output stage and a signal timing diagram in the output stage according to one embodiment of the invention.
  • the output transistor (T1) can be driven (turned on) based on the threshold voltage (V th ) compensated in the threshold voltage compensation stage to output an output value corresponding to the voltage of the storage capacitor (C mem ).
  • V mem +V th is applied to the second node, and the same potential can be formed at the gate of the output transistor (T1) connected thereto.
  • the output value becomes a value dependent on V mem and V SS2 , and this output value can become a value that occurs when V mem -V SS2 becomes greater than 0 and increases as the V mem value increases.
  • an artificial neural network neuron circuit that performs an accurate activation function operation (ReLU) by compensating for threshold voltage fluctuations of an output transistor (T1).
  • This present invention can compensate for both threshold voltage fluctuations due to semiconductor device mutations and external environmental changes, and is beneficial to the development of a system for improving artificial neural network inference accuracy.

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Abstract

L'invention divulgue un circuit neuronal d'un réseau neuronal artificiel et un procédé de fonctionnement du circuit neuronal. Le circuit neuronal comprend : une unité de stockage de tension de seuil pour stocker une tension de seuil d'un transistor de sortie dans un condensateur de tension de seuil ; une unité de compensation de tension de seuil pour compenser le potentiel du condensateur de tension de seuil en lien avec la tension de seuil intrinsèque du transistor de sortie ; et une unité de sortie pour transmettre une valeur de sortie constante à la prochaine synapse à l'aide de la tension de seuil compensée.
PCT/KR2024/000358 2023-12-08 2024-01-08 Circuit neuronal d'un réseau neuronal artificiel, ayant une fonction de compensation de variations de tension de seuil Pending WO2025121537A1 (fr)

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KR10-2023-0177233 2023-12-08
KR1020230177233A KR102877890B1 (ko) 2023-12-08 2023-12-08 문턱전압 변동의 보상 기능을 갖는 인공신경망 뉴런 회로

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5010512A (en) * 1989-01-12 1991-04-23 International Business Machines Corp. Neural network having an associative memory that learns by example
KR20180003790A (ko) * 2016-07-01 2018-01-10 엘지디스플레이 주식회사 Oled 표시 장치의 화질 보상 장치 및 보상 방법
KR20210146002A (ko) * 2020-05-26 2021-12-03 한국전자통신연구원 다층 스파이킹 뉴럴 네트워크의 학습 방법 및 장치
KR20220165555A (ko) * 2021-06-08 2022-12-15 한국전자통신연구원 스파이크 뉴럴 네트워크 회로
KR102502261B1 (ko) * 2020-08-20 2023-02-22 서울대학교 산학협력단 스파이킹 뉴럴 네트워크의 뉴런 문턱값 변동 보상

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5010512A (en) * 1989-01-12 1991-04-23 International Business Machines Corp. Neural network having an associative memory that learns by example
KR20180003790A (ko) * 2016-07-01 2018-01-10 엘지디스플레이 주식회사 Oled 표시 장치의 화질 보상 장치 및 보상 방법
KR20210146002A (ko) * 2020-05-26 2021-12-03 한국전자통신연구원 다층 스파이킹 뉴럴 네트워크의 학습 방법 및 장치
KR102502261B1 (ko) * 2020-08-20 2023-02-22 서울대학교 산학협력단 스파이킹 뉴럴 네트워크의 뉴런 문턱값 변동 보상
KR20220165555A (ko) * 2021-06-08 2022-12-15 한국전자통신연구원 스파이크 뉴럴 네트워크 회로

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