WO2025119846A1

WO2025119846A1 - Method for producing an optoelectronic semiconductor chip

Info

Publication number: WO2025119846A1
Application number: PCT/EP2024/084350
Authority: WO
Inventors: Peter Nagel; Christopher Wiesmann; Simon Jerebic; Emilia Dinu
Original assignee: Ams Osram International GmbH
Current assignee: Ams Osram International GmbH
Priority date: 2023-12-06
Filing date: 2024-12-02
Publication date: 2025-06-12
Anticipated expiration: 2026-06-06

Abstract

A method for producing an optoelectronic semiconductor chip comprises providing a wafer comprising a plurality of non-singulated optoelectronic semiconductor chips, forming a photo resist pattern on a top side of the wafer, arranging a layer of converter material on the top side of the wafer and the photo resist pattern, sawing into the layer of converter material above the photo resist pattern to provide access to the photo resist pattern, stripping the photo resist pattern, and singulating the optoelectronic semiconductor chips.

Description

METHOD FOR PRODUCING AN OPTOELECTRONIC SEMICONDUCTOR CHIP

DESCRIPTION

The present invention relates to a method for producing an optoelectronic semiconductor chip .

This patent application claims the priority of German patent application 10 2023 134 147 . 2 , the disclosure content of which is hereby incorporated by reference .

It is known to provide optoelectronic semiconductor chips with layers of converter material to convert a wavelength of light emitted by the optoelectronic semiconductor chip into light of a di f ferent wavelength . It is known to apply the converter material either on the non-singulated wafer or on the individual chip dies .

It is an obj ect of the present invention to provide a method for producing an optoelectronic semiconductor chip . This obj ective is achieved by a method according to the independent claims . Several variants are disclosed in the dependent claims .

A method for producing an optoelectronic semiconductor chip comprises providing a wafer comprising a plurality of non- singulated optoelectronic semiconductor chips , forming a photo resist pattern on a top side of the wafer, arranging a layer of converter material on the top side of the wafer and the photo resist pattern, sawing into the layer of converter material above the photo resist pattern to provide access to the photo resist pattern, stripping the photo resist pattern, and singulating the optoelectronic semiconductor chips . Advantageously, this method allows to form a layer of converter material having a thickness that is larger than the thickness of the photo resist pattern . This is enabled by sawing into the layer of converter material above the photo resist pattern to provide access to the photo resist pattern which allows for stripping the photo resist pattern in a following processed step . The maximum thickness of the photo resist pattern is limited by the minimal width of the photo resist pattern and the necessity to not exceed a maximum aspect ratio of e . g . , 1 .

In a variant of the method, the photo resist pattern is formed to cover areas of the top side of the wafer between mesa structures of the optoelectronic semiconductor chips . The areas of the top side of the wafer that are covered by the photo resist pattern may comprise wire bond pads of the optoelectronic semiconductor chips , for example . Covering these areas of the top side of the wafer with the photo resist pattern advantageously makes sure that these areas are free of the converter material after the stripping of the photo resist pattern .

In a variant of the method, the photo resist pattern is formed such that the mesa structures of the optoelectronic semiconductor chips are at least partially not covered by the photo resist pattern . In result , the mesa structures of the optoelectronic semiconductor chips , where light is emitted, remain at least partially covered by the layer of converter material after stripping the photo resist pattern . This allows for an ef fective conversion of the wavelength of light emitted by the optoelectronic semiconductor chips .

In a variant of the method, the layer of converter material is arranged by doctor blade coating . This allows for a cost- ef fective production of the optoelectronic semiconductor chips .

In a variant of the method, the layer of converter material is polymerised and/or hydrogenised before sawing into the layer of converter material . This allows to use phosphor in siloxane as the converter material , for example . In a variant of the method, the layer of converter material comprises amber, red or green converter material . This allows for producing optoelectronic semiconductor chips that ef fectively generate yellow, orange , red, green, white , or ultrawhite light .

In a variant of the method, the photo resist pattern is completely covered by the layer of converter material . This allows to form the layer of converter material with a thickness that is larger than the thickness of the photo resist pattern . This allows to form the layer of converter material with a desired thickness while not exceeding a maximal aspect ratio of the photo resist pattern .

In a variant of the method, sawing is carried out using a sawing blade . Advantageously, this allows to use standard tools for sawing into the layer of converter material .

In a variant of the method, the sawing blade is a straight sawing blade or an angulated sawing blade . The sawing blade may comprise a width between 10 pm and 300 pm, for example . This allows to provide access to the photo resist pattern by sawing into the layer of converter material even in the case of a narrow photo resist pattern .

Some variants of the method comprise an additional step for applying a dichroitic coating on the layer of converter material . Such a dichroitic coating may improve a colour-over-an- gle property of the optoelectronic semiconductor chips , for example .

In a variant of the method, the dichroitic coating is applied before sawing into the layer of converter material . Advantageously, sawing into the layer of converter material also includes sawing into the dichroitic coating in this case , avoiding a need for an additional fabrication step . In a variant of the method, the dichroitic coating is applied after sawing into the layer of converter material . In this variant , the dichroitic coating advantageously also covers facets of the converter material that are created while sawing into the layer of converter material .

Variants of the method comprise an additional step for sawing into the dichroitic coating to provide access to the photo resist pattern . This allows stripping the photo resist pattern in a following process step even in the case that the dichroitic coating is applied after sawing into the layer of converter material .

In a variant of the method, the dichroitic coating is formed as a Bragg mirror . This allows forming the dichroitic coating with a wavelength selectivity .

In a variant of the method, the dichroitic coating is adapted to reflect light emitted by the optoelectronic semiconductor chips and transmit light that has been converted in the layer of converter material . In this way, the dichroitic coating may increase the amount of light that is converted by the layer of converter material .

The above-described properties , features , and advantages of the invention, as well as the way in which they are achieved, will become more clearly and comprehensively understandable in connection with the following description of exemplary variants , which will be explained in more detail in connection with the drawings in which, in schematic representation :

Figure 1 shows a sectional view of a part of a wafer with a plurality of non-singulated optoelectronic semiconductor chips ;

Figure 2 shows the wafer after forming a photo resist pattern on a top side of the wafer ; Figure 3 shows the wafer after arranging a layer of converter material on the top side of the wafer and the photo resist pattern;

Figure 4 shows the wafer after applying a dichroitic coating on the layer of converter material ;

Figure 5 shows the wafer after sawing into the dichroitic coating and the layer of converter material above the photo resist pattern to provide access to the photo resist pattern; and

Figure 6 shows the wafer after stripping the photo resist pattern .

Figure 1 shows a schematic sectional view of a part of a wafer 200 . The wafer 200 comprises a plurality of non-singu- lated optoelectronic semiconductor chips 100 arranged in a matrix pattern . Top sides 101 of the optoelectronic semiconductor chips 100 are arranged at a top side 201 of the wafer 200 .

The optoelectronic semiconductor chips 100 are capable of emitting electromagnetic radiation such as visible light or light in the UV range . The optoelectronic semiconductor chips 100 may be light-emitting diode chips ( LED chips ) , for example .

Each optoelectronic semiconductor chip 100 comprises a mesa structure 110 at its top side 101 where light can be emitted during operation of the optoelectronic semiconductor chip 100 . The mesa structures 110 of the optoelectronic semiconductor chips 100 may be elevated above intermediate areas 220 of the top side 201 of the wafer 200 between the mesa structures 110 . These intermediate areas 220 of the top side 201 of the wafer 200 may comprise bond pads 120 of the optoelectronic semiconductor chips 100 , for example . In a later fabrication step, the optoelectronic semiconductor chips 100 will be singulated by sawing along saw streets 230 in the intermediate areas 220 .

Figure 2 shows a schematic sectional view of the wafer 200 in a processing state that follows the depiction of figure 1 .

A photo resist pattern 300 has been formed on the top side 201 of the wafer 200 . The photo resist pattern 300 has been formed to cover at least parts of the intermediate areas 220 of the top side 201 of the wafer 200 between the mesa structures 110 of the optoelectronic semiconductor chips 100 . The mesa structures 110 of the optoelectronic semiconductor chips 100 are at least partially not covered by the photo resist pattern 300 .

The photo resist pattern 300 may have been formed using a standard photolithography technique , for example . To this end, a photo resist may have first been applied to cover the entire top side 201 of the wafer 200 using a method such as spin coating . In a following step, either the parts of the photo resist arranged above the intermediate areas 220 or the parts of the photo resist arranged above the mesa structures 110 have been exposed to light , depending on the type of photo resist . Afterwards , the parts of the photo resist arranged above the mesa structures 110 of the optoelectronic semiconductor chips 100 have been removed in a developing step .

The photo resist pattern 300 may comprise a thickness between 10 pm and 100 pm in a direction perpendicular to the top side 201 of the wafer 200 , for example . In one example , the thickness of the photo resist pattern 300 is 45 pm .

Figure 3 shows a schematic depiction of the wafer 200 in a processing state that follows the depiction of figure 2 . A layer 400 of converter material 410 has been arranged on the top side 201 of the wafer 200 and the photo resist pattern 300 . The layer 400 of converter material 410 may cover the photo resist pattern 300 completely such that parts of the layer 400 are arranged above the photo resist pattern 300 . In this case , a thickness of the layer 400 of converter material 410 , measured in a direction perpendicular to the top side 201 of the wafer 200 , is higher than the thickness of the photo resist pattern 300 .

The converter material 410 is adapted to convert light emitted by the optoelectronic semiconductor chips 100 into light having a di f ferent wavelength . The converter material 410 may be an amber or green converter material , for example , such that the converter material 410 is capable of converting light emitted by the optoelectronic semiconductor chips 100 into yellow, orange , green, white , or IR light . The converter material 410 may comprise converter particles arranged in a matrix material . The matrix material may be a siloxane , for example .

The layer 400 of converter material 410 may have been applied by doctor blade coating, for example . Alternative methods for applying the layer 400 of converter material 410 are spray coating, j etting, dispensing, spin-on-coating and dry/wet phosphor application, for example . The application of the layer 400 of converter material 410 may have been followed by processing steps for polymerising and hydrogenising the converter material 410 .

Figure 4 shows a schematic sectional view of the wafer 200 in a processing state that follows the depiction of figure 3 . In an optional process step, a dichroitic coating ( dichroic coating) 500 has been applied on the layer 400 of converter material 410 . The dichroitic coating 500 may be adapted to reflect unconverted light emitted by the optoelectronic semiconductor chips 100 and transmit light that has been converted by the converter material 410 . The dichroitic coating 500 may comprise angular selective reflection and transmission properties . The dichroitic coating 500 may be formed as a Bragg mirror, for example .

Figure 5 shows a schematic sectional view of the wafer 200 in a processing state that follows the depiction of figure 4 . In a preceding step, it has been sawn into the dichroitic coating 500 and the layer 400 of converter material 410 above the photo resist pattern 300 to provide access to the photo resist pattern 300 . Sawing has created trenches 610 in the dichroitic coating 500 and the layer 400 of converter material 410 which create openings to the photo resist pattern 300 .

The trenches 610 follow the photo resist pattern 300 and the saw streets 230 . A single trench 610 may be arranged above each part of the photo resist pattern 300 . In this case , the trenches 610 may be arranged directly above the saw streets 230 . In the example depicted in figure 5 , however, two trenches 610 are arranged above each part of the photo resist pattern 300 to provide easier access to the photo resist pattern 300 .

Sawing has been carried out using a sawing blade 600 . The sawing blade 600 may be a straight sawing blade or an angu- lated ( conical ) sawing blade , for example . The sawing blade 600 comprises a width 601 that may be between 10 pm and 300 pm, for example . The width 601 may be 50 pm, for example . In the case of an angulated sawing blade 600 , the width 601 may be measured at the tip or at the base of the sawing blade 600 .

In alternative variants of the method, sawing into the dichroitic coating 500 and the layer 400 of converter material 410 above the photo resist pattern 300 may be carried out by milling, drilling, water cutting, laser cutting, or by high pressure cutting . The trenches 610 created by sawing into the dichroitic coating 500 and the layer 400 of converter material 410 may reach into the photo resist pattern 300 . Preferably, however, the trenches 610 do not reach the top side 201 of the wafer 200 .

Figure 6 shows a schematic sectional view of the wafer 200 in a processing state that follows the depiction of figure 5 .

The photo resist pattern 300 has been stripped . This has also removed the parts of the layer 400 of converter material 410 and the parts of the dichroitic coating 500 that were arranged above the photo resist pattern 300 . In consequence , the intermediate areas 220 of the wafer 200 between the mesa structures 110 of the optoelectronic semiconductor chips 100 are now at least partially not covered by the layer 400 of converter material 410 and the dichroitic coating 500 . In particular, the bond pads 120 of the optoelectronic semiconductor chips 100 are not covered by the layer 400 of converter material 410 or the dichroitic coating 500 . However, at least parts of the mesa structures 110 of the optoelectronic semiconductor chips 100 remain covered by the layer 400 of converter material 410 and the dichroitic coating 500 arranged on the layer 400 .

In an alternative variant of the method described above , the dichroitic coating 500 is applied after sawing into the layer 400 of converter material 410 . In this case , the dichroitic coating 500 may also cover the sides of the trenches 610 created in the layer 400 of converter material 410 . However, this may require an additional following processing step for sawing into the dichroitic coating 500 to provide access to the photo resist pattern 300 . Conveniently, sawing into the dichroitic coating 500 follows the trenches 610 that have been created before by sawing into the layer 400 of converter material 410 .

In yet another variant of the method described above , the dichroitic coating 500 is omitted . In a processing step that follows the depiction of figure 6 , the individual optoelectronic semiconductor chips 100 are singulated . Singulating the optoelectronic semiconductor chips 100 may be achieved by sawing along the saw streets 230 , for example .

The invention has been illustrated and described in more detail with the aid of exemplary variants . The invention is not , however, restricted to the examples disclosed . Rather, other variants may be derived therefrom by the person skilled in the art .

REFERENCE SYMBOLS optoelectronic semiconductor chip top side mesa structure bond pad wafer top side intermediate area saw street photo resist pattern converter layer converter material dichroitic coating sawing blade width trench

Claims

1. A method for producing an optoelectronic semiconductor chip (100) comprising

- providing a wafer (200) comprising a plurality of non- singulated optoelectronic semiconductor chips (100) ;

- forming a photo resist pattern (300) on a top side (201) of the wafer (200) ;

- arranging a layer (400) of converter material (410) on the top side (201) of the wafer (200) and the photo resist pattern (300) ;

- sawing into the layer (400) of converter material (410) above the photo resist pattern (300) to provide access to the photo resist pattern (300) ;

- stripping the photo resist pattern (300) ;

- singulating the optoelectronic semiconductor chips (100) .

2. The method according to claim 1, wherein the photo resist pattern (300) is formed to cover areas (220) of the top side (201) of the wafer (200) between mesa structures (110) of the optoelectronic semiconductor chips (100) .

3. The method according to claim 2, wherein the photo resist pattern (300) is formed such that the mesa structures (110) of the optoelectronic semiconductor chips (100) are at least partially not covered by the photo resist pattern (300) .

4. The method according to one of the preceding claims, wherein the layer (400) of converter material (410) is arranged by doctor blade coating.

5. The method according to one of the preceding claims, wherein the layer (400) of converter material (410) is polymerised and/or hydrogenised before sawing into the layer (400) of converter material (410) .

6. The method according to one of the preceding claims, wherein the layer (400) of converter material (410) comprises amber, red or green converter material (410) .

7. The method according to one of the preceding claims, wherein the photo resist pattern (300) is completely covered by the layer (400) of converter material (410) .

8. The method according to one of the preceding claims, wherein sawing is carried out using a sawing blade (600) .

9. The method according to claim 8, wherein the sawing blade (600) is a straight sawing blade (600) or an angulated sawing blade (600) .

10. The method according to one of claims 8 and 9, wherein the sawing blade (600) comprises a width (601) between 10 pm and 300 pm.

11. The method according to one of the preceding claims, wherein the method comprises the following additional step :

- applying a dichroitic coating (500) on the layer (400) of converter material (410) .

12. The method according to claim 11, wherein the dichroitic coating (500) is applied before sawing into the layer (400) of converter material (410) .

13. The method according to claim 11, wherein the dichroitic coating (500) is applied after sawing into the layer (400) of converter material (410) .

14. The method according to claim 13, wherein the method comprises the following additional step :

- sawing into the dichroitic coating (500) to provide access to the photo resist pattern (300) .

15. The method according to one of claims 11 to 14, wherein the dichroitic coating (500) is formed as a Bragg mirror .

16. The method according to one of claims 11 to 15, wherein the dichroitic coating (500) is adapted to reflect light emitted by the optoelectronic semiconductor chips (100) and transmit light that has been converted in the layer (400) of converter material (410) .