[go: up one dir, main page]

WO2025102585A1 - Procédés, systèmes et appareil de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives - Google Patents

Procédés, systèmes et appareil de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives Download PDF

Info

Publication number
WO2025102585A1
WO2025102585A1 PCT/CN2024/084955 CN2024084955W WO2025102585A1 WO 2025102585 A1 WO2025102585 A1 WO 2025102585A1 CN 2024084955 W CN2024084955 W CN 2024084955W WO 2025102585 A1 WO2025102585 A1 WO 2025102585A1
Authority
WO
WIPO (PCT)
Prior art keywords
code
code blocks
size
block
determining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2024/084955
Other languages
English (en)
Inventor
Huazi ZHANG
Jianglei Ma
Wen Tong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Publication of WO2025102585A1 publication Critical patent/WO2025102585A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/353—Adaptation to the channel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing

Definitions

  • the present application relates to coding, and in particular to methods, systems, and apparatus for adaptive transport block size determination and code block segmentation.
  • channel coding is usually used to improve the reliability of signal transmission and ensure communication quality.
  • 6G sixth-generation
  • a plurality of long codes corresponded to a plurality of long input bit sequence to be encoded are usually needed to support the new scenarios and/or to improve the coding gain.
  • One or more embodiments are related to a method.
  • the method comprising: segmenting a plurality of information bits to a plurality of code blocks based on at least one of the followings: a maximum code length, and a maximum information block size; encoding the plurality of code blocks to a plurality of code words.
  • the plurality of information bits may be segmented based on the maximum code length and/or the maximum information block size. Therefore, the complexity of encoding may be decreased and the performance may be increased by encoding the plurality of code blocks instead of the plurality of information bits.
  • the method may provide a flexible strategy on segmentation and encoding of the plurality of information bits, and may decrease the complexity of encoding and increase the performance. And the method may be used for a plurality of types of codes.
  • segmenting a plurality of information bits to a plurality of code blocks comprises: determining a quantity of the plurality of code blocks.
  • the quantity of the plurality of code blocks may be determined in segmentation, then the plurality of information bits may be assigned to each of the plurality of code blocks.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: determining a size of each code block in the plurality of code blocks.
  • the plurality of information bits may be better assigned to each of the plurality of code blocks.
  • a reduced buffer is enabled, determining the quantity of the plurality of code blocks based on the maximum information block size.
  • the limited buffer rate matching indicator I LBRM 1 if the reduced buffer is enabled. Then, the quantity of the plurality of code blocks may be determined based on the maximum information block size.
  • determining the quantity of the plurality of code blocks based on at least one of the followings: a transport block size, and a length of cyclic redundancy check (CRC) sequence.
  • CRC cyclic redundancy check
  • the quantity of the plurality of code blocks may be determined based on not only the maximum information block size, but also other parameters, such as the transport block size, the length of CRC sequence, etc. In the embodiments of the present disclosure, no specific limitation is imposed on the other parameters.
  • a reduced buffer is disabled, determining the quantity of the plurality of code blocks based on the maximum code length.
  • the limited buffer rate matching indicator I LBRM 0 if the reduced buffer is disabled. Then, the quantity of the plurality of code blocks may be determined based on the maximum code length.
  • determining the quantity of the plurality of code blocks based on one or more of the followings: the total number of coded bits available for transmission, the transport block size, a minimum code rate for segmentation, and the length of CRC sequence.
  • the quantity of the plurality of code blocks may be determined based on not only the maximum code length, but also other parameters, such as the total number of coded bits available for transmission, the transport block size, the minimum code rate for segmentation, and the length of CRC sequence, etc. In the embodiments of the present disclosure, no specific limitation is imposed on the other parameters.
  • the total number of coded bits available for transmission is related to one or more of the followings: a quantity of available resource elements, a modulation order, and a quantity of transmission layers.
  • the total number of coded bits available for transmission may also be related to a coefficient ⁇ .
  • the coefficient ⁇ may be a multiplexing fact, a preemption portion, a resource distribution factor, and so on, and a value of the coefficient ⁇ may vary accordingly. In the embodiments of the present disclosure, no specific limitation is imposed on the coefficient ⁇ .
  • the transport block size is related to one or more of the followings: a total number of coded bits available for transmission, the length of CRC sequence and a code rate.
  • the code rate is obtained from a MCS table and MCS index.
  • the transport block size may be related to several parameters, and a value of the transport block size may vary accordingly.
  • the flexible determination of the transport block size may provide a flexible strategy on segmentation of the plurality of information bits. Then, different strategy on segmentation of the plurality of information bits may be used due to different requirement.
  • the maximum code length is related to one or more of the followings: a full buffer size, sizes of a set of reduced buffers, the maximum information block size, and a type of code.
  • the maximum code length may be related to several parameters, and a value of the maximum code length may vary accordingly.
  • the flexible determination of the maximum code length may also provide a flexible strategy on segmentation of the plurality of information bits.
  • the minimum code rate for segmentation is greater than a minimum code rate for coding, and the minimum code rate for coding is related to the type of channel.
  • the minimum code rate for segmentation and the minimum code rate for coding may vary in different cases, which may provide flexible strategy on segmentation of the plurality of information bits.
  • the minimum code rate for coding refers to a minimum code rate for channel coding.
  • determining a size of each code block in the plurality of code blocks comprises: the size of each block in the plurality of code blocks is a mother code length, and the mother code length is a power-of-2 integer for polar codes.
  • the size of each code block in the plurality of code blocks may be the mother code length and the mother code length is a power-of-2 integer. In the embodiments of the present disclosure, no specific limitation is imposed on a value of the mother code length.
  • determining a size of each code block in the plurality of code blocks comprises: if each code block has a same size, determining the size of each code block based on at least of one of the followings: a transport block size, the quantity of the plurality of code blocks, and a length of CRC sequence.
  • determining a size of each code block in the plurality of code blocks comprises: if the size of any of two code blocks in the plurality of code blocks is different, determining a size of the code block of an index r of the plurality of code blocks based on at least of one of the followings: a transport block size, a quantity of the plurality of code blocks, and r is an integer.
  • determining a size of each code block in the plurality of code blocks further comprises: if the size of any of two code blocks in the plurality of code blocks is different, determining a size of the code block of an index r of the plurality of code blocks based on at least of one of the followings: a transport block size, a quantity of the plurality of code blocks, and a length of CRC sequence of the code block of an index r, and r is an integer.
  • the first code block or the last block has a different size from other code blocks in the plurality of code blocks.
  • determination of the size of each code block in the plurality of code blocks may vary due to different situations.
  • the method for determining the size of each code block is different from when the size of every two code blocks is different.
  • the flexible strategy of determination of the size of each code block may provide flexible strategy on segmentation of the plurality of information bits.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: padding a same quantity of zero bits to each clock block.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: padding a plurality of zero bits to the first clock block.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: padding a plurality of zero bits to the last clock block.
  • a same/different quantity of zero bits may be padded to each clock block when assigning the plurality of information bits to the plurality of code blocks.
  • the flexible strategy of padding zero-bits may provide flexible strategy on segmentation of the plurality of information bits.
  • One or more embodiments are related to a method.
  • the method comprising: obtaining a plurality of code words; decoding the plurality of code words to obtain a plurality of sequences, the plurality of sequences correspond to a plurality of information bits that segmented to a plurality of code blocks based on at least one of the followings: a maximum code length, and a maximum information block size.
  • segmenting a plurality of information bits to a plurality of code blocks comprises: determining a quantity of the plurality of code blocks.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: determining a size of each code block in the plurality of code blocks.
  • a reduced buffer is enabled, determining the quantity of the plurality of code blocks based on the maximum information block size.
  • determining the quantity of the plurality of code blocks based on at least one of the followings: a transport block size, and a length of CRC sequence.
  • a reduced buffer is disabled, determining the quantity of the plurality of code blocks based on the maximum code length.
  • determining the quantity of the plurality of code blocks based on one or more of the followings: a total number of coded bits available for transmission, a transport block size, a minimum code rate for segmentation, and a length of CRC sequence.
  • the total number of coded bits available for transmission is related to one or more of the followings: a quantity of available resource elements, a modulation order, and a quantity of transmission layers.
  • the transport block size is related to one or more of the followings: a total number of coded bits available for transmission, the length of CRC sequence and a code rate.
  • the code rate is obtained from a MCS table and MCS index.
  • the maximum code length is related to one or more of the followings: a full buffer size, sizes of a set of reduced buffers, the maximum information block size, and a type of code.
  • the minimum code rate for segmentation is greater than a minimum code rate for coding, and the minimum code rate for coding is related to the type of channel.
  • determining a size of each code block in the plurality of code blocks comprises: the size of each block in the plurality of code blocks is a mother code length, and the mother code length is a power-of-2 integer for polar codes.
  • determining a size of each code block in the plurality of code blocks comprises: if each code block has a same size, determining the size of each code block based on at least of one of the followings: a transport block size, the quantity of the plurality of code blocks, and a length of CRC sequence.
  • determining a size of each code block in the plurality of code blocks comprises: if the size of any of two code blocks in the plurality of code blocks is different determining a size of the code block of an index r of the plurality of code blocks based on at least of one of the followings: a transport block size, a quantity of the plurality of code blocks, and r is an integer.
  • determining a size of each code block in the plurality of code blocks further comprises: if the size of any of two code blocks in the plurality of code blocks is different, determining a size of the code block of an index r of the plurality of code blocks based on at least of one of the followings: a transport block size, a quantity of the plurality of code blocks, and a length of CRC sequence of the code block of an index r, and r is an integer.
  • the first code block or the last block has a different size from other code blocks in the plurality of code blocks.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: padding a same quantity of zero bits to each clock block.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: padding a plurality of zero bits to the first clock block.
  • segmenting a plurality of information bits to a plurality of code blocks further comprising: padding a plurality of zero bits to the last clock block.
  • One or more embodiments can include an apparatus, the apparatus comprises a function or unit configured to cause the apparatus to perform the methods of the present disclosure.
  • One or more embodiments can include an apparatus, and the apparatus comprising a processor configured to cause the apparatus to perform the methods of the present disclosure.
  • One or more embodiments can include an apparatus, the apparatus comprising: at least one processor executing instructions stored in a memory to implement the methods of the present disclosure.
  • the apparatus may be a user equipment, a base station, a communication module in the user equipment, or the base station, or a chip/chipset system in the user equipment or a base station.
  • One or more embodiments can include a computer program comprising instructions, the instructions, when executed by a processor, may cause the processor to implement the methods of the present disclosure.
  • One or more embodiments can include a non-transitory computer-readable medium storing programming, the programming, when executed by a processor, may cause the processor to implement the methods of the present disclosure.
  • Fig. 1 is a simplified schematic illustration of a communication system.
  • Fig. 2 is a block diagram illustration of the example communication system in Fig. 1.
  • Fig. 3 illustrates an example electronic device and examples of base stations.
  • Fig. 4 illustrates units or modules in a device.
  • Fig. 5 is a trellis graph illustrating an example of a polar code.
  • Fig. 6 is a table of sub-block interleaver pattern.
  • Fig. 7 is a diagram illustrating puncturing and shortening with a cyclic buffer.
  • Fig. 8 is a diagram illustration of an example of the encoding process for 4 transmissions.
  • Fig. 9 is a diagram illustration of an example of the encoding process of the initial transmission.
  • Fig. 10 is a diagram illustration of an example of the encoding process of the first retransmission.
  • Fig. 11 is a block diagram illustration of an example of a polar transform matrix of three transmissions.
  • Fig. 12 is a flow schematic illustration of an example of an encoding method.
  • Fig. 13 is a flow schematic illustration of an example of a decoding method.
  • Fig. 14 is a block diagram illustration of an example of the process of adaptive transport block size determination and code block segmentation.
  • LDPC low density parity check
  • RM reed muller
  • convolutional codes product codes, etc.
  • no specific limitation is imposed on the type of codes.
  • methods of adaptive transport block size determination and code block segmentation for polar codes may reduce complexity of encoding and decoding, especially in high-throughput communications scenarios, and improve performance in cases with multiple transmissions, such as incremental-redundancy hybrid automatic repeat request (IR-HARQ) .
  • IR-HARQ incremental-redundancy hybrid automatic repeat request
  • Methods of adaptive transport block size determination and code block segmentation for LDPC codes may reduce buffer size for terminals with limited buffer size and lower device capability.
  • flexible transport block sizes may be determined for different communication scenarios, such as internet of things (IoT) devices.
  • IoT internet of things
  • flexible transport block sizes may enable a flexible tradeoff between encoding/decoding parallelism and coding gain.
  • Modulation coding scheme (MCS) adaptation is a powerful method to combat varying channel states, in which the modulation order and code length and coding rate can be changed in real time. Therefore, it requires that a channel coding scheme can flexibly change the code length and code rate in a fine-grained way, and at the same time achieve good error correction performance in all possible configurations. This fine-grained flexibility of channel codes is one of the most challenging problems for engineers in this domain.
  • Future communication systems such as 6G systems, may aim to support several challenging scenarios, including for example immersive communication, massive communication, and hyper reliable and low-latency communication.
  • the key performance indicators (KPIs) that are related to channel coding include coding gain, reliability, throughput, latency and their tradeoffs.
  • the throughput target of 6G may reach above 1 Tbps, and the energy efficiency target may decrease to 1 pJ/bit.
  • a coding scheme supporting flexible rate matching and IR-HARQ schemes is also beneficial. Accordingly, it is desirable yet challenging to design a code ensemble to fulfill all these KPIs and capabilities.
  • the communication system 100 comprises a radio access network 120.
  • the radio access network 120 may be a next generation (e.g. sixth generation (6G) or later) radio access network, or a legacy (e.g. 5G, 4G, 3G or 2G) radio access network.
  • 5G refers to 5th generation
  • 4G refers to 4th generation
  • 3G refers to 3rd generation
  • 2G refers to 2nd generation.
  • Legacy wireless technology may also include 2nd generation (2G) .
  • One or more communication electronic devices (ED) 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h, 110i, 110j may be interconnected to one another or connected to one or more network nodes (170a, 170b, generically referred to as 170) in the radio access network 120.
  • a core network 130 may be a part of the communication system and may be dependent or independent of the radio access technology used in the communication system 100.
  • the communication system 100 comprises a public switched telephone network (PSTN) 140, the internet 150, and other networks 160.
  • PSTN public switched telephone network
  • Fig. 2 illustrates an example communication system 100.
  • the communication system 100 enables multiple wireless or wired elements to communicate data and other content.
  • the purpose of the communication system 100 may be to provide content, such as voice, data, video, and/or text, via broadcast, multicast, groupcast, unicast, etc.
  • the communication system 100 may operate by sharing resources, such as carrier spectrum bandwidth, between its constituent elements.
  • the communication system 100 may include a terrestrial communication system and/or a non-terrestrial communication system.
  • the communication system 100 may provide a wide range of communication services and applications, such as earth monitoring, remote sensing, passive sensing and positioning, navigation and tracking, autonomous delivery and mobility, etc.
  • the communication system 100 may provide a high degree of availability and robustness through a joint operation of a terrestrial communication system and a non-terrestrial communication system.
  • integrating a non-terrestrial communication system, or components thereof into a terrestrial communication system can result in what may be considered a heterogeneous network comprising multiple layers.
  • the heterogeneous network may achieve better overall performance through efficient multi-link joint operation, more flexible functionality sharing, and faster physical layer link switching between terrestrial networks and non-terrestrial networks.
  • the communication system 100 includes electronic devices (ED) 110a, 110b, 110c, 110d (generically referred to as ED 110) , radio access networks (RANs) 120a, 120b, a non-terrestrial communication network 120c, a core network 130, a PSTN 140, the Internet 150, and other networks 160.
  • the RANs 120a, 120b include respective base stations (BSs) 170a, 170b, which may be generically referred to as terrestrial transmit and receive points (T-TRPs) 170a, 170b.
  • the non-terrestrial communication network 120c includes an access node 172, which may be generically referred to as a non-terrestrial transmit and receive point (NT-TRP) 172.
  • N-TRP non-terrestrial transmit and receive point
  • Any ED 110 may be alternatively or additionally configured to interface, access, or communicate with any T-TRP 170a, 170b and NT-TRP 172, the Internet 150, the core network 130, the PSTN 140, the other networks 160, or any combination of the preceding.
  • ED 110a may communicate an uplink and/or downlink transmission over a terrestrial air interface 190a with T-TRP 170a.
  • the EDs 110a, 110b, 110c, and 110d may also communicate directly with one another via one or more sidelink air interfaces 190b.
  • ED 110d may communicate an uplink and/or downlink transmission over a non-terrestrial air interface 190c with NT-TRP 172.
  • the air interfaces 190a and 190b may use similar communication technology, such as any suitable radio access technology.
  • the communication system 100 may implement one or more channel access methods, such as code division multiple access (CDMA) , space division multiple access (SDMA) , time division multiple access (TDMA) , frequency division multiple access (FDMA) , orthogonal FDMA (OFDMA) , or single-carrier FDMA (SC-FDMA, also known as discrete Fourier transform spread OFDMA, DFT-s-OFDMA) in the air interfaces 190a and 190b.
  • CDMA code division multiple access
  • SDMA space division multiple access
  • TDMA time division multiple access
  • FDMA frequency division multiple access
  • OFDMA orthogonal FDMA
  • SC-FDMA single-carrier FDMA
  • the air interfaces 190a and 190b may utilize other higher dimension signal spaces, which may involve a combination of orthogonal and/or non-orthogonal dimensions.
  • the non-terrestrial air interface 190c can enable communication between the ED 110d and one or multiple NT-TRPs 172 via a wireless link or simply a link.
  • the link is a dedicated connection for unicast transmission, a connection for broadcast transmission, or a connection between a group of EDs 110 and one or multiple NT-TRPs 172 for multicast transmission.
  • the RANs 120a and 120b are in communication with the core network 130 to provide the EDs 110a 110b, and 110c with various services such as voice, data, and other services.
  • the RANs 120a and 120b and/or the core network 130 may be in direct or indirect communication with one or more other RANs (not shown) , which may or may not be directly served by core network 130, and may or may not employ the same radio access technology as RAN 120a, RAN 120b or both.
  • the core network 130 may also serve as a gateway access between (i) the RANs 120a and 120b or EDs 110a 110b, and 110c or both, and (ii) other networks (such as the PSTN 140, the Internet 150, and the other networks 160) .
  • the EDs 110a 110b, and 110c may include functionality for communicating with different wireless networks over different wireless links using different wireless technologies and/or protocols. Instead of wireless communication (or in addition thereto) , the EDs 110a 110b, and 110c may communicate via wired communication channels to a service provider or switch (not shown) , and to the Internet 150.
  • PSTN 140 may include circuit switched telephone networks for providing plain old telephone service (POTS) .
  • Internet 150 may include a network of computers and subnets (intranets) or both, and incorporate protocols, such as internet protocol (IP) , transmission control protocol (TCP) , user datagram protocol (UDP) .
  • IP internet protocol
  • TCP transmission control protocol
  • UDP user datagram protocol
  • EDs 110a 110b, and 110c may be multimode devices capable of operation according to multiple radio access technologies, and incorporate multiple transceivers necessary to support such.
  • Fig. 3 illustrates another example of an ED 110 and a base station 170a, 170b and/or 170c.
  • the ED 110 is used to connect persons, objects, machines, etc.
  • the ED 110 may be widely used in various scenarios including, for example, cellular communications, device-to-device (D2D) , vehicle to everything (V2X) , peer-to-peer (P2P) , machine-to-machine (M2M) , machine- type communications (MTC) , internet of things (IoT) , virtual reality (VR) , augmented reality (AR) , mixed reality (MR) , metaverse, digital twin, industrial control, self-driving, remote medical, smart grid, smart furniture, smart office, smart wearable, smart transportation, smart city, drones, robots, remote sensing, passive sensing, positioning, navigation and tracking, autonomous delivery and mobility, etc.
  • D2D device-to-device
  • V2X vehicle to everything
  • P2P peer-to
  • Each ED 110 represents any suitable end user device for wireless operation and may include such devices (or may be referred to) as a user equipment/device (UE) , a wireless transmit/receive unit (WTRU) , a mobile station, a fixed or mobile subscriber unit, a cellular telephone, a station (STA) , a machine type communication (MTC) device, a personal digital assistant (PDA) , a smartphone, a laptop, a computer, a tablet, a wireless sensor, a consumer electronics device, a smart book, a vehicle, a car, a truck, a bus, a train, or an IoT device, wearable devices (such as a watch, a pair of glasses, head mounted equipment, etc.
  • UE user equipment/device
  • WTRU wireless transmit/receive unit
  • MTC machine type communication
  • PDA personal digital assistant
  • the base station 170a and 170b is a T-TRP and will hereafter be referred to as T-TRP 170. Also shown in Fig. 3, a NT-TRP will hereafter be referred to as NT-TRP 172.
  • Each ED 110 connected to T-TRP 170 and/or NT-TRP 172 can be dynamically or semi-statically turned-on (i.e., established, activated, or enabled) , turned-off (i.e., released, deactivated, or disabled) and/or configured in response to one of more of: connection availability and connection necessity.
  • the ED 110 includes a transmitter 201 and a receiver 203 coupled to one or more antennas 204. Only one antenna 204 is illustrated to avoid congestion in the drawing. One, some, or all of the antennas 204 may alternatively be panels.
  • the transmitter 201 and the receiver 203 may be integrated, e.g. as a transceiver.
  • the transceiver is configured to modulate data or other content for transmission by at least one antenna 204 or network interface controller (NIC) .
  • NIC network interface controller
  • the transceiver is also configured to demodulate data or other content received by the at least one antenna 204.
  • Each transceiver includes any suitable structure for generating signals for wireless or wired transmission and/or processing signals received wirelessly or by wire.
  • Each antenna 204 includes any suitable structure for transmitting and/or receiving wireless or wired signals.
  • the ED 110 includes at least one memory 208.
  • the memory 208 stores instructions and data used, generated, or collected by the ED 110.
  • the memory 208 could store software instructions or modules configured to implement some or all of the functionality and/or embodiments described herein and that are executed by one or more processing unit (s) (e.g., a processor 210) .
  • Each memory 208 includes any suitable volatile and/or non-volatile storage and retrieval device (s) . Any suitable type of memory may be used, such as random-access memory (RAM) , read only memory (ROM) , hard disk, optical disc, subscriber identity module (SIM) card, memory stick, secure digital (SD) memory card, on-processor cache, and the like.
  • RAM random-access memory
  • ROM read only memory
  • SIM subscriber identity module
  • SD secure digital
  • the ED 110 may further include one or more input/output devices (not shown) or interfaces (such as a wired interface to the Internet 150 in Fig. 1) .
  • the input/output devices or interfaces permit interaction with a user or other devices in the network.
  • Each input/output device or interface includes any suitable structure for providing information to or receiving information from a user, and/or for network interface communications. Suitable structures include, for example, a speaker, a microphone, a keypad, a keyboard, a display, a touch screen, etc.
  • the ED 110 includes the processor 210 for performing operations including those operations relate to preparing a transmission for uplink transmission to the NT-TRP 172 and/or the T-TRP 170; those operations relate to processing downlink transmissions received from the NT-TRP 172 and/or the T-TRP 170; and those operations relate to processing sidelink transmission to and from another ED 110.
  • Processing operations relate to preparing a transmission for uplink transmission may include operations such as encoding, modulating, transmit beamforming, and generating symbols for transmission.
  • Processing operations relate to processing downlink transmissions may include operations such as receive beamforming, demodulating and decoding received symbols.
  • a downlink transmission may be received by the receiver 203, possibly using receive beamforming, and the processor 210 may extract signaling from the downlink transmission (e.g. by detecting and/or decoding the signaling) .
  • An example of signaling may be a reference signal transmitted by the NT-TRP 172 and/or by the T-TRP 170.
  • the processor 210 implements the transmit beamforming and/or the receive beamforming based on the indication of beam direction, e.g. beam angle information (BAI) , received from the T-TRP 170.
  • the processor 210 may perform operations relating to network access (e.g.
  • the processor 210 may perform channel estimation, e.g. using a reference signal received from the NT-TRP 172 and/or from the T-TRP 170.
  • the processor 210 may form part of the transmitter 201 and/or part of the receiver 203.
  • the memory 208 may form part of the processor 210.
  • the processor 210, the processing components of the transmitter 201, and the processing components of the receiver 203 may each be implemented by the same or different one or more processors that are configured to execute instructions stored in a memory (e.g. in the memory 208) .
  • some or all of the processor 210, the processing components of the transmitter 201, and the processing components of the receiver 203 may each be implemented using dedicated circuitry, such as a programmed field-programmable gate array (FPGA) , an application-specific integrated circuit (ASIC) , or a hardware accelerator such as a graphics processing unit (GPU) or an artificial intelligence (AI) accelerator.
  • FPGA programmed field-programmable gate array
  • ASIC application-specific integrated circuit
  • AI artificial intelligence
  • the ED110 could be replaced with an apparatus in the ED110 (The apparatus, for example, is a communication module, a modem, a chip, or a chipset in the ED110) . It includes at least one processor, and an interface or at least one pin.
  • the transmitter 201 and receiver 203 may be replaced by the interface or at least one pin, wherein the interface or at least one pin is to connect the apparatus (e.g., chip) and other apparatus (e.g., chip, memory, or bus) .
  • the transmitting information to T-TRP170 or NT-TRP 172 may be referred as transmitting information to the interface or at least one pin, and receiving information from T-TRP170 or NT-TRP 172 may be referred as receiving information from the interface or at least one pin.
  • the information may include control signaling and/or data.
  • the T-TRP 170 may be known by other names in some implementations, such as a base station, a base transceiver station (BTS) , a radio base station, a network node, a network device, a device on the network side, a transmit/receive node, a node B, an evolved node B (eNodeB or eNB) , a home eNodeB, a next generation nodeB (gNB) , a transmission point (TP) , a site controller, an access point (AP) , a wireless router, a relay station, a terrestrial node, a terrestrial network device, a terrestrial base station, a base band unit (BBU) , a remote radio unit (RRU) , an active antenna unit (AAU) , a remote radio head (RRH) , a central unit (CU) , a distributed unit (DU) , a positioning node, among other possibilities.
  • BBU base band unit
  • RRU remote radio unit
  • the T-TRP 170 may be a macro-BS, a pico BS, a relay node, a donor node, or the like, or combinations thereof.
  • the T-TRP 170 may refer to the forgoing devices or refer to apparatus in the forgoing devices.
  • the parts of the T-TRP 170 may be distributed.
  • some of the modules of the T-TRP 170 may be located remote from the equipment that houses the antennas 256 for the T-TRP 170, and may be coupled to the equipment that houses the antennas 256 over a communication link (not shown) sometimes known as front haul, such as common public radio interface (CPRI) .
  • the term T-TRP 170 may also refer to modules on the network side that perform processing operations, such as determining the location of the ED 110, resource allocation (scheduling) , message generation, and encoding/decoding, and that are not necessarily part of the equipment that houses the antennas 256 of the T-TRP 170.
  • the modules may also be coupled to other T-TRPs.
  • the T-TRP 170 may actually be a plurality of T-TRPs that are operating together to serve the ED 110, e.g. through the use of coordinated multipoint transmissions.
  • the T-TRP 170 includes at least one transmitter 252 and at least one receiver 254 coupled to one or more antennas 256. Only one antenna 256 is illustrated to avoid congestion in the drawing. One, some, or all of the antennas 256 may alternatively be panels.
  • the transmitter 252 and the receiver 254 may be integrated as a transceiver.
  • the T-TRP 170 further includes a processor 260 for performing operations including those related to: preparing a transmission for downlink transmission to the ED 110, processing an uplink transmission received from the ED 110, preparing a transmission for backhaul transmission to the NT-TRP 172, and processing a transmission received over backhaul from the NT-TRP 172.
  • Processing operations relate to preparing a transmission for downlink or backhaul transmission may include operations such as encoding, modulating, precoding (e.g. multiple input multiple output (MIMO) precoding) , transmit beamforming, and generating symbols for transmission.
  • Processing operations relate to processing received transmissions in the uplink or over backhaul may include operations such as receive beamforming, demodulating received symbols, and decoding received symbols.
  • the processor 260 may also perform operations relating to network access (e.g. initial access) and/or downlink synchronization, such as generating the content of synchronization signal blocks (SSBs) , generating the system information, etc.
  • the processor 260 also generates an indication of beam direction, e.g. BAI, which may be scheduled for transmission by a scheduler 253.
  • the processor 260 performs other network-side processing operations described herein, such as determining the location of the ED 110, determining where to deploy the NT-TRP 172, etc.
  • the processor 260 may generate signaling, e.g. to configure one or more parameters of the ED 110 and/or one or more parameters of the NT-TRP 172. Any signaling generated by the processor 260 is sent by the transmitter 252.
  • “signaling” may alternatively be called control signaling.
  • Signaling may be transmitted in a physical layer control channel, e.g. a physical downlink control channel (PDCCH) , in which case the signaling may be known as dynamic signaling.
  • PDCCH physical downlink control channel
  • DCI downlink control information
  • Signaling transmitted in an uplink physical layer control channel may be known as uplink control information (UCI) .
  • DCI downlink control information
  • UCI uplink control information
  • Signaling transmitted in a sidelink physical layer control channel may be known as sidelink control information (SCI) .
  • Signaling may be included in a higher-layer (e.g., higher than physical layer) packet transmitted in a physical layer data channel, e.g. in a physical downlink shared channel (PDSCH) , in which case the signaling may be known as higher-layer signaling, static signaling, or semi-static signaling.
  • Higher-layer signaling may also refer to radio resource control (RRC) protocol signaling or media access control –control element (MAC-CE) signaling.
  • RRC radio resource control
  • MAC-CE media access control –control element
  • the scheduler 253 may be coupled to the processor 260.
  • the scheduler 253 may be included within or operated separately from the T-TRP 170.
  • the scheduler 253 may schedule uplink, downlink, sidelink, and/or backhaul transmissions, including issuing scheduling grants and/or configuring scheduling-free (e.g., “configured grant” ) resources.
  • the T-TRP 170 further includes a memory 258 for storing information and data.
  • the memory 258 stores instructions and data used, generated, or collected by the T-TRP 170.
  • the memory 258 could store software instructions or modules configured to implement some or all of the functionality and/or embodiments described herein and that are executed by the processor 260.
  • the processor 260 may form part of the transmitter 252 and/or part of the receiver 254. Also, although not illustrated, the processor 260 may implement the scheduler 253. Although not illustrated, the memory 258 may form part of the processor 260.
  • the processor 260, the scheduler 253, the processing components of the transmitter 252, and the processing components of the receiver 254 may each be implemented by the same or different one or more processors that are configured to execute instructions stored in a memory, e.g. in the memory 258.
  • some or all of the processor 260, the scheduler 253, the processing components of the transmitter 252, and the processing components of the receiver 254 may be implemented using dedicated circuitry, such as a programmed FPGA, a hardware accelerator (e.g., a GPU or AI accelerator) , or an ASIC.
  • the T-TRP 170 could be replaced with an apparatus in the T-TRP (The apparatus, for example, is a communication module, a modem, a chip, or a chipset inside the T-TRP) . It includes at least one processor, and an interface or at least one pin.
  • the transmitter 252 and receiver 254 may be replaced by the interface or at least one pin, wherein the interface or at least one pin is to connect the apparatus (e.g., chip) and other apparatus (e.g., chip, memory, or bus) .
  • the transmitting information to ED 110 may be referred as transmitting information to the interface or at least one pin, and receiving information from the ED 110 may be referred as receiving information from the interface or at least one pin.
  • the information may include control signaling and/or data.
  • the NT-TRP 172 is illustrated as a drone only as an example, the NT-TRP 172 may be implemented in any suitable non-terrestrial form, such as satellites and high-altitude platforms, including international mobile telecommunication base stations and unmanned aerial vehicles, for example. Also, the NT-TRP 172 may be known by other names in some implementations, such as a non-terrestrial node, a non-terrestrial network device, or a non-terrestrial base station.
  • the NT-TRP 172 includes a transmitter 272 and a receiver 274 coupled to one or more antennas 280. Only one antenna 280 is illustrated to avoid congestion in the drawing. One, some, or all of the antennas may alternatively be panels.
  • the transmitter 272 and the receiver 274 may be integrated as a transceiver.
  • the NT-TRP 172 further includes a processor 276 for performing operations including those relate to: preparing a transmission for downlink transmission to the ED 110s, processing an uplink transmission received from the ED 110s, preparing a transmission for backhaul transmission to T-TRP 170, and processing a transmission received over backhaul from the T-TRP 170.
  • Processing operations relate to preparing a transmission for downlink or backhaul transmission may include operations such as encoding, modulating, precoding (e.g. MIMO precoding) , transmit beamforming, and generating symbols for transmission.
  • precoding e.g. MIMO precoding
  • Processing operations relate to processing received transmissions in the uplink or over backhaul may include operations such as receive beamforming, demodulating received symbols, and decoding received symbols.
  • the processor 276 implements the transmit beamforming and/or receive beamforming based on beam direction information (e.g. BAI) received from the T-TRP 170.
  • the processor 276 may generate signaling, e.g. to configure one or more parameters of the ED 110.
  • the NT-TRP 172 implements physical layer processing, but does not implement higher layer functions such as functions at the medium access control (MAC) or radio link control (RLC) layer. As this is only an example, more generally, the NT-TRP 172 may implement higher layer functions in addition to physical layer processing.
  • MAC medium access control
  • RLC radio link control
  • the NT-TRP 172 further includes a memory 278 for storing information and data.
  • the processor 276 may form part of the transmitter 272 and/or part of the receiver 274.
  • the memory 278 may form part of the processor 276.
  • the processor 276, the processing components of the transmitter 272, and the processing components of the receiver 274 may each be implemented by the same or different one or more processors that are configured to execute instructions stored in a memory, e.g. in the memory 278.
  • some or all of the processor 276, the processing components of the transmitter 272, and the processing components of the receiver 274 may be implemented using dedicated circuitry, such as a programmed FPGA, a hardware accelerator (e.g., a GPU or AI accelerator) , or an ASIC.
  • the NT-TRP 172 may actually be a plurality of NT-TRPs that are operating together to serve the ED 110, e.g. through coordinated multipoint transmissions.
  • the T-TRP 170, the NT-TRP 172, and/or the ED 110 may include other components, but these have been omitted for the sake of clarity.
  • Fig. 4 illustrates units or modules in a device, such as in the ED 110, in the T-TRP 170, or in the NT-TRP 172.
  • a signal may be transmitted or output by a transmitting unit or by a transmitting module.
  • a signal may be received or input by a receiving unit or by a receiving module.
  • a signal may be processed by a processing unit or a processing module.
  • Other steps may be performed by an AI or machine learning (ML) module.
  • the respective units or modules may be implemented using hardware, one or more components or devices that execute software, or a combination thereof.
  • one or more of the units or modules may be a circuit such as an integrated circuit. Examples of an integrated circuit include a programmed FPGA, a GPU, or an ASIC.
  • one or more of the units or modules may be logical such as a logical function performed by a circuit, by a portion of an integrated circuit, or by software instructions executed by a processor. It will be appreciated that where the modules are implemented using software for execution by a processor for example, the modules may be retrieved by a processor, in whole or part as needed, individually or together for processing, in single or multiple instances, and that the modules themselves may include instructions for further deployment and instantiation.
  • transceiver module may also be known as an interface module, or simply an interface, for inputting and outputting operations.
  • the channel coding module in communications systems encode K source bits into N code bits to provide error correction capability against adversary channel condition such as noise and interference.
  • the code rate R is selected according to channel quality.
  • Polar codes are capacity-achieving codes and thus a great breakthrough in coding theory.
  • the synthesized channels become either noiseless or pure noise.
  • the synthesized channels that are also known as subchannels are created by or associated with the polar code.
  • the noiseless subchannels are utilized to transport information, and their proportion is proven to achieve the channel capacity defined by Shannon.
  • the above-mentioned channel polarization phenomenon occurs under successive cancellation (SC) or SC-based decoding, which has a relatively low complexity.
  • Rate matching is performed after channel encoding, by either puncturing/shortening or repeating some code bits.
  • the purpose of this operation is to obtain a code bit sequence of desired length for transmission over limited channel resources.
  • Channel interleaving is applied after channel encoding and rate matching by permuting the code bits.
  • the purpose is to provide stable or superior performance under high-order modulation or in a fading channel.
  • HARQ is a mechanism to provide reliable wireless transmission. It combines forward error correction (FEC) and automatic repeat request (ARQ) .
  • FEC forward error correction
  • ARQ automatic repeat request
  • the initial transmission is a FEC code word with means (such as CRC bits) to support error detection at the receiver. If a decoding error is detected, the receiver will send back a negative acknowledgment (NACK) signaling to inform the transmitter of the error, and request a retransmission.
  • NACK negative acknowledgment
  • the retransmitted bits can be directly selected from the initially transmitted bits, or incrementally generated code bits which form a longer code word with the initially transmitted bits.
  • the former approach is called chase-combining HARQ (CC-HARQ) and the latter approach is called IR-HARQ.
  • IR-HARQ outperforms CC-HARQ with the additional coding gain from incremental redundancy.
  • Polar codes belong to the class of linear block codes.
  • G N its generator matrix
  • G N its encoding process is wherein is a binary information vector, is the binary code vector.
  • the N ⁇ N binary matrix wherein is the polarization kernel matrix, n log 2 N, and is Kronecker product.
  • K information bits there are K information bits to be encoded into N code bits.
  • the information bit set or called information set may be denoted by I, and the frozen bit set, or called frozen set may be denoted by F respectively.
  • the frozen bits are known (usually all zeros, but may also be other known values or sequences) before decoding, so they do not carry any payload information.
  • the PC bits are parity-check bits generated from a subset of information bits. Therefore, the PC bits are known once the associated information bits are decoded. The decoding of polar codes attempts to recover all information bits.
  • the transmitted code length M may not always be the power of 2, i.e., M ⁇ N.
  • puncturing and shortening are used to reduce transmitted code bits from N to M.
  • N the mother code length
  • M the code length.
  • punctured bits are non-transmitted bits unknown to the decoder, but shortened bits are non-transmitted bits known to the decoder, and shortened bits are usually all zeros.
  • Successive cancellation is the basic decoding algorithm for polar codes, where all the frozen bits and information bits are decoded sequentially, i.e., bit by bit. The preceding bits are typically always decoded first.
  • Successive cancellation list is an enhanced decoding algorithm for polar codes, where multiple (e.g., a number L) SC decoding instances are executed. Each instance is called a “decoding path” .
  • decoding path When decoding each binary bit, both “0” and “1” branches are extended to each path, creating 2L paths. Then, all 2L paths are compared, where the most likely L paths are kept, and the least likely L paths are discarded or pruned. These path extension and pruning operations are performed during decoding of every information bit, until all information bits are decoded. At last, the most likely path is selected as the decoding output.
  • CA-SCL CRC-aided successive cancellation list
  • PC-SCL Parity-check successive cancellation list
  • Rate-compatible polar coding is a desirable technology for wireless applications.
  • polar code rate matching a combination of puncturing, shortening and repetition is used together with a fixed reliability sequence to balance performance and complexity.
  • subblock-wise interlacing and interleaving is used for both puncturing and shortening.
  • the puncturing and shortening patterns are symmetric.
  • the specific rate matching scheme used is repetition, when M>N; puncturing, when K/M ⁇ 7/16; shortening, when K/M>7/16.
  • a subblock-wise interleaving is performed before puncturing and shortening.
  • the interleaver partitions the length-N mother code into 32 subblocks of size N/32 and interlaces them.
  • An example interleaver scheme is shown in Fig. 6, which is reproduced from a 3GPP standard specification.
  • a code word also refers to a code bit, a coded bit, or an encoded bit. All mother code bits are placed in the cyclic buffer, and puncturing is done by selecting the bits in clockwise order, and shortening is done by selecting bits in counter-clockwise order.
  • Fig. 7 is a diagram illustrating puncturing and shortening with a cyclic buffer.
  • code bits of a code word are illustrated in a vertical column, with punctured and shortened bits as shown.
  • Fig. 7 illustrates a cyclic buffer, represented by a circle shape, and reading of code bits with no puncturing or shortening. The next two circles illustrate, respectively, cyclic buffers with dashed lines representing puncturing from the beginning of the buffer at 606 and shortening from the end of the buffer at 608.
  • Another polar code rate matching example involves an incremental freezing HARQ method, wherein transmissions of multiple short code words are supported. As more short codes are transmitted, the overall code length increases, and the overall code rate decreases.
  • an (M 1 , K) polar code is constructed, encoded and transmitted.
  • M 1 is the first transmitted code length
  • K is the number of the first transmitted information bits.
  • the code rate is determined such that R 1 ⁇ C 1 , wherein C 1 is the channel capacity of the first transmission. But in the case of faded channel or inaccurate channel estimation, there may be the inequality R 1 >C 1 , and decoding will fail and a second transmission is required.
  • K 2 least reliable information bits are selected from the K information bits in the first transmission.
  • K 2 is chosen according to the estimated channel capacity of the second transmission.
  • An (M 2 , K 2 ) polar code is constructed accordingly and encoded and transmitted.
  • M 2 is the second transmitted code length
  • K 2 is the number of the second transmitted information bits.
  • R 2 >C 2 and decoding will fail again and a third transmission is required.
  • the third and fourth transmissions are constructed similarly, and so on.
  • the decoder should always decode the last received code word, because it has the lowest code rate and thus the best chance of successful decoding.
  • the corresponding information bits in all previous transmissions become known, and can be decoded as frozen bits with known values. This process is repeated as more code words are decoded, until all K bits in the first transmission is decoded.
  • the term “incremental freezing” refers to the operations to additionally freeze some information bits in the previous transmissions once a later transmitted code word is decoded.
  • M 3 is the third transmitted code length
  • M 4 is the fourth transmitted code length
  • K 3 is the number of the third transmitted information bits
  • K 4 is the number of the fourth transmitted information bits.
  • Parity-check (PC) polar codes may be used to improve the minimum code distance of the original polar codes. Values of PC bits are determined by their preceding information bits, and specifically, binary linear combinations of a subset of preceding information bits. In one proposal of PC polar codes to support IR-HARQ, the PC bits are used to coupling multiple retransmissions into a longer polar code with extra coding gain.
  • the PC functions currently used for IR-HARQ are also a special case, wherein some information bits are copied from the initial transmitted code block to a retransmitted code block. This one-to-one parity checking between the two shorter code blocks effectively couples the two code blocks into a longer code block.
  • Its encoding process is shown in Fig. 9.
  • bit indices are in decreasing order of reliability.
  • coding gain improves as code length increases, and as long as the code is properly constructed, encoded, and decoded.
  • encoding and decoding long codes are usually more complex than encoding and decoding shorter codes. Therefore, the use of a longer code should be balanced against the desire to avoid excessive implementation complexity. Thus, there is a tradeoff between longer code and lower complexity.
  • One example solution to this issue is the application of code segmentation when the input bit sequence to be encoded is excessively long.
  • An example segmentation of LDPC codes involves selection of a base graph (BG) based on maximum information bit sequence length K cb , which is 8448 for BG1 and 3840 for BG2.
  • K cb maximum information bit sequence length
  • B is a length of the input bit sequence to be segmented and encoded
  • L is CRC sequence length.
  • a length of the input bit sequence refers to the input bit sequence length.
  • CRC sequence length refers to a length of CRC sequence, or a length of CRC bits.
  • the segmentation does not depend on the maximum length of coded bit sequence (or code length) that can be generated for an LDPC code block.
  • DCI downlink control information
  • UCI uplink control information
  • the payload bits will be segmented into at most two code blocks, depending on A (the length of the input bit sequence to be segmented and encoded) , and E (arate matching output sequence length) , as follows.
  • segmentation does not explicitly depend on the maximum length of coded bit sequence (or code length) that can be generated for a polar code block.
  • code length may refer to mother code length or rate matched code length.
  • the existing code segmentation methods may also include the following disadvantages.
  • the segmentation scheme only supports a limited number of code blocks, and cannot be straightforwardly extended to arbitrary number of code blocks. It lacks the flexibility to adapt to different information block length and code length.
  • the segmentation scheme is solely based on information block length. However, a more optimal segmentation that achieves better error correction performance on the transport block level would depend on many other factors. Thus, a segmentation scheme based on limited inputs is unlikely to achieve near optimal performance.
  • a method for obtaining codes correspond to different scenarios with a flexible code length or multiple code lengths is necessary for the communication system.
  • a plurality of codes are obtained with an input bit sequence (or called an information bit sequence) .
  • the input bit sequence is segmented and a transport block size is determined.
  • the segmentation strategy may vary based on several parameter, such as a maximum code length and/or a maximum information block size. So, after segmentation, the complexity of encoding and decoding decrease and the performance increase. And different strategy on segmentation of the plurality of information bits may be used due to different requirement, such as the requirement for the flexible code length or multiple code lengths.
  • FIG. 12 a simplified flow illustration of the encoding method is provided in Fig. 12.
  • the encoding method includes the following steps s1210 and s1220.
  • the executing entity of the encoding method may be a device or an apparatus in the device, wherein the device or the apparatus may include an encoder of polar codes.
  • the apparatus may be a communication module, a modem, or a chip in the device.
  • S1210 segmenting a plurality of information bits to a plurality of code blocks based on at least one of the followings: a maximum code length, and a maximum information block size.
  • segmentation may be performed before encoding.
  • the plurality of information bits may be segmented to the plurality of code blocks, each of which may include an equal or unequal number of information bits.
  • the plurality of code blocks may correspond to the maximum code length, and/or the maximum information block size, which provide flexible configuration for the communication system to support scenarios with flexible code length or multiple code lengths.
  • the maximum code length related to the maximum information block size which may also provide flexible configurations for the plurality of code blocks.
  • the plurality of code blocks are encoded to the plurality of code words.
  • Each of the plurality of code blocks may include a plurality of information bits and/or zero padding bits, and the quantity of the plurality of information bits and zero padding bits in each code block may vary with requirements, which provide flexible configurations of the plurality of code blocks.
  • each of the plurality of code blocks may be encoded separately, which may further reduce the complexity of encoding and increase the performance. Then, the decoding process may be performed after the encoding process.
  • the decoding method includes the following steps s1310 and s1320.
  • the executing entity of the decoding method may be a device or an apparatus in the device, wherein the device or the apparatus may include a decoder of polar codes.
  • the apparatus may be a communication module, a modem, or a chip in the device.
  • demodulation may be performed in decoding, and the plurality of code words may be converted to a plurality of first sequences. Then decoding may be performed on the plurality of first sequences.
  • decoding may be performed on the plurality of first sequences.
  • the plurality of information bits may be obtained, and the complexity of decoding may decrease due to the decoding operation on the plurality of code blocks including the plurality information bits.
  • SCL algorithm may be operated during the decoding process.
  • another algorithm or technique may be used in decoding. In some embodiments of the disclosure, no specific limitation is imposed on the algorithm and technique in decoding.
  • each of the plurality of code blocks may be decoded separately, which may further reduce the complexity of decoding and increase the performance.
  • code block segmentation There are two strategies in code block segmentation. One is to reduce the code rate, thus having more code blocks in the case of bounded maximum mother code length. The other is to increase the information block size, though with a higher code rate in the case of bounded maximum mother code length, and use repetition to achieve the overall target code rate. The first one expects to obtain higher coding gain with the lower code rate, and the second one expects to obtain higher coding gain with the larger block size. Finally, the optimal choice between the two strategies depends on several parameters, including the target code rate and code length.
  • a rule-based method may be used to consider the multiple parameters. They are a total information block length, a total rate matching output sequence length (or a total number of coded bits for transmission) , a target code rate, a maximum code length, a minimum code rate, and so on.
  • a maximum code length refers to a maximum mother code length
  • a minimum code length refers to a minimum mother code length.
  • Some embodiments of the present disclosure relate to methods of transport block size (TBS) determination and code block (CB) segmentation, and include one or more of the following features:
  • the first feature is that the methods may provide an adaptive method for TBS determination and CB segmentation in channel coding based on multiple resource and coding related parameters, where the adaptiveness is embodied through the different formula or rules applied to TBS determination and CB segmentation according to the different aforementioned parameters.
  • the parameters may include a number of resource elements, modulation order, coding rate, modulation and coding scheme (MCS) index, a quantity of transmission layers that the transport block is mapped onto, a total number of coded bits available for transmission, a total number of information bits available for encoding or the transport block size, the maximum code length, a maximum circular buffer size for a CB, a maximum information block size for a CB (or CB size) , a minimum code rate for channel coding, a minimum code rate for segmentation, and the length of CRC bits.
  • MCS modulation and coding scheme
  • the number of resource elements refers to a quantity of resource elements
  • a total number of coded bits available for transmission refers to a total quantity of coded bits available for transmission
  • a total number of information bits available for encoding refers to a total quantity of information bits available for encoding
  • the quantity of transmission layers refers to a number of transmission layers.
  • the parameters can be a subset of the above parameters.
  • the parameters at least include two or more parameters from the above parameters.
  • the parameters may include at least both “the total number of coded bits available for transmission” and “the total number of information bits available for encoding or the transport block size” .
  • the parameters may include at least “the total number of coded bits available for transmission” , “the total number of information bits available for encoding or the transport block size” , “the maximum code length” , and “the minimum code rate for segmentation” .
  • the second feature is that the methods may provide a method to determine the total number of coded bits available for transmission.
  • the method may be used to support for non-orthogonal multiplexing, mixed-traffic multiplexing and preempted transmissions.
  • the third feature is that the methods may provide a method to determine the total number of information bits available for encoding or the transport block size.
  • the method may be used to support of different traffics and simplification to be independent of a number of CBs.
  • the number of CBs refers to a quantity of CBs.
  • the fourth feature is that the methods may provide a method to determine the maximum code length.
  • the method may be used to provide native support of various configurable reduced buffers.
  • the fifth feature is that the methods may provide a method to calculate the number of CBs for CB segmentation.
  • the method includes consideration of multiple parameters in the determination of number of CBs, such that the performance is better.
  • the parameters include the maximum code length and the maximum information block length.
  • the maximum information block length refers to the maximum information block size for a CB.
  • the sixth feature is that the methods may provide a method to calculate CB size (CBS) , given the number of CBs.
  • CBS CB size
  • the method may be used to support for different CB sizes in a TB, and more flexible configuration.
  • the seventh feature is that the methods may provide a method to segment the input bit sequence and assign them to each CB.
  • the method includes more flexible zero padding positions.
  • Some embodiments of the present disclosure involve determining the total number of coded bits available for transmission.
  • the total number of coded bits available for transmission may be calculated from the quantity of available resource elements N RE , the modulation order Q m , the quantity of transmission layers N L , and a coefficient ⁇ .
  • the quantity of available resource elements refers to a number of available resource elements.
  • the quantity of available resource elements N RE has excluded the overhead of demodulation reference signal (DMRS) or other already configured (or scheduled) resource.
  • DMRS demodulation reference signal
  • the coefficient ⁇ can be a multiplexing factor, which is used when non-orthogonal multiplexing is applied to improve spectral efficiency.
  • the multiplexing factor ⁇ is used to reflect the degree of multiplexing, therefore typically ⁇ ⁇ 1.
  • the coefficient ⁇ can be a preemption portion, which is used when preempted transmission is applied, e.g., to allow arrive-and-go transmission for high-priority traffic.
  • the preemption portion ⁇ is used to reflect the percentage of preempted resource, therefore typically ⁇ ⁇ 1.
  • the coefficient ⁇ can be a resource distribution factor related to multi-traffic or mixed-traffic multiplexing.
  • the resource distribution factor ⁇ is used to reflect the percentage of resource used for this traffic type, therefore typically ⁇ ⁇ 1.
  • a vector of coefficients ( ⁇ 1 , ⁇ 2 , ... ⁇ Y ) is used to specify the resource distribution among Y traffic types, where ⁇ 1 , ⁇ 2 , ... ⁇ Y correspond to each traffic type in Y traffic types.
  • a vector of modulation order (Q m, 1 , Q m, 2 , ...Q m, Y ) is used to specify the modulation orders of the Y traffic types, where Q m, 1 , Q m, 2 , ...Q m, Y correspond to each traffic type in Y traffic types, and a vector of the quantity of transmission layers (N L, 1 , N L, 2 , ...N L, Y ) is used to specify the quantity of transmission layers of the Y traffic types.
  • N L, 1 , N L, 2 , ...N L, Y correspond to each traffic type in Y traffic types.
  • the followings are some embodiments of the present disclosure involve the method to determine the total number of information bits available for encoding.
  • the TBS may be related to the total number of coded bits available for transmission G, the target code rate R, and CRC sequence length L.
  • the method to determine the total number of information bits available for encoding or the transport block size may include the following details.
  • the TBS may be calculated according to the total number of coded bits available for transmission G that mentioned in the above method, and a target code rate R obtained from a MCS table and MCS index.
  • the target rate R may be pre-defined. In some embodiments of the disclosure, no specific limitation is imposed on the ways of obtaining the target code rate R.
  • the TBS does not depend on the number of CBs after segmentation that denoted by C.
  • the TBS does not depend on the maximum information block size for a CB that denoted by K cb .
  • the TBS does not depend on some channel coding related parameters, such as the base graph (BG) used for LDPC encoding, the maximum code length, and the minimum code rate (s) .
  • BG base graph
  • s minimum code rate
  • the total number of coded bits available for transmission G may be replaced by G y , and the code rate R may be replaced by R y , the CRC length L may be replaced by L y for the y-th traffic type.
  • the traffic type may include data, control, and so on. In some embodiments of the disclosure, no specific limitation is imposed on the type of traffic.
  • the followings are some embodiments of the present disclosure involve the method to determine the maximum code length.
  • the method to determine the maximum code length may include the following details.
  • buffer refers to a rate matching circular buffer.
  • the maximum code length N max may be determined by a set of reduced buffer size, instead of a single buffer size, and may be pre-defined to be used for limited buffer rate matching.
  • a set of absolute values of the maximum code length can be pre-defined, e.g., N max ⁇ (1024, 2048, 4096, 8192, 16384, 32768) and any of its subsets, or N max ⁇ (4800, 7200, 9600, 12000, 14400, 16800, 19200) and any of its subsets, or N max ⁇ (6336, 9504, 12672, 15840, 19008, 22176, 25344) and any of its subsets.
  • the maximum code length N max may be determined by the maximum information block size K cb , and a reduced code rate R LBRM from a set of minimum code rates for reduced buffer, can be pre-defined for limited buffer rate matching.
  • the reduced code rate R LBRM refers to a minimum code rate for reduced buffer.
  • R LBRM can be chosen from a pre-defined vector.
  • R LBRM ⁇ (1/3, 1/2, 2/3, 5/8, 3/4, 7/8) and any of its subsets.
  • the maximum code length may be determined based on code type.
  • the maximum code length may further depend on which base graph is selected.
  • N max ⁇ (6336, 9504, 12672, 15840, 19008, 22176, 25344, 33792, 67584) .
  • N max (4800, 7200, 9600, 12000, 14400, 16800, 19200, 25600, 51200) .
  • the maximum code length may be determined based on which base graph is used for LDPC codes.
  • the maximum code length may be determined based on which scenario is used for LDPC codes or polar codes, e.g., ultra-reliable low latency communications (URLLC) , massive machine type communications (mMTC) , enhanced mobile broadband (eMBB) , immersive communications, extended reality (XR) , control channel.
  • URLLC ultra-reliable low latency communications
  • mMTC massive machine type communications
  • eMBB enhanced mobile broadband
  • XR extended reality
  • the followings are some embodiments of the present disclosure involve methods of calculating the number of CBs for CB segmentation.
  • the plurality of code blocks are related to the maximum code length and/or the maximum information block size.
  • a quantity of the plurality of code blocks may be obtained in the following methods.
  • the method of calculating the number of CBs for CB segmentation may include the following details.
  • the number of CBs for CB segmentation C may be related to at least one of the following: the length of CRC bits L, the total number of coded bits available for transmission G, the maximum code length N max , the minimum code rate for segmentation R min , and the transport block size.
  • the number of CB may be given by where K cb is the maximum information block size, and L is the length of CRC bits (e.g., in this TB or CB group) .
  • any of the following CB segmentation method can be used.
  • the number of CB may be given by where G is the total number of coded bits available for transmission, and N max is the maximum code length.
  • the number of CB is given by where N max is the maximum mother code length, and R′ min is the minimum code rate for segmentation, and L is the length of CRC bits (e.g., in this TB or CB group) .
  • the number of CB may be given by where G is the total number of coded bits available for transmission, N max is the maximum mother code length, and R′ min is the minimum code rate for segmentation, and L is the length of CRC bits (e.g., in this TB or CB group) .
  • the minimum code rate for segmentation R′ min may be pre-defined, or may be flexible configuration with requirements. In the embodiments of the present disclosure, no specific limitation is imposed on methods of obtaining the minimum code rate for segmentation R′ min .
  • the value of R′ min is higher than the minimum code rate for channel coding R min .
  • the followings are some embodiments of the present disclosure involve methods of calculating CB size, given the number of CBs.
  • the plurality of code blocks are related to the maximum code length and/or the maximum information block size.
  • a size of each of the plurality of code blocks may be obtained in the following methods.
  • the following are the details of the method of calculating CB size with the quantity of CBs.
  • the CBS calculation methods have the following options, where the CBS is denoted by K (K is a number of bits in each CB) , and B refers to the TBS.
  • the CBS does not include CRC bits for the CB.
  • the CBS includes CRC bits for the CB.
  • m is a non-negative constant integer.
  • m is a non-negative constant integer.
  • m 3
  • the CBS does not include CRC bits for the CB.
  • the CBS includes CRC bits for the CB.
  • the CBS calculation methods have the following options, where the CBS of the CB of index r (number of bits K r in the CB of index r) is denoted by K r and TBS is denoted by B.
  • L is the number of CRC bits for each CB.
  • L is the number of CRC bits for each CB.
  • the last CB has a different CBS while the first C-1 CBs have the same CBS.
  • the first CB (or any CB) may have a different CBS from other CBs.
  • the information bits may be assigned to each code block.
  • the following are some embodiments of the present disclosure of segmenting the input bit sequence and assigning them to each CB.
  • the followings are some embodiments of the present disclosure involve a method to segment the input bit sequence, denoted by b 0 , b 1 , b 2 , b 3 , ..., b B-1 , and assign them to each CB.
  • the k-th bit in the CB of index r is denoted by b rk .
  • B′ K ⁇ C
  • different zero-padding methods can be used to pad the additional number of bits when and B′ may be denoted by Methods of zero padding may further reduce the complexity of encoding and decoding.
  • the same number of zero-padding bits may be added to each CB.
  • all zero-padding bits may be added to one CB, which can be the first CB or the last CB in the TB (or CB group) .
  • the pseudocodes may be illustrated as follows:
  • methods of code block segmentation and bit assigning can be written in the following pseudocodes.
  • the sequence c r0 , c r1 , c r2 , c r3 , ..., c r (B′/C-1) is used to calculate the CRC parity bits p r0 , p r1 , p r2 , ..., p r (L-1) according to the CB-level CRC’s generator polynomial of length L.
  • the pseudocodes may be illustrated as follows:
  • the sequence is used to calculate the CRC parity bits p r0 , p r1 , p r2 , ..., p r (L-1) according to the CB-level CRC’s generator polynomial of length L.
  • the pseudocodes may be illustrated as follows:
  • Some embodiments of the present disclosure may enable advantageous effects such as:
  • the present disclosure encompasses various embodiments, including not only method embodiments, but also other embodiments such as apparatus embodiments and embodiments related to non-transitory computer readable storage media. Embodiments may incorporate, individually or in combinations, the features disclosed herein.
  • any module, component, or device exemplified herein that executes instructions may include or otherwise have access to a non-transitory computer readable or processor readable storage medium or media for storage of information, such as computer readable or processor readable instructions, data structures, program modules, and/or other data.
  • non-transitory computer readable or processor readable storage media includes magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, optical disks such as compact disc read-only memory (CD-ROM) , digital video discs or digital versatile disc (DVDs) , Blu-ray Disc TM , or other optical storage, volatile and non-volatile, removable and non-removable media implemented in any method or technology, random-access memory (RAM) , read-only memory (ROM) , electrically erasable programmable read-only memory (EEPROM) , flash memory or other memory technology. Any such non-transitory computer readable or processor readable storage media may be part of a device or accessible or connectable thereto. Any application or module herein described may be implemented using instructions that are readable and executable by a computer or processor may be stored or otherwise held by such non-transitory computer readable or processor readable storage media.
  • the present disclosure encompasses various embodiments, including not only method embodiments, but also other embodiments such as apparatus embodiments and embodiments related to non-transitory computer readable storage media. Embodiments may incorporate, individually or in combinations, the features disclosed herein.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Des modes de réalisation de la présente divulgation concernent des procédés, des systèmes et un appareil de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives. Dans les procédés, la segmentation de la pluralité de bits d'informations en une pluralité de blocs de code peut être basée sur une longueur de code maximale et/ou une taille de bloc d'informations maximale. Puis la pluralité de blocs de code peut être codée en une pluralité de mots de code. Les procédés de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives peuvent être utilisés dans les scénarios qui nécessitent une longueur de code flexible ou de multiples longueurs de code. Les procédés peuvent réduire la complexité du codage et du décodage et augmenter les performances.
PCT/CN2024/084955 2023-11-14 2024-03-29 Procédés, systèmes et appareil de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives Pending WO2025102585A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US202363598601P 2023-11-14 2023-11-14
US63/598,601 2023-11-14

Publications (1)

Publication Number Publication Date
WO2025102585A1 true WO2025102585A1 (fr) 2025-05-22

Family

ID=95741944

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2024/084955 Pending WO2025102585A1 (fr) 2023-11-14 2024-03-29 Procédés, systèmes et appareil de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives

Country Status (1)

Country Link
WO (1) WO2025102585A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101667884A (zh) * 2008-09-03 2010-03-10 中兴通讯股份有限公司 信道编码方法及装置、信道译码方法及装置
US20180175888A1 (en) * 2016-12-16 2018-06-21 Nokia Technologies Oy Efficient encoding/decoding for multiple-input multiple-output operating with two codewords
US20200235752A1 (en) * 2017-02-06 2020-07-23 Telefonaktiebolaget Lm Ericsson (Publ) LDPC Code Block Segmentation
WO2023058793A1 (fr) * 2021-10-08 2023-04-13 엘지전자 주식회사 Procédé de segmentation de bloc de code destiné à un appareil dans un système de communication sans fil et appareil

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101667884A (zh) * 2008-09-03 2010-03-10 中兴通讯股份有限公司 信道编码方法及装置、信道译码方法及装置
US20180175888A1 (en) * 2016-12-16 2018-06-21 Nokia Technologies Oy Efficient encoding/decoding for multiple-input multiple-output operating with two codewords
US20200235752A1 (en) * 2017-02-06 2020-07-23 Telefonaktiebolaget Lm Ericsson (Publ) LDPC Code Block Segmentation
WO2023058793A1 (fr) * 2021-10-08 2023-04-13 엘지전자 주식회사 Procédé de segmentation de bloc de code destiné à un appareil dans un système de communication sans fil et appareil

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
INTEL CORPORATION: "LDPC Coding chain", 3GPP DRAFT; R1-1711344, vol. RAN WG1, 20 June 2017 (2017-06-20), Qingdao, P.R. China, pages 1 - 5, XP051305812 *

Similar Documents

Publication Publication Date Title
KR102670713B1 (ko) 통신 또는 방송 시스템에서 채널 부호화/복호화 방법 및 장치
KR102559502B1 (ko) 통신 또는 방송 시스템에서 전송블록 크기 결정 방법 및 장치
US20220216885A1 (en) System and method for processing control information
KR102559171B1 (ko) 무선 셀룰라 통신 시스템에서 데이터 전송 방법 및 장치
KR102517960B1 (ko) 무선 셀룰라 통신 시스템에서 데이터 전송 방법 및 장치
KR102445151B1 (ko) 통신 또는 방송 시스템에서 채널 부호화/복호화 방법 및 장치
KR102530968B1 (ko) 통신 또는 방송 시스템에서 채널 부호화/복호화 방법 및 장치
WO2025102585A1 (fr) Procédés, systèmes et appareil de détermination de taille de blocs de transport et de segmentation de blocs de code adaptatives
WO2025102555A1 (fr) Procédés, systèmes et appareil de détermination de longueur de code mère
WO2025102567A1 (fr) Procédés, systèmes et appareil d'extraction de séquence de fiabilité imbriquée flexible
WO2025118414A1 (fr) Procédés, appareil et systèmes de construction de code polaire
WO2025123499A1 (fr) Procédés, appareil et systèmes de sélection de bits de code pour un code correcteur d'erreur
WO2025118429A1 (fr) Procédé, appareil et système d'entrelacement de canal par blocs pour codage de correction d'erreur
WO2025189600A1 (fr) Procédé et appareil de configuration de canal de commande de liaison montante
WO2025112225A1 (fr) Procédé, appareil et système de communication
WO2025118454A1 (fr) Procédé et appareils d'adaptation du débit
WO2025145503A1 (fr) Procédé et appareil de communication
WO2025123492A1 (fr) Procédés, appareil et système de codage polaire de contrôle de parité
WO2025118442A1 (fr) Procédé et appareils d'adaptation de débit
WO2025208745A9 (fr) Procédé, appareil et système de demande de répétition automatique hybride
WO2025123490A1 (fr) Procédés, appareil et système de codage polaire de contrôle de parité
WO2025118443A1 (fr) Procédé et appareils d'entrelacement
WO2025189627A1 (fr) Procédé, appareil et système de retransmission d'informations de commande de liaison montante
WO2025200174A9 (fr) Procédé, appareil et système de communication
WO2025200174A1 (fr) Procédé, appareil et système de communication

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 24889959

Country of ref document: EP

Kind code of ref document: A1