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WO2025198196A1 - Circuit de compensation de données et dispositif d'affichage le comprenant - Google Patents

Circuit de compensation de données et dispositif d'affichage le comprenant

Info

Publication number
WO2025198196A1
WO2025198196A1 PCT/KR2025/002422 KR2025002422W WO2025198196A1 WO 2025198196 A1 WO2025198196 A1 WO 2025198196A1 KR 2025002422 W KR2025002422 W KR 2025002422W WO 2025198196 A1 WO2025198196 A1 WO 2025198196A1
Authority
WO
WIPO (PCT)
Prior art keywords
compensation
compensation value
data
value
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/KR2025/002422
Other languages
English (en)
Korean (ko)
Inventor
유종상
박준영
이진호
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LX Semicon Co Ltd
Original Assignee
LX Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020250016735A external-priority patent/KR20250140427A/ko
Application filed by LX Semicon Co Ltd filed Critical LX Semicon Co Ltd
Publication of WO2025198196A1 publication Critical patent/WO2025198196A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • An embodiment of the present invention relates to a data compensation circuit and a display device including the same.
  • a data compensation circuit may include a grayscale analysis unit that converts a sub-pixel grayscale value of image data input for each pixel line into a voltage value and calculates a voltage fluctuation amount for each pixel using the converted voltage value; a compensation value generation unit that calculates a first compensation value using the calculated voltage fluctuation amount and calculates a second compensation value by applying a pre-estimated gain to the first compensation value; and a data compensation unit that compensates for the input image data for each pixel of the current pixel line using the calculated second compensation value.
  • the above voltage fluctuation amount may be the difference between the voltage value obtained by averaging the voltage values of the sub-pixels included in the pixel line and the voltage value obtained by averaging the voltage values of the sub-pixels included in one pixel within the pixel line.
  • the above compensation value generation unit may calculate one offset value or multiple offset values as the first compensation value according to predetermined mode information, and the mode information may include a first compensation mode for calculating the one offset value and a second compensation mode for calculating the multiple offset values.
  • the above compensation value generation unit can use the voltage fluctuation amount calculated according to the first compensation mode to calculate a predetermined offset value according to the average grayscale value of sub-pixels included in the pixel as the first compensation value.
  • the above compensation value generation unit can use the voltage fluctuation amount calculated according to the second compensation mode to calculate a plurality of predetermined offset values as the first compensation value according to the grayscale value of each sub-pixel included in the pixel.
  • the above gain includes a first gain and a second gain
  • the compensation value generation unit can estimate the first gain, which is predetermined, according to the DBV of the pixel line, and can estimate the second gain, which is predetermined, according to the position of the pixel line.
  • the above compensation value generation unit can multiply the first compensation value by at least one of the estimated first gain and second gain to calculate the second compensation value, and provide the calculated second compensation value to the data compensation unit.
  • a display device may include a display panel in which pixels are arranged in an area where a plurality of gate lines and a plurality of data lines intersect; a gate driver for outputting a gate signal through the gate lines; a data driver for outputting a data voltage through the data lines; and a timing controller for controlling the gate driver and the data driver, wherein the timing controller includes a data compensation circuit for compensating image data of an input image input from the outside, and the data compensation circuit may include a grayscale analysis unit for converting a grayscale value of each subpixel of image data input for each pixel line into a voltage value and calculating a voltage fluctuation amount for each pixel using the converted voltage value; a compensation value generation unit for calculating a first compensation value using the calculated voltage fluctuation amount and calculating a second compensation value by applying a pre-estimated gain to the first compensation value; and a data compensation unit for compensating image data input for each pixel of a current pixel line using the calculated second compensation value.
  • the timing controller includes a data compensation circuit for compens
  • the present invention calculates a first compensation value using the voltage fluctuation amount calculated for each pixel line, calculates a second compensation value by applying a gain estimated using the DBV and position of the current pixel line to the first compensation value, and compensates for image data using the calculated second compensation value, thereby enabling compensation of horizontal crosstalk on a pixel line basis.
  • the present invention can enable precise compensation because it compensates image data on a pixel line basis.
  • FIG. 1 is a drawing showing a display device according to an embodiment of the present invention.
  • Fig. 2 is a diagram showing the data compensation circuit illustrated in Fig. 1.
  • FIG. 4 is a diagram for explaining the data compensation principle according to an embodiment of the present invention.
  • Figures 5 to 7 are drawings for explaining the principle of generating the first lookup table.
  • Figures 10 and 11 are drawings for explaining the calculation principles of the first and second gains.
  • FIG. 12 is a diagram showing an image data compensation process according to an embodiment of the present invention.
  • the gate driver (120) may be arranged on one side of the display panel (110), for example, on the left side, as shown, but may also be arranged on both one side and the other side of the display panel (110), for example, on both the left and right sides, facing each other, as needed.
  • the gate driver (120) may include a plurality of gate driver ICs (Gate Driver Integrated Circuits, not shown).
  • the timing controller (140) may include a data compensation circuit (141).
  • the data compensation circuit (141) may compensate for horizontal crosstalk occurring in an image displayed on a display panel.
  • the host system (150) may be implemented as any one of a navigation system, a set-top box, a DVD player, a Blu-ray player, a personal computer (PC), a home theater system, a broadcast receiver, and a phone system.
  • the host system (150) can include a system on chip (SoC) with a built-in scaler to convert digital image data (RGB) of an input image into a format suitable for display on a display panel (110).
  • SoC system on chip
  • the host system (150) can transmit digital image data (RGB) and various timing signals to a timing controller (140).
  • FIG. 2 is a diagram showing the data compensation circuit illustrated in FIG. 1
  • FIG. 3 is a diagram explaining the horizontal crosstalk compensation principle according to an embodiment of the present invention.
  • a data compensation circuit (141) may include a position analysis unit (141a), a compensation value generation unit (141b), and a data compensation unit (141c).
  • the gradation analysis unit (141a) can analyze the gradation of the digital image data of the input image on a pixel line basis to determine whether horizontal crosstalk has occurred.
  • the compensation value generation unit (141b) can generate a compensation value based on digital image data of an input image in which horizontal crosstalk has occurred and provide the generated compensation value to the data compensation unit (141c).
  • the compensation value generation unit (141b) calculates the voltage fluctuation amount in pixel line units, calculates the first compensation value using the calculated voltage fluctuation amount, estimates the first and second gains using the DBV (Display Brightness Value) and position of the pixel line, and calculates the second compensation value by applying the estimated first and second gains to the first compensation value.
  • DBV Display Brightness Value
  • the data compensation unit (141c) can compensate for horizontal crosstalk of digital image data of an input image using the compensation value provided from the compensation value generation unit (141b). As shown in Fig. 3, the phenomenon of low brightness in a high-gray area (dotted box) can be improved.
  • the data compensation unit (141c) can provide compensated digital image data to the data driving unit.
  • FIG. 4 is a drawing for explaining the data compensation principle according to an embodiment of the present invention
  • FIGS. 5 to 7 are drawings for explaining the first lookup table generation principle
  • FIGS. 8 to 9 are drawings for explaining the second lookup table generation principle
  • FIGS. 10 to 11 are drawings for explaining the first and second gain calculation principles.
  • the data compensation unit (141c) can receive digital image data (hereinafter referred to as image data) of an input image from an external source.
  • the gradation analysis unit (141a) may include a clipping unit (141a-1), a mode selection unit (141a-2), a voltage conversion unit (141a-3), an average calculation unit (141a-4), and a fluctuation calculation unit (141a-5).
  • the clipping unit (141a-1) can check whether the unit data of the input image data is data of a predetermined reference bit.
  • the compensation value generation unit (141b) can check whether the unit data to be applied to each pixel constituting the input image data in units of one pixel line is a reference bit, for example, 8 bits.
  • the unit data may be data applied to each of the red sub-pixel, green sub-pixel, and blue sub-pixel.
  • the clipping unit (141a-1) can clip the unit data if the unit data of the input image data is not data of a predetermined reference bit.
  • clipping refers to removing the lower bit of the unit data and modulating it into data of the reference bit.
  • the compensation value generating unit (141b) can remove the lower 2 bits and generate 8-bit unit data.
  • the mode selection unit (141a-2) can select one of a first compensation mode that compensates each of the red, green, and blue sub-pixels with the same compensation value and a second compensation mode that compensates each of the red, green, and blue sub-pixels with different compensation values.
  • the mode selection unit (141a-2) can generate mode information (Mod) including the selected first compensation mode or second compensation mode and provide the generated mode information (Mod) to the compensation value generation unit (141b).
  • This compensation mode can be predetermined and can be changed as needed.
  • the voltage conversion unit (141a-3) can convert the grayscale values of the modulated image data into voltage values.
  • the compensation value generation unit (141b) can convert the grayscale values of each subpixel of the modulated image data into voltage values using a first lookup table that is predetermined.
  • the first lookup table may include voltage values according to the grayscale value (Gray) of each subpixel.
  • the first lookup table may include voltage values (Vr_node) according to the grayscale value of image data input to a red subpixel, voltage values (Vg_node) according to the grayscale value of image data input to a green subpixel, and voltage values (Vb_node) according to the grayscale value of image data input to a blue subpixel.
  • the voltage value for each subpixel is calculated using 9 predetermined grayscale values, and the voltage value for all grayscale values can be estimated by interpolating the voltage value for each subpixel calculated using the calculated voltage value for each subpixel as shown in Fig. 6.
  • the process of generating the first lookup table will be described with reference to FIGS. 5 and 7.
  • the voltage value of each subpixel can be calculated by the following [Mathematical Formula 1].
  • Vgma VGMP - (VGMP - VGSP) ⁇ GMA / MAX_gma
  • Vnor may include sub-pixel voltage ratios Vr_nor, Vg_nor, and Vb_nor.
  • VGMP may be a voltage for adjusting the maximum value of the gamma curve
  • VGSP may be a voltage for adjusting the minimum value of the gamma curve.
  • Vgma may be a gamma voltage determined by VGMP and VGSP.
  • GMA may include sub-pixel gamma voltages GMA_R, GMA_G, and GMA_B.
  • MAX_gma may be a predetermined maximum gamma voltage.
  • the method of calculating the voltage value of each subpixel using the nine grayscale values described here is only an example and is not limited to this, and various methods can be applied.
  • the average voltage value Vavg of the corresponding pixel line can be calculated by the following [Mathematical Formula 3].
  • Vr_sum may be the sum of the voltage values of the red sub-pixels
  • Vg_sum may be the sum of the voltage values of the green sub-pixels
  • Vb_sum may be the sum of the voltage values of the red sub-pixels.
  • N_pxl represents the total number of sub-pixels constituting one pixel line.
  • the average voltage value Vavg of the pixel line calculated in this way may be a value within the range of 0 to 255.
  • the fluctuation calculation unit (141a-5) can calculate the voltage fluctuation for each pixel using the average voltage value of the corresponding pixel line.
  • the voltage fluctuation DeltaV is defined as in the following [Mathematical Formula 4].
  • Vpixel (Vr + Vg + Vb) / N_sub
  • Vpixel may be the average voltage value of the red, green, and blue sub-pixels constituting one pixel.
  • N_sub represents the total number of sub-pixels constituting one pixel.
  • the voltage fluctuation amount according to the embodiment is the difference between the average voltage value of the pixel line and the average voltage value of one pixel within the pixel line.
  • the compensation value generation unit (141b) may include a first compensation value generation unit (141b-1) and a second compensation value generation unit (141b-2).
  • the first compensation value generation unit (141b-1) can generate the first compensation value using the calculated voltage fluctuation amount.
  • the compensation value generation unit (141b) can generate the first compensation value from a predetermined second lookup table using the calculated voltage fluctuation amount.
  • the second lookup table may include offset values for each grayscale according to the amount of voltage fluctuation. While including offset values for four predetermined grayscale values, offset values for all grayscale values can be estimated by interpolating the offset values.
  • the first compensation value generation unit (141b-1) can generate the first compensation value through interpolation using offset values corresponding to DeltaV1 and DeltaV2 when the generated voltage fluctuation amount DeltaV is between DeltaV1 and DeltaV2 of the second lookup table illustrated in FIG. 8.
  • the first compensation value generation unit (141b-1) can receive mode information from the gradation analysis unit (141a). The first compensation value generation unit (141b-1) can calculate the first compensation value differently depending on the received mode information.
  • the first compensation value generation unit (141b-1) can produce a first compensation value for compensating each of the red, green, and blue sub-pixels with the same value according to the first compensation mode included in the mode information.
  • the grayscale of the red subpixel is Gray 0
  • the grayscale of the green subpixel is Gray a
  • the grayscale of the blue subpixel is Gray b
  • DeltaV is between Delta V(1) and Delta V(2).
  • the first compensation value can be a value of the result of interpolation using the offset values Offset0_0 and Offset0_1 for Delta V(1) and Delta V(2) of the grayscale Gray a, respectively.
  • the first compensation value generation unit (141b-1) can generate a second compensation value for compensating each of the red, green, and blue sub-pixels with a different value according to the first compensation mode included in the mode information.
  • the grayscale of the red subpixel is Gray 0
  • the grayscale of the green subpixel is Gray a
  • the grayscale of the blue subpixel is Gray b
  • DeltaV is between Delta V(1) and Delta V(2).
  • a red offset value for a red subpixel, a green offset value for a green subpixel, and a blue offset value for a blue subpixel can be calculated as the first compensation values.
  • the red offset value may be a value resulting from interpolation using offset values '0' and '0' for Delta V(1) and Delta V(2) of grayscale Gray 0, respectively.
  • the green offset value may be a value resulting from interpolation using offset values 'Offset0_0' and 'Offset0_1' for Delta V(1) and Delta V(2) of grayscale Gray a, respectively.
  • the blue offset value may be a value resulting from interpolation using offset values 'Offset1_0' and 'Offset1_1' for Delta V(1) and Delta V(2) of grayscale Gray b, respectively.
  • the second lookup table can be obtained using the first lookup table described above, and the principle of generating the second lookup table will be explained with reference to Fig. 9.
  • the voltage value V_node of each pixel can be calculated using the following mathematical expression 5.
  • V_node (Vr_node / a1) ⁇ (Vg_node / a2) ⁇ (Vb_node / a1)
  • a1 and a2 are predetermined constant values, and can be set as a1 > a2.
  • the reason a2 is set to a value smaller than a1 is because the green subpixel has the greatest influence on luminance.
  • the voltage fluctuation value can be calculated using the pixel voltage value V_node calculated for each predetermined grayscale.
  • the voltage fluctuation value DeltaV can be calculated using the following [Mathematical Formula 6].
  • DeltaV(i) round ⁇ (DeltaV_max / 7) ⁇ (i-1) ⁇ ,
  • V_node(0) is the maximum voltage value
  • V_node(8) is the minimum voltage value
  • the second compensation value generation unit (141b-2) can apply an estimated gain based on the DBV and position of the current pixel line to the first compensation value to produce the second compensation value as the final compensation value.
  • the second compensation value generation unit (141b-2) can estimate the first gain (Gain1) by using the DBV of the current pixel line for the first compensation value.
  • DBV_Gain can be estimated as the first gain as a result of interpolating the gains DBV_Gain(n-1) and DBV_Gain(n) for DBV(n-1) and DBV(n).
  • the second compensation value generation unit (141b-2) can estimate the second gain (Gain2) by using the position of the current pixel line in the first compensation value. As shown in Fig. 11, if the position of the current pixel line is located between the preset down line and the middle line, Pos_Gain can be estimated as the second gain as a result of interpolating the gains Pos_Gain1 and Pos_Gain2 for the down line and the middle line.
  • the second compensation value generation unit (141b-2) applies the first gain and the second gain to the first compensation value to produce the second compensation value.
  • the second compensation value can be produced using the following [Mathematical Formula 7].
  • Second compensation value First compensation value ⁇ Gain1 ⁇ Gain2
  • Second compensation value First compensation value ⁇ Gain1
  • Second compensation value First compensation value ⁇ Gain2
  • the second compensation value generation unit (141b-2) can calculate a second compensation value by applying at least one of the first gain and the second gain, and can provide the calculated second compensation value to the data compensation unit.
  • the data compensation unit (141c) may include an adder (141c).
  • the adder (141c) may generate horizontal crosstalk-compensated image data (o_data) by adding the second compensation value provided from the compensation value generation unit (141b) to the input image data (i_data).
  • the adder (141c) may provide the compensated image data (o_data) to the data driving unit.
  • FIG. 12 is a diagram showing an image data compensation process according to an embodiment of the present invention.
  • the data compensation circuit can convert the grayscale values of the input image data into voltage values (S120). For example, the data compensation circuit can convert the grayscale values of each subpixel of the modulated image data into voltage values using a predefined first lookup table.
  • the data compensation circuit calculates an average voltage value by averaging the voltage values of the sub-pixels included in the corresponding pixel line using the converted voltage values for each sub-pixel (S130), and can calculate the voltage fluctuation amount for each pixel line using the calculated average voltage value (S140).
  • the data compensation circuit can calculate a first compensation value using the voltage fluctuation amount calculated for each pixel line (S150). For example, the data compensation circuit can calculate a first compensation value from a second lookup table determined in advance using the calculated voltage fluctuation amount.
  • the data compensation circuit can multiply the estimated first gain and second gain by the first compensation value to produce the second compensation value (S170).
  • the data compensation circuit can multiply the calculated second compensation value by the input image data to generate image data with horizontal crosstalk compensated and transmit the image data to the data driving unit (S180).

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

Selon un mode de réalisation, la présente invention concerne un circuit de compensation de données et un dispositif d'affichage le comprenant. Le circuit de compensation de données comprend : une unité d'analyse de niveau de gris qui convertit une valeur de niveau de gris pour chaque sous-pixel de données d'image entrées pour chaque ligne de pixels en une valeur de tension, et qui calcule une variation de tension pour chaque pixel à l'aide de la valeur de tension convertie ; une unité de génération de valeur de compensation qui calcule une première valeur de compensation à l'aide de la variation de tension calculée, et qui calcule une seconde valeur de compensation en appliquant un gain pré-estimé à la première valeur de compensation ; et une unité de compensation de données qui utilise la seconde valeur de compensation calculée pour compenser les données d'image qui sont entrées dans des unités de pixels d'une ligne de pixels actuelle.
PCT/KR2025/002422 2024-03-18 2025-02-20 Circuit de compensation de données et dispositif d'affichage le comprenant Pending WO2025198196A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20240037430 2024-03-18
KR10-2024-0037430 2024-03-18
KR10-2025-0016735 2025-02-10
KR1020250016735A KR20250140427A (ko) 2024-03-18 2025-02-10 데이터 보상회로 및 이를 포함하는 표시 장치

Publications (1)

Publication Number Publication Date
WO2025198196A1 true WO2025198196A1 (fr) 2025-09-25

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Application Number Title Priority Date Filing Date
PCT/KR2025/002422 Pending WO2025198196A1 (fr) 2024-03-18 2025-02-20 Circuit de compensation de données et dispositif d'affichage le comprenant

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WO (1) WO2025198196A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160141252A (ko) * 2015-05-29 2016-12-08 엘지디스플레이 주식회사 다중 서브픽셀 센싱 방법 및 이를 적용하는 유기발광표시장치
KR20200048639A (ko) * 2018-10-30 2020-05-08 엘지디스플레이 주식회사 표시 장치 및 표시 장치의 제어 방법
KR20200133129A (ko) * 2019-05-17 2020-11-26 삼성디스플레이 주식회사 수평 크로스토크를 보상하는 표시 장치
KR20210045573A (ko) * 2019-10-16 2021-04-27 삼성디스플레이 주식회사 표시 장치 및 그의 구동 방법
US20210256895A1 (en) * 2020-02-13 2021-08-19 Anapass Inc. Device and method for driving display

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160141252A (ko) * 2015-05-29 2016-12-08 엘지디스플레이 주식회사 다중 서브픽셀 센싱 방법 및 이를 적용하는 유기발광표시장치
KR20200048639A (ko) * 2018-10-30 2020-05-08 엘지디스플레이 주식회사 표시 장치 및 표시 장치의 제어 방법
KR20200133129A (ko) * 2019-05-17 2020-11-26 삼성디스플레이 주식회사 수평 크로스토크를 보상하는 표시 장치
KR20210045573A (ko) * 2019-10-16 2021-04-27 삼성디스플레이 주식회사 표시 장치 및 그의 구동 방법
US20210256895A1 (en) * 2020-02-13 2021-08-19 Anapass Inc. Device and method for driving display

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