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WO2025197561A1 - Plasma treatment device, bias power source, and plasma treatment method - Google Patents

Plasma treatment device, bias power source, and plasma treatment method

Info

Publication number
WO2025197561A1
WO2025197561A1 PCT/JP2025/007995 JP2025007995W WO2025197561A1 WO 2025197561 A1 WO2025197561 A1 WO 2025197561A1 JP 2025007995 W JP2025007995 W JP 2025007995W WO 2025197561 A1 WO2025197561 A1 WO 2025197561A1
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
plasma
voltage
voltage pulses
plasma processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2025/007995
Other languages
French (fr)
Japanese (ja)
Inventor
祐也 三ケ田
湯貴 王
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of WO2025197561A1 publication Critical patent/WO2025197561A1/en
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

Definitions

  • Exemplary embodiments of the present disclosure relate to a plasma processing apparatus, a bias power supply, and a plasma processing method.
  • a plasma processing apparatus is used in plasma processing of a substrate.
  • the plasma processing apparatus described in Patent Document 1 includes a source RF generating unit and first and second bias RF generating units.
  • the source RF generating unit generates a source RF signal for plasma generation.
  • the first and second bias RF generating units are coupled to a substrate support.
  • the frequency of the bias signal generated by the first bias RF generating unit is different from the frequency of the bias signal generated by the second bias RF generating unit.
  • This disclosure provides a technology that achieves different ion energy distributions while suppressing an increase in the number of bias power supplies.
  • a plasma processing apparatus in one exemplary embodiment, includes a chamber, a substrate support within the chamber, a gas supply, a radio frequency power supply, and a bias power supply.
  • the gas supply is configured to supply a process gas into the chamber.
  • the radio frequency power supply is configured to supply a source radio frequency signal to generate a plasma from the process gas.
  • the bias power supply is configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the reciprocal of a first frequency to attract ions from the plasma to a substrate on the substrate support.
  • the bias power supply is configured to stepwise increase or decrease the voltage level of multiple voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is in the range of 20 kHz to 100 kHz, and to repeat the period.
  • a technique is provided that allows different ion energy distributions to be obtained while suppressing an increase in the number of bias power supplies.
  • FIG. 1 is a diagram illustrating an example of the configuration of a plasma processing system.
  • 1 is a diagram illustrating a schematic diagram of a plasma processing apparatus according to an exemplary embodiment
  • FIG. 2 is a schematic diagram of a bias power supply according to an exemplary embodiment.
  • FIG. 2 illustrates an example sequence of voltage pulses that can be output by a bias power supply according to one exemplary embodiment.
  • 5A is a diagram showing an example of an ion energy distribution when multiple voltage pulses in a sequence have the same voltage level
  • FIG. 5B is a diagram showing an example of an ion energy distribution when a bias RF signal is used
  • FIG. 5C is a diagram showing a schematic diagram of an example of an ion energy distribution when the voltage levels of multiple voltage pulses in a sequence are increased or decreased in stages.
  • FIG. 10 illustrates another example sequence of voltage pulses that can be output by a bias power supply according to an exemplary embodiment.
  • FIG. 10 illustrates yet another example sequence of voltage pulses that can be output by a bias power supply in accordance with an exemplary embodiment.
  • 1 is a flow chart illustrating a plasma processing method according to an exemplary embodiment.
  • 9 is a partially enlarged cross-sectional view of an example substrate to which the plasma processing method shown in FIG. 8 can be applied.
  • 4 is a timing chart relating to a step of a plasma processing method according to an example embodiment.
  • FIG. 1 is a cross-sectional view of an example substrate associated with a plasma processing method according to an exemplary embodiment.
  • 1 is a cross-sectional view of an example substrate associated with a plasma processing method according to an exemplary embodiment.
  • FIG. 1 is a block diagram of a processing circuit for performing the operations described herein on a computer.
  • FIG. 1 is a diagram illustrating an example configuration of a plasma processing system.
  • the plasma processing system includes a plasma processing device 1 and a control unit 2.
  • the plasma processing system is an example of a substrate processing system
  • the plasma processing device 1 is an example of a substrate processing device.
  • the plasma processing device 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12.
  • the plasma processing chamber 10 has a plasma processing space.
  • the plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space, and at least one gas exhaust port for exhausting gas from the plasma processing space.
  • the gas supply port is connected to the gas supply unit 20, which will be described later, and the gas exhaust port is connected to an exhaust system 40, which will be described later.
  • the substrate support unit 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.
  • the plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space.
  • the plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), or surface wave plasma (SWP), etc.
  • various types of plasma generating units may be used, including AC (Alternating Current) plasma generating units and DC (Direct Current) plasma generating units.
  • the AC signal (AC power) used in the AC plasma generating unit has a frequency in the range of 100 kHz to 10 GHz.
  • AC signals include RF (Radio Frequency) signals and microwave signals.
  • the RF signal has a frequency in the range of 100 kHz to 150 MHz.
  • the control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described in this disclosure.
  • the control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1.
  • the control unit 2 may include a processing unit 2a1, a memory unit 2a2, and a communication interface 2a3.
  • the control unit 2 is realized, for example, by a computer 2a.
  • the processing unit 2a1 may be configured to perform various control operations by reading a program from the memory unit 2a2 and executing the read program. This program may be stored in the memory unit 2a2 in advance, or may be acquired via a medium when needed.
  • the acquired program is stored in the memory unit 2a2 and read from the memory unit 2a2 by the processing unit 2a1 for execution.
  • the medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3.
  • the processing unit 2a1 may be a CPU (Central Processing Unit).
  • the memory unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof.
  • the communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).
  • FIG. 1 is a diagram illustrating an example of the configuration of a capacitively coupled plasma processing apparatus.
  • the capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40.
  • the plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet.
  • the gas inlet is configured to introduce at least one processing gas into the plasma processing chamber 10.
  • the gas inlet includes a showerhead 13.
  • the substrate support 11 is disposed within the plasma processing chamber 10.
  • the showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10.
  • the plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11.
  • the plasma processing chamber 10 is grounded.
  • the showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.
  • the substrate support 11 includes a main body 111 and a ring assembly 112.
  • the main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112.
  • a wafer is an example of a substrate W.
  • the annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a planar view.
  • the substrate W is disposed on the central region 111a of the main body 111
  • the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.
  • the main body 111 includes a base 1110 and an electrostatic chuck 1111.
  • the base 1110 includes a conductive member.
  • the conductive member of the base 1110 may function as a lower electrode.
  • the electrostatic chuck 1111 is disposed on the base 1110.
  • the electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a.
  • the ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may also have the annular region 111b.
  • the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member.
  • At least one RF/DC electrode coupled to an RF power supply 31 and/or a DC power supply 32, which will be described later, may also be disposed within the ceramic member 1111a.
  • the at least one RF/DC electrode functions as a lower electrode.
  • the RF/DC electrode is also called a bias electrode.
  • the conductive member of the base 1110 and the at least one RF/DC electrode may function as multiple lower electrodes.
  • the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.
  • the ring assembly 112 includes one or more annular members.
  • the one or more annular members include one or more edge rings and at least one cover ring.
  • the edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.
  • the substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature.
  • the temperature adjustment module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof.
  • a heat transfer fluid such as brine or gas flows through the flow path 1110a.
  • the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111.
  • the substrate support 11 may also include a heat transfer gas supply unit configured to supply a heat transfer gas to a gap between the back surface of the substrate W and the central region 111a.
  • the showerhead 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s.
  • the showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c.
  • the processing gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c.
  • the showerhead 13 also includes at least one upper electrode.
  • the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.
  • SGIs side gas injectors
  • the gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22.
  • the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22.
  • Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller.
  • the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.
  • the power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit.
  • the RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and/or at least one upper electrode. This causes a plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, and ion components in the formed plasma can be attracted to the substrate W.
  • the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b.
  • the first RF generating unit 31a is coupled to at least one lower electrode and/or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation.
  • the source RF signal has a frequency in the range of 10 MHz to 150 MHz.
  • the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and/or at least one upper electrode.
  • the second RF generating unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power).
  • the frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal.
  • the bias RF signal has a frequency lower than the frequency of the source RF signal.
  • the bias RF signal has a frequency in the range of 100 kHz to 60 MHz.
  • the second RF generating unit 31b may be configured to generate multiple bias RF signals having different frequencies.
  • the generated one or more bias RF signals are supplied to at least one lower electrode.
  • at least one of the source RF signal and the bias RF signal may be pulsed.
  • the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10.
  • the DC power supply 32 includes a first DC generator 32a and a second DC generator 32b.
  • the first DC generator 32a is connected to at least one lower electrode and configured to generate a first DC signal.
  • the generated first DC signal is applied to the at least one lower electrode.
  • the second DC generator 32b is connected to at least one upper electrode and configured to generate a second DC signal.
  • the generated second DC signal is applied to the at least one upper electrode.
  • the first and second DC signals may be pulsed.
  • a sequence of voltage pulses is applied to at least one lower electrode and/or at least one upper electrode.
  • the voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform.
  • a waveform generator for generating a sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode.
  • the first DC generator 32a and the waveform generator constitute a voltage pulse generator.
  • the second DC generator 32b and the waveform generator constitute a voltage pulse generator
  • the voltage pulse generator is connected to at least one upper electrode.
  • the voltage pulses may have positive or negative polarity.
  • the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period.
  • the first and second DC generators 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generator 32a may be provided instead of the second RF generator 31b.
  • the exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10.
  • the exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve.
  • the vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.
  • control unit 2 is used as the main control unit.
  • first RF generating unit 31a is used as a high-frequency power supply that generates a source RF signal (source high-frequency signal) for plasma generation.
  • FIG. 3 is a diagram schematically illustrating a bias power supply according to one exemplary embodiment.
  • FIG. 4 is a diagram illustrating an example sequence of voltage pulses that can be output by a bias power supply according to one exemplary embodiment.
  • the plasma processing apparatus 1 includes a bias power supply 50.
  • the bias power supply 50 is used in the plasma processing apparatus 1 as a bias power supply including the above-mentioned first DC generation unit 32a. Note that the plasma processing apparatus 1 including this bias power supply 50 does not necessarily have to include the second RF generation unit 31b.
  • the bias power supply 50 is configured to supply a sequence S VP of voltage pulses VP to the substrate support 11 to attract ions from the plasma in the plasma processing chamber 10 to the substrate W on the substrate support 11.
  • the time interval Ti minimum time interval
  • the first frequency is, for example, greater than or equal to 200 kHz and less than or equal to 1 MHz.
  • the first frequency may be, for example, less than or equal to 800 kHz.
  • the first frequency may be, for example, 400 kHz.
  • the bias power supply 50 can adjust the voltage levels of the multiple voltage pulses VP in the sequence S VP .
  • the bias power supply 50 may stepwise increase or decrease the voltage levels of the multiple voltage pulses VP included in the sequence S VP within a period CY having a time length Tc that is the reciprocal of the second frequency, and the period CY may be repeated.
  • the second frequency is lower than the first frequency.
  • the second frequency is in the range of 20 kHz to 100 kHz.
  • the voltage levels of the multiple voltage pulses VP included in the sequence S VP increase stepwise within the period CY.
  • each of the multiple voltage pulses VP has a negative voltage level relative to the reference potential V0.
  • the voltage level of each of the multiple voltage pulses VP is the difference between the reference potential V0 and the potential of the voltage pulse.
  • the reference potential V0 may be, for example, ground potential (0 V).
  • the bias power supply 50 may be configured to change the duty ratio of the voltage pulse VP.
  • the duty ratio is L ON /L Ti , where L ON is the length of time that the voltage pulse VP is in the ON state during the time interval Ti, and L Ti is the length of the time interval Ti.
  • the duty ratio may be set to, for example, 0.2.
  • the bias power supply 50 may include a variable DC power supply 51 and a pulse generator 52.
  • the variable DC power supply 51 is configured to be able to adjust the voltage level of the output voltage from its negative terminal.
  • the positive terminal of the variable DC power supply 51 is connected to a ground or reference potential line.
  • the negative terminal of the variable DC power supply 51 is electrically coupled to the substrate support 11 via the pulse generator 52.
  • the pulse generator 52 is configured to generate a sequence S VP of voltage pulses VP by pulsing the output voltage of the variable DC power supply 51.
  • the bias power supply 50 may include a control unit 50c as at least one control unit.
  • the control unit 50c may include a power supply control unit 51c.
  • the power supply control unit 51c controls the variable DC power supply 51 to change the voltage level of the output voltage of the variable DC power supply 51.
  • the voltage level of the voltage pulse VP in the sequence S VP is adjusted by the control of the power supply control unit 51c.
  • the voltage level of the output voltage of the variable DC power supply 51 is adjusted by the control of the power supply control unit 51c, and the voltage levels of the multiple voltage pulses VP included in the sequence S VP within the period CY are increased or decreased in a stepwise manner.
  • the pulse generator 52 may include a switching circuit 52s.
  • the bias power supply 50 can output a sequence SVP of voltage pulses VP by alternately switching the opening and closing of the switching circuit 52s.
  • At least one controller of the bias power supply 50 may further include a pulse controller 52c.
  • the controller 50c may include the pulse controller 52c.
  • the opening and closing of the switching circuit 52s is controlled by the pulse controller 52c.
  • the duty ratio of the voltage pulses VP is controlled by the pulse controller 52c.
  • the pulse controller 52c may be part of the pulse generator 52.
  • the pulse controller 52c may be located outside the pulse generator 52.
  • the power supply controller 51c may form a power supply device 51S together with the variable DC power supply 51.
  • the power supply controller 51c may be located outside the power supply device 51S.
  • the power supply controller 51c and the pulse controller 52c may be configured as a single controller.
  • the single controller may be part of or separate from one of the power supply 51S and the pulse generator 52.
  • Figure 5(a) is a diagram showing an example of ion energy distribution when multiple voltage pulses in a sequence have the same voltage level.
  • Figure 5(b) is a diagram showing an example of ion energy distribution when a bias RF signal is used.
  • Figure 5(c) is a diagram schematically showing an example of ion energy distribution when the voltage levels of multiple voltage pulses in a sequence are increased or decreased in stages.
  • the energy distribution E1 of the ions supplied to the substrate on the substrate support 11 has a relatively narrow width centered on its peak, as shown in FIG. 5A. That is, when the voltage levels of the multiple voltage pulses VP in the sequence S VP are constant and identical to each other, the ion energy is highly monochromatic. Note that the peak energy of the distribution E1 can be changed by adjusting the constant voltage levels of the multiple voltage pulses VP in the sequence S VP .
  • the energy distribution E2 of the ions supplied to the substrate on the substrate support 11 has a relatively wide width, as shown in FIG. 5B.
  • the energy distribution E3 of the ions supplied to the substrate on the substrate support 11 has a distribution including multiple peaks, as shown in FIG. 5C.
  • the multiple peaks in distribution E3 correspond to the voltage levels of the multiple voltage pulses VP in the sequence S VP within the cycle CY.
  • distribution E3 is similar to distribution E2 shown in FIG. 5B. Therefore, the bias power supply 50 can produce the highly monochromatic ion energy distribution shown in FIG. 5A and the relatively wide energy distribution shown in FIG. 5C with a single power supply. In other words, the bias power supply 50 can obtain different ion energy distributions while suppressing an increase in the number of bias power supplies. Therefore, the plasma processing apparatus 1 can reduce the space required for bias power supplies around the chamber 10.
  • FIGS. 6 and 7 are diagram illustrating another example of a voltage pulse sequence that can be output by a bias power supply according to an exemplary embodiment.
  • the voltage levels of the multiple voltage pulses VP in the sequence S VP within the period CY are increased in stages.
  • the bias power supply 50 may also decrease the voltage levels of the multiple voltage pulses VP in the sequence S VP within the period CY in stages.
  • the bias power supply 50 may also be capable of changing the duty ratio of each of the multiple voltage pulses VP in the sequence S VP .
  • FIG. 8 is a flow chart showing a plasma processing method according to one exemplary embodiment.
  • Figure 9 is an enlarged partial cross-sectional view of an example substrate to which the plasma processing method shown in Figure 8 can be applied.
  • Figure 10 is a timing chart related to one step of the plasma processing method according to one exemplary embodiment.
  • Figures 11 and 12 are each a cross-sectional view of an example substrate related to the plasma processing method according to one exemplary embodiment.
  • each part of the plasma processing apparatus 1 can be controlled by the control unit 2.
  • method MT includes steps ST1, ST2, and ST3.
  • Method MT may further include step STJ.
  • a substrate W is prepared.
  • the substrate W is transported into the chamber 10 by a transport device (e.g., a transport robot).
  • the substrate W is placed on a substrate support 11 in the chamber 10.
  • the substrate W may be held by an electrostatic chuck 1111 during the execution of the method MT.
  • the substrate W may include a first region R1 and a second region R2.
  • the first region R1 may have at least one recess R1a.
  • the first region R1 may have multiple recesses R1a.
  • Each recess R1a may be a recess for forming a contact hole.
  • the recess R1a may be filled with the second region R2.
  • the second region R2 may be provided to cover the first region R1.
  • the first region R1 includes silicon and nitrogen.
  • the first region R1 may include silicon nitride (SiN x ).
  • the first region R1 may be a region formed by, for example, CVD or the like, or may be a region obtained by nitriding silicon.
  • the first region R1 may include a first portion including silicon nitride (SiN x ) and a second portion including silicon carbide (SiC). In this case, the first portion has a recess R1 a.
  • the aspect ratio of the recess R1a may be, for example, 3 or more, 4 or more, 5 or more, or 10 or more.
  • the aspect ratio of the recess R1a indicates the ratio of the depth of the recess R1a to the maximum width dimension of the recess R1a.
  • the second region R2 includes silicon and oxygen.
  • the second region R2 may include silicon oxide (SiO x ).
  • the second region R2 may be a region formed by, for example, CVD or the like, or may be a region obtained by oxidizing silicon.
  • the substrate W may further include a third region R3.
  • the third region R3 is provided on the second region R2.
  • the third region R3 may include a metal, carbon, and nitrogen.
  • the metal includes tungsten.
  • the third region R3 may have an opening OP3.
  • the width of the opening OP3 may correspond to the width of the recess R1a.
  • the substrate W may include an underlying region UR and at least one raised region RA provided on the underlying region UR.
  • the underlying region UR and the at least one raised region RA are covered by a first region R1.
  • the underlying region UR may include silicon.
  • a plurality of raised regions RA are located on the underlying region UR.
  • Recesses R1a of the first region R1 are located between the plurality of raised regions RA.
  • Each raised region RA may form a gate region of a transistor.
  • the substrate W may include a mask MK.
  • the mask MK is provided on the third region R3.
  • the mask MK may include metal or silicon.
  • the mask MK may have an opening OPM.
  • the opening OPM corresponds to the opening OP3 in the third region R3.
  • the substrate W prepared in step ST1 may have the shape shown in FIG. 9 as a result of plasma etching, or may have the shape shown in FIG. 9 from the time it is initially provided to the plasma processing chamber 10.
  • step ST2 is then performed.
  • the control unit 2 controls the gas supply unit 20 to supply a processing gas into the chamber 10.
  • the processing gas may contain metals constituting the chemical species from the plasma and an etching component for etching the second region R2.
  • the processing gas may contain a metal-containing gas.
  • the processing gas may contain an etching component-containing gas.
  • the processing gas may contain a carbon-containing gas.
  • the processing gas may contain a hydrogen-containing gas.
  • the processing gas may contain at least one metal-containing gas selected from the group consisting of a tungsten-containing gas, a molybdenum-containing gas, and a titanium-containing gas immediately before the first region R1 is exposed.
  • the processing gas contains a halide gas as an etching component.
  • the metal-containing gas may be a metal halide-containing gas.
  • the etching component is a component that etches the second region R2.
  • the metal-containing gas may include at least one selected from the group consisting of a tungsten-containing gas, a molybdenum-containing gas, and a titanium-containing gas.
  • the tungsten-containing gas may include a tungsten halide gas.
  • the tungsten halide gas may include at least one of tungsten hexafluoride (WF 6 ) gas, tungsten hexabromide (WBr 6 ) gas, tungsten hexachloride (WCl 6 ) gas, and WF 5 Cl gas.
  • the tungsten-containing gas may include tungsten hexacarbonyl (W(CO) 6 ) gas.
  • the molybdenum-containing gas may include a molybdenum halide gas.
  • the molybdenum halide gas may include at least one selected from the group consisting of molybdenum hexafluoride (MoF 6 ) gas and molybdenum hexachloride (MoCl 6 ) gas.
  • the titanium-containing gas may include titanium tetrachloride (TiCl 4 ).
  • the etching component-containing gas includes a halogenated gas.
  • the halogenated gas may include at least one selected from the group consisting of a fluorine-containing gas, a chlorine-containing gas, and a bromine-containing gas.
  • the fluorine-containing gas may include a fluorocarbon gas.
  • the carbon-containing gas may include at least one selected from the group consisting of CH4 gas, C2H2 gas, C2H4 gas, CH3F gas, CH2F2 gas , CHF3 gas , and CO gas.
  • the hydrogen-containing gas may include at least one selected from the group consisting of H2 gas, SiH4 gas, and NH3 gas.
  • the process gas may further include a noble gas such as argon gas, helium gas, xenon gas, or neon gas, etc.
  • the process gas may include nitrogen (N 2 ) gas, for example.
  • step ST3 is then performed.
  • the second region R2 is etched using plasma PL generated from the processing gas in chamber 10.
  • the second region R2 can be etched so as to expose the shoulder portion SH of the recess R1a of the first region R1.
  • Step ST3 is performed while the processing gas supplied in step ST2 is present in the chamber.
  • Step ST3 may also be performed while step ST2 is being performed.
  • FIG. 10 is a timing chart relating to one step of a plasma processing method according to one exemplary embodiment.
  • "HF" indicates the power level of the source radio frequency signal HF supplied by the first RF generator 31a for plasma generation.
  • MF indicates that a first sequence is being supplied from the bias power supply 50 to the substrate support 11, and "MF” OFF indicates that the supply of the first sequence is stopped.
  • the first sequence is a sequence SVP of multiple voltage pulses VP whose voltage levels are increased or decreased stepwise within a period CY, as shown in FIG. 4, FIG. 6, or FIG. 7.
  • "LF” ON indicates that a second sequence is being supplied from the bias power supply 50 to the substrate support 11, and "LF” OFF indicates that the supply of the second sequence is stopped.
  • the second sequence is a sequence SVP of multiple voltage pulses VP having the same and constant voltage levels.
  • process ST3 includes a first period P1, a second period P2, a third period P3, and a fourth period P4.
  • the control unit 2 controls the first RF generator 31a (i.e., the high-frequency power supply) to supply a source high-frequency signal HF having a first power level L1 to generate plasma PL from the processing gas.
  • the supply of the first and second sequences may be stopped.
  • chemical species from the plasma PL are deposited on the surface of the substrate W to form a deposit DP, as shown in FIG. 11 .
  • the deposit DP may contain the above-mentioned metal components, such as tungsten and WF6 .
  • the second period P2 is a period after or following the first period P1.
  • the control unit 2 controls the first RF generating unit 31a to supply a source high frequency signal HF having a second power level L2 to generate a plasma PL from the processing gas.
  • the second power level L2 may be lower than the first power level L1.
  • the control unit 2 controls the bias power supply 50 to supply a first sequence to the substrate support 11.
  • the maximum voltage level of the multiple voltage pulses VP in the first sequence during the second period P2 may be lower than the constant voltage levels of the multiple voltage pulses VP in the second sequence during the third period P3 and the fourth period P4.
  • ions from the plasma PL are attracted to the deposit DP, modifying the deposit DP.
  • deposits DP etched by ions from the plasma PL may re-adhere to the shoulder portion SH, etc.
  • the third period P3 is a period following or following the second period P2.
  • the control unit 2 controls the first RF generator 31a to supply a source radio frequency signal HF having a third power level L3 to generate plasma PL from the processing gas.
  • the third power level L3 may be lower than the first power level L1.
  • the third power level L3 may be the same as or different from the second power level L2.
  • the control unit 2 controls the bias power supply 50 to supply a second sequence to the substrate support 11.
  • highly energetic ions from the plasma PL are attracted to the deposit DP, etching the deposit DP on the second region R2 and the second region R2. Note that the angular distribution of ions during the third period P3 may be wider than the angular distribution of ions during the fourth period P4.
  • the fourth period P4 is a period following or following the third period P3.
  • the control unit 2 controls the first RF generation unit 31a to set the power level of the source high frequency signal HF to a fourth power level L4.
  • the fourth power level L4 is lower than the second power level L2 and the third power level L3.
  • the fourth power level L4 may be zero.
  • the control unit 2 controls the bias power supply 50 to supply a second sequence to the substrate support unit 11.
  • ions in the plasma PL remaining in the chamber 10 are attracted to the substrate W to further etch the second region R2.
  • the amount of ion flux and the energy of the ions are appropriately adjusted, and the ions are supplied to the second region R2 with relatively high vertical linearity. This results in a highly vertical shape being formed on the substrate W by etching the second region R2 (see, for example, Figure 12).
  • the deposit DP on the substrate W may have disappeared.
  • step STJ it is determined whether a stop condition is satisfied.
  • the stop condition is satisfied, for example, when the cycle including steps ST2 and ST3 has been repeated a predetermined number of times. If the stop condition is not satisfied, the cycle including steps ST2 and ST3 is repeated. On the other hand, if the stop condition is satisfied, method MT ends.
  • FIG. 13 is a block diagram of a processing circuit that performs the operations described herein on a computer.
  • FIG. 13 illustrates a processing circuit 130 that can be used to control a control process on any computer.
  • the descriptions or blocks in the flowcharts represent modules, segments, or portions of code that contain one or more executable instructions for implementing specific logical functions or steps of the process.
  • processing circuitry 130 includes a CPU 1200 that performs one or more of the control processes described above/below.
  • Processing data and instructions may be stored in memory 1202. These processing data and instructions may be stored on a storage medium disk 1204, such as a hard disk drive (HDD) or a portable storage medium, or may be stored remotely.
  • HDD hard disk drive
  • the present disclosure as claimed is not limited by the form of computer-readable medium on which the processing instructions according to the present invention are stored.
  • these instructions may be stored on a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or any other information processing device such as a server and/or computer with which processing circuitry 130 communicates.
  • the claimed disclosure may be provided as a utility application, a background daemon, a component of an operating system, or a combination thereof.
  • the claimed disclosure may be executed in conjunction with a CPU 1200 and an operating system known to those skilled in the art, such as Microsoft Windows (registered trademark), UNIX (registered trademark), Solaris (registered trademark), LINUX (registered trademark), Apple MAC-OS, etc.
  • the hardware elements making up the processing circuit 130 can be realized by a variety of circuit elements. Furthermore, each function of the above-described embodiments can be performed by a circuit including one or more processing circuits. As shown in FIG. 13, the processing circuit includes a specifically programmed processing unit, such as a processing unit (CPU) 1200. The processing circuit also includes devices such as application specific integrated circuits (ASICs) or conventional circuit components configured to perform the described functions.
  • ASICs application specific integrated circuits
  • the processing circuitry 130 includes a CPU 1200 that performs the above-described processing.
  • the processing circuitry 130 may be a general-purpose computer or a specific dedicated machine.
  • the processing circuitry 130 when the processing device 1200 is programmed to control the plasma generating unit 12 and the gas supply unit 20 and/or to control the bias power supply 50, the processing circuitry 130 functions as a specific dedicated machine.
  • CPU 1200 may be implemented on an FPGA, ASIC, PLD, or using discrete logic circuitry, as will be understood by those skilled in the art. Furthermore, CPU 1200 may be implemented as multiple processing units that cooperate to execute the instructions of the processes of the present invention described above in parallel.
  • the processing circuitry 130 of FIG. 13 also includes a network controller 1206, such as an Intel Ethernet PRO network interface card from Intel Corporation, USA, for interfacing with a network 1228.
  • the network 1228 may be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof, and may also include sub-networks such as a PSTN or ISDN.
  • the network 1228 may also be wired, such as an Ethernet network, or wireless, such as a cellular network including EDGE, 3G, and 4G wireless cellular systems.
  • the wireless network may also be Wi-Fi, Bluetooth, or any other known form of wireless communication.
  • the processing circuitry 130 further includes a display device controller 1208, such as a graphics card or graphics adapter, for interfacing with a display device 1210, such as a monitor.
  • a display device controller 1208 such as a graphics card or graphics adapter
  • a general-purpose I/O interface 1212 interfaces with a keyboard and/or mouse 1214 and a touch panel 1216, which may be integral with or separate from the display device 1210.
  • the general-purpose I/O interface is also connected to various peripheral devices 1218, such as printers and scanners.
  • the storage controller 1224 is connected to the storage media disk 1204 via a communications bus 1226, such as ISA, EISA, VESA, PCI, etc., and all components of the processing circuit 130 are interconnected.
  • a communications bus 1226 such as ISA, EISA, VESA, PCI, etc.
  • all components of the processing circuit 130 are interconnected.
  • the general features and functions of the display device 1210, keyboard and/or mouse 1214, as well as the display device controller 1208, storage controller 1224, network controller 1206, audio controller 1220, and general-purpose I/O interface 1212 are not described herein as they are well known.
  • circuits configured to implement the features described herein may be implemented in multiple circuit units (e.g., chips), or these features may be incorporated into the circuitry of a single chipset.
  • the functions and features described herein may also be performed by various distributed components on the system.
  • one or more processing devices may perform the functions of these systems, where the processing devices are distributed across multiple components communicating within a network.
  • Distributed components may include various human interface and communication devices (such as display monitors, smartphones, tablets, and personal digital assistants (PDAs)), as well as one or more client and server devices that may share processing.
  • the network may be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system may be received directly by a user, or remotely in real time or as a batch process.
  • some embodiments may be implemented on modules or hardware that are not identical to those described above. Accordingly, other embodiments are within the scope of the claims.
  • Plasma processing equipment is configured to increase or decrease stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20
  • each of the plurality of voltage pulses has a voltage level in a negative direction relative to a reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.
  • the bias power supply A variable DC power supply; a pulse generator configured to pulse the output voltage of the variable DC power supply to generate the sequence of voltage pulses; at least one controller configured to control the variable DC power supply and the pulse generator; Including, the at least one control unit is configured to control the variable DC power supply to change the voltage level of the output voltage so as to increase or decrease the voltage level of the plurality of voltage pulses in a stepwise manner.
  • the plasma processing apparatus according to E1 or E2.
  • [E4] Further comprising a main control unit, the main control unit, in a state where the substrate including a first region containing silicon and nitrogen and a second region containing silicon and oxygen is placed on the substrate support unit, (a) supplying a process gas into the chamber from the gas supply unit; (b) etching the second region using a plasma generated from the process gas in the chamber; is configured to run
  • the (b) is (b1) providing the source radio frequency signal having a first power level from the radio frequency power source during a first time period to generate a plasma from the process gas in the chamber and deposit chemical species from the plasma on the substrate; (b2) providing the source radio frequency signal having a second power level from the radio frequency power supply, the second power level being lower than the first power level, to generate a plasma from the process gas during a second time period after the first time period, the second power level including providing the sequence of voltage pulses to the substrate support from the bias power supply; (b3) during a third time period after the second time period, providing the source radio frequency signal having
  • a bias power supply used in a plasma processing apparatus A variable DC power supply; a pulse generator configured to pulse the output voltage of the variable DC power supply to generate a sequence of voltage pulses; at least one controller configured to control the variable DC power supply and the pulse generator; Including, The at least one control unit controlling the pulse generator to generate the voltage pulses at a time interval that is the inverse of a first frequency and apply the sequence to the substrate support to attract ions from a plasma in a chamber of the plasma processing apparatus to a substrate on a substrate support in the chamber; a stepwise increase or decrease in voltage level of a plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and the voltage level of the output voltage is changed by controlling the variable DC power supply to repeat the period; It is configured as follows: Bias power supply.
  • each of the plurality of voltage pulses has a negative-going voltage level relative to a reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.
  • the plasma processing apparatus includes a bias power supply configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the inverse of a first frequency to draw ions from the plasma to the substrate on the substrate support within the chamber; (c) includes increasing or decreasing stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and repeating the period.
  • Plasma treatment method includes a bias power supply configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the inverse of a first frequency to draw ions from the plasma to the substrate on the substrate support within the chamber; (c) includes increasing or decreasing stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included
  • the plasma processing apparatus includes a radio frequency power supply configured to provide a source radio frequency signal to generate a plasma from the process gas;
  • the (c) is (c1) providing the source radio frequency signal having a first power level from the radio frequency power source to generate a plasma from the process gas in the chamber for a first time period and deposit chemical species from the plasma on the substrate;
  • (c2) providing the source radio frequency signal having a second power level lower than the first power level from the radio frequency power supply to generate a plasma from the process gas during a second time period after the first time period, the second power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
  • (c3) during a third time period after the second time period providing the source radio frequency signal having a third power level from the radio frequency power source that is lower than the first power level to generate a plasma from the process gas and etch the second region, the third power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
  • 1 plasma processing apparatus, 10... plasma processing chamber, 11... substrate support section, 12... plasma generation section, 20... gas supply section, 50... bias power supply, 50c... control section, 51c... power supply control section, 51... variable DC power supply, 52... pulse generator.

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Abstract

A plasma treatment device disclosed herein comprises a chamber, a substrate support part, a gas supply part, a high-frequency power source, and a bias power source. The high-frequency power source is configured to supply a source high-frequency signal in order to generate plasma from a treatment gas. The bias power source is configured to supply a sequence of voltage pulses to the substrate support part by generating the voltage pulses at a time interval that is a reciprocal of a first frequency, in order to attract ions from the plasma to a substrate on the substrate support part. The bias power source is configured to gradually increase or decrease the voltage levels of a plurality of voltage pulses included in the sequence within a period having a time length that is a reciprocal of a second frequency which is lower than the first frequency and included within the range of 20-100 kHz, and to repeat the period.

Description

プラズマ処理装置、バイアス電源、及びプラズマ処理方法Plasma processing apparatus, bias power supply, and plasma processing method

 本開示の例示的実施形態は、プラズマ処理装置、バイアス電源、及びプラズマ処理方法に関するものである。 Exemplary embodiments of the present disclosure relate to a plasma processing apparatus, a bias power supply, and a plasma processing method.

 プラズマ処理装置が基板に対するプラズマ処理において用いられている。特許文献1に記載されたプラズマ処理装置は、ソースRF生成部と、第1及び第2のバイアスRF生成部と、を含んでいる。ソースRF生成部は、プラズマ生成用のソースRF信号を発生する。第1及び第2のバイアスRF生成部は、基板支持部に結合されている。第1のバイアスRF生成部が発生するバイアス信号の周波数は、第2のバイアスRF生成部が発生するバイアス信号の周波数と異なる。 A plasma processing apparatus is used in plasma processing of a substrate. The plasma processing apparatus described in Patent Document 1 includes a source RF generating unit and first and second bias RF generating units. The source RF generating unit generates a source RF signal for plasma generation. The first and second bias RF generating units are coupled to a substrate support. The frequency of the bias signal generated by the first bias RF generating unit is different from the frequency of the bias signal generated by the second bias RF generating unit.

特開2022-41874号公報JP 2022-41874 A

 本開示は、バイアス電源の個数の増加を抑制しつつ異なるイオンエネルギー分布を得る技術を提供する。 This disclosure provides a technology that achieves different ion energy distributions while suppressing an increase in the number of bias power supplies.

 一つの例示的実施形態において、プラズマ処理装置が提供される。プラズマ処理装置は、チャンバ、チャンバ内の基板支持部、ガス供給部、高周波電源、及びバイアス電源を備える。ガス供給部は、チャンバ内に処理ガスを供給するように構成されている。高周波電源は、処理ガスからプラズマを生成するためにソース高周波信号を供給するように構成されている。バイアス電源は、プラズマから基板支持部上の基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で電圧パルスを発生することにより、電圧パルスのシーケンスを基板支持部に供給するように構成されている。バイアス電源は、第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内でシーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すように構成されている。 In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support within the chamber, a gas supply, a radio frequency power supply, and a bias power supply. The gas supply is configured to supply a process gas into the chamber. The radio frequency power supply is configured to supply a source radio frequency signal to generate a plasma from the process gas. The bias power supply is configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the reciprocal of a first frequency to attract ions from the plasma to a substrate on the substrate support. The bias power supply is configured to stepwise increase or decrease the voltage level of multiple voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is in the range of 20 kHz to 100 kHz, and to repeat the period.

 一つの例示的実施形態によれば、バイアス電源の個数の増加を抑制しつつ異なるイオンエネルギー分布を得る技術が提供される。 According to one exemplary embodiment, a technique is provided that allows different ion energy distributions to be obtained while suppressing an increase in the number of bias power supplies.

プラズマ処理システムの構成例を説明するための図である。FIG. 1 is a diagram illustrating an example of the configuration of a plasma processing system. 一つの例示的実施形態に係るプラズマ処理装置を概略的に示す図である。1 is a diagram illustrating a schematic diagram of a plasma processing apparatus according to an exemplary embodiment; 一つの例示的実施形態に係るバイアス電源を概略的に示す図である。FIG. 2 is a schematic diagram of a bias power supply according to an exemplary embodiment. 一つの例示的実施形態に係るバイアス電源が出力可能な一例の電圧パルスのシーケンスを示す図である。FIG. 2 illustrates an example sequence of voltage pulses that can be output by a bias power supply according to one exemplary embodiment. 図5の(a)は、シーケンスにおける複数の電圧パルスが同一の電圧レベルを有する場合の一例のイオンエネルギーの分布を示す図であり、図5の(b)は、バイアスRF信号を用いた場合の一例のイオンエネルギーの分布を示す図であり、図5の(c)は、シーケンスにおける複数の電圧パルスの電圧レベルが段階的に増加又は減少される場合の一例のイオンエネルギーの分布を概略的に示す図である。5A is a diagram showing an example of an ion energy distribution when multiple voltage pulses in a sequence have the same voltage level, FIG. 5B is a diagram showing an example of an ion energy distribution when a bias RF signal is used, and FIG. 5C is a diagram showing a schematic diagram of an example of an ion energy distribution when the voltage levels of multiple voltage pulses in a sequence are increased or decreased in stages. 一つの例示的実施形態に係るバイアス電源が出力可能な別の例の電圧パルスのシーケンスを示す図である。FIG. 10 illustrates another example sequence of voltage pulses that can be output by a bias power supply according to an exemplary embodiment. 一つの例示的実施形態に係るバイアス電源が出力可能な更に別の例の電圧パルスのシーケンスを示す図である。FIG. 10 illustrates yet another example sequence of voltage pulses that can be output by a bias power supply in accordance with an exemplary embodiment. 一つの例示的実施形態に係るプラズマ処理方法を示す流れ図である。1 is a flow chart illustrating a plasma processing method according to an exemplary embodiment. 図8に示すプラズマ処理方法が適用され得る一例の基板の部分拡大断面図である。9 is a partially enlarged cross-sectional view of an example substrate to which the plasma processing method shown in FIG. 8 can be applied. 一つの例示的実施形態に係るプラズマ処理方法の一工程に関連するタイミングチャートである。4 is a timing chart relating to a step of a plasma processing method according to an example embodiment. 一つの例示的実施形態に係るプラズマ処理方法に関連する一例の基板の断面図である。1 is a cross-sectional view of an example substrate associated with a plasma processing method according to an exemplary embodiment. 一つの例示的実施形態に係るプラズマ処理方法に関連する一例の基板の断面図である。1 is a cross-sectional view of an example substrate associated with a plasma processing method according to an exemplary embodiment. 本明細書に記載の動作をコンピュータ上で実施する処理回路のブロック図である。FIG. 1 is a block diagram of a processing circuit for performing the operations described herein on a computer.

 以下、図面を参照して種々の例示的実施形態について詳細に説明する。なお、各図面において同一又は相当の部分に対しては同一の符号を附すこととする。 Various exemplary embodiments will be described in detail below with reference to the drawings. Note that the same or equivalent parts in each drawing will be designated by the same reference numerals.

 図1は、プラズマ処理システムの構成例を説明するための図である。一実施形態において、プラズマ処理システムは、プラズマ処理装置1及び制御部2を含む。プラズマ処理システムは、基板処理システムの一例であり、プラズマ処理装置1は、基板処理装置の一例である。プラズマ処理装置1は、プラズマ処理チャンバ10、基板支持部11及びプラズマ生成部12を含む。プラズマ処理チャンバ10は、プラズマ処理空間を有する。また、プラズマ処理チャンバ10は、少なくとも1つの処理ガスをプラズマ処理空間に供給するための少なくとも1つのガス供給口と、プラズマ処理空間からガスを排出するための少なくとも1つのガス排出口とを有する。ガス供給口は、後述するガス供給部20に接続され、ガス排出口は、後述する排気システム40に接続される。基板支持部11は、プラズマ処理空間内に配置され、基板を支持するための基板支持面を有する。 FIG. 1 is a diagram illustrating an example configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing device 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing device 1 is an example of a substrate processing device. The plasma processing device 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space, and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20, which will be described later, and the gas exhaust port is connected to an exhaust system 40, which will be described later. The substrate support unit 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

 プラズマ生成部12は、プラズマ処理空間内に供給された少なくとも1つの処理ガスからプラズマを生成するように構成される。プラズマ処理空間において形成されるプラズマは、容量結合プラズマ(CCP:Capacitively Coupled Plasma)、誘導結合プラズマ(ICP:Inductively Coupled Plasma)、ECRプラズマ(Electron-Cyclotron-Resonance Plasma)、ヘリコン波励起プラズマ(HWP:Helicon Wave Plasma)、又は、表面波プラズマ(SWP:Surface Wave Plasma)等であってもよい。また、AC(Alternating Current)プラズマ生成部及びDC(Direct Current)プラズマ生成部を含む、種々のタイプのプラズマ生成部が用いられてもよい。一実施形態において、ACプラズマ生成部で用いられるAC信号(AC電力)は、100kHz~10GHzの範囲内の周波数を有する。従って、AC信号は、RF(Radio Frequency)信号及びマイクロ波信号を含む。一実施形態において、RF信号は、100kHz~150MHzの範囲内の周波数を有する。 The plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Additionally, various types of plasma generating units may be used, including AC (Alternating Current) plasma generating units and DC (Direct Current) plasma generating units. In one embodiment, the AC signal (AC power) used in the AC plasma generating unit has a frequency in the range of 100 kHz to 10 GHz. Thus, AC signals include RF (Radio Frequency) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

 制御部2は、本開示において述べられる種々の工程をプラズマ処理装置1に実行させるコンピュータ実行可能な命令を処理する。制御部2は、ここで述べられる種々の工程を実行するようにプラズマ処理装置1の各要素を制御するように構成され得る。一実施形態において、制御部2の一部又は全てがプラズマ処理装置1に含まれてもよい。制御部2は、処理部2a1、記憶部2a2及び通信インターフェース2a3を含んでもよい。制御部2は、例えばコンピュータ2aにより実現される。処理部2a1は、記憶部2a2からプログラムを読み出し、読み出されたプログラムを実行することにより種々の制御動作を行うように構成され得る。このプログラムは、予め記憶部2a2に格納されていてもよく、必要なときに、媒体を介して取得されてもよい。取得されたプログラムは、記憶部2a2に格納され、処理部2a1によって記憶部2a2から読み出されて実行される。媒体は、コンピュータ2aに読み取り可能な種々の記憶媒体であってもよく、通信インターフェース2a3に接続されている通信回線であってもよい。処理部2a1は、CPU(Central Processing Unit)であってもよい。記憶部2a2は、RAM(Random Access Memory)、ROM(Read Only Memory)、HDD(Hard Disk Drive)、SSD(Solid State Drive)、又はこれらの組み合わせを含んでもよい。通信インターフェース2a3は、LAN(Local Area Network)等の通信回線を介してプラズマ処理装置1との間で通信してもよい。 The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a memory unit 2a2, and a communication interface 2a3. The control unit 2 is realized, for example, by a computer 2a. The processing unit 2a1 may be configured to perform various control operations by reading a program from the memory unit 2a2 and executing the read program. This program may be stored in the memory unit 2a2 in advance, or may be acquired via a medium when needed. The acquired program is stored in the memory unit 2a2 and read from the memory unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The memory unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

 以下に、プラズマ処理装置1の一例としての容量結合型のプラズマ処理装置の構成例について説明する。図2は、容量結合型のプラズマ処理装置の構成例を説明するための図である。 Below, we will explain an example of the configuration of a capacitively coupled plasma processing apparatus as an example of plasma processing apparatus 1. Figure 2 is a diagram illustrating an example of the configuration of a capacitively coupled plasma processing apparatus.

 容量結合型のプラズマ処理装置1は、プラズマ処理チャンバ10、ガス供給部20、電源30及び排気システム40を含む。また、プラズマ処理装置1は、基板支持部11及びガス導入部を含む。ガス導入部は、少なくとも1つの処理ガスをプラズマ処理チャンバ10内に導入するように構成される。ガス導入部は、シャワーヘッド13を含む。基板支持部11は、プラズマ処理チャンバ10内に配置される。シャワーヘッド13は、基板支持部11の上方に配置される。一実施形態において、シャワーヘッド13は、プラズマ処理チャンバ10の天部(ceiling)の少なくとも一部を構成する。プラズマ処理チャンバ10は、シャワーヘッド13、プラズマ処理チャンバ10の側壁10a及び基板支持部11により規定されたプラズマ処理空間10sを有する。プラズマ処理チャンバ10は接地される。シャワーヘッド13及び基板支持部11は、プラズマ処理チャンバ10の筐体とは電気的に絶縁される。 The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

 基板支持部11は、本体部111及びリングアセンブリ112を含む。本体部111は、基板Wを支持するための中央領域111aと、リングアセンブリ112を支持するための環状領域111bとを有する。ウェハは基板Wの一例である。本体部111の環状領域111bは、平面視で本体部111の中央領域111aを囲んでいる。基板Wは、本体部111の中央領域111a上に配置され、リングアセンブリ112は、本体部111の中央領域111a上の基板Wを囲むように本体部111の環状領域111b上に配置される。従って、中央領域111aは、基板Wを支持するための基板支持面とも呼ばれ、環状領域111bは、リングアセンブリ112を支持するためのリング支持面とも呼ばれる。 The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a planar view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

 一実施形態において、本体部111は、基台1110及び静電チャック1111を含む。基台1110は、導電性部材を含む。基台1110の導電性部材は下部電極として機能し得る。静電チャック1111は、基台1110の上に配置される。静電チャック1111は、セラミック部材1111aとセラミック部材1111a内に配置される静電電極1111bとを含む。セラミック部材1111aは、中央領域111aを有する。一実施形態において、セラミック部材1111aは、環状領域111bも有する。なお、環状静電チャックや環状絶縁部材のような、静電チャック1111を囲む他の部材が環状領域111bを有してもよい。この場合、リングアセンブリ112は、環状静電チャック又は環状絶縁部材の上に配置されてもよく、静電チャック1111と環状絶縁部材の両方の上に配置されてもよい。また、後述するRF電源31及び/又はDC電源32に結合される少なくとも1つのRF/DC電極がセラミック部材1111a内に配置されてもよい。この場合、少なくとも1つのRF/DC電極が下部電極として機能する。後述するバイアスRF信号及び/又はDC信号が少なくとも1つのRF/DC電極に供給される場合、RF/DC電極はバイアス電極とも呼ばれる。なお、基台1110の導電性部材と少なくとも1つのRF/DC電極とが複数の下部電極として機能してもよい。また、静電電極1111bが下部電極として機能してもよい。従って、基板支持部11は、少なくとも1つの下部電極を含む。 In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 may function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may also have the annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. At least one RF/DC electrode coupled to an RF power supply 31 and/or a DC power supply 32, which will be described later, may also be disposed within the ceramic member 1111a. In this case, the at least one RF/DC electrode functions as a lower electrode. When a bias RF signal and/or a DC signal, which will be described later, is supplied to the at least one RF/DC electrode, the RF/DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and the at least one RF/DC electrode may function as multiple lower electrodes. Alternatively, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

 リングアセンブリ112は、1又は複数の環状部材を含む。一実施形態において、1又は複数の環状部材は、1又は複数のエッジリングと少なくとも1つのカバーリングとを含む。エッジリングは、導電性材料又は絶縁材料で形成され、カバーリングは、絶縁材料で形成される。 The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

 また、基板支持部11は、静電チャック1111、リングアセンブリ112及び基板のうち少なくとも1つをターゲット温度に調節するように構成される温調モジュールを含んでもよい。温調モジュールは、ヒータ、伝熱媒体、流路1110a、又はこれらの組み合わせを含んでもよい。流路1110aには、ブラインやガスのような伝熱流体が流れる。一実施形態において、流路1110aが基台1110内に形成され、1又は複数のヒータが静電チャック1111のセラミック部材1111a内に配置される。また、基板支持部11は、基板Wの裏面と中央領域111aとの間の間隙に伝熱ガスを供給するように構成された伝熱ガス供給部を含んでもよい。 The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply unit configured to supply a heat transfer gas to a gap between the back surface of the substrate W and the central region 111a.

 シャワーヘッド13は、ガス供給部20からの少なくとも1つの処理ガスをプラズマ処理空間10s内に導入するように構成される。シャワーヘッド13は、少なくとも1つのガス供給口13a、少なくとも1つのガス拡散室13b、及び複数のガス導入口13cを有する。ガス供給口13aに供給された処理ガスは、ガス拡散室13bを通過して複数のガス導入口13cからプラズマ処理空間10s内に導入される。また、シャワーヘッド13は、少なくとも1つの上部電極を含む。なお、ガス導入部は、シャワーヘッド13に加えて、側壁10aに形成された1又は複数の開口部に取り付けられる1又は複数のサイドガス注入部(SGI:Side Gas Injector)を含んでもよい。 The showerhead 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The processing gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

 ガス供給部20は、少なくとも1つのガスソース21及び少なくとも1つの流量制御器22を含んでもよい。一実施形態において、ガス供給部20は、少なくとも1つの処理ガスを、それぞれに対応のガスソース21からそれぞれに対応の流量制御器22を介してシャワーヘッド13に供給するように構成される。各流量制御器22は、例えばマスフローコントローラ又は圧力制御式の流量制御器を含んでもよい。さらに、ガス供給部20は、少なくとも1つの処理ガスの流量を変調又はパルス化する少なくとも1つの流量変調デバイスを含んでもよい。 The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

 電源30は、少なくとも1つのインピーダンス整合回路を介してプラズマ処理チャンバ10に結合されるRF電源31を含む。RF電源31は、少なくとも1つのRF信号(RF電力)を少なくとも1つの下部電極及び/又は少なくとも1つの上部電極に供給するように構成される。これにより、プラズマ処理空間10sに供給された少なくとも1つの処理ガスからプラズマが形成される。従って、RF電源31は、プラズマ生成部12の少なくとも一部として機能し得る。また、バイアスRF信号を少なくとも1つの下部電極に供給することにより、基板Wにバイアス電位が発生し、形成されたプラズマ中のイオン成分を基板Wに引き込むことができる。 The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and/or at least one upper electrode. This causes a plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, and ion components in the formed plasma can be attracted to the substrate W.

 一実施形態において、RF電源31は、第1のRF生成部31a及び第2のRF生成部31bを含む。第1のRF生成部31aは、少なくとも1つのインピーダンス整合回路を介して少なくとも1つの下部電極及び/又は少なくとも1つの上部電極に結合され、プラズマ生成用のソースRF信号(ソースRF電力)を生成するように構成される。一実施形態において、ソースRF信号は、10MHz~150MHzの範囲内の周波数を有する。一実施形態において、第1のRF生成部31aは、異なる周波数を有する複数のソースRF信号を生成するように構成されてもよい。生成された1又は複数のソースRF信号は、少なくとも1つの下部電極及び/又は少なくとも1つの上部電極に供給される。 In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and/or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and/or at least one upper electrode.

 第2のRF生成部31bは、少なくとも1つのインピーダンス整合回路を介して少なくとも1つの下部電極に結合され、バイアスRF信号(バイアスRF電力)を生成するように構成される。バイアスRF信号の周波数は、ソースRF信号の周波数と同じであっても異なっていてもよい。一実施形態において、バイアスRF信号は、ソースRF信号の周波数よりも低い周波数を有する。一実施形態において、バイアスRF信号は、100kHz~60MHzの範囲内の周波数を有する。一実施形態において、第2のRF生成部31bは、異なる周波数を有する複数のバイアスRF信号を生成するように構成されてもよい。生成された1又は複数のバイアスRF信号は、少なくとも1つの下部電極に供給される。また、種々の実施形態において、ソースRF信号及びバイアスRF信号のうち少なくとも1つがパルス化されてもよい。 The second RF generating unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generating unit 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. Also, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

 また、電源30は、プラズマ処理チャンバ10に結合されるDC電源32を含んでもよい。DC電源32は、第1のDC生成部32a及び第2のDC生成部32bを含む。一実施形態において、第1のDC生成部32aは、少なくとも1つの下部電極に接続され、第1のDC信号を生成するように構成される。生成された第1のDC信号は、少なくとも1つの下部電極に印加される。一実施形態において、第2のDC生成部32bは、少なくとも1つの上部電極に接続され、第2のDC信号を生成するように構成される。生成された第2のDC信号は、少なくとも1つの上部電極に印加される。 The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

 種々の実施形態において、第1及び第2のDC信号がパルス化されてもよい。この場合、電圧パルスのシーケンスが少なくとも1つの下部電極及び/又は少なくとも1つの上部電極に印加される。電圧パルスは、矩形、台形、三角形又はこれらの組み合わせのパルス波形を有してもよい。一実施形態において、DC信号から電圧パルスのシーケンスを生成するための波形生成部が第1のDC生成部32aと少なくとも1つの下部電極との間に接続される。従って、第1のDC生成部32a及び波形生成部は、電圧パルス生成部を構成する。第2のDC生成部32b及び波形生成部が電圧パルス生成部を構成する場合、電圧パルス生成部は、少なくとも1つの上部電極に接続される。電圧パルスは、正の極性を有してもよく、負の極性を有してもよい。また、電圧パルスのシーケンスは、1周期内に1又は複数の正極性電圧パルスと1又は複数の負極性電圧パルスとを含んでもよい。なお、第1及び第2のDC生成部32a,32bは、RF電源31に加えて設けられてもよく、第1のDC生成部32aが第2のRF生成部31bに代えて設けられてもよい。 In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and/or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating a sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generators 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generator 32a may be provided instead of the second RF generator 31b.

 排気システム40は、例えばプラズマ処理チャンバ10の底部に設けられたガス排出口10eに接続され得る。排気システム40は、圧力調整弁及び真空ポンプを含んでもよい。圧力調整弁によって、プラズマ処理空間10s内の圧力が調整される。真空ポンプは、ターボ分子ポンプ、ドライポンプ又はこれらの組み合わせを含んでもよい。 The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

 なお、プラズマ処理装置1において、上述の制御部2は主制御部として用いられる。また、プラズマ処理装置1において、上述の第1のRF生成部31aは、プラズマ生成用のソースRF信号(ソース高周波信号)を発生する高周波電源として用いられる。 In the plasma processing apparatus 1, the control unit 2 is used as the main control unit. In addition, in the plasma processing apparatus 1, the first RF generating unit 31a is used as a high-frequency power supply that generates a source RF signal (source high-frequency signal) for plasma generation.

 以下、図1及び図2と共に図3及び図4を参照する。図3は、一つの例示的実施形態に係るバイアス電源を概略的に示す図である。図4は、一つの例示的実施形態に係るバイアス電源が出力可能な一例の電圧パルスのシーケンスを示す図である。図3に示すように、プラズマ処理装置1は、バイアス電源50を含む。バイアス電源50は、上述の第1のDC生成部32aを含むバイアス電源としてプラズマ処理装置1において用いられる。なお、このバイアス電源50を含むプラズマ処理装置1は、第2のRF生成部31bを有していなくてもよい。 Below, reference will be made to FIGS. 3 and 4 in addition to FIGS. 1 and 2. FIG. 3 is a diagram schematically illustrating a bias power supply according to one exemplary embodiment. FIG. 4 is a diagram illustrating an example sequence of voltage pulses that can be output by a bias power supply according to one exemplary embodiment. As shown in FIG. 3, the plasma processing apparatus 1 includes a bias power supply 50. The bias power supply 50 is used in the plasma processing apparatus 1 as a bias power supply including the above-mentioned first DC generation unit 32a. Note that the plasma processing apparatus 1 including this bias power supply 50 does not necessarily have to include the second RF generation unit 31b.

 図4に示すように、バイアス電源50は、プラズマ処理チャンバ10内のプラズマから基板支持部11上の基板Wにイオンを引き込むために、電圧パルスVPのシーケンスSVPを基板支持部11に供給するように構成されている。シーケンスSVPにおいて電圧パルスVPが発生される時間間隔Ti(最小時間間隔)は、第1の周波数の逆数である。第1の周波数は、例えば200kHz以上、1MHz以下である。第1の周波数は、800kHz以下であってもよい。第1の周波数は、例えば400kHzであってもよい。 4, the bias power supply 50 is configured to supply a sequence S VP of voltage pulses VP to the substrate support 11 to attract ions from the plasma in the plasma processing chamber 10 to the substrate W on the substrate support 11. The time interval Ti (minimum time interval) at which the voltage pulses VP are generated in the sequence S VP is the reciprocal of the first frequency. The first frequency is, for example, greater than or equal to 200 kHz and less than or equal to 1 MHz. The first frequency may be, for example, less than or equal to 800 kHz. The first frequency may be, for example, 400 kHz.

 図4に示すように、バイアス電源50は、シーケンスSVPにおける複数の電圧パルスVPの電圧レベルを調整することが可能である。バイアス電源50は、第2の周波数の逆数である時間長Tcを有する周期CY内でシーケンスSVPに含まれる複数の電圧パルスVPの電圧レベルを段階的に増加又は減少させ、且つ周期CYを繰り返してもよい。第2の周波数は、第1の周波数よりも低い。第2の周波数は、20kHz以上、100kHz以下の範囲に含まれる。図4に示す例では、周期CY内でシーケンスSVPに含まれる複数の電圧パルスVPの電圧レベルは段階的に増加している。 As shown in FIG. 4 , the bias power supply 50 can adjust the voltage levels of the multiple voltage pulses VP in the sequence S VP . The bias power supply 50 may stepwise increase or decrease the voltage levels of the multiple voltage pulses VP included in the sequence S VP within a period CY having a time length Tc that is the reciprocal of the second frequency, and the period CY may be repeated. The second frequency is lower than the first frequency. The second frequency is in the range of 20 kHz to 100 kHz. In the example shown in FIG. 4 , the voltage levels of the multiple voltage pulses VP included in the sequence S VP increase stepwise within the period CY.

 なお、複数の電圧パルスVPの各々は、基準電位V0に対して負方向の電圧レベルを有する。複数の電圧パルスVPの各々の電圧レベルは、基準電位V0と電圧パルスの電位との間の差である。基準電位V0は、例えばグランド電位(0V)であってよい。 Note that each of the multiple voltage pulses VP has a negative voltage level relative to the reference potential V0. The voltage level of each of the multiple voltage pulses VP is the difference between the reference potential V0 and the potential of the voltage pulse. The reference potential V0 may be, for example, ground potential (0 V).

 バイアス電源50は、電圧パルスVPのデューティ比を変更可能に構成されてもよい。デューティ比は、LON/LTiである。ここで、LONは、時間間隔Tiにおいて電圧パルスVPがON状態にある時間長であり、LTiは、時間間隔Tiの時間長である。デューティ比は、例えば0.2に設定されてもよい。 The bias power supply 50 may be configured to change the duty ratio of the voltage pulse VP. The duty ratio is L ON /L Ti , where L ON is the length of time that the voltage pulse VP is in the ON state during the time interval Ti, and L Ti is the length of the time interval Ti. The duty ratio may be set to, for example, 0.2.

 一実施形態において、バイアス電源50は、可変直流電源51及びパルス発生器52を含んでいてもよい。可変直流電源51は、その負極からの出力電圧の電圧レベルを調整可能に構成されている。可変直流電源51の正極は、グランド又は基準電位線に接続されている。可変直流電源51の負極は、パルス発生器52を介して基板支持部11に電気的に結合されている。パルス発生器52は、可変直流電源51の出力電圧をパルス化することにより、電圧パルスVPのシーケンスSVPを生成するように構成されている。 In one embodiment, the bias power supply 50 may include a variable DC power supply 51 and a pulse generator 52. The variable DC power supply 51 is configured to be able to adjust the voltage level of the output voltage from its negative terminal. The positive terminal of the variable DC power supply 51 is connected to a ground or reference potential line. The negative terminal of the variable DC power supply 51 is electrically coupled to the substrate support 11 via the pulse generator 52. The pulse generator 52 is configured to generate a sequence S VP of voltage pulses VP by pulsing the output voltage of the variable DC power supply 51.

 バイアス電源50は、少なくとも一つの制御部として制御部50cを含んでいてもよい。制御部50cは、電源制御部51cを含んでいてもよい。電源制御部51cは、可変直流電源51を制御して可変直流電源51の出力電圧の電圧レベルを変更する。電源制御部51cによる可変直流電源51の出力電圧の電圧レベルの制御により、シーケンスSVPにおける電圧パルスVPの電圧レベルが調整される。例えば、電源制御部51cによる制御により可変直流電源51の出力電圧の電圧レベルが調整されて、周期CY内でシーケンスSVPに含まれる複数の電圧パルスVPの電圧レベルが段階的に増加又は減少される。 The bias power supply 50 may include a control unit 50c as at least one control unit. The control unit 50c may include a power supply control unit 51c. The power supply control unit 51c controls the variable DC power supply 51 to change the voltage level of the output voltage of the variable DC power supply 51. The voltage level of the voltage pulse VP in the sequence S VP is adjusted by the control of the power supply control unit 51c. For example, the voltage level of the output voltage of the variable DC power supply 51 is adjusted by the control of the power supply control unit 51c, and the voltage levels of the multiple voltage pulses VP included in the sequence S VP within the period CY are increased or decreased in a stepwise manner.

 パルス発生器52は、スイッチング回路52sを含んでいてもよい。バイアス電源50は、スイッチング回路52sの開閉を交互に切り替えることにより、電圧パルスVPのシーケンスSVPを出力することができる。バイアス電源50の少なくとも一つの制御部は、パルス制御部52cを更に含んでいてもよい。一実施形態において、制御部50cは、パルス制御部52cを含んでいてもよい。スイッチング回路52sの開閉は、パルス制御部52cにより制御される。また、パルス制御部52cにより、電圧パルスVPのデューティ比が制御される。なお、パルス制御部52cは、パルス発生器52の一部であってもよい。パルス制御部52cは、パルス発生器52の外部に置かれていてもよい。また、電源制御部51cは、可変直流電源51と共に電源装置51Sを構成していてもよい。電源制御部51cは、電源装置51Sの外部に置かれていてもよい。また、電源制御部51c及びパルス制御部52cは、単一の制御部として構成されていてもよい。単一の制御部は、電源装置51S及びパルス発生器52のうち一方の一部であってもよく、これらから分離されていてもよい。単一の制御部は、制御部50c又は制御部2であってもよい。 The pulse generator 52 may include a switching circuit 52s. The bias power supply 50 can output a sequence SVP of voltage pulses VP by alternately switching the opening and closing of the switching circuit 52s. At least one controller of the bias power supply 50 may further include a pulse controller 52c. In one embodiment, the controller 50c may include the pulse controller 52c. The opening and closing of the switching circuit 52s is controlled by the pulse controller 52c. The duty ratio of the voltage pulses VP is controlled by the pulse controller 52c. The pulse controller 52c may be part of the pulse generator 52. The pulse controller 52c may be located outside the pulse generator 52. The power supply controller 51c may form a power supply device 51S together with the variable DC power supply 51. The power supply controller 51c may be located outside the power supply device 51S. The power supply controller 51c and the pulse controller 52c may be configured as a single controller. The single controller may be part of or separate from one of the power supply 51S and the pulse generator 52. The single controller may be the controller 50c or the controller 2.

 以下、図5の(a)、図5の(b)、及び図5の(c)を参照する。図5の(a)は、シーケンスにおける複数の電圧パルスが同一の電圧レベルを有する場合の一例のイオンエネルギーの分布を示す図である。図5の(b)は、バイアスRF信号を用いた場合の一例のイオンエネルギーの分布を示す図である。図5の(c)は、シーケンスにおける複数の電圧パルスの電圧レベルが段階的に増加又は減少される場合の一例のイオンエネルギーの分布を概略的に示す図である。 Below, reference will be made to Figures 5(a), 5(b), and 5(c). Figure 5(a) is a diagram showing an example of ion energy distribution when multiple voltage pulses in a sequence have the same voltage level. Figure 5(b) is a diagram showing an example of ion energy distribution when a bias RF signal is used. Figure 5(c) is a diagram schematically showing an example of ion energy distribution when the voltage levels of multiple voltage pulses in a sequence are increased or decreased in stages.

 シーケンスSVP内の複数の電圧パルスVPの電圧レベルが一定の電圧レベルであり互いに同一である場合には、図5の(a)に示すように、基板支持部11上の基板に供給されるイオンのエネルギーの分布E1は、そのピークを中心として比較的狭い幅を有する。即ち、シーケンスSVP内の複数の電圧パルスVPの電圧レベルが一定であり互いに同一である場合には、イオンのエネルギーの単色性が高い。なお、分布E1のピークのエネルギーは、シーケンスSVP内の複数の電圧パルスVPの一定の電圧レベルを調整することにより、変更することが可能である。一方、電気バイアスとしてバイアスRF信号が用いられる場合には、基板支持部11上の基板に供給されるイオンのエネルギーの分布E2は、図5の(b)に示すように、比較的広い幅を有する。 When the voltage levels of the multiple voltage pulses VP in the sequence S VP are constant and identical to each other, the energy distribution E1 of the ions supplied to the substrate on the substrate support 11 has a relatively narrow width centered on its peak, as shown in FIG. 5A. That is, when the voltage levels of the multiple voltage pulses VP in the sequence S VP are constant and identical to each other, the ion energy is highly monochromatic. Note that the peak energy of the distribution E1 can be changed by adjusting the constant voltage levels of the multiple voltage pulses VP in the sequence S VP . On the other hand, when a bias RF signal is used as the electrical bias, the energy distribution E2 of the ions supplied to the substrate on the substrate support 11 has a relatively wide width, as shown in FIG. 5B.

 周期CY内でシーケンスSVPにおける複数の電圧パルスVPの電圧レベルが段階的に増加又は減少される場合には、基板支持部11上の基板に供給されるイオンのエネルギーの分布E3は、図5の(c)に示すように、複数のピークを含む分布を有する。分布E3における複数のピークは、周期CY内でのシーケンスSVPにおける複数の電圧パルスVPそれぞれの電圧レベルに応じたピークである。図5の(c)に示すように、分布E3は、図5の(b)に示す分布E2に類似した分布となっている。したがって、バイアス電源50によれば、図5の(a)に示す単色性の高いイオンのエネルギーの分布及び図5の(c)に示す比較的広い幅を有するエネルギーの分布を単一の電源によりもたらすことができる。即ち、バイアス電源50によれば、バイアス電源の個数の増加を抑制しつつ異なるイオンエネルギー分布を得ることが可能である。したがって、プラズマ処理装置1によれば、チャンバ10の周囲のバイアス電源のためのスペースを小さくすることができる。 When the voltage levels of the multiple voltage pulses VP in the sequence S VP are increased or decreased stepwise within the cycle CY, the energy distribution E3 of the ions supplied to the substrate on the substrate support 11 has a distribution including multiple peaks, as shown in FIG. 5C. The multiple peaks in distribution E3 correspond to the voltage levels of the multiple voltage pulses VP in the sequence S VP within the cycle CY. As shown in FIG. 5C, distribution E3 is similar to distribution E2 shown in FIG. 5B. Therefore, the bias power supply 50 can produce the highly monochromatic ion energy distribution shown in FIG. 5A and the relatively wide energy distribution shown in FIG. 5C with a single power supply. In other words, the bias power supply 50 can obtain different ion energy distributions while suppressing an increase in the number of bias power supplies. Therefore, the plasma processing apparatus 1 can reduce the space required for bias power supplies around the chamber 10.

 以下、図6及び図7を参照する。図6及び図7の各々は、一つの例示的実施形態に係るバイアス電源が出力可能な別の例の電圧パルスのシーケンスを示す図である。図4に示す例では、周期CY内でシーケンスSVPにおける複数の電圧パルスVPの電圧レベルは、段階的に増加されている。図6に示すように、バイアス電源50は、周期CY内でシーケンスSVPにおける複数の電圧パルスVPの電圧レベルを段階的に減少させてもよい。また、バイアス電源50は、図4及び図7の対比において示すように、シーケンスSVPにおける複数の電圧パルスVPの各々のデューティ比を変更可能であってもよい。 Reference will now be made to FIGS. 6 and 7 . Each of FIGS. 6 and 7 is a diagram illustrating another example of a voltage pulse sequence that can be output by a bias power supply according to an exemplary embodiment. In the example illustrated in FIG. 4 , the voltage levels of the multiple voltage pulses VP in the sequence S VP within the period CY are increased in stages. As illustrated in FIG. 6 , the bias power supply 50 may also decrease the voltage levels of the multiple voltage pulses VP in the sequence S VP within the period CY in stages. Furthermore, as illustrated by comparing FIGS. 4 and 7 , the bias power supply 50 may also be capable of changing the duty ratio of each of the multiple voltage pulses VP in the sequence S VP .

 以下、図8~12を参照して、一つの例示的実施形態に係るプラズマ処理方法について説明する。また、これらの図を参照しつつ、プラズマ処理装置1における各部の制御についても説明する。図8は、一つの例示的実施形態に係るプラズマ処理方法を示す流れ図である。図9は、図8に示すプラズマ処理方法が適用され得る一例の基板の部分拡大断面図である。図10は、一つの例示的実施形態に係るプラズマ処理方法の一工程に関連するタイミングチャートである。図11及び図12の各々は、一つの例示的実施形態に係るプラズマ処理方法に関連する一例の基板の断面図である。図8に示すプラズマ処理方法(以下、「方法MT」という)において、プラズマ処理装置1の各部は、制御部2によって制御され得る。 Below, a plasma processing method according to one exemplary embodiment will be described with reference to Figures 8 to 12. Control of each part of the plasma processing apparatus 1 will also be described with reference to these figures. Figure 8 is a flow chart showing a plasma processing method according to one exemplary embodiment. Figure 9 is an enlarged partial cross-sectional view of an example substrate to which the plasma processing method shown in Figure 8 can be applied. Figure 10 is a timing chart related to one step of the plasma processing method according to one exemplary embodiment. Figures 11 and 12 are each a cross-sectional view of an example substrate related to the plasma processing method according to one exemplary embodiment. In the plasma processing method shown in Figure 8 (hereinafter referred to as "method MT"), each part of the plasma processing apparatus 1 can be controlled by the control unit 2.

 図8に示すように、方法MTは、工程ST1、工程ST2、及び工程ST3を含む。方法MTは、工程STJを更に含んでいてもよい。 As shown in FIG. 8, method MT includes steps ST1, ST2, and ST3. Method MT may further include step STJ.

 工程ST1では、基板Wが準備される。基板Wは、搬送装置(例えば搬送ロボット)によってチャンバ10内に搬送される。基板Wは、チャンバ10内で基板支持部11上に載置される。基板Wは、方法MTの実行中に静電チャック1111によって保持されてもよい。 In process ST1, a substrate W is prepared. The substrate W is transported into the chamber 10 by a transport device (e.g., a transport robot). The substrate W is placed on a substrate support 11 in the chamber 10. The substrate W may be held by an electrostatic chuck 1111 during the execution of the method MT.

 図9に示すように、基板Wは、第1領域R1及び第2領域R2を含んでいてもよい。第1領域R1は少なくとも一つの凹部R1aを有してもよい。第1領域R1は複数の凹部R1aを有してもよい。各凹部R1aは、コンタクトホールを形成するための凹部であってもよい。凹部R1aは、第2領域R2で埋められていてもよい。第2領域R2は第1領域R1を覆うように設けられてもよい。 As shown in FIG. 9, the substrate W may include a first region R1 and a second region R2. The first region R1 may have at least one recess R1a. The first region R1 may have multiple recesses R1a. Each recess R1a may be a recess for forming a contact hole. The recess R1a may be filled with the second region R2. The second region R2 may be provided to cover the first region R1.

 一実施形態において、第1領域R1は、シリコン及び窒素を含む。第1領域R1は、シリコン窒化物(SiN)を含んでもよい。第1領域R1は、例えばCVD等により成膜された領域であってもよいし、シリコンを窒化することにより得られる領域であってもよい。第1領域R1は、シリコン窒化物(SiN)を含む第1部分と、シリコンカーバイド(SiC)を含む第2部分とを含んでもよい。この場合、第1部分が凹部R1aを有する。 In one embodiment, the first region R1 includes silicon and nitrogen. The first region R1 may include silicon nitride (SiN x ). The first region R1 may be a region formed by, for example, CVD or the like, or may be a region obtained by nitriding silicon. The first region R1 may include a first portion including silicon nitride (SiN x ) and a second portion including silicon carbide (SiC). In this case, the first portion has a recess R1 a.

 凹部R1aのアスペクト比は、例えば、3以上であってもよく、4以上、5以上、又は10以上であってもよい。なお、凹部R1aのアスペクト比は、凹部R1aの最大幅寸法に対する、凹部R1aの深さの比の値を示す。 The aspect ratio of the recess R1a may be, for example, 3 or more, 4 or more, 5 or more, or 10 or more. The aspect ratio of the recess R1a indicates the ratio of the depth of the recess R1a to the maximum width dimension of the recess R1a.

 第2領域R2は、シリコン及び酸素を含む。第2領域R2は、シリコン酸化物(SiO)を含んでもよい。第2領域R2は、例えばCVD等により成膜された領域であってもよいし、シリコンを酸化することにより得られる領域であってもよい。 The second region R2 includes silicon and oxygen. The second region R2 may include silicon oxide (SiO x ). The second region R2 may be a region formed by, for example, CVD or the like, or may be a region obtained by oxidizing silicon.

 基板Wは、第3領域R3を更に含んでいてもよい。第3領域R3は、第2領域R2上に設けられる。第3領域R3は、金属、炭素、及び窒素を含んでもよい。ここでの金属は、タングステンを含む。第3領域R3は、開口OP3を有してもよい。開口OP3の幅は、凹部R1aの幅に対応してもよい。 The substrate W may further include a third region R3. The third region R3 is provided on the second region R2. The third region R3 may include a metal, carbon, and nitrogen. Here, the metal includes tungsten. The third region R3 may have an opening OP3. The width of the opening OP3 may correspond to the width of the recess R1a.

 基板Wは、下地領域URと、下地領域UR上に設けられた少なくとも一つの隆起領域RAとを含んでもよい。下地領域UR及び少なくとも一つの隆起領域RAは、第1領域R1によって覆われる。下地領域URはシリコンを含んでもよい。下地領域UR上には複数の隆起領域RAが位置する。複数の隆起領域RA間に第1領域R1の凹部R1aが位置する。各隆起領域RAは、トランジスタのゲート領域を形成してもよい。 The substrate W may include an underlying region UR and at least one raised region RA provided on the underlying region UR. The underlying region UR and the at least one raised region RA are covered by a first region R1. The underlying region UR may include silicon. A plurality of raised regions RA are located on the underlying region UR. Recesses R1a of the first region R1 are located between the plurality of raised regions RA. Each raised region RA may form a gate region of a transistor.

 基板Wは、マスクMKを含んでもよい。マスクMKは、第3領域R3上に設けられる。マスクMKは金属又はシリコンを含んでもよい。マスクMKは開口OPMを有してもよい。開口OPMは、第3領域R3の開口OP3に対応する。 The substrate W may include a mask MK. The mask MK is provided on the third region R3. The mask MK may include metal or silicon. The mask MK may have an opening OPM. The opening OPM corresponds to the opening OP3 in the third region R3.

 なお、工程ST1において準備される基板Wは、プラズマエッチングの結果として図9に示される形状となっていてもよいし、プラズマ処理チャンバ10に提供された当初から図9に示される形状であってもよい。 The substrate W prepared in step ST1 may have the shape shown in FIG. 9 as a result of plasma etching, or may have the shape shown in FIG. 9 from the time it is initially provided to the plasma processing chamber 10.

 方法MTでは、次いで工程ST2が実行される。工程ST2では、制御部2は、チャンバ10内に処理ガスを供給するようにガス供給部20を制御する。 In method MT, step ST2 is then performed. In step ST2, the control unit 2 controls the gas supply unit 20 to supply a processing gas into the chamber 10.

 処理ガスは、プラズマからの化学種を構成する金属及び第2領域R2をエッチングするためのエッチング成分を含んでよい。一例では、処理ガスは、金属含有ガスを含んでもよい。処理ガスは、エッチング成分含有ガスを含んでもよい。処理ガスは、炭素含有ガスを含んでもよい。処理ガスは、水素含有ガスを含んでもよい。また、一例では、処理ガスは、第1領域R1が露出する直前にタングステン含有ガス、モリブデン含有ガス及びチタン含有ガスからなる群から選択される少なくとも一つを、金属含有ガスとして含んでもよい。一例では、処理ガスは、エッチング成分として、ハロゲン化ガスを含む。金属含有ガスはハロゲン化金属含有ガスであってもよい。なお、エッチング成分は第2領域R2をエッチングする成分である。 The processing gas may contain metals constituting the chemical species from the plasma and an etching component for etching the second region R2. In one example, the processing gas may contain a metal-containing gas. The processing gas may contain an etching component-containing gas. The processing gas may contain a carbon-containing gas. The processing gas may contain a hydrogen-containing gas. In another example, the processing gas may contain at least one metal-containing gas selected from the group consisting of a tungsten-containing gas, a molybdenum-containing gas, and a titanium-containing gas immediately before the first region R1 is exposed. In one example, the processing gas contains a halide gas as an etching component. The metal-containing gas may be a metal halide-containing gas. The etching component is a component that etches the second region R2.

 金属含有ガスは、タングステン含有ガス、モリブデン含有ガス及びチタン含有ガスからなる群から選択される少なくとも一つを含んでもよい。タングステン含有ガスは、ハロゲン化タングステンガスを含んでもよい。ハロゲン化タングステンガスは、六フッ化タングステン(WF)ガス、六臭化タングステン(WBr)ガス、六塩化タングステン(WCl)ガス及びWFClガスの少なくとも一つを含んでもよい。タングステン含有ガスは、ヘキサカルボニルタングステン(W(CO))ガスを含んでもよい。モリブデン含有ガスは、ハロゲン化モリブデンガスを含んでもよい。ハロゲン化モリブデンガスは、六フッ化モリブデン(MoF)ガス、及び六塩化モリブデン(MoCl)ガスからなる群から選択される少なくとも一つを含んでもよい。チタン含有ガスは、四塩化チタン(TiCl)を含んでもよい。 The metal-containing gas may include at least one selected from the group consisting of a tungsten-containing gas, a molybdenum-containing gas, and a titanium-containing gas. The tungsten-containing gas may include a tungsten halide gas. The tungsten halide gas may include at least one of tungsten hexafluoride (WF 6 ) gas, tungsten hexabromide (WBr 6 ) gas, tungsten hexachloride (WCl 6 ) gas, and WF 5 Cl gas. The tungsten-containing gas may include tungsten hexacarbonyl (W(CO) 6 ) gas. The molybdenum-containing gas may include a molybdenum halide gas. The molybdenum halide gas may include at least one selected from the group consisting of molybdenum hexafluoride (MoF 6 ) gas and molybdenum hexachloride (MoCl 6 ) gas. The titanium-containing gas may include titanium tetrachloride (TiCl 4 ).

 エッチング成分含有ガスは、ハロゲン化ガスを含む。ハロゲン化ガスは、フッ素含有ガス、塩素含有ガス、及び臭素含有ガスからなる群から選択される少なくとも一つを含んでもよい。フッ素含有ガスは、フルオロカーボンガスを含んでいてもよい。 The etching component-containing gas includes a halogenated gas. The halogenated gas may include at least one selected from the group consisting of a fluorine-containing gas, a chlorine-containing gas, and a bromine-containing gas. The fluorine-containing gas may include a fluorocarbon gas.

 炭素含有ガスは、CHガス、Cガス、Cガス、CHFガス、CHガス、CHFガス及びCOガスからなる群から選択される少なくとも一つを含んでもよい。 The carbon-containing gas may include at least one selected from the group consisting of CH4 gas, C2H2 gas, C2H4 gas, CH3F gas, CH2F2 gas , CHF3 gas , and CO gas.

 水素含有ガスは、Hガス、SiHガス及びNHガスからなる群から選択される少なくとも一つを含んでもよい。 The hydrogen-containing gas may include at least one selected from the group consisting of H2 gas, SiH4 gas, and NH3 gas.

 処理ガスは、例えばアルゴンガス、ヘリウムガス、キセノンガス又はネオンガス等の貴ガスを更に含んでもよい。処理ガスは、例えば窒素(N)ガスを含んでもよい。 The process gas may further include a noble gas such as argon gas, helium gas, xenon gas, or neon gas, etc. The process gas may include nitrogen (N 2 ) gas, for example.

 方法MTでは、次いで工程ST3が実行される。工程ST3では、チャンバ10内の処理ガスから生成されたプラズマPLを用いて第2領域R2がエッチングされる。工程ST3において、第1領域R1の凹部R1aにおける肩部分SHが露出するように第2領域R2がエッチングされ得る。工程ST3は、工程ST2で供給された処理ガスがチャンバ内に存在しているときに行われる。工程ST3は、工程ST2の実行中に行われてもよい。 In method MT, step ST3 is then performed. In step ST3, the second region R2 is etched using plasma PL generated from the processing gas in chamber 10. In step ST3, the second region R2 can be etched so as to expose the shoulder portion SH of the recess R1a of the first region R1. Step ST3 is performed while the processing gas supplied in step ST2 is present in the chamber. Step ST3 may also be performed while step ST2 is being performed.

 図10は、一つの例示的実施形態に係るプラズマ処理方法の一工程に関連するタイミングチャートである。図10において、「HF」は、第1のRF生成部31aによってプラズマの生成のために供給されるソース高周波信号HFのパワーレベルを示している。また、「MF」のONは、バイアス電源50から第1のシーケンスが基板支持部11に供給されていることを示しており、「MF」のOFFは、第1のシーケンスの供給が停止されていることを示している。第1のシーケンスは、図4、図6、又は図7に示すように周期CY内のそれらの電圧レベルが段階的に増加又は減少される複数の電圧パルスVPのシーケンスSVPである。また、「LF」のONは、バイアス電源50から第2のシーケンスが基板支持部11に供給されていることを示しており、「LF」のOFFは、第2のシーケンスの供給が停止されていることを示している。第2のシーケンスは、互いに同一且つ一定の電圧レベルを有する複数の電圧パルスVPのシーケンスSVPである。 FIG. 10 is a timing chart relating to one step of a plasma processing method according to one exemplary embodiment. In FIG. 10, "HF" indicates the power level of the source radio frequency signal HF supplied by the first RF generator 31a for plasma generation. Furthermore, "MF" ON indicates that a first sequence is being supplied from the bias power supply 50 to the substrate support 11, and "MF" OFF indicates that the supply of the first sequence is stopped. The first sequence is a sequence SVP of multiple voltage pulses VP whose voltage levels are increased or decreased stepwise within a period CY, as shown in FIG. 4, FIG. 6, or FIG. 7. Furthermore, "LF" ON indicates that a second sequence is being supplied from the bias power supply 50 to the substrate support 11, and "LF" OFF indicates that the supply of the second sequence is stopped. The second sequence is a sequence SVP of multiple voltage pulses VP having the same and constant voltage levels.

 図10に示すように、工程ST3は、第1の期間P1、第2の期間P2、第3の期間P3、及び第4の期間P4を含んでいる。第1の期間P1において、制御部2は、処理ガスからプラズマPLを生成するために、第1のパワーレベルL1を有するソース高周波信号HFを供給するよう、第1のRF生成部31a(即ち、高周波電源)を制御する。第1の期間P1において、第1のシーケンス及び第2のシーケンスの供給は停止されていてもよい。第1の期間P1では、プラズマPLからの化学種が基板Wの表面に堆積して、図11に示すように、堆積物DPを形成する。一実施形態において、堆積物DPは、タングステン、WFのような上述の金属含有物を含んでいてもよい。 As shown in FIG. 10 , process ST3 includes a first period P1, a second period P2, a third period P3, and a fourth period P4. During the first period P1, the control unit 2 controls the first RF generator 31a (i.e., the high-frequency power supply) to supply a source high-frequency signal HF having a first power level L1 to generate plasma PL from the processing gas. During the first period P1, the supply of the first and second sequences may be stopped. During the first period P1, chemical species from the plasma PL are deposited on the surface of the substrate W to form a deposit DP, as shown in FIG. 11 . In one embodiment, the deposit DP may contain the above-mentioned metal components, such as tungsten and WF6 .

 第2の期間P2は、第1の期間P1の後の又は第1の期間P1に続く期間である。第2の期間P2において、制御部2は、処理ガスからプラズマPLを生成するために、第2のパワーレベルL2を有するソース高周波信号HFを供給するよう、第1のRF生成部31aを制御する。第2のパワーレベルL2は、第1のパワーレベルL1よりも低くてもよい。また、第2の期間P2において、制御部2は、第1のシーケンスを基板支持部11に供給するよう、バイアス電源50を制御する。第2の期間P2での第1のシーケンスにおける複数の電圧パルスVPの最大電圧レベルは、第3の期間P3及び第4の期間P4での第2のシーケンスにおける複数の電圧パルスVPの一定の電圧レベルよりも低くてもよい。第2の期間P2では、プラズマPLからのイオンが堆積物DPに引き込まれて、堆積物DPが改質される。なお、第2の期間P2では、プラズマPLからのイオンによりエッチングされた堆積物DPが、肩部分SH等に再付着してもよい。 The second period P2 is a period after or following the first period P1. During the second period P2, the control unit 2 controls the first RF generating unit 31a to supply a source high frequency signal HF having a second power level L2 to generate a plasma PL from the processing gas. The second power level L2 may be lower than the first power level L1. Also, during the second period P2, the control unit 2 controls the bias power supply 50 to supply a first sequence to the substrate support 11. The maximum voltage level of the multiple voltage pulses VP in the first sequence during the second period P2 may be lower than the constant voltage levels of the multiple voltage pulses VP in the second sequence during the third period P3 and the fourth period P4. During the second period P2, ions from the plasma PL are attracted to the deposit DP, modifying the deposit DP. During the second period P2, deposits DP etched by ions from the plasma PL may re-adhere to the shoulder portion SH, etc.

 第3の期間P3は、第2の期間P2の後の又は第2の期間P2に続く期間である。第3の期間P3において、制御部2は、処理ガスからプラズマPLを生成するために、第3のパワーレベルL3を有するソース高周波信号HFを供給するよう、第1のRF生成部31aを制御する。第3のパワーレベルL3は、第1のパワーレベルL1よりも低くてもよい。第3のパワーレベルL3は、第2のパワーレベルL2と同一であってもよく、第2のパワーレベルL2と異なっていてもよい。また、第3の期間P3において、制御部2は、第2のシーケンスを基板支持部11に供給するよう、バイアス電源50を制御する。第3の期間P3では、プラズマPLから高いエネルギーを有するイオンが堆積物DPに引き込まれて、第2領域R2上の堆積物DP及び第2領域R2がエッチングされる。なお、第3の期間P3におけるイオンの角度分布は、第4の期間P4におけるイオンの角度分布よりも広いことがある。 The third period P3 is a period following or following the second period P2. During the third period P3, the control unit 2 controls the first RF generator 31a to supply a source radio frequency signal HF having a third power level L3 to generate plasma PL from the processing gas. The third power level L3 may be lower than the first power level L1. The third power level L3 may be the same as or different from the second power level L2. During the third period P3, the control unit 2 controls the bias power supply 50 to supply a second sequence to the substrate support 11. During the third period P3, highly energetic ions from the plasma PL are attracted to the deposit DP, etching the deposit DP on the second region R2 and the second region R2. Note that the angular distribution of ions during the third period P3 may be wider than the angular distribution of ions during the fourth period P4.

 第4の期間P4は、第3の期間P3の後の又は第3の期間P3に続く期間である。第4の期間P4において、制御部2は、ソース高周波信号HFのパワーレベルを第4のパワーレベルL4に設定するよう、第1のRF生成部31aを制御する。第4のパワーレベルL4は、第2のパワーレベルL2及び第3のパワーレベルL3よりも低い。第4のパワーレベルL4はゼロであってもよい。また、第4の期間P4において、制御部2は、第2のシーケンスを基板支持部11に供給するよう、バイアス電源50を制御する。第4の期間P4では、チャンバ10内に残されているプラズマPL中のイオンが基板Wに引き込まれて、第2領域R2を更にエッチングする。第4の期間P4では、イオンフラックスの量とイオンのエネルギーが適切に調整されて、比較的高い垂直直進性をもって、イオンが第2領域R2に供給される。これにより、第2領域R2のエッチングによって基板Wに形成される形状の高い垂直性が得られる(例えば、図12参照)。なお、第4の期間P4の終了時には、基板W上の堆積物DPは、消失していてもよい。 The fourth period P4 is a period following or following the third period P3. During the fourth period P4, the control unit 2 controls the first RF generation unit 31a to set the power level of the source high frequency signal HF to a fourth power level L4. The fourth power level L4 is lower than the second power level L2 and the third power level L3. The fourth power level L4 may be zero. Also, during the fourth period P4, the control unit 2 controls the bias power supply 50 to supply a second sequence to the substrate support unit 11. During the fourth period P4, ions in the plasma PL remaining in the chamber 10 are attracted to the substrate W to further etch the second region R2. During the fourth period P4, the amount of ion flux and the energy of the ions are appropriately adjusted, and the ions are supplied to the second region R2 with relatively high vertical linearity. This results in a highly vertical shape being formed on the substrate W by etching the second region R2 (see, for example, Figure 12). At the end of the fourth period P4, the deposit DP on the substrate W may have disappeared.

 続く工程STJでは、停止条件が満たされるか否かが判定される。停止条件は、例えば、工程ST2及び工程ST3を含むサイクルの繰り返し回数が所定回数に達している場合に満たされる。停止条件が満たされていない場合には、工程ST2及び工程ST3を含むサイクルが繰り返される。一方、停止条件が満たされている場合には、方法MTは終了する。 In the subsequent step STJ, it is determined whether a stop condition is satisfied. The stop condition is satisfied, for example, when the cycle including steps ST2 and ST3 has been repeated a predetermined number of times. If the stop condition is not satisfied, the cycle including steps ST2 and ST3 is repeated. On the other hand, if the stop condition is satisfied, method MT ends.

 以下、制御部2、制御部50c、電源制御部51c、及びパルス制御部52cのようなプラズマ処理装置における一つ以上の処理回路として用いられ得る処理回路の例について説明する。図13は、本明細書に記載の動作をコンピュータ上で実施する処理回路のブロック図である。図13は、任意のコンピュータ上の制御処理を制御するために使用され得る処理回路130を図示している。フローチャートにおける記述又はブロックは、処理の特定の論理機能又はステップを実施するための一つ以上の実行可能な命令を含むモジュール、セグメント、又はコードの一部を表すものである。当業者によって理解されるように、関連する機能に応じて、略同時、又は逆の順序等、図示又は記載の順序とは異なる順序で実行可能な機能を有する別の実施例が、本開示の例示的実施形態の範囲内に含まれる。本明細書に記載の様々な要素、特徴、及び処理は互いに独立に使用されてもよく、様々な方法で組み合わせられてもよい。考えられ得るあらゆる組合せ及び部分的な組合せが、本開示の範囲に含まれ得る。 Below, we describe examples of processing circuits that can be used as one or more processing circuits in a plasma processing apparatus, such as the control unit 2, the control unit 50c, the power supply control unit 51c, and the pulse control unit 52c. FIG. 13 is a block diagram of a processing circuit that performs the operations described herein on a computer. FIG. 13 illustrates a processing circuit 130 that can be used to control a control process on any computer. The descriptions or blocks in the flowcharts represent modules, segments, or portions of code that contain one or more executable instructions for implementing specific logical functions or steps of the process. As will be understood by those skilled in the art, other examples having functions that can be performed in a different order than that shown or described, such as substantially simultaneously or in reverse order, depending on the functionality involved, are included within the scope of exemplary embodiments of the present disclosure. The various elements, features, and processes described herein may be used independently of one another or may be combined in various ways. All conceivable combinations and subcombinations may be included within the scope of the present disclosure.

 図13では、処理回路130は、上述/後述の一つ以上の制御処理を実施するCPU1200を含む。処理データ及び命令は、メモリ1202に格納されてもよい。これらの処理データ及び命令は、ハードディスクドライブ(HDD:Hard Disk Drive)や可搬記憶媒体等の記憶媒体ディスク1204に格納されても、遠隔で格納されてもよい。更に、特許請求の範囲に記載する本開示は、本発明による処理の命令が格納されるコンピュータ可読媒体の形態によって限定されるものではない。例えば、これらの命令は、CD、DVD、フラッシュメモリ、RAM、ROM、PROM、EPROM、EEPROM、ハードディスク、又は処理回路130が通信するサーバ及び/又はコンピュータ等の任意の他の情報処理装置に格納されてもよい。 In FIG. 13, processing circuitry 130 includes a CPU 1200 that performs one or more of the control processes described above/below. Processing data and instructions may be stored in memory 1202. These processing data and instructions may be stored on a storage medium disk 1204, such as a hard disk drive (HDD) or a portable storage medium, or may be stored remotely. Furthermore, the present disclosure as claimed is not limited by the form of computer-readable medium on which the processing instructions according to the present invention are stored. For example, these instructions may be stored on a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or any other information processing device such as a server and/or computer with which processing circuitry 130 communicates.

 更に、特許請求の範囲に記載する本開示は、ユーティリティアプリケーション、バックグラウンドデーモン、オペレーティングシステムの構成要素、又はそれらの組合せとして提供されてもよい。特許請求の範囲に記載する本開示は、CPU1200及びマイクロソフトウィンドウズ(登録商標)、UNIX(登録商標)、Solaris(登録商標)、LINUX(登録商標)、Apple MAC-OS等の当業者に既知のオペレーティングシステムと連動して実行されてもよい。 Furthermore, the claimed disclosure may be provided as a utility application, a background daemon, a component of an operating system, or a combination thereof. The claimed disclosure may be executed in conjunction with a CPU 1200 and an operating system known to those skilled in the art, such as Microsoft Windows (registered trademark), UNIX (registered trademark), Solaris (registered trademark), LINUX (registered trademark), Apple MAC-OS, etc.

 処理回路130を構築するハードウェア要素は、様々な回路要素によって実現することができる。更に、上述の実施形態の各機能は、一つ以上の処理回路を含む回路によって実施することができる。図13に示すように、処理回路は、特定のプログラムがなされた処理装置、例えば処理装置(CPU)1200を含む。処理回路はまた、特定用途向け回路(ASIC: application specific integrated circuit)や記載の機能を実施するように構成された従来の回路部品等のデバイスを含む。 The hardware elements making up the processing circuit 130 can be realized by a variety of circuit elements. Furthermore, each function of the above-described embodiments can be performed by a circuit including one or more processing circuits. As shown in FIG. 13, the processing circuit includes a specifically programmed processing unit, such as a processing unit (CPU) 1200. The processing circuit also includes devices such as application specific integrated circuits (ASICs) or conventional circuit components configured to perform the described functions.

 図13では、処理回路130は上述の処理を実施するCPU1200を含む。処理回路130は、汎用コンピュータ又は特定の専用機であってもよい。一実施形態では、処理装置1200がプラズマ生成部12及びガス供給部20の制御、或いは又は加えて、バイアス電源50の制御を行うようにプログラミングされている場合には、処理回路130は特定の専用機として機能する。 In FIG. 13, the processing circuitry 130 includes a CPU 1200 that performs the above-described processing. The processing circuitry 130 may be a general-purpose computer or a specific dedicated machine. In one embodiment, when the processing device 1200 is programmed to control the plasma generating unit 12 and the gas supply unit 20 and/or to control the bias power supply 50, the processing circuitry 130 functions as a specific dedicated machine.

 或いは又は更に、CPU1200は、当業者には理解されるように、FPGA、ASIC、PLD上で、又は離散した論理回路を用いて実装されてもよい。更に、CPU1200は、上述の本発明の処理の命令を並行して実施するように協働する複数の処理装置として実施してもよい。 Alternatively or additionally, CPU 1200 may be implemented on an FPGA, ASIC, PLD, or using discrete logic circuitry, as will be understood by those skilled in the art. Furthermore, CPU 1200 may be implemented as multiple processing units that cooperate to execute the instructions of the processes of the present invention described above in parallel.

 図13の処理回路130はまた、ネットワーク1228とインターフェース接続するためのネットワーク制御器1206、例えば米国インテル株式会社のIntel Ethernet PROネットワークインターフェースカード等を含む。ネットワーク1228は、理解可能なように、インターネット等のパブリックネットワーク、LANやWAN等のプライベートネットワーク、又はそれらの任意の組合せでよく、また、PSTNやISDN等のサブネットワークを含んでもよい。ネットワーク1228はまた、イーサネットネットワーク等のような有線でもよく、EDGE、3G、4G無線セルラシステムを含むセルラネットワーク等の無線でもよい。無線ネットワークはまた、Wi-Fi、Bluetooth(登録商標)、又は他の任意の既知の無線通信形態でもよい。 The processing circuitry 130 of FIG. 13 also includes a network controller 1206, such as an Intel Ethernet PRO network interface card from Intel Corporation, USA, for interfacing with a network 1228. As can be appreciated, the network 1228 may be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof, and may also include sub-networks such as a PSTN or ISDN. The network 1228 may also be wired, such as an Ethernet network, or wireless, such as a cellular network including EDGE, 3G, and 4G wireless cellular systems. The wireless network may also be Wi-Fi, Bluetooth, or any other known form of wireless communication.

 処理回路130は、モニタ等の表示装置1210とインターフェース接続するためのグラフィックカードやグラフィックアダプタ等の表示装置制御器1208を更に含む。汎用I/Oインターフェース1212が、キーボード及び/又はマウス1214、並びに表示装置1210と一体、又は別体のタッチパネル1216とインターフェース接続されている。汎用I/Oインターフェースはまた、プリンタ及びスキャナ等の様々な周辺機器1218に接続されている。 The processing circuitry 130 further includes a display device controller 1208, such as a graphics card or graphics adapter, for interfacing with a display device 1210, such as a monitor. A general-purpose I/O interface 1212 interfaces with a keyboard and/or mouse 1214 and a touch panel 1216, which may be integral with or separate from the display device 1210. The general-purpose I/O interface is also connected to various peripheral devices 1218, such as printers and scanners.

 記憶装置制御器1224は、ISA、EISA、VESA、PCI等の通信バス1226を介して記憶媒体ディスク1204に接続され、処理回路130のすべての構成要素が互いに接続されている。表示装置1210、キーボード及び/又はマウス1214、並びに表示装置制御器1208、記憶装置制御器1224、ネットワーク制御器1206、音声制御器1220、及び汎用I/Oインターフェース1212の一般的な特徴及び機能については、本明細書では簡略化のために既知のものとして説明を省略する。 The storage controller 1224 is connected to the storage media disk 1204 via a communications bus 1226, such as ISA, EISA, VESA, PCI, etc., and all components of the processing circuit 130 are interconnected. For the sake of brevity, the general features and functions of the display device 1210, keyboard and/or mouse 1214, as well as the display device controller 1208, storage controller 1224, network controller 1206, audio controller 1220, and general-purpose I/O interface 1212 are not described herein as they are well known.

 本開示で記載する例示的な回路要素は、他の要素と置換え可能であり、本明細書に記載の例と異なる構造を有してもよい。更に、本明細書に記載の特徴を実施するように構成された回路は、複数の回路ユニット(例えば、チップ)で実施されても、又はこれらの特徴が単一のチップセットの回路に組みこまれてもよい。 The exemplary circuit elements described in this disclosure may be substituted with other elements and may have different structures than the examples described herein. Furthermore, circuits configured to implement the features described herein may be implemented in multiple circuit units (e.g., chips), or these features may be incorporated into the circuitry of a single chipset.

 本明細書に記載の機能及び特徴はまた、システム上で分散配置された様々な構成要素によって実行されてもよい。例えば、一つ以上の処理装置がこれらのシステムの機能を実行してもよく、その場合、処理装置はネットワーク内で通信している複数の構成要素にわたって分散して配置される。分散配置された構成要素として、様々なヒューマンインターフェース及び通信装置(表示モニタ、スマートフォン、タブレット、個人情報端末(PDA:Personal Digital Assistant)等)に加えて、処理を共有できる一つ以上のクライアント機及びサーバ機が含まれ得る。ネットワークは、LANやWAN等のプライベートネットワークでも、インターネット等のパブリックネットワークでもよい。システムへの入力は、ユーザによる直接入力によって受け付けても、リアルタイムで又はバッチ処理として遠隔に受け付けてもよい。更に、実施例の一部を上述のものと同一ではないモジュール又はハードウェア上で実施してもよい。したがって、他の実施例も特許請求の範囲に含まれる。 The functions and features described herein may also be performed by various distributed components on the system. For example, one or more processing devices may perform the functions of these systems, where the processing devices are distributed across multiple components communicating within a network. Distributed components may include various human interface and communication devices (such as display monitors, smartphones, tablets, and personal digital assistants (PDAs)), as well as one or more client and server devices that may share processing. The network may be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system may be received directly by a user, or remotely in real time or as a batch process. Furthermore, some embodiments may be implemented on modules or hardware that are not identical to those described above. Accordingly, other embodiments are within the scope of the claims.

 以上、種々の例示的実施形態について説明してきたが、上述した例示的実施形態に限定されることなく、様々な追加、省略、置換、及び変更がなされてもよい。また、異なる実施形態における要素を組み合わせて他の実施形態を形成することが可能である。 Various exemplary embodiments have been described above, but the present invention is not limited to the exemplary embodiments described above, and various additions, omissions, substitutions, and modifications may be made. Furthermore, elements from different embodiments can be combined to form other embodiments.

 以上の説明から、本開示の種々の実施形態は、説明の目的で本明細書で説明されており、本開示の範囲及び主旨から逸脱することなく種々の変更をなし得ることが、理解されるであろう。したがって、本明細書に開示した種々の実施形態は限定することを意図しておらず、真の範囲と主旨は、添付の特許請求の範囲によって示される。 From the foregoing, it will be understood that various embodiments of the present disclosure have been described herein for illustrative purposes, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.

 ここで、本開示に含まれる種々の例示的実施形態を、以下の[E1]~[E19]に記載する。 Various exemplary embodiments included in this disclosure are described below in [E1] to [E19].

[E1]
 チャンバと、
 前記チャンバ内の基板支持部と、
 前記チャンバ内に処理ガスを供給するように構成されたガス供給部と、
 前記処理ガスからプラズマを生成するためにソース高周波信号を供給するように構成された高周波電源と、
 前記プラズマから前記基板支持部上の基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で電圧パルスを発生することにより、電圧パルスのシーケンスを前記基板支持部に供給するように構成されたバイアス電源と、
を備え、
 前記バイアス電源は、前記第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内で前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すように構成されている、
プラズマ処理装置。
[E1]
a chamber;
a substrate support within the chamber;
a gas supply configured to supply a process gas into the chamber;
a radio frequency power source configured to provide a source radio frequency signal to generate a plasma from the process gas;
a bias power supply configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the inverse of a first frequency to attract ions from the plasma to a substrate on the substrate support;
Equipped with
the bias power supply is configured to increase or decrease stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and to repeat the period.
Plasma processing equipment.

[E2]
 前記複数の電圧パルスの各々は、基準電位に対して負方向の電圧レベルを有し、前記複数の電圧パルスの各々の前記電圧レベルは、前記基準電位と前記電圧パルスの電位との間の差である、E1に記載のプラズマ処理装置。
[E2]
The plasma processing apparatus of E1, wherein each of the plurality of voltage pulses has a voltage level in a negative direction relative to a reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.

[E3]
 前記バイアス電源は、
  可変直流電源と、
  前記可変直流電源の出力電圧をパルス化することにより前記電圧パルスのシーケンスを生成するように構成されたパルス発生器と、
  前記可変直流電源及び前記パルス発生器を制御するように構成された少なくとも一つの制御部と、
 を含み、
 前記少なくとも一つの制御部は、前記複数の電圧パルスの前記電圧レベルを段階的に増加又は減少させるために、前記可変直流電源を制御して前記出力電圧の電圧レベルを変更するように構成されている、
E1又はE2に記載のプラズマ処理装置。
[E3]
The bias power supply
A variable DC power supply;
a pulse generator configured to pulse the output voltage of the variable DC power supply to generate the sequence of voltage pulses;
at least one controller configured to control the variable DC power supply and the pulse generator;
Including,
the at least one control unit is configured to control the variable DC power supply to change the voltage level of the output voltage so as to increase or decrease the voltage level of the plurality of voltage pulses in a stepwise manner.
The plasma processing apparatus according to E1 or E2.

[E4]
 主制御部を更に備え、
 前記主制御部は、シリコン及び窒素を含む第1領域とシリコン及び酸素を含む第2領域とを含む前記基板が前記基板支持部上に載置されている状態で、
  (a)前記ガス供給部から、処理ガスを前記チャンバ内に供給する工程と、
  (b)前記チャンバ内の前記処理ガスから生成されたプラズマを用いて、前記第2領域をエッチングする工程と、
 を実行するように構成されており、
 前記(b)は、
  (b1) 第1期間において、前記チャンバ内で前記処理ガスからプラズマを生成して該プラズマからの化学種を前記基板上に堆積させるために、前記高周波電源から第1のパワーレベルを有する前記ソース高周波信号を供給する工程と、
  (b2) 前記第1期間の後の第2期間において、前記処理ガスからプラズマを生成するために、前記高周波電源から前記第1のパワーレベルよりも低い第2のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (b3) 前記第2期間の後の第3期間において、前記処理ガスからプラズマを生成して前記第2領域をエッチングするために、前記高周波電源から前記第1のパワーレベルよりも低い第3のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (b4) 前記第3期間の後の第4の期間において、前記処理ガスから生成された前記プラズマを用いて前記第2領域を更にエッチングするために、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給する工程であり、前記ソース高周波信号のパワーレベルを前記第2のパワーレベル及び前記第3のパワーレベルよりも低い第4のパワーレベルに設定することを含む、該工程と、
 を含み、
 前記バイアス電源は、
  前記(b3)及び前記(b4)において、前記シーケンスに含まれる複数の電圧パルスの電圧レベルを実質的に一定のレベルに設定し、
  前記(b2)において、前記周期内の前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返す、
 ように構成されている、
E1~E3のいずれか一つに記載のプラズマ処理装置。
[E4]
Further comprising a main control unit,
the main control unit, in a state where the substrate including a first region containing silicon and nitrogen and a second region containing silicon and oxygen is placed on the substrate support unit,
(a) supplying a process gas into the chamber from the gas supply unit;
(b) etching the second region using a plasma generated from the process gas in the chamber;
is configured to run
The (b) is
(b1) providing the source radio frequency signal having a first power level from the radio frequency power source during a first time period to generate a plasma from the process gas in the chamber and deposit chemical species from the plasma on the substrate;
(b2) providing the source radio frequency signal having a second power level from the radio frequency power supply, the second power level being lower than the first power level, to generate a plasma from the process gas during a second time period after the first time period, the second power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(b3) during a third time period after the second time period, providing the source radio frequency signal having a third power level from the radio frequency power source that is lower than the first power level to generate a plasma from the process gas and etch the second region, the third power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(b4) during a fourth time period after the third time period, supplying the sequence of voltage pulses from the bias power supply to the substrate support to further etch the second region using the plasma generated from the process gas, the fourth time period including setting a power level of the source radio frequency signal to a fourth power level lower than the second power level and the third power level;
Including,
The bias power supply
In the steps (b3) and (b4), the voltage levels of the plurality of voltage pulses included in the sequence are set to a substantially constant level;
In the step (b2), the voltage levels of the plurality of voltage pulses included in the sequence within the period are increased or decreased stepwise, and the period is repeated.
It is configured as follows:
The plasma processing apparatus according to any one of E1 to E3.

[E5]
 前記バイアス電源は、前記(b2)における前記複数の電圧パルスの最大電圧レベルを、前記(b3)及び前記(b4)における前記複数の電圧パルスの前記電圧レベルよりも低いレベルに設定するように構成されている、E4に記載のプラズマ処理装置。
[E5]
The plasma processing apparatus of E4, wherein the bias power supply is configured to set the maximum voltage level of the plurality of voltage pulses in (b2) to a level lower than the voltage levels of the plurality of voltage pulses in (b3) and (b4).

[E6]
 前記第4のパワーレベルは、ゼロである、E4又はE5に記載のプラズマ処理装置。
[E6]
The plasma processing apparatus of E4 or E5, wherein the fourth power level is zero.

[E7]
 前記第2のパワーレベル及び前記第3のパワーレベルは、互いに同一である、E4~E6のいずれか一つに記載のプラズマ処理装置。
[E7]
The plasma processing apparatus according to any one of E4 to E6, wherein the second power level and the third power level are the same.

[E8]
 前記処理ガスは、前記化学種を構成する金属及び前記第2領域をエッチングするためのエッチング成分を含む、E4~E7のいずれか一つに記載のプラズマ処理装置。
[E8]
The plasma processing apparatus according to any one of E4 to E7, wherein the processing gas contains a metal constituting the chemical species and an etching component for etching the second region.

[E9]
 前記主制御部は、前記(b)を繰り返すように構成されている、E4~E8に記載のプラズマ処理装置。
[E9]
The plasma processing apparatus according to any one of E4 to E8, wherein the main control unit is configured to repeat (b).

[E10]
 前記バイアス電源は、前記電圧パルスのデューティ比を変更可能に構成されている、E1~E9に記載のプラズマ処理装置。
[E10]
The plasma processing apparatus according to any one of E1 to E9, wherein the bias power supply is configured to be able to change the duty ratio of the voltage pulse.

[E11]
 プラズマ処理装置において用いられるバイアス電源であり、
  可変直流電源と、
  前記可変直流電源の出力電圧をパルス化することにより電圧パルスのシーケンスを生成するように構成されたパルス発生器と、
  前記可変直流電源及び前記パルス発生器を制御するように構成された少なくとも一つの制御部と、
 を含み、
 前記少なくとも一つの制御部は、
  前記プラズマ処理装置のチャンバ内のプラズマから該チャンバ内の基板支持部上の基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で前記電圧パルスを発生して前記シーケンスを前記基板支持部に供給するよう、前記パルス発生器を制御し、
  前記第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内で前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すために、前記可変直流電源を制御して前記出力電圧の電圧レベルを変更する、
 ように構成されている、
バイアス電源。
[E11]
A bias power supply used in a plasma processing apparatus,
A variable DC power supply;
a pulse generator configured to pulse the output voltage of the variable DC power supply to generate a sequence of voltage pulses;
at least one controller configured to control the variable DC power supply and the pulse generator;
Including,
The at least one control unit
controlling the pulse generator to generate the voltage pulses at a time interval that is the inverse of a first frequency and apply the sequence to the substrate support to attract ions from a plasma in a chamber of the plasma processing apparatus to a substrate on a substrate support in the chamber;
a stepwise increase or decrease in voltage level of a plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and the voltage level of the output voltage is changed by controlling the variable DC power supply to repeat the period;
It is configured as follows:
Bias power supply.

[E12]
 前記複数の電圧パルスの各々は、基準電位に対して負方向の電圧レベルを有し、前記複数の電圧パルスの各々の電圧レベルは、前記基準電位と前記電圧パルスの電位との間の差である、E11に記載のバイアス電源。
[E12]
8. The bias power supply of claim 11, wherein each of the plurality of voltage pulses has a negative-going voltage level relative to a reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.

[E13]
 (a)プラズマ処理装置のチャンバ内に基板を準備する工程であり、該基板は、シリコン及び窒素を含む第1領域と、シリコン及び酸素を含む第2領域とを含む、該工程と、
 (b)プラズマ処理装置のチャンバ内に処理ガスを供給する工程と、
 (c)前記チャンバ内の前記処理ガスから生成されたプラズマを用いて、前記第2領域をエッチングする工程と、
を含み、
 該プラズマ処理装置は、前記プラズマから前記チャンバ内の基板支持部上の前記基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で電圧パルスを発生することにより、電圧パルスのシーケンスを前記基板支持部に供給するように構成されたバイアス電源を含み、
 前記(c)は、前記第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内で前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すことを含む、
プラズマ処理方法。
[E13]
(a) providing a substrate in a chamber of a plasma processing apparatus, the substrate including a first region including silicon and nitrogen and a second region including silicon and oxygen;
(b) supplying a processing gas into a chamber of the plasma processing device;
(c) etching the second region using a plasma generated from the process gas in the chamber;
Including,
The plasma processing apparatus includes a bias power supply configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the inverse of a first frequency to draw ions from the plasma to the substrate on the substrate support within the chamber;
(c) includes increasing or decreasing stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and repeating the period.
Plasma treatment method.

[E14]
 前記プラズマ処理装置は、前記処理ガスからプラズマを生成するためにソース高周波信号を供給するように構成された高周波電源を備え、
 前記(c)は、
  (c1) 第1期間において前記チャンバ内で前記処理ガスからプラズマを生成して前記基板上に前記プラズマからの化学種を堆積させるために、前記高周波電源から第1のパワーレベルを有する前記ソース高周波信号を供給する工程と、
  (c2) 前記第1期間の後の第2期間において、前記処理ガスからプラズマを生成するために、前記高周波電源から前記第1のパワーレベルよりも低い第2のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (c3) 前記第2期間の後の第3期間において、前記処理ガスからプラズマを生成して前記第2領域をエッチングするために、前記高周波電源から前記第1のパワーレベルよりも低い第3のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (c4) 前記第3期間の後の第4の期間において、前記処理ガスから生成された前記プラズマを用いて前記第2領域を更にエッチングするために、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給する工程であり、前記ソース高周波信号のパワーレベルを前記第2のパワーレベル及び第3のパワーレベルよりも低い第4のパワーレベルに設定することを含む、該工程と、
 を含み、
 前記(c3)及び前記(c4)において、前記シーケンスに含まれる複数の電圧パルスの電圧レベルを実質的に一定のレベルに設定し、
 前記(c2)において、前記周期内の前記シーケンスに含まれる前記複数の電圧パルスの電圧レベルが段階的に増加又は減少され、且つ該周期が繰り返される、
E13に記載のプラズマ処理方法。
[E14]
the plasma processing apparatus includes a radio frequency power supply configured to provide a source radio frequency signal to generate a plasma from the process gas;
The (c) is
(c1) providing the source radio frequency signal having a first power level from the radio frequency power source to generate a plasma from the process gas in the chamber for a first time period and deposit chemical species from the plasma on the substrate;
(c2) providing the source radio frequency signal having a second power level lower than the first power level from the radio frequency power supply to generate a plasma from the process gas during a second time period after the first time period, the second power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(c3) during a third time period after the second time period, providing the source radio frequency signal having a third power level from the radio frequency power source that is lower than the first power level to generate a plasma from the process gas and etch the second region, the third power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(c4) applying the sequence of voltage pulses from the bias power supply to the substrate support during a fourth time period after the third time period to further etch the second region using the plasma generated from the process gas, the fourth time period including setting a power level of the source radio frequency signal to a fourth power level lower than the second and third power levels;
Including,
In the steps (c3) and (c4), the voltage levels of the plurality of voltage pulses included in the sequence are set to a substantially constant level;
In (c2), the voltage levels of the plurality of voltage pulses included in the sequence within the period are increased or decreased stepwise, and the period is repeated.
The plasma processing method according to E13.

[E15]
 前記(c2)における前記複数の電圧パルスの最大電圧レベルは、前記(c3)及び前記(c4)における前記複数の電圧パルスの前記電圧レベルよりも低い、E14に記載のプラズマ処理方法。
[E15]
The plasma processing method according to E14, wherein a maximum voltage level of the plurality of voltage pulses in (c2) is lower than the voltage levels of the plurality of voltage pulses in (c3) and (c4).

[E16]
 前記第4のパワーレベルは、ゼロである、E14又はE15に記載のプラズマ処理方法。
[E16]
The plasma processing method of any one of E14 and E15, wherein the fourth power level is zero.

[E17]
 前記第2のパワーレベル及び前記第3のパワーレベルは、互いに同一である、E14~E16のいずれかに記載のプラズマ処理方法。
[E17]
The plasma processing method according to any one of E14 to E16, wherein the second power level and the third power level are the same.

[E18]
 前記処理ガスは、前記化学種を構成する金属及び前記第2領域をエッチングするためのエッチング成分を含む、E14~E17のいずれかに記載のプラズマ処理方法。
[E18]
The plasma processing method according to any one of E14 to E17, wherein the processing gas contains a metal constituting the chemical species and an etching component for etching the second region.

[E19]
 前記(c)が繰り返される、E13~E18のいずれか一つに記載のプラズマ処理方法。
[E19]
The plasma processing method according to any one of E13 to E18, wherein (c) is repeated.

 1…プラズマ処理装置、10…プラズマ処理チャンバ、11…基板支持部、12…プラズマ生成部、20…ガス供給部、50…バイアス電源、50c…制御部、51c…電源制御部、51…可変直流電源、52…パルス発生器。 1... plasma processing apparatus, 10... plasma processing chamber, 11... substrate support section, 12... plasma generation section, 20... gas supply section, 50... bias power supply, 50c... control section, 51c... power supply control section, 51... variable DC power supply, 52... pulse generator.

Claims (19)

 チャンバと、
 前記チャンバ内の基板支持部と、
 前記チャンバ内に処理ガスを供給するように構成されたガス供給部と、
 前記処理ガスからプラズマを生成するためにソース高周波信号を供給するように構成された高周波電源と、
 前記プラズマから前記基板支持部上の基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で電圧パルスを発生することにより、電圧パルスのシーケンスを前記基板支持部に供給するように構成されたバイアス電源と、
を備え、
 前記バイアス電源は、前記第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内で前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すように構成されている、
プラズマ処理装置。
a chamber;
a substrate support within the chamber;
a gas supply configured to supply a process gas into the chamber;
a radio frequency power source configured to provide a source radio frequency signal to generate a plasma from the process gas;
a bias power supply configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the inverse of a first frequency to attract ions from the plasma to a substrate on the substrate support;
Equipped with
the bias power supply is configured to increase or decrease stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and to repeat the period.
Plasma processing equipment.
 前記複数の電圧パルスの各々は、基準電位に対して負方向の電圧レベルを有し、前記複数の電圧パルスの各々の前記電圧レベルは、前記基準電位と前記電圧パルスの電位との間の差である、請求項1に記載のプラズマ処理装置。 The plasma processing apparatus of claim 1, wherein each of the plurality of voltage pulses has a voltage level in a negative direction relative to a reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.  前記バイアス電源は、
  可変直流電源と、
  前記可変直流電源の出力電圧をパルス化することにより前記電圧パルスのシーケンスを生成するように構成されたパルス発生器と、
  前記可変直流電源及び前記パルス発生器を制御するように構成された少なくとも一つの制御部と、
 を含み、
 前記少なくとも一つの制御部は、前記複数の電圧パルスの前記電圧レベルを段階的に増加又は減少させるために、前記可変直流電源を制御して前記出力電圧の電圧レベルを変更するように構成されている、
請求項1又は2に記載のプラズマ処理装置。
The bias power supply
A variable DC power supply;
a pulse generator configured to pulse the output voltage of the variable DC power supply to generate the sequence of voltage pulses;
at least one controller configured to control the variable DC power supply and the pulse generator;
Including,
the at least one control unit is configured to control the variable DC power supply to change the voltage level of the output voltage so as to increase or decrease the voltage level of the plurality of voltage pulses in a stepwise manner.
3. The plasma processing apparatus according to claim 1 or 2.
 主制御部を更に備え、
 前記主制御部は、シリコン及び窒素を含む第1領域とシリコン及び酸素を含む第2領域とを含む前記基板が前記基板支持部上に載置されている状態で、
  (a)前記ガス供給部から、処理ガスを前記チャンバ内に供給する工程と、
  (b)前記チャンバ内の前記処理ガスから生成されたプラズマを用いて、前記第2領域をエッチングする工程と、
 を実行するように構成されており、
 前記(b)は、
  (b1) 第1期間において、前記チャンバ内で前記処理ガスからプラズマを生成して該プラズマからの化学種を前記基板上に堆積させるために、前記高周波電源から第1のパワーレベルを有する前記ソース高周波信号を供給する工程と、
  (b2) 前記第1期間の後の第2期間において、前記処理ガスからプラズマを生成するために、前記高周波電源から前記第1のパワーレベルよりも低い第2のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (b3) 前記第2期間の後の第3期間において、前記処理ガスからプラズマを生成して前記第2領域をエッチングするために、前記高周波電源から前記第1のパワーレベルよりも低い第3のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (b4) 前記第3期間の後の第4の期間において、前記処理ガスから生成された前記プラズマを用いて前記第2領域を更にエッチングするために、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給する工程であり、前記ソース高周波信号のパワーレベルを前記第2のパワーレベル及び前記第3のパワーレベルよりも低い第4のパワーレベルに設定することを含む、該工程と、
 を含み、
 前記バイアス電源は、
  前記(b3)及び前記(b4)において、前記シーケンスに含まれる複数の電圧パルスの電圧レベルを実質的に一定のレベルに設定し、
  前記(b2)において、前記周期内の前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返す、
 ように構成されている、
請求項1又は2に記載のプラズマ処理装置。
Further comprising a main control unit,
the main control unit, in a state where the substrate including a first region containing silicon and nitrogen and a second region containing silicon and oxygen is placed on the substrate support unit,
(a) supplying a process gas into the chamber from the gas supply unit;
(b) etching the second region using a plasma generated from the process gas in the chamber;
is configured to run
The (b) is
(b1) providing the source radio frequency signal having a first power level from the radio frequency power source for a first time period to generate a plasma from the process gas in the chamber and deposit chemical species from the plasma on the substrate;
(b2) providing the source radio frequency signal having a second power level from the radio frequency power supply, the second power level being lower than the first power level, to generate a plasma from the process gas during a second time period after the first time period, the second power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(b3) during a third time period after the second time period, providing the source radio frequency signal having a third power level from the radio frequency power source that is lower than the first power level to generate a plasma from the process gas and etch the second region, the third power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(b4) during a fourth time period after the third time period, supplying the sequence of voltage pulses from the bias power supply to the substrate support to further etch the second region using the plasma generated from the process gas, the fourth time period including setting a power level of the source radio frequency signal to a fourth power level lower than the second power level and the third power level;
Including,
The bias power supply
In the steps (b3) and (b4), the voltage levels of the plurality of voltage pulses included in the sequence are set to a substantially constant level;
In the step (b2), the voltage levels of the plurality of voltage pulses included in the sequence within the period are increased or decreased stepwise, and the period is repeated.
It is configured as follows:
3. The plasma processing apparatus according to claim 1 or 2.
 前記バイアス電源は、前記(b2)における前記複数の電圧パルスの最大電圧レベルを、前記(b3)及び前記(b4)における前記複数の電圧パルスの前記電圧レベルよりも低いレベルに設定するように構成されている、請求項4に記載のプラズマ処理装置。 The plasma processing apparatus of claim 4, wherein the bias power supply is configured to set the maximum voltage level of the plurality of voltage pulses in (b2) to a level lower than the voltage levels of the plurality of voltage pulses in (b3) and (b4).  前記第4のパワーレベルは、ゼロである、請求項4に記載のプラズマ処理装置。 The plasma processing apparatus of claim 4, wherein the fourth power level is zero.  前記第2のパワーレベル及び前記第3のパワーレベルは、互いに同一である、請求項4に記載のプラズマ処理装置。 The plasma processing apparatus of claim 4, wherein the second power level and the third power level are identical to each other.  前記処理ガスは、前記化学種を構成する金属及び前記第2領域をエッチングするためのエッチング成分を含む、請求項4に記載のプラズマ処理装置。 The plasma processing apparatus of claim 4, wherein the processing gas contains a metal constituting the chemical species and an etching component for etching the second region.  前記主制御部は、前記(b)を繰り返すように構成されている、請求項4に記載のプラズマ処理装置。 The plasma processing apparatus of claim 4, wherein the main control unit is configured to repeat (b).  前記バイアス電源は、前記電圧パルスのデューティ比を変更可能に構成されている、請求項1又は2に記載のプラズマ処理装置。 The plasma processing apparatus of claim 1 or 2, wherein the bias power supply is configured to change the duty ratio of the voltage pulse.  プラズマ処理装置において用いられるバイアス電源であり、
  可変直流電源と、
  前記可変直流電源の出力電圧をパルス化することにより電圧パルスのシーケンスを生成するように構成されたパルス発生器と、
  前記可変直流電源及び前記パルス発生器を制御するように構成された少なくとも一つの制御部と、
 を含み、
 前記少なくとも一つの制御部は、
  前記プラズマ処理装置のチャンバ内のプラズマから該チャンバ内の基板支持部上の基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で前記電圧パルスを発生して前記シーケンスを前記基板支持部に供給するよう、前記パルス発生器を制御し、
  前記第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内で前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すために、前記可変直流電源を制御して前記出力電圧の電圧レベルを変更する、
 ように構成されている、
バイアス電源。
A bias power supply used in a plasma processing apparatus,
A variable DC power supply;
a pulse generator configured to pulse the output voltage of the variable DC power supply to generate a sequence of voltage pulses;
at least one controller configured to control the variable DC power supply and the pulse generator;
Including,
The at least one control unit
controlling the pulse generator to generate the voltage pulses at a time interval that is the inverse of a first frequency and apply the sequence to the substrate support to attract ions from a plasma in a chamber of the plasma processing apparatus to a substrate on a substrate support in the chamber;
a stepwise increase or decrease in voltage level of a plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and the voltage level of the output voltage is changed by controlling the variable DC power supply to repeat the period;
It is configured as follows:
Bias power supply.
 前記複数の電圧パルスの各々は、基準電位に対して負方向の電圧レベルを有し、前記複数の電圧パルスの各々の電圧レベルは、前記基準電位と前記電圧パルスの電位との間の差である、請求項11に記載のバイアス電源。 A bias power supply as described in claim 11, wherein each of the plurality of voltage pulses has a negative voltage level relative to a reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.  (a)プラズマ処理装置のチャンバ内に基板を準備する工程であり、該基板は、シリコン及び窒素を含む第1領域と、シリコン及び酸素を含む第2領域とを含む、該工程と、
 (b)プラズマ処理装置のチャンバ内に処理ガスを供給する工程と、
 (c)前記チャンバ内の前記処理ガスから生成されたプラズマを用いて、前記第2領域をエッチングする工程と、
を含み、
 該プラズマ処理装置は、前記プラズマから前記チャンバ内の基板支持部上の前記基板にイオンを引き込むために、第1の周波数の逆数である時間間隔で電圧パルスを発生することにより、電圧パルスのシーケンスを前記基板支持部に供給するように構成されたバイアス電源を含み、
 前記(c)は、前記第1の周波数よりも低く且つ20kHz以上100kHz以下の範囲に含まれる第2の周波数の逆数である時間長を有する周期内で前記シーケンスに含まれる複数の電圧パルスの電圧レベルを段階的に増加又は減少させ、且つ該周期を繰り返すことを含む、
プラズマ処理方法。
(a) providing a substrate in a chamber of a plasma processing apparatus, the substrate including a first region including silicon and nitrogen and a second region including silicon and oxygen;
(b) supplying a processing gas into a chamber of the plasma processing device;
(c) etching the second region using a plasma generated from the process gas in the chamber;
Including,
The plasma processing apparatus includes a bias power supply configured to supply a sequence of voltage pulses to the substrate support by generating voltage pulses at a time interval that is the inverse of a first frequency to draw ions from the plasma to the substrate on the substrate support within the chamber;
(c) includes increasing or decreasing stepwise the voltage levels of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency that is lower than the first frequency and is included in a range of 20 kHz to 100 kHz, and repeating the period.
Plasma treatment method.
 前記プラズマ処理装置は、前記処理ガスからプラズマを生成するためにソース高周波信号を供給するように構成された高周波電源を備え、
 前記(c)は、
  (c1) 第1期間において前記チャンバ内で前記処理ガスからプラズマを生成して前記基板上に前記プラズマからの化学種を堆積させるために、前記高周波電源から第1のパワーレベルを有する前記ソース高周波信号を供給する工程と、
  (c2) 前記第1期間の後の第2期間において、前記処理ガスからプラズマを生成するために、前記高周波電源から前記第1のパワーレベルよりも低い第2のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (c3) 前記第2期間の後の第3期間において、前記処理ガスからプラズマを生成して前記第2領域をエッチングするために、前記高周波電源から前記第1のパワーレベルよりも低い第3のパワーレベルを有する前記ソース高周波信号を供給する工程であり、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給することを含む、該工程と、
  (c4) 前記第3期間の後の第4の期間において、前記処理ガスから生成された前記プラズマを用いて前記第2領域を更にエッチングするために、前記バイアス電源から前記基板支持部に前記電圧パルスの前記シーケンスを供給する工程であり、前記ソース高周波信号のパワーレベルを前記第2のパワーレベル及び前記第3のパワーレベルよりも低い第4のパワーレベルに設定することを含む、該工程と、
 を含み、
 前記(c3)及び前記(c4)において、前記シーケンスに含まれる複数の電圧パルスの電圧レベルを実質的に一定のレベルに設定し、
 前記(c2)において、前記周期内の前記シーケンスに含まれる前記複数の電圧パルスの電圧レベルが段階的に増加又は減少され、且つ該周期が繰り返される、
請求項13に記載のプラズマ処理方法。
the plasma processing apparatus includes a radio frequency power supply configured to provide a source radio frequency signal to generate a plasma from the process gas;
The (c) is
(c1) providing the source radio frequency signal having a first power level from the radio frequency power source to generate a plasma from the process gas in the chamber for a first time period and deposit chemical species from the plasma on the substrate;
(c2) providing the source radio frequency signal having a second power level lower than the first power level from the radio frequency power supply to generate a plasma from the process gas during a second time period after the first time period, the second power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(c3) during a third time period after the second time period, providing the source radio frequency signal having a third power level from the radio frequency power source that is lower than the first power level to generate a plasma from the process gas and etch the second region, the third power level including providing the sequence of voltage pulses to the substrate support from the bias power supply;
(c4) during a fourth time period after the third time period, supplying the sequence of voltage pulses from the bias power supply to the substrate support to further etch the second region using the plasma generated from the process gas, the fourth time period including setting a power level of the source radio frequency signal to a fourth power level lower than the second power level and the third power level;
Including,
In the steps (c3) and (c4), the voltage levels of the plurality of voltage pulses included in the sequence are set to a substantially constant level;
In (c2), the voltage levels of the plurality of voltage pulses included in the sequence within the period are increased or decreased stepwise, and the period is repeated.
The plasma processing method according to claim 13 .
 前記(c2)における前記複数の電圧パルスの最大電圧レベルは、前記(c3)及び前記(c4)における前記複数の電圧パルスの前記電圧レベルよりも低い、請求項14に記載のプラズマ処理方法。 The plasma processing method of claim 14, wherein the maximum voltage level of the plurality of voltage pulses in (c2) is lower than the voltage levels of the plurality of voltage pulses in (c3) and (c4).  前記第4のパワーレベルは、ゼロである、請求項14又は15に記載のプラズマ処理方法。 The plasma processing method of claim 14 or 15, wherein the fourth power level is zero.  前記第2のパワーレベル及び前記第3のパワーレベルは、互いに同一である、請求項14又は15に記載のプラズマ処理方法。 The plasma processing method of claim 14 or 15, wherein the second power level and the third power level are the same.  前記処理ガスは、前記化学種を構成する金属及び前記第2領域をエッチングするためのエッチング成分を含む、請求項14又は15に記載のプラズマ処理方法。 The plasma processing method according to claim 14 or 15, wherein the processing gas contains a metal constituting the chemical species and an etching component for etching the second region.  前記(c)が繰り返される、請求項13~15のいずれか一項に記載のプラズマ処理方法。 The plasma processing method described in any one of claims 13 to 15, wherein (c) is repeated.
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