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WO2025196630A1 - Systèmes et procédés de protection d'un dispositif contre des commutateurs défectueux - Google Patents

Systèmes et procédés de protection d'un dispositif contre des commutateurs défectueux

Info

Publication number
WO2025196630A1
WO2025196630A1 PCT/IB2025/052814 IB2025052814W WO2025196630A1 WO 2025196630 A1 WO2025196630 A1 WO 2025196630A1 IB 2025052814 W IB2025052814 W IB 2025052814W WO 2025196630 A1 WO2025196630 A1 WO 2025196630A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
boot
energy storage
storage unit
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/IB2025/052814
Other languages
English (en)
Inventor
Vishal TYAGI
Rami Reddy
Mutum Meenakshi DEVI
Brindha T
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Mobility Pte Ltd
Original Assignee
Sun Mobility Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Mobility Pte Ltd filed Critical Sun Mobility Pte Ltd
Publication of WO2025196630A1 publication Critical patent/WO2025196630A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/08122—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/18—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for batteries; for accumulators

Definitions

  • Embodiments disclosed herein relate to protecting devices against faulty switches and more particularly to systems and methods for safeguarding devices against deep discharge events caused by faulty boot-up switches.
  • Energy storage units (such as battery packs) are essential components in various electronic devices, providing the necessary power for functionality.
  • a Battery Management System configured within the energy storage units and/or the devices plays a crucial role.
  • the BMS activates a sleep mode preventing power discharge and effectively conserving power. This intelligent feature prolongs the life of the energy storage unit and ensures optimal performance when the electronic device is in operation.
  • a key element in waking the energy storage unit from sleep mode is a wake-up switch or boot-up switch integrated into the energy storage unit.
  • This switch serves as the interface between the device, and the energy storage unit, allowing for seamless activation of the energy storage unit when required for operation or testing.
  • the energy storage unit Upon engaging the boot-up switch, the energy storage unit promptly responds by transitioning from an inactive state to an active state, ready to deliver power to the electronic device.
  • the principal object of embodiments herein is to disclose systems and methods for safeguarding devices against deep discharge events caused by faulty boot-up switches.
  • FIG. 1 is a block diagram depicting a system for safeguarding devices against faulty switches, according to embodiments as disclosed herein;
  • FIGs. 2 A, and 2B depict an example block diagram depicting the flow of current in a switch, according to embodiments as disclosed herein;
  • FIG. 3 depicts the inhibit circuit, according to embodiments as disclosed herein;
  • FIG. 4 is a flowchart depicting the process of managing the activation of the energy storage unit using boot-up switches, according to embodiments as disclosed herein;
  • FIG. 5 is a flowchart depicting the process of safeguarding devices against deep discharge events caused by faulty boot-up switches, according to embodiments as disclosed herein.
  • Embodiments herein may be described and illustrated in terms of blocks which carry out a described function or functions. These blocks, which may be referred to herein as managers, units, modules, hardware components or the like, are physically implemented by analog and/or digital circuits such as logic gates, integrated circuits, microprocessors, microcontrollers, memory circuits, passive electronic components, active electronic components, optical components, hardwired circuits and the like, and may optionally be driven by a firmware.
  • the circuits may, for example, be embodied in one or more semiconductor chips, or on substrate supports such as printed circuit boards and the like.
  • circuits constituting a block may be implemented by dedicated hardware, or by a processor (e.g., one or more programmed microprocessors and associated circuitry), or by a combination of dedicated hardware to perform some functions of the block and a processor to perform other functions of the block.
  • a processor e.g., one or more programmed microprocessors and associated circuitry
  • Each block of the embodiments may be physically separated into two or more interacting and discrete blocks without departing from the scope of the disclosure.
  • the blocks of the embodiments may be physically combined into more complex blocks without departing from the scope of the disclosure.
  • a Battery Management System serves as an electronic control system tasked with monitoring and regulating the charging and discharging processes of an energy storage unit.
  • the BMS can shield the energy storage unit from deep discharge, by activating a shutdown mode when the energy storage unit is inactive, thereby preventing unnecessary drainage of the energy storage unit.
  • the energy storage unit is in sleep/shutdown mode (i.e., inactive)
  • users of the electronic device can revive the energy storage unit (i.e., make the energy storage unit active) by simply engaging a user interface switch (hereinafter referred to as the boot-up switch, the switch, and so on, interchangeably).
  • This switch can act as the interface between the user and the energy storage unit, facilitating activation of the energy storage unit, when required for operation.
  • the boot-up switch can enable completion of a power path from the energy storage unit to the BMS.
  • Embodiments herein implement robust mechanisms to ensure the accurate operation of the boot-up switch, safeguarding against potential damage and optimizing overall system performance.
  • the boot-up switch can be connected to an inhibit circuit.
  • the inhibit circuit can accept and press the switch action for a first period of time, allowing a power path to latch, and activate all electronics for proper functioning of the BMS. If the switch is pressed for at least a second period of time, the inhibit circuit can detach the switch action from the power path, allowing the BMS to become a master in disabling the power path as needed to enter sleep/shutdown. If the boot-up switch is shorted, the BMS controller can identify the issue, generate alerts, and communicate with the user or system owner for corrective measures. This implementation can help extend the lifespan of the energy storage unit by minimizing instances of deep discharge, which can lead to irreversible damage to the battery cells over time.
  • FIG. 1 is a block diagram depicting a system and method for safeguarding devices against faulty switches.
  • the system includes an energy storage unit 100, wherein the energy storage unit 100 has a plurality of power cells 104 coupled to a battery management system (BMS) 102.
  • BMS battery management system
  • the battery management system (BMS) 102 can comprise a boot-up switch 106, wherein the boot-up switch 106 is coupled with an inhibit circuit 110, and a fault detection unit 108.
  • the inhibit circuit 110 can allow power from the power cells 104 to reach one or more electronic components of the energy storage unit 100, through the BMS 102 for the first time period (as depicted in FIG. 2A). During this first time period, power can be transferred from the boot-up switch 106 to the power control switch 116 through the inhibit circuit 110. Once the power control switch 116 is awake, the power control switch 116 can draw power directly from the power cell(s) 104 bypassing the boot-up switch 106 (as depicted in FIG. 2B), wherein the power cell(s) 104 can supply continuous power to the other integrated circuits 120 of the energy storage unit 100 through the power supply unit 118. Based on the inactivity of the energy storage unit, the BMS 102 can activate the sleep/shutdown of the energy storage unit 100.
  • the fault detection unit 108 can detect and communicate anomalies (if any) in the boot-up switch 106.
  • the fault detection unit 108 can include a microcontroller unit (MCU) 112, and a plurality of sensors 114, wherein the fault detection unit 108 can continuously monitor the status of the boot-up switch 106 for any anomalies which can prevent the energy storage unit 100 from entering sleep/shutdown (i.e., becoming inactive).
  • the MCU 112 can control the switch 106 based on data provided by the plurality of sensors 114.
  • the sensors 114 can be integrated with the switch 106.
  • the sensors 114 can be placed in proximity to the switch 106, so as to enable the MCU 112 to monitor the switch 106 accurately, and generate sensor data.
  • the sensors 114 can include, but not limited to, at least one pressure sensor, at least one proximity sensor, at least one voltage sensor, at least one current sensor, at least one temperature sensor alone or in combination and other types of switches for redundancy.
  • the fault detection unit 108 can include a database or memory storage containing predefined fault conditions and their corresponding identification codes or descriptions. This database can be accessible by the microcontroller unit 112 for reference during fault detection and identification.
  • the system 100 can further include an alerting mechanism for alerting the operator or user about detected faults in the boot-up switch 106.
  • the BMS 102 can manage the overall health and operation of the energy storage unit 100.
  • the MCU 112 can be integrated with the BMS 102.
  • the MCU 112 and the BMS 102 can be a separate module.
  • the MCU 112 on detecting at least one anomaly in the boot-up switch 106, the MCU 112 can notify the BMS 102 to activate the protection mode.
  • a timer circuit can be used to control the duration for which the power is allowed to flow from the power cell(s) 104 to the electronic components, after the boot-up switch 106 is operated.
  • the timer circuit can be placed at control of the input supply path.
  • the inhibit circuit 110 can safeguard devices against faulty switches, wherein the energy storage unit 100 can enter sleep/shutdown during inactivity, even in the presence of a damaged switch. In other words, the inhibit circuit 110 can override the malfunctioning switch, prevent deep discharge, and prioritize the safety of the energy storage unit and the system. The inhibit circuit 110 can override the malfunctioning switch by isolating the impact of the damaged switch on the control circuitry of the input supply of the BMS, thereby making the control circuit work as intended even with the damaged switch.
  • the boot-up switch 106 can be engaged by the operator by pressing the switch 106.
  • the inhibit circuit 110 is then activated, allowing power to flow from the power cells 104 of the energy storage unit 100 to the power control switch 112, via the inhibit circuit 110.
  • the inhibit circuit 110 can control the duration for which the boot-up switch 106 is active (i.e., the first period of time), ensuring that the power control switch 112 is only energized for the first period of time.
  • the first period of time can be of a auitable value, such as, but not limited to, 300ms, 400ms, 500ms, 600ms, 700ms, and so on.
  • the power control switch 112 can draw power directly from the power cells 104 of the energy storage unit 100, and supply the power to the integrated circuits 120 of the energy storage unit 100 through the power control unit 118.
  • the fault detection unit 108 can continuously monitor the status of the boot-up switch 106 using the sensors 114, and the MCU 112.
  • the sensors 114 can sense at least one parameter of the boot-up switch 106, and can sent the sensed at least one parameter to the MCU 112 for further processing.
  • the MCU 112 can further compare the sensed data with one or more preloaded fault conditions stored in a fault database (not shown) to accurately identify the specific fault in the boot-up switch 106.
  • the microcontroller unit 112 can initiate the fault detection process. Upon identifying the fault, the MCU 112 can trigger at least one alert to the operator (using at least one of an audio and/or visual means, such as, but not limited to, a speaker, a microphone, a display, a touchscreen, one or more indicator lights, and so on), providing information about the issue detected in the boot-up switch 106. Additionally, the MCU 112 can notify the BMS 102 to activate the protection mode, putting the energy storage unit into a safe state to prevent any potential damage or hazards associated with the fault in the boot-up switch 106.
  • an audio and/or visual means such as, but not limited to, a speaker, a microphone, a display, a touchscreen, one or more indicator lights, and so on
  • FIG. 3 depicts the inhibit circuit.
  • the inhibit circuit 110 can be a resister and capacitor network, wherein the resistor R1 110A, and the capacitor Cl 110B are connected in series.
  • FIG. 4 is a flowchart depicting the process of managing the activation of the energy storage unit using boot-up switches.
  • the operator engages the boot-up switch 106 by pressing the switch 106.
  • the inhibit circuit 110 is activated, allowing power to flow from the power cells 104 of the energy storage unit 100 to the power control switch 112, via the inhibit circuit 110 for the first period of time.
  • the power control switch 112 draws power directly from the power cells 104 of the energy storage unit 100, and supplies the power to the integrated circuits 120 of the energy storage unit 100 through the power control unit 118.
  • the various actions in method 400 may be performed in the order presented, in a different order or simultaneously. Further, in some embodiments, some actions listed in FIG. 4 may be omitted.
  • FIG. 5 is a flowchart depicting the process of safeguarding devices against deep discharge events caused by faulty boot-up switches.
  • the fault detection unit 108 continuously monitors the status of the boot-up switch 106 using the sensors 114, and the MCU 112, wherein the sensors 114 senses at least one parameter of the boot-up switch 106, and sends the sensed at least one parameter to the MCU 112 for further processing.
  • the MCU 112 checks if the boot-up switch 106 is activated beyond the first period of time (thereby indicating a fault).
  • step 503 the MCU 112 triggers at least one alert to the operator, and provides information about the issue detected in the boot-up switch 106. Additionally, in step 504, the MCU 112 notifies the BMS 102 to activate the protection mode, putting the energy storage unit into a safe state to prevent any potential damage or hazards associated with the fault in the boot-up switch 106.
  • the various actions in method 500 may be performed in the order presented, in a different order or simultaneously. Further, in some embodiments, some actions listed in FIG. 5 may be omitted.
  • the inhibit circuit 110 can ensure that power is supplied to the boot-up switch 106 only when necessary, minimizing energy consumption and potential risks associated with prolonged activation.
  • the timely supply of power to the boot-up switch 106 through the inhibit circuit 110 can ensure efficient and controlled operation, optimizing the overall performance and reliability of the system.
  • the system 100 ensures that the battery is promptly disconnected from the faulty circuit in the event of a switch shorting failure. This prevents deep discharge, which can be detrimental to battery health and longevity.
  • Embodiments herein incorporate an inhibit circuit that allows power to flow from the energy storage unit to the system for a limited time.
  • Embodiments herein incorporate a boot-up switch fault detection unit 108 that continuously monitors the status of the boot-up switch.
  • Embodiments herein enable intelligent decision-making by comparing recorded values to predetermined thresholds, identifying anomalies indicative of switch shorting failures.
  • Embodiments herein can promptly alert users or system administrators in the event of a switch shorting failure.
  • Embodiments herein can take appropriate timely actions based on the severity of the detected switch shorting anomaly and the system's configuration.
  • Embodiments herein can ensure the proper functioning of switches and their ability to trigger protection mode when necessary, maintaining overall system responsiveness to potential switch failures. Embodiments herein can significantly enhance the safety and performance of energy storage units, reducing the risk of battery damage, safety hazards, and system downtime.
  • the embodiments disclosed herein can be implemented through at least one software program running on at least one hardware device and performing network management functions to control the network elements.
  • the elements include blocks which can be at least one of a hardware device, or a combination of hardware device and software module.
  • the device may also include means which could be e.g., hardware means like e.g., an ASIC, or a combination of hardware and software means, e.g., an ASIC and an FPGA, or at least one microprocessor and at least one memory with software modules located therein.
  • the method embodiments described herein could be implemented partly in hardware and partly in software.
  • the invention may be implemented on different hardware devices, e.g., using a plurality of CPUs.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Power Sources (AREA)

Abstract

Des modes de réalisation de la présente invention concernent un système et un procédé de sauvegarde de dispositifs contre des événements de décharge profonde provoqués par des commutateurs de démarrage défectueux. Le système comprend une unité de stockage d'énergie connectée à un système de gestion de batterie (BMS), le BMS comprenant un commutateur de démarrage, un circuit d'inhibition et une unité de détection de défaut. Le circuit d'inhibition permet à l'électricité provenant de l'unité de stockage d'énergie d'atteindre un ou plusieurs composants électroniques pendant une première période suite à l'enclenchement du commutateur de démarrage. L'unité de détection de défaut surveille en continu l'état du commutateur de démarrage. Si le commutateur de démarrage est activé au-delà de la première période (indiquant ainsi une défaillance), un mode de protection peut être activé ou une alerte adressée à un opérateur peut être déclenchée.
PCT/IB2025/052814 2024-03-19 2025-03-18 Systèmes et procédés de protection d'un dispositif contre des commutateurs défectueux Pending WO2025196630A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN202441020438 2024-03-19
IN202441020438 2024-03-19

Publications (1)

Publication Number Publication Date
WO2025196630A1 true WO2025196630A1 (fr) 2025-09-25

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Country Link
WO (1) WO2025196630A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130285638A1 (en) * 2012-04-28 2013-10-31 Hon Hai Precision Industry Co., Ltd. Wake-up circuit and electronic device
US20170361791A1 (en) * 2016-06-16 2017-12-21 Hyundai Motor Company Battery management system of vehicle
US20200052346A1 (en) * 2017-11-07 2020-02-13 Lg Chem, Ltd. Bms wake-up device, and bms and battery pack including same
CN211183399U (zh) * 2019-12-31 2020-08-04 深圳市锐创新科技有限公司 电池保护器及唤醒电路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130285638A1 (en) * 2012-04-28 2013-10-31 Hon Hai Precision Industry Co., Ltd. Wake-up circuit and electronic device
US20170361791A1 (en) * 2016-06-16 2017-12-21 Hyundai Motor Company Battery management system of vehicle
US20200052346A1 (en) * 2017-11-07 2020-02-13 Lg Chem, Ltd. Bms wake-up device, and bms and battery pack including same
CN211183399U (zh) * 2019-12-31 2020-08-04 深圳市锐创新科技有限公司 电池保护器及唤醒电路

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