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WO2025188389A2 - Systèmes et procédés d'optimisation par réduction itérative d'énergie dans un processeur quantique - Google Patents

Systèmes et procédés d'optimisation par réduction itérative d'énergie dans un processeur quantique

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Publication number
WO2025188389A2
WO2025188389A2 PCT/US2024/060597 US2024060597W WO2025188389A2 WO 2025188389 A2 WO2025188389 A2 WO 2025188389A2 US 2024060597 W US2024060597 W US 2024060597W WO 2025188389 A2 WO2025188389 A2 WO 2025188389A2
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quantum
storage devices
qubits
controllable storage
quantum processor
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WO2025188389A8 (fr
WO2025188389A3 (fr
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Mohammad H. Amin
Emile M. Hoskinson
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1372934 BC Ltd
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1372934 BC Ltd
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Publication of WO2025188389A3 publication Critical patent/WO2025188389A3/fr
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/60—Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70—Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation

Definitions

  • This disclosure generally relates to systems and methods to obtain an optimized solution to a problem using a quantum processor, and more particularly, to systems and methods to obtain an optimized solution through use of an iterative protocol to reduce an amount of residual energy of a quantum processor.
  • Quantum devices are structures in which quantum mechanical effects are observable. Quantum devices include circuits in which current transport is dominated by quantum mechanical effects. Such devices include spintronics, and superconducting circuits. Both spin and superconductivity are quantum mechanical phenomena. Quantum devices can be used as measurement instruments, in computing machinery, and the like.
  • a quantum computer is a system that makes direct use of at least one quantum-mechanical phenomenon, such as superposition, tunneling, and entanglement, to perform operations on data.
  • the elements of a quantum computer are qubits.
  • Quantum computers can provide speedup for certain classes of computational problems such as computational problems simulating quantum physics.
  • Superconducting qubits are solid state qubits based on circuits of superconducting materials. Operation of superconducting qubits is based on the underlying principles of magnetic flux quantization, and Josephson tunneling. Superconducting effects can be present in different configurations, and can give rise to different types of superconducting qubits including flux, phase, charge, and hybrid qubits. The different configurations can vary in the topology of the loops, the placement of the Josephson junctions, and the physical parameters of elements of the superconducting circuits, such as inductance, capacitance, and Josephson junction critical current.
  • a hybrid computing system can include a digital computer communicatively coupled to a quantum computer.
  • the quantum computer is an analog computer
  • the digital computer is a classical computer.
  • the digital computer can include a digital processor that can be used to perform classical digital processing tasks described in the present systems and methods.
  • the digital computer can include at least one system memory which can be used to store various sets of computer- or processor-readable instructions, application programs and/or data.
  • the quantum computer can include a quantum processor that includes programmable elements such as qubits, couplers, and other devices.
  • the qubits can be read out via a control system, and the results communicated to the digital computer.
  • the qubits and the couplers can be controlled by a qubit control system and a coupler control system, respectively.
  • the qubit and the coupler control systems can be used to implement quantum annealing or gate model quantum computing on the quantum computer.
  • a quantum processor may take the form of a superconducting quantum processor.
  • a superconducting quantum processor may include a number of superconducting qubits and associated local bias devices.
  • a superconducting quantum processor may also include couplers (also known as coupling devices) that selectively provide communicative coupling between qubits.
  • the superconducting qubit includes a superconducting loop interrupted by a Josephson junction.
  • the ratio of the inductance of the Josephson junction to the geometric inductance of the superconducting loop can be expressed as 2p/_/c/Fo (where L is the geometric inductance, /c is the critical current of the Josephson junction, and Fo is the flux quantum).
  • the inductance and the critical current can be selected, adjusted, or tuned, to increase the ratio of the inductance of the Josephson junction to the geometric inductance of the superconducting loop, and to cause the qubit to be operable as a bistable device.
  • the ratio of the inductance of the Josephson junction to the geometric inductance of the superconducting loop of a qubit is approximately equal to three.
  • the superconducting coupler includes a superconducting loop interrupted by a Josephson junction.
  • the inductance and the critical current can be selected, adjusted, or tuned, to decrease the ratio of the inductance of the Josephson junction to the geometric inductance of the superconducting loop, and to cause the coupler to be operable as a monostable device.
  • the ratio of the inductance of the Josephson junction to the geometric inductance of the superconducting loop of a coupler is approximately equal to, or less than, one.
  • a Hamiltonian is an operator whose eigenvalues are the allowed energies of the system.
  • Adiabatic quantum computation can include evolving a system from an initial Hamiltonian to a final Hamiltonian by a gradual change.
  • One example of adiabatic evolution is a linear interpolation between the initial Hamiltonian Hi and the final Hamiltonian H f , as follows:
  • H e (l - s)Hi + sH f
  • H e is the evolution, or instantaneous, Hamiltonian
  • s is an evolution coefficient that can control the rate of evolution.
  • the evolution coefficient s changes value from 0 to 1.
  • the evolution Hamiltonian H e is equal to the initial Hamiltonian Hi
  • the evolution Hamiltonian H e is equal to the final Hamiltonian H f .
  • the system is typically initialized in a ground state of the initial Hamiltonian H and the goal of the adiabatic evolution is to evolve the system such that it ends up in a ground state of the final Hamiltonian H f at the end of the evolution. If the evolution is too fast, then the system can transition to a higher energy state of the system, such as the first excited state.
  • An adiabatic evolution is an evolution that satisfies an adiabatic condition such as: s
  • s is the time derivative of s
  • g(s) is the difference in energy between the ground state and first excited state of the system (also referred to herein as the gap size) as a function of s
  • 6 is a coefficient and 6 « 1.
  • Quantum annealing is a computational method that may be used to find a low-energy state of a system, typically preferably the ground state of the system. Similar in concept to classical simulated annealing, the method relies on the underlying principle that natural systems tend towards lower energy states because lower energy states are more stable. While classical annealing uses classical thermal fluctuations to guide a system to a low-energy state, quantum annealing may use quantum effects, such as quantum tunneling, as a source of delocalization to reach an energy minimum more accurately and/or more quickly than classical annealing.
  • a quantum processor may be designed to perform quantum annealing and/or adiabatic quantum computation.
  • An evolution Hamiltonian can be constructed that is proportional to the sum of a first term proportional to a problem Hamiltonian and a second term proportional to a delocalization Hamiltonian, as follows:
  • H E O A(t)H P + B(t)H D
  • H E is the evolution Hamiltonian
  • H P is the problem Hamiltonian
  • H D is the delocalization Hamiltonian
  • A(t),B(t) are coefficients that can control the rate of evolution, and typically lie in the range [0,1]
  • a time varying envelope function can be placed on the problem Hamiltonian.
  • a suitable delocalization Hamiltonian is given by: where N represents the number of qubits, is the Pauli x-matrix for the i th qubit and is the single qubit tunnel splitting induced in the i th qubit.
  • N represents the number of qubits
  • the Pauli x-matrix for the i th qubit is the single qubit tunnel splitting induced in the i th qubit.
  • the of terms are examples of “off-diagonal” terms.
  • a common problem Hamiltonian includes a first component proportional to diagonal single qubit terms and a second component proportional to diagonal multi-qubit terms, and may be of the following form: where N represents the number of qubits, of is the Pauli z-matrix for the i th qubit, are dimensionless local fields for the qubits, and couplings between qubits, and E is some characteristic energy scale for H P .
  • the of and of of terms are examples of “diagonal” terms.
  • the former is a single qubit term and the latter a two qubit term.
  • problem Hamiltonian and “final Hamiltonian” are used interchangeably unless the context dictates otherwise.
  • Certain states of the quantum processor are energetically preferred, or simply preferred, by the problem Hamiltonian. These include the ground states but may include excited states.
  • a quantum flux parametron is a superconducting Josephson junction device similar in some respects to a compound radio frequency- superconducting quantum interference device (rf-SQUID).
  • rf-SQUID radio frequency- superconducting quantum interference device
  • a particular potential energy curve may be generated with a QFP device. This potential energy curve may resemble a “W’ where the central peak or “barrier” is adjustable in height, as are the independent depths of the two wells on either side of the central barrier.
  • the word “quantum” appears in the name of the QFP device, the device is generally operated in a classical manner. In short, quickly raising the height of the central barrier is classically believed to greatly disrupt the energy configuration of the system.
  • damping resistors are traditionally incorporated into the QFP circuit to help dissipate energy and return the system to a stable energy configuration. These damping resistors dissipate excess energy in the form of heat, a process that can have negative effects on any system that is particularly sensitive to thermal noise.
  • conventional QFP circuits are typically unsuitable for use with devices that are sensitive to thermal noise, such as the elements of a superconducting quantum processor.
  • an optimized solution (not necessarily the optimal solution) may be a solution for which the state of the quantum processor has a lowest associated energy.
  • an amount of residual energy of the quantum processor can be reduced to reduce a distance between a determined solution and an optimized solution or best solution. Iteratively performing a combination of reverse and forward annealing can respectively cause coherent population transfer and energy reduction in the quantum processor, which allows the processor to seek lower energy solutions.
  • the benefits of energy reduction via forward quantum annealing may be limited due to coupling of the thermal environment to the quantum processor in some magnetic states; readout and programing of the quantum processor at each iteration may be inefficient; and, the quantum processor may become stuck in a local minimum during its search for the lowest energy solution.
  • An amount of energy of a solution determined by the quantum processor can be reduced through use of an iterative process, in which the magnetic phase of the quantum processor is strategically controlled during reverse and forward annealing to limit undesirable thermal effects.
  • the annealing schedules of the quantum processor can be controlled by an augmented Hamiltonian having a term to raise energies of subsequent states, reducing likelihood of returning to a sub-optimal solution.
  • the quantum processor is advantageously biased by on-chip controllable devices having a memory to reduce readout and programming overhead.
  • a method to obtain an optimized solution to a problem using a quantum processor comprising a plurality of qubits that includes a first subset qubits, in which each qubit of the first subset of qubits is coupled to a respective controllable storage device of a plurality of controllable storage devices.
  • the method comprises performing an iterative protocol until one or more exit criteria are met, comprising: biasing the plurality of controllable storage devices to bias the first subset of qubits, such that the plurality of controllable storage devices store a set of reference states therein corresponding to a low-energy state of the quantum processor, and the set of reference states are a previously obtained set of states of the first subset of qubits; causing the quantum processor to perform reverse quantum annealing and undergo a coherent population transfer; causing the quantum processor to perform forward quantum annealing to undergo an energy reduction when transitioning through a spin-glass phase and cause the first subset of qubits to evolve to a set of updated states; and, storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states, in which the set of updated states to be used as the set of reference states in a next iteration of the iterative protocol.
  • the method comprises returning the set of updated states stored in the plurality of controllable storage devices after the one or more exit criteria are met as the optimized solution to the problem.
  • the method before the performing the iterative protocol, the method comprises: causing the quantum processor to perform an initial instance of forward annealing to obtain an initial low-energy solution to the problem, in which the initial low-energy solution to the problem comprises an initial set of reference states; and, storing the initial set of the reference states in the plurality of controllable storage devices coupled to the first subset of qubits.
  • the storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states comprises: loading an updated state of the set of updated states from each qubit of the first subset of qubits into a respectively coupled controllable storage device of the plurality of controllable storage devices; and, latching the plurality of controllable storage devices to continuously output and store the set of updated states for a subsequent iteration of the iterative protocol.
  • the biasing the plurality of controllable storage devices increases a longitudinal field energy
  • the causing the quantum processor to perform reverse quantum annealing increases a transverse field energy
  • the causing the quantum processor to perform forward quantum annealing reduces the transverse field energy.
  • the storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states occurs when the transverse field energy and the longitudinal field energy have reduced to minimum values.
  • the plurality of controllable storage devices is a plurality of source radio frequency-superconducting quantum interference devices (rf-SQUIDs), and each source rf-SQUID comprising a respective Josephson structure.
  • the biasing the plurality of controllable storage devices comprises applying bias signals to the Josephson structures of the plurality of source rf- SQUIDs, and the storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states comprises loading and latching the set of updated states into the plurality of source rf-SQUIDs.
  • the Josephson structures of the plurality of source rf-SQUIDs each have a respective barrier height that is sufficiently high to maintain bistable states at an onset of each iteration of the iterative protocol.
  • the applying bias signals to the Josephson structures of the plurality of source rf-SQUIDs comprises increasing the barrier heights of the Josephson structures.
  • the loading and latching the set of updated states into the plurality of source rf-SQUIDs comprises: reducing the barrier heights of the Josephson structures to set the Josephson structures to monostable states and clear the set of reference states, and increasing the barrier heights of the Josephson structures to latch the plurality of controllable storage devices to store the set of updated states of the first subset of qubits.
  • the plurality of qubits further comprises a second subset of qubits, and each qubit of the second subset of qubits is communicatively coupled to a respective qubit of the first subset of qubits by a respective tunable coupler of a plurality of tunable couplers.
  • Each controllable storage device of the plurality of controllable storage devices is one qubit of the second subset of qubits, and each qubit of the second subset of qubits comprises a respective compound-compound Josephson junction (CCJJ).
  • the biasing the plurality of controllable storage devices comprises applying bias signals to the CCJJs of the second subset of qubits.
  • the storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states comprises loading and latching the set of updated states into the second subset of qubits.
  • the method comprises modifying coupling strengths of the plurality of tunable couplers.
  • each controllable storage device of the plurality of controllable storage devices is one of a plurality of source quantum flux parametrons (QFPs), and each source QFP comprises a respective compound Josephson junction (CJJ).
  • the biasing the plurality of controllable storage devices comprises applying bias signals to the CJJs of the plurality of source QFPs.
  • the storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states comprises loading and latching the set of updated states into the plurality of source QFPs.
  • each controllable storage device of the plurality of controllable storage devices is communicatively coupled to a respective shift register stage of a superconducting shift register.
  • the returning the set of updated states stored in the plurality of controllable storage devices after the one or more exit criteria are met as the optimized solution to the problem comprises: transmitting the set of updated states stored in the plurality of controllable storage devices to shift register stages in the superconducting shift register; propagating the set of updated states along the superconducting shift register; and, transmitting the set of updated states to a digital computer as the optimized solution to the problem.
  • the performing an iterative protocol until one or more exit criteria are met comprises performing the iterative protocol until one or more of: an amount of residual energy of the quantum processor has fallen below a threshold; the residual energy of the quantum processor has saturated; the iterative protocol has been performed for a fixed amount of time; and, the iterative protocol has been performed for a fixed number of iterations.
  • the biasing the plurality of controllable storage devices comprises: applying bias signals to the plurality of controllable storage devices to transition the quantum processor from the spin-glass phase to a localized paramagnetic phase.
  • the causing the quantum processor to perform reverse quantum annealing and undergo a coherent population transfer comprises: transitioning the quantum processor from the localized paramagnetic phase into a delocalized paramagnetic phase.
  • the method further comprises: modifying bias signals applied to the plurality of controllable storage devices, such that the modifying bias signals occurs simultaneously with the causing the quantum processor to perform forward quantum annealing.
  • the causing the quantum processor to perform forward quantum annealing comprises causing the quantum processor to perform forward annealing until a point at which the quantum processor is in the spin-glass phase.
  • simultaneously causing the quantum processor to perform forward quantum annealing and modifying bias signals applied to the plurality of controllable storage devices proportionally reduces a longitudinal field energy and a transverse field energy comprises: causing the quantum processor to perform forward quantum annealing until a point at which the transverse field energy and the longitudinal field energy have reduced to minimum values.
  • the biasing the plurality of controllable storage devices comprises: applying bias signals to the plurality of controllable storage devices corresponding to qubit biases of a reference Hamiltonian.
  • the modifying bias signals applied to the plurality of controllable storage devices while causing the quantum processor to perform forward quantum annealing comprises: applying bias signals to the plurality of controllable storage devices corresponding to qubit biases of the reference Hamiltonian.
  • the biasing the plurality of controllable storage devices comprises: applying bias signals to bias the plurality of controllable storage devices such that the quantum processor is in a localized paramagnetic phase, and fixing biases of the plurality of controllable storage devices.
  • the causing the quantum processor to perform reverse quantum annealing and undergo a coherent population transfer comprises: transitioning the quantum processor from the localized paramagnetic phase into the delocalized paramagnetic phase.
  • the causing the quantum processor to perform forward quantum annealing to transition to a spin-glass phase and cause the first subset of qubits to evolve to a set of updated states comprises: transitioning the quantum processor from a delocalized paramagnetic phase through the spin-glass phase into the localized paramagnetic phase.
  • the applying bias signals to the plurality of controllable storage devices such that the quantum processor is in a localized paramagnetic phase modifies a longitudinal field energy of the quantum processor.
  • the fixing the biases of the plurality of controllable storage devices comprises: fixing the longitudinal field energy of the quantum processor throughout the causing the quantum processor to perform reverse quantum annealing and the causing the quantum processor to perform forward quantum annealing.
  • the biasing the plurality of controllable storage devices comprises: applying bias signals to the plurality of controllable storage devices corresponding to a combination of qubit biases of a reference Hamiltonian and qubit biases of a problem Hamiltonian.
  • the storing the set of updated states in the plurality of controllable storage devices to replace the set of reference states comprises: reducing a longitudinal field energy of the quantum processor through application of bias signals to the plurality of controllable storage devices to unlatch the set of reference states therefrom.
  • the biasing the plurality of controllable storage devices to bias the first subset of qubits comprises one of: biasing the first subset of qubits based on a set of reference states stored in the plurality of controllable storage devices corresponding to a global ground state of the quantum processor, or biasing the first subset of qubits based on a set of reference states stored in the plurality of controllable storage devices corresponding to a local minimum of the quantum processor.
  • a method to obtain an optimized solution to a problem using a quantum processor communicatively coupled to a digital processor is arranged in a quantum computer and comprises a plurality of qubits that includes a first subset of qubits, and each qubit of the first subset of qubits is coupled to a respective controllable storage device of a plurality of controllable storage devices in the quantum computer.
  • the method performed by the digital processor and comprises: receiving, by the digital processor, a problem to be solved by the quantum processor; embedding, by the digital processor, a topological representation of the problem onto the first subset of qubits of the quantum processor; and, performing, by the digital processor, an iterative protocol until one or more exit criteria are met.
  • the iterative protocol comprises: transmitting a first set of iteration bias signals to the plurality of controllable storage devices to bias the first subset of qubits, such that the plurality of controllable storage devices store a set of reference states therein corresponding to a low-energy state of the quantum processor, and the set of reference states are a previously obtained set of states of the first subset of qubits; causing the quantum processor to perform reverse quantum annealing to undergo a coherent population transfer; causing the quantum processor to perform forward quantum annealing to undergo an energy reduction when transitioning through a spin-glass phase and to cause the first subset of qubits to evolve to a set of updated states; and, transmitting a final set of iteration bias signals to the plurality of controllable storage devices to store the set of updated states therein as the set of reference states.
  • the method comprises receiving, by the digital processor, the set of reference states stored in the plurality of controllable storage devices as the optimized solution to the problem.
  • the method before performing the iterative protocol by the digital processor, the method comprises: causing the quantum processor to perform an initial instance of forward annealing to obtain an initial low-energy solution to the problem, such that the initial low-energy solution to the problem comprises an initial set of reference states; and, transmitting an initial set of storage bias signals to the plurality of controllable storage devices to store the initial set of reference states in the plurality of controllable storage devices coupled to the first subset of qubits.
  • the transmitting a final set of iteration bias signals to the plurality of controllable storage devices to store the set of updated states therein as the set of reference states comprises: transmitting load bias signals to the plurality of controllable devices to load an updated state of the set of updated states from each qubit of the first subset of qubits into a respectively coupled controllable storage device of the plurality of controllable storage devices; and, transmitting latch bias signals to the plurality of controllable devices to latch the plurality of controllable devices for continuous output and storage of the set of updated states for a subsequent iteration of the iterative protocol.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices increases a longitudinal field energy.
  • the causing the quantum processor to perform reverse quantum annealing increases a transverse field energy.
  • the causing the quantum processor to perform forward quantum annealing reduces the transverse field energy.
  • the plurality of controllable storage devices is a plurality of source radio frequency-superconducting quantum interference devices (rf-SQUIDs), and each source rf-SQUID comprises a respective Josephson structure.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices comprises applying bias signals to the Josephson structures of the plurality of source rf-SQUIDs.
  • the transmitting a final set of iteration bias signals to the plurality of controllable storage devices comprises transmitting load bias signals and latch bias signals to respectively load and latch the set of updated states into the plurality of source rf-SQUIDs.
  • the CJJs of the plurality of source rf- SQUIDs each have a respective barrier height that is sufficiently high to maintain bistable states at an onset of each iteration of the iterative protocol.
  • the applying bias signals to the Josephson structures of the plurality of source rf-SQUIDs comprises increasing the barrier heights of the Josephson structures .
  • the transmitting load bias signals and latch bias signals to respectively load and latch the set of updated states into the plurality of source rf-SQUIDs comprises: reducing the barrier heights of the Josephson structures to set the Josephson structures to monostable states and clear the set of reference states, and increasing the barrier heights of the Josephson structures to latch the plurality of controllable storage devices to store the set of updated states of the first subset of qubits.
  • the plurality of qubits further comprises a second subset of qubits, and each qubit of the second subset of qubits is communicatively coupled to a respective qubit of the first subset of qubits by a respective tunable coupler of a plurality of tunable couplers.
  • Each controllable storage device of the plurality of controllable storage devices is one qubit of the second subset of qubits, and each qubit of the second subset of qubits comprises a respective compound-compound Josephson junction (CCJJ).
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices comprises applying bias signals to the CCJJs of the second subset of qubits.
  • the transmitting a final set of iteration bias signals to the plurality of controllable storage devices comprises transmitting load bias signals and latch bias signals to respectively load and latch the set of updated states into the second subset of qubits.
  • the method comprises transmitting one or more coupler bias signals to the plurality of tunable couplers to initialize a coupling strength between each qubit of the first subset of qubits and a respective qubit of the second subset of qubits.
  • each controllable storage device of the plurality of controllable storage devices is one of a plurality of source quantum flux parametrons (QFPs), and each source QFP comprises a respective compound Josephson junction (CJJs).
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices comprises applying bias signals to the CJJs of the plurality of source QFPs
  • the transmitting a final set of iteration bias signals to the plurality of controllable storage devices comprises transmitting load bias signals and latch bias signals to respectively load and latch the set of updated states into the plurality of source QFPs.
  • each controllable storage device of the plurality of controllable storage devices is communicatively coupled to a respective shift register stage of a superconducting shift register.
  • the receiving, by the digital processor, the set of reference states stored in the plurality of controllable storage devices as the optimized solution to the problem comprises: transmitting latch-shift bias signals to CJJs of the shift register stages in the superconducting shift register to transmit the set of updated states stored in the plurality of controllable storage devices thereto; transmitting shift register bias signals to CJJs of the shift register stages to propagate the set of updated states along the superconducting shift register; and, transmitting the set of updated states to a digital computer as the optimized solution to the problem.
  • the performing an iterative protocol until one or more exit criteria are met comprises performing the iterative protocol until one or more of: an amount of residual energy of the quantum processor has fallen below a threshold; the residual energy of the quantum processor has saturated; the iterative protocol has been performed for a fixed amount of time; and, the iterative protocol has been performed for a fixed number of iterations.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices to bias the first subset of qubits comprises: transmitting the first set of iteration bias signals to the plurality of controllable storage devices to transition the quantum processor from the spin-glass phase to a localized paramagnetic phase.
  • the causing the quantum processor to perform reverse quantum annealing and undergo a coherent population transfer comprises: transitioning the quantum processor from the localized paramagnetic phase into a delocalized paramagnetic phase.
  • the method further comprises: modifying bias signals applied to the plurality of controllable storage devices, in which the modifying bias signals occurs simultaneously with the causing the quantum processor to perform forward quantum annealing, and the causing the quantum processor to perform forward quantum annealing comprises causing the quantum processor to perform forward annealing until a point at which the quantum processor is in the spin-glass phase.
  • simultaneously causing the quantum processor to perform forward quantum annealing and modifying bias signals applied to the plurality of controllable storage devices proportionally reduces a longitudinal field energy and a transverse field energy; and comprises: causing the quantum processor to perform forward quantum annealing until a point at which the transverse field energy and the longitudinal field energy have reduced to minimum values.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices to bias the first subset of qubits comprises: applying bias signals to the plurality of controllable storage devices corresponding to qubit biases of a reference Hamiltonian.
  • the modifying bias signals applied to the plurality of controllable storage devices while causing the quantum processor to perform forward quantum annealing comprises: applying bias signals to the plurality of controllable storage devices corresponding to qubit biases of the reference Hamiltonian.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices to bias the first subset of qubits comprises: applying bias signals to the plurality of controllable storage devices such that the quantum processor is in a localized paramagnetic phase, and fixing biases of the plurality of controllable storage devices.
  • the causing the quantum processor to perform reverse quantum annealing and undergo a coherent population transfer comprises: transitioning the quantum processor from the localized paramagnetic phase into a delocalized paramagnetic phase.
  • the causing the quantum processor to perform forward quantum annealing to transition to a spin-glass phase and cause the first subset of qubits to evolve to a set of updated states comprises: transitioning the quantum processor from the delocalized paramagnetic phase through the spinglass phase into the localized paramagnetic phase.
  • the transmitting the first set of iteration bias signals to the plurality of controllable storage devices such that the quantum processor is in the localized paramagnetic phase modifies a longitudinal field energy of the quantum processor.
  • the fixing the biases of the plurality of controllable storage devices comprises: fixing the longitudinal field energy of the quantum processor throughout the causing the quantum processor to perform reverse quantum annealing and the causing the quantum processor to perform forward quantum annealing.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices to bias the first subset of qubits comprises: applying bias signals to the plurality of controllable storage devices corresponding to a combination of qubit biases of a reference Hamiltonian and qubit biases of a problem Hamiltonian.
  • the transmitting a final set of iteration bias signals to the plurality of controllable storage devices to store the set of updated states therein as the set of reference states comprises: reducing a longitudinal field energy of the quantum processor through application of bias signals to the plurality of controllable storage devices to unlatch the set of reference states therefrom.
  • the transmitting a first set of iteration bias signals to the plurality of controllable storage devices to bias the first subset of qubits comprises one of: transmitting the first set of iteration bias signals to bias the first subset of qubits based on a set of reference states stored in the plurality of controllable storage devices corresponding to a global ground state of the quantum processor, or transmitting the first set of iteration bias signals to bias the first subset of qubits based on a set of reference states stored in the plurality of controllable storage devices corresponding to a local minimum of the quantum processor.
  • a system comprising: a plurality of qubits of a quantum processor that includes a first subset of qubits, and a superconductive control system comprising a plurality of controllable storage devices.
  • Each qubit of the first subset of qubits is communicative coupled to a controllable storage device of the plurality of controllable storage devices, the plurality of controllable storage devices is to store a set of reference states of the first subset of qubits to bias the first subset of qubits, and the plurality of controllable storage devices are controllable to change a magnetic phase of the quantum processor.
  • the system comprises: at least one digital processor communicatively coupled to the quantum processor and processor-executable instructions that, when executed by the at least one digital processor, cause the system to perform any one of the methods described herein.
  • a system comprising: a plurality of qubits of a quantum processor that includes a first subset of qubits, and a superconductive control system comprising a plurality of controllable storage devices.
  • Each qubit of the plurality of qubits is communicatively coupled to a controllable storage device of the plurality of controllable storage devices, the plurality of controllable storage devices is to store a set of reference states of the first subset of qubits to bias the first subset of qubits, and the plurality of controllable storage devices are controllable to change a magnetic phase of the quantum processor,
  • the quantum processor is operable to obtain an optimized solution to a problem through performance of an iterative protocol until one or more exit criteria are met, in which: the quantum processor performs a reverse quantum anneal to undergo a coherent population transfer; the quantum processor performs a forward quantum anneal to undergo an energy reduction when transitioning through a spinglass phase and to determine a set of updated states of the first subset of qubits; and, the plurality of controllable storage devices replaces the set of reference states with the set of updated states of the first subset of qubits.
  • the superconductive control system comprises one or more signal lines to carry a bias signal and a plurality of signal line interfaces, and each signal line interface of the plurality of signal line interfaces couples the bias signal from the signal line to a respective controllable storage device of the plurality of controllable storage devices.
  • the one or more signal lines are operable to transmit a bias signal to the plurality of controllable storage devices to set a low-energy state of the quantum processor to the set of reference states stored in plurality of the controllable storage devices.
  • the one or more signal lines are operable to transmit a bias signal to the plurality of controllable storage devices to modify a longitudinal field energy in the quantum processor.
  • a transverse field energy of the quantum processor is increased through performance of reverse quantum annealing by the quantum processor.
  • the transverse field energy of the quantum processor is reduced through performance of forward quantum annealing by the quantum processor.
  • the one or more signal lines are operable to transmit first bias signals to the plurality of controllable storage devices to transition the quantum processor from the spinglass phase to a localized paramagnetic phase. Performance of the reverse quantum anneal transitions the magnetic phase of the quantum processor from the localized paramagnetic phase into a delocalized paramagnetic phase.
  • the one or more signal lines are operable to transmit second bias signals to the plurality of controllable storage devices during performance of the forward quantum anneal to transition the magnetic phase of the quantum processor from the delocalized paramagnetic phase into the spin-glass phase.
  • the one or more signal lines are operable to transmit the second bias signals to the plurality of controllable storage devices during performance of the forward quantum anneal proportionally to reduce a longitudinal field energy and a transverse field energy of the quantum processor.
  • the forward quantum anneal is performed until a point at which the transverse field energy and the longitudinal field energy have reduced to minimum values.
  • the quantum processor is operable to obtain the optimized solution to the problem through performance of the iterative protocol by computation based on an augmented Hamiltonian comprising a reference Hamiltonian, in which the reference Hamiltonian includes qubit biases corresponding to each qubit of the first subset of qubits.
  • the first bias signals include a first plurality of qubit biases of the reference Hamiltonian, and the one or more signal lines are operable to apply each one of the first bias signals to a controllable storage device of the plurality of controllable storage devices to bias a respectively communicatively coupled qubit of the first subset of qubits to its corresponding first qubit bias of the reference Hamiltonian.
  • the one or more signal lines are operable to transmit the fixed bias signals to the plurality of controllable storage devices to modify a longitudinal field energy of the quantum processor.
  • the fixed bias signals are to fix the longitudinal field energy of the plurality of controllable storage devices throughout performance of the forward quantum anneal and performance of the reverse quantum anneal of each iteration of the iterative protocol.
  • the quantum processor is operable to obtain the optimized solution to the problem through performance of computation based on an augmented Hamiltonian.
  • the augmented Hamilton comprises a reference Hamiltonian including reference qubit biases corresponding to each qubit of the first subset of qubits and a problem Hamiltonian including problem qubit biases corresponding to each qubit of the first subset of qubits.
  • the one or more signal lines are operable to apply each one of the fixed bias signals to a controllable storage device of the plurality of controllable storage devices to bias a respectively communicatively coupled qubit of the first subset of qubits to a combination of the corresponding reference qubit bias and the problem qubit bias.
  • the plurality of controllable storage devices is a plurality of source radio frequency-superconducting quantum interference devices (rf-SQUIDs), and each source rf-SQUID of the plurality of source rf-SQUIDs comprises a Josephson structure that is communicatively coupled to one or more signal lines via a respective interface.
  • the one or more signal lines are operable to transmit a bias signal to each source rf-SQUID of the plurality of source rf-SQUIDs to modify a respective Josephson structure barrier height.
  • the one or more signal lines are communicatively coupled to the plurality of source rf-SQUIDs to transmit a series of bias signals operable to replace of the set of reference states with the set of updated states in the plurality of controllable storage devices.
  • the series of bias signals comprises a suppression bias signal and a latch bias signal. Transmission of the suppression bias signal from the one or more signal lines to the Josephson structure of each source rf-SQUID of the plurality of source rf-SQUIDs lowers a respective Josephson structure boundary height to suppress the set of reference states.
  • the one or more exit criteria are one of more of: an amount of residual energy of the quantum processor has fallen below a threshold; saturation of the residual energy of the quantum processor; performance of the iterative protocol for a fixed amount of time; and, performance of a fixed number of iterations of the iterative protocol.
  • the quantum processor is a quantum annealer or a quantum processor that performs adiabatic quantum computation.
  • each qubit of the plurality of qubits is a superconducting qubit.
  • the superconductive control system further comprises a superconducting shift register having a plurality of shift register stages.
  • Each controllable storage device of the plurality of controllable storage devices is communicatively coupled to a respective shift register stage of the superconducting shift register, and each controllable storage device and each shift register stage is operable as a latch.
  • the plurality of controllable storage devices is operable to transmit the set of reference states corresponding to the optimized solution to the problem to shift register stages of the superconducting shift register based on an applied bias signal.
  • the superconducting shift register is operable to propagate the set of reference states across shift register stages of the superconducting shift register.
  • each shift register stage of the plurality of shift register stages is a quantum flux parametron (QFP), and each QFP comprises one or more materials that each exhibit superconducting behavior at and below a respective critical temperature.
  • QFP quantum flux parametron
  • each controllable storage device of the plurality of controllable storage devices is a source QFP
  • each source QFP comprises one or more materials that each exhibit superconducting behavior at and below a respective critical temperature.
  • the plurality of qubits further comprises a second subset of qubits.
  • Each controllable storage device of the plurality of controllable storage devices is one qubit of the second subset of qubits.
  • the system further comprises a plurality of tunable couplers. Each tunable coupler communicatively couples one qubit of the first subset of qubits to a respective qubit of the second subset of qubits.
  • the system further comprises a digital computer including at least one digital processor that is communicatively coupled to the superconductive control system.
  • the at least one digital processor is to cause the superconductive control system to transmit the set of reference states to the digital computer as the optimized solution to the problem.
  • the plurality of qubits and the superconductive control system are part of a quantum computer.
  • the system further comprises: at least one non-transitory processor-readable medium that stores at least one of processor-executable instructions or data, and at least one digital processor communicatively coupled to the at least one non-transitory processor- readable medium and the quantum computer.
  • the at least one digital processor In response to execution of the at least one of processor-executable instructions or data, the at least one digital processor: causes the quantum computer to perform the iterative protocol until the one or more exit criteria are met, and receives, from the quantum computer, the set of updated states stored in the plurality of controllable storage devices after the one or more exit criteria are met as the optimized solution to the problem.
  • the iterative protocol includes: application of biases to the plurality of controllable storage devices to bias the first subset of qubits, such that the plurality of controllable storage devices store the set of reference states thereon corresponding to a low-energy state of the quantum processor; performance, by the quantum processor, of the reverse quantum annealing to cause the quantum processor to undergo the coherent population transfer; performance, by the quantum processor, of the forward quantum anneal to cause the quantum processor to undergo the energy reduction when transitioning through the spin-glass phase and to cause the first subset of qubits to evolve to the set of updated states; storage of the set of updated states in the plurality of controllable storage devices to replace the set of reference states; and, evaluation of the one or more exit criteria.
  • FIG. 1 is a schematic diagram of an example hybrid computing system including a digital computing system and a quantum computing system, the digital computing system including at least one digital processor and the quantum computing system including at least one superconducting quantum processor, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 2 is a schematic diagram of a circuit of a portion of an example superconducting quantum processor, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 3 is a schematic diagram of a portion of a superconducting control system, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 4A is a graph of an energy landscape of a first iteration of population transfer and residual energy reduction through quantum annealing, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 4B is a graph of an energy landscape of a second iteration of population transfer and residual energy reduction through quantum annealing following the first iteration shown in FIG. 4A, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 5 is a schematic diagram of an example hybrid computer system to determine a solution to a problem having reduced residual energy, a digital computer thereof including an optimization subsystem, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 6 is a graph illustrating one iteration of a quantum optimization protocol, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 7 is a flow diagram of a method to perform the quantum optimization protocol of FIG. 6, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 8 is a graph illustrating one iteration of an alternative quantum optimization protocol, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 9 is a flow diagram of a method to perform the quantum optimization protocol of FIG. 8, in accordance with the presently described systems, devices, articles, and methods.
  • FIG. 10 is a flow diagram of a method to determine an optimized solution to a problem, in accordance with the presently described systems, devices, articles, and methods.
  • the term “optimized solution” does not necessarily mean the “optimal solution”, but rather refers to a best solution of a set of solutions, for instance for a given iteration.
  • FIG. 1 illustrates a computing system 100 comprising a digital computer 102.
  • the example digital computer 102 includes one or more digital processor(s) 106 that may be used to perform classical digital processing tasks.
  • Digital computer 102 may further include at least one system memory 122, and at least one system bus 120 that couples various system components, including system memory 122 to digital processor(s) 106.
  • System memory 122 may store one or more sets of processor-executable instructions, which may be referred to as modules 124.
  • the digital processor(s) 106 may be any logic processing unit or circuitry (for example, integrated circuits), such as one or more central processing units (“CPUs”), graphics processing units (“GPUs”), digital signal processors (“DSPs”), application-specific integrated circuits ("ASICs”), programmable gate arrays (“FPGAs”), programmable logic controllers (“PLCs”), etc., and/or combinations of the same.
  • the digital processor(s) 106 can be operated at room temperatures, or cooled below room temperatures, or even cooled and operated at cryogenic temperatures.
  • computing system 100 comprises a quantum computer 104, which may include one or more quantum processors 126.
  • Quantum processor 126 may include at least one superconducting integrated circuit.
  • Digital computer 102 may communicate with quantum computer 104 via, for instance, a controller 118. Certain computations may be performed by quantum computer 104 at the instruction of digital computer 102, as described in greater detail herein.
  • the quantum processor(s) 126 can be cooled and operated at temperatures at which materials of which quantum processor(s) is comprised exhibit superconductive behavior.
  • Digital computer 102 may include a user input/output subsystem 108.
  • the user input/output subsystem includes one or more user input/output components such as a display 110, a mouse 112, and/or a keyboard 114.
  • System bus 120 may employ any known bus structures or architectures, including a memory bus with a memory controller, a peripheral bus, and a local bus.
  • System memory 122 may include non-volatile memory, such as read-only memory (“ROM”), static random-access memory (“SRAM”), Flash NAND; and volatile memory such as random-access memory (“RAM”).
  • ROM read-only memory
  • SRAM static random-access memory
  • RAM random-access memory
  • Digital computer 102 may also include other non-transitory computer- or processor-readable storage media or non-volatile memory 116.
  • Nonvolatile memory 116 may take a variety of forms, including: a hard disk drive for reading from and writing to a hard disk (for example, a magnetic disk), an optical disk drive for reading from and writing to removable optical disks, and/or a solid state drive (SSD) for reading from and writing to solid state media (for example NAND- based Flash memory).
  • Non-volatile memory 116 may communicate with digital processor(s) 106 via system bus 120 and may include appropriate interfaces or controllers 118 coupled to system bus 120.
  • Non-volatile memory 116 may serve as long-term storage for processor- or computer-readable instructions, data structures, or other data (sometimes called program modules or modules 124) for digital computer 102.
  • digital computer 102 has been described as employing hard disks, optical disks and/or solid-state storage media, those skilled in the relevant art will appreciate that other types of non-transitory and non-volatile computer-readable media may be employed.
  • system memory 122 may store executable instructions to provide communications with remote clients and scheduling use of resources including resources on the digital computer 102 and quantum computer 104.
  • system memory 122 may store at least one of processor executable instructions or data that, when executed by at least one processor, causes the at least one processor to execute the various algorithms to execute instructions.
  • system memory 122 may store processor- or computer- readable calculation instructions and/or data to perform pre-processing, coprocessing, and post-processing to quantum computer 104.
  • System memory 122 may store a set of quantum computer interface instructions to interact with quantum computer 104.
  • the system memory 122 may store processor- or computer-readable instructions, data structures, or other data which, when executed by a processor or computer causes the processor(s) or computer(s) to execute one, more or all of the acts of the methods described herein.
  • Quantum computer 104 may include at least one quantum processor such as quantum processor 126.
  • Quantum computer 104 may be provided in an isolated environment, for example, in an isolated environment that shields the internal elements of the quantum computer from heat, magnetic field, and other external noise.
  • the isolated environment may include a refrigerator, for instance a dilution refrigerator, operable to cryogenically cool quantum processor 126, for example to temperature below approximately 1 K.
  • Quantum computer 104 may include programmable elements such as qubits, couplers, and other superconductive on-chip devices. Qubits may be read out via a readout control system 128. Readout results may be sent to other computer- or processor-readable instructions of digital computer 102. Qubits may be controlled via a qubit control system 130. Qubit control system 130 may include on- chip Digital to Analog Converters (DACs) and analog lines that are operable to apply a bias to a target device. Couplers that couple qubits may be controlled via a coupler control system 132. Coupler control system 132 may include tuning elements such as on-chip DACs and analog lines.
  • DACs Digital to Analog Converters
  • qubit control system 130 and coupler control system 132 may be used to implement a quantum annealing schedule as described herein on quantum computer 104 employing one or more quantum processors.
  • a quantum processor such as quantum processor 126, may be designed to perform quantum annealing and/or adiabatic quantum computation. Examples of quantum processors are described in US Patent No. 7,533,068.
  • a quantum processor such as quantum processor 126
  • FIG. 2 is a schematic diagram of a circuit 200 of a portion of an example superconducting quantum processor, according to at least one implementation.
  • the superconducting quantum processor of circuit 200 may be a portion of quantum computer 104 shown in FIG. 1 .
  • Circuit 200 includes two qubits 201 and 202. Also shown is a tunable coupling (diagonal coupling) via coupler 210 between qubits 201 and 202 (i.e., providing 2-local interaction).
  • Circuit 200 includes a plurality of interfaces 221 , 222, 223, 224, and 225 that are used to configure and control the state of the superconducting quantum processor.
  • Each of interfaces 221 , 222, 223, 224, and 225 may be realized by a respective inductive coupling structure, as illustrated, as part of a programming subsystem and/or an optional evolution subsystem.
  • interfaces 221 , 222, 223, 224, and 225 may be realized by a galvanic coupling structure.
  • one or more of interfaces 221 , 222, 223, 224, and 225 may be driven by one or more flux storage devices or Digital-to-Analog Converters (DACs).
  • DACs Digital-to-Analog Converters
  • Such a programming subsystem and/or optional evolution subsystem may be separate from the superconducting quantum processor, or may be included locally (/.e., on-chip with the superconducting quantum processor).
  • locally included programming subsystem and/or optional evolution subsystem can be arranged as part of quantum computer 104.
  • interfaces 221 and 224 may each be used to couple a flux signal into a respective compound Josephson junction (CJJ) 231 and 232, respectively, of qubits 201 and 202, thereby realizing a tunable tunneling term (the term) in the system Hamiltonian.
  • CJJ compound Josephson junction
  • This coupling provides the off-diagonal a x terms of the Hamiltonian and these flux signals are examples of “delocalization signals”. Examples of Hamiltonians (and their terms) used in quantum computing are described in greater detail in, for example, US Patent No. 9,424,526.
  • interfaces 222 and 223 may each be used to apply a flux signal into respective superconducting loops 226 and 227 of qubits 201 and 202.
  • interface 225 may be used to couple a flux signal into coupler 210.
  • quantum processor is used to generally describe a collection of physical qubits (e.g., qubits 201 and 202) and qubit couplers (e.g., coupler 210). Corresponding parameters of the physical qubits 201 and 202 and coupler 210 are referred to herein as “controllable parameters” of the quantum processor.
  • programming subsystem is used to generally describe the interfaces (e.g., “programming interfaces” 222, 223, and 225) used to apply biases to at least qubits 201 , 202 and coupler 210 of the superconducting quantum processor and other associated control circuitry to determine controllable parameters thereof.
  • programming interfaces 222, 223, and 225 may include DACs, which can be used to control qubits, couplers, and parameter tuning devices.
  • interfaces 222 and 223 can be respectively used to apply a flux signal into superconducting loops 226 and 227 of qubits 201 and 202, thereby realizing the h t terms (dimensionless local fields for the qubits) in the system Hamiltonian. This coupling provides the diagonal a z terms in the system Hamiltonian.
  • interface 225 may be used to couple a flux signal into a compound Josephson junction (CJJ) 233 of coupler 210, thereby realizing the / iy term(s) (dimensionless local fields for the couplers) in the system Hamiltonian. This coupling provides the diagonal a a terms in the system Hamiltonian.
  • CJJ compound Josephson junction
  • FIG. 2 the contribution of each interface of plurality of interfaces 221 , 222, 223, 224, and 225 to the system Hamiltonian is indicated in broken line boxes 221a, 222a, 223a, 224a, and 225a, respectively.
  • broken line boxes 221a, 222a, 223a, 224a, 225a are elements of timevarying Hamiltonians for quantum annealing and/or adiabatic quantum computing.
  • quantum processor is used to generally describe a collection of physical qubits (e.g., qubits 201 and 202) and qubit couplers (e.g., coupler 210).
  • the physical qubits and the coupler of a quantum processor and their corresponding parameters are referred to as “controllable parameters” of the quantum processor.
  • programming subsystem is used to generally describe the interfaces (e.g., “programming interfaces” 222, 223, and 225) used to apply the controllable parameters to the qubits and couplers of the superconducting quantum processor and other associated control circuitry and/or instructions.
  • programming interfaces 222, 223, and 225 may be included as part of qubit control system 130 and coupler control system 132 that are part of quantum computer 104 in FIG. 1.
  • programming interfaces 222, 223, and 225 may include DACs.
  • the programming interfaces of the programming subsystem may communicate with other subsystems which may be separate from the quantum processor or may be included locally on the processor, such as arranged as part of quantum computer 104 of FIG. 1.
  • the programming subsystem may be configured to receive programming instructions in a machine language of the quantum processor and execute the programming instructions to program at least qubits 201 , 202 and coupler 210 in accordance with the programming instructions.
  • the term “evolution subsystem” generally includes the interfaces (e.g., “evolution interfaces” 221 and 224) used to evolve devices such as the qubits of circuit 200 and other associated control circuitry and/or instructions.
  • the evolution subsystem may include analog signal lines and their corresponding interfaces (221 , 224) to the qubits (201 , 202).
  • qubits 201 , 202 and coupler 210 may be arranged as part of quantum processor 126 and these other subsystems may be at least one of: readout control system 128, qubit control system 130, and coupler control system 132 of quantum computer 104.
  • the initial programming instructions may be provided using digital computer 102 and sent to the quantum processor and its corresponding subsystems through digital processor(s) 106.
  • Circuit 200 also includes readout devices 251 and 252.
  • Readout device 251 is associated with qubit 201 and readout device 252 is associated with qubit 202.
  • each of readout devices 251 and 252 includes a direct current superconducting quantum interference device (DC-SQUID) inductively coupled to the corresponding qubit (201 , 202).
  • DC-SQUID direct current superconducting quantum interference device
  • each of readout devices 251 and 252 can include at least a controllable storage device that is superconductive at and below a critical temperature and arranged on-chip, and which can store qubit state information.
  • each of readout devices 251 and 252 can be a quantum flux parametron (QFP).
  • QFP quantum flux parametron
  • Readout devices 251 , 252 can be implemented as described in one or more of: US Patents No. 6,627,916; 8, 169,231 ; 10,938,346; 11 ,424,521 ; and, 12,033,033, which are incorporated by reference herein. [00130] In the context of circuit 200, the term “readout subsystem” is used to generally describe the readout devices 251 , 252 used to read out the final states of the qubits (e.g., qubits 201 and 202) in the superconducting quantum processor to produce a bit string.
  • the term “readout subsystem” is used to generally describe the readout devices 251 , 252 used to read out the final states of the qubits (e.g., qubits 201 and 202) in the superconducting quantum processor to produce a bit string.
  • the readout subsystem may also include other elements, such as routing circuitry (e.g., latching elements, a shift register, or a multiplexer circuit) and/or may be arranged in alternative configurations (e.g., an XY-addressable array, an XYZ-addressable array, etc.), any of which may comprise DACs. Qubit readout may also be performed using alternative circuits, such as that described in US Patent No. 8,854,074. The behavior of the readout subsystem may be informed by signals transmitted from readout control system 128 in FIG. 1.
  • Readout control system 128 may be include or be communicatively coupled to readout devices 251 and 252 via DACs, analog lines, or other suitable means.
  • FIG. 2 illustrates only two physical qubits 201 , 202, one coupler 210, and two readout devices 251 , 252
  • a quantum processor e.g., processor comprising circuit 200
  • a larger number e.g., hundreds, thousands or more
  • the application of the teachings herein to processors with a different (i.e., larger) number of computational components should be readily apparent to those of ordinary skill in the art.
  • a superconducting quantum processor may include other types of qubits besides superconducting flux qubits.
  • a superconducting quantum processor may include superconducting charge qubits, transmon qubits, and the like.
  • FIG. 3 is a schematic diagram of a superconducting circuit 300 that includes a portion of a superconducting control system 301 , in accordance with the presently described systems, devices, articles, and methods.
  • Superconducting circuit 300 includes: a computational qubit 302, a source qubit 303, a tunable coupler 315, and superconducting control system 301 communicatively coupled to computational qubit 302 and source qubit 303.
  • Computational qubit is further communicatively coupled to source qubit 303 via tunable coupler 315.
  • Superconducting control system 301 includes at least: a mediator latch 304 communicatively coupled to computational qubit 302 and a superconductive shift register 306 communicatively coupled to mediator latch 304.
  • Computational qubit 302 is a qubit used to perform quantum computations, i.e., to represent a variable in a problem to be solved by a quantum processor.
  • Computational qubit 302 includes: a superconducting qubit loop 308, a Josephson structure 310 interrupting superconducting qubit loop 308, and qubit-to- latch interface 312 interrupting superconducting qubit loop 308.
  • qubit-to-latch interface 312 can be a distinct structure; alternatively, qubit-to-latch interface 312 can be a portion of superconducting qubit loop 308 at which coupling occurs.
  • computational qubit 302 can be one of qubit 201 or qubit 202 of circuit 200 (FIG. 2).
  • superconducting qubit loop 308 can be one of superconducting loops 226 and 227
  • Josephson structure 310 can be one of CJJs 231 and 232.
  • Qubit-to-latch interface 312 can be an interface that couples to one of readout devices 251 and 252.
  • Josephson structure refers to a structure in which the Josephson effect can be observed, such that an electrical current can flow without dissipation therethrough without application of voltage thereacross, enabling coherent tunneling of Cooper pairs across a potential barrier.
  • a Josephson structure includes at least one Josephson junction, which comprises at least two layers of material that exhibit superconductive behavior at and below a critical temperature that are separated by a barrier non-superconductive barrier layer.
  • a Josephson structure can comprise two or more Josephson junctions, which, in some implementations can be arranged as a CJJ or a CCJJ.
  • Superconducting circuit 300 includes interface 314b, which can be used to apply a bias signal to Josephson structure 310 that is carried by signal line 314a. While not included in FIG. 3, one or more additional interfaces may be included to transmit additional bias signals to superconductive qubit loop 308, such as interfaces 221 and 223 in circuit 200.
  • Qubit-to-latch interface 312 is an interface that communicatively couples computational qubit 302 to mediator latch 304.
  • the communicative coupling causes qubit state information of computational qubit 302 to be transmitted to mediator latch 304 and/or for computational qubit 302 to receive information from mediator latch 304.
  • Mediator latch 304 includes: a superconducting loop 316, a Josephson structure 320 interrupting superconducting loop 316, a latch-to-qubit interface 318a, and a latch-to-shift register interface 318b.
  • latch-to-qubit interface 318a and latch-to-shift register interface 318b can each be a distinct structure; alternatively, latch-to-qubit interface 318a and latch-to-shift register interface 318b can each be a portion of superconducting loop 316 at which coupling occurs.
  • a signal carried by signal line 322a can be transmitted to Josephson structure 320 through an interface 322b to determine behavior of mediator latch 304. Though only one signal line 322a is labelled in FIG. 3, it is to be understood that superconducting circuit 300 can comprise a plurality of signal lines. In some implementations, some or all of signals carried by signal line 322a can be clock signals that control operation of mediator latch 304.
  • clock and clock signal are frequently used to refer to a controllable signal of periodic pulses.
  • a controllable signal of pulses may be embodied by other signals or devices in an electric circuit or other medium (e.g., light) and the pulses need not be periodic.
  • clock and clock signal are used herein in their broadest sense and are meant to encompass all manner of administering a controllable signal of pulses.
  • Providing a latch signal can “latch” mediator latch 304, which can include application of a bias to Josephson structure 320 to raise a barrier of the potential energy curve of mediator latch 304, establishing a double-well potential that is also referred to herein as a “bistable state”.
  • a ground state of mediator latch 304 is aligned with an external field, and the applied bias adiabatically raises the barrier of the potential energy curve to keep mediator latch 304 in its ground state.
  • mediator latch 304 holds an instantaneous input signal loaded at the moment the clock signal pulses and establishes the barrier in the potential energy curve.
  • the instantaneous input signal can be qubit state information of computational qubit 302 that is transmitted from qubit-to-latch interface 312 of computational qubit 302 to latch-to-qubit interface 318a of mediator latch 304.
  • Providing a suppression signal to mediator latch 304 can “suppress” the latching component, such that qubit state information of computational qubit 302 stored in mediator latch 304 is no longer held, for instance, until new information is loaded by coupling of another latching signal to mediator latching 304.
  • Providing a suppression signal to mediator latch 304 can include application or modification of a bias to Josephson structure 320 to lower a barrier of the potential energy curve of mediator latch 304, such that the potential energy curve resembles a parabola. This may also be referred to as having a “monostable state”.
  • loading qubit state information into mediator latch 304 can refer to an operation in which qubit state information of computational qubit 302 is transmitted to, and held in, mediator latch 304.
  • a loading operation is initiated by application of a first latch signal to Josephson structure 320 of mediator latch 304. Once qubit state information is loaded into mediator latch 304, it is held there until mediator latch 304 is suppressed.
  • Latch-to-shift register interface 318b is an interface that communicatively couples mediator latch 304 to superconductive shift register 306.
  • the communicative coupling causes mediator latch 304 to transmit qubit state information held in mediator latch 304 to superconductive shift register 306, or causes mediator latch 304 to receive a signal from superconductive shift register 306.
  • Source qubit 303 is a qubit in a quantum processor that is not programmed to represent a variable, or a portion of a variable, of a computational problem to be solved thereon. Instead, source qubit 303 is a qubit that is reserved to be controlled as a bias source of a computational qubit that is communicatively coupled thereto.
  • Source qubit 303 includes a superconducting qubit loop 309 and a Josephson structure 311 interrupting superconducting qubit loop 309, which can respectively be characterized in a similar manner to superconducting qubit loop 308 and Josephson structure 310 of computational qubit 302.
  • Superconducting circuit 300 includes interface 313b, which can be used to apply a bias signal carried by signal line 313a to Josephson structure 311 of source qubit 303.
  • Application of a bias to Josephson structure 311 can modify a barrier height of a potential thereof, such load, suppression, and latch operations can be performed using source qubit 303 as described above with respect to mediator latch 304.
  • Josephson structure 311 of source qubit 303 and Josephson structure 310 of computational qubit are compound-compound Josephson junctions (CCJJs), in which each Josephson junction of a CJJ is itself a CJJ.
  • CCJJs compound-compound Josephson junctions
  • each interface 313b is shown as coupled to Josephson structures 310, 311 in FIG. 3, it is to be understood that at least one interface can be coupled to each CJJ of the CCJJ to control parameters through the application of bias signals thereto.
  • Application of bias signals to CCJJs can be used to homogenize parameters of qubits in a quantum processor and compensate for asymmetry therebetween.
  • application of bias signals to CCJJs can be used to modify inductance, critical current, and offsets of source and/or computational qubits 302, 303.
  • Source qubit 303 is communicatively coupled to computational qubit 302 via tunable coupler 315. More particularly, tunable coupler is communicatively coupled to superconducting qubit loop 308 of computational qubit 302 and superconducting qubit loop 309 of source qubit 303, establishing a path for transmission of flux therebetween.
  • Tunable coupler includes a superconducting qubit loop 317 and a Josephson structure 319 interrupting superconducting qubit loop 317.
  • tunable coupler 315 can be characterized in the same manner as coupler 210 of circuit 200 (FIG. 2).
  • Superconducting circuit 300 includes interface 321 b, which can be used to apply a bias signal carried by signal line 321a to Josephson structure 319 of tunable coupler 315. Such a bias signal can change a barrier height of Josephson structure 319 to modify a coupling strength between computational qubit 302 and source qubit 303.
  • Interface 321b can be characterized in the same manner as interface 225 of FIG. 2.
  • a second mediator latch 304a is shown to be communicatively coupled to source qubit 303 to transmit information between source qubit 303 and superconductive shift register 306. Second mediator latch 304a can be characterized in the same manner as mediator latch 304 coupled to computational qubit 302, and is operable in the same manner.
  • Superconductive shift register 306 includes a plurality of shift register stages 324 (only one called out for clarity in FIG. 3), which are successively communicatively coupled to one another in series. While only three shift register stages 324 are illustrated in FIG. 3, this is merely an example and any suitable number of shift register stages can be included in superconductive shift register 306.
  • One or more shift register stages 324 such as a terminating stage, can be communicatively coupled to a readout resonator or another readout device to read out qubit state information transmitted through superconductive shift register 306.
  • at least one shift register stage 324 can be coupled to an input to provide an input signal to superconductive shift register 306.
  • Each shift register stage 324 can be a compound rf-SQUID, and can each include: a superconducting loop 326, a Josephson structure 328 interrupting superconducting loop 326, a shift register-to-latch interface 330a, and two stage-to-stage interfaces 330b, 330c.
  • each shift register stage 324 can be a quantum flux parametron (QFP).
  • Each shift register stage 324 can be communicatively coupled to a signal line 332a, which carries signals that are transmitted to Josephson structure 328 through an interface 332b to control behavior of shift register stage 324.
  • Signal line 332a can transmit a latch signal to shift register stage 324 to load and latch qubit state information transmitted from latch-to-shift register interface 318b of mediator latch 304 to shift register stage 324 through shift register-to-latch interface 330a.
  • Load, latch, and suppression operations can be performed by shift register stage 324 in the same manner as described above with respect to mediator latch 304. Likewise, these operations are also performed between shift register stages 324 of superconductive shift register 306 in a similar manner based on signals provided to shift register stages 324 by different ones of signal lines 332a. Data can be transmitted between adjacent shift register stages 324 through stage-to- stage interfaces 330b, 330c (only two called out for sake of drawing clarity).
  • superconducting circuit 300 illustrates only one computational qubit 302, one source qubit 303, and one mediator latch 304, a person skilled in the art would understand that any number of computational qubits and/or source qubits 303 can be coupled to a respective number of mediator latches.
  • two shift register stages are shown to be communicatively coupled to shift register stage 324 that is directly communicatively coupled to mediator latch 304, this is intended to be a non-limiting example.
  • Shift register stages 324 in superconductive shift register 306 can be arranged in any manner suitable for a particular application.
  • computational qubit 302, source qubit 303, tunable coupler 315, mediator latch 304, and shift register stages 324 can comprise one or more materials that exhibit superconductive behavior at and below respective critical temperatures, such as: aluminum, niobium, and tantalum.
  • Josephson structures 310, 311 , 319, 320, and 328 can be Josephson junctions, compound Josephson junctions (CJJ), or compound-compound Josephson junctions (CCJJ).
  • qubit-to-latch interface 312 latch-to-qubit interface 318a, latch-to-shift register interface 318b, shift register-to-latch interface 330a, and stage- to-stage interfaces 330b, 330c are shown as inductors, though this is intended to be a non-limiting example.
  • one or more of these interfaces (312, 318a, 318b, 330a, 330b, 330c) can be portions of inductive interfaces between components of superconducting control system 301 and/or computational qubit 302.
  • one or more of these interfaces can be a portion of a galvanic interface that supports galvanic coupling.
  • galvanic coupling refers to electrical coupling of at least two components across a conductor that is shared between the at least two components.
  • Each one of these interfaces (318a, 318b, 330a, 330b, 330c) can each be a distinct structure; alternatively, each one of these interfaces (318a, 318b, 330a, 330b, 330c) can be a portion of a corresponding superconducting loop (316, 326) at which coupling occurs.
  • Each of interfaces 314b, 313b, 321 b, 322b, and 332b can be inductively or galvanically coupled to a respective one of Josephson structures 310, 320, 328.
  • superconducting qubit loops 308, 309 of computational and source qubits 302, 303 are shown as round, superconducting loops 316, 317 of mediator latch 304 and tunable coupler 315 are shown as rectangular, and superconducting loops 326 of shift register stages 324 are shown as square in shape.
  • any one of these superconducting loops (308, 309, 316, 319, 326) may be of an alternate closed shape, such as round, square, and rectangular, and may be of any suitable size.
  • superconducting loops (308, 309, 316, 319, 326) may be planar; alternatively, superconducting loops (308, 309, 316, 319, 326) may be arranged in different layers of a fabrication stack comprising superconducting circuit 300, and, in some implementations, may at least partially overlie one another.
  • the computation begins with an initial Hamiltonian and evolves through an evolution Hamiltonian to a final problem Hamiltonian having a ground state that encodes a solution to the problem. If a rate of the evolution is slow enough, the physical system may settle in the global minimum state (7.e. , a state representative of the exact solution), or in a local minimum close in energy to a state representative of the exact solution.
  • performance of the computation can be assessed based on an amount of residual energy within the physical system relative to an evolution time. The residual energy represents a distance between the exact solution to a problem and a solution determined by the quantum processor.
  • a final problem Hamiltonian may encode a problem when performing quantum annealing, but the physical system does not necessarily stay in the ground state at all times.
  • the energy landscape of the final problem Hamiltonian may be crafted so that its global minimum is the exact answer to the problem to be solved, and low-lying local minima are good approximate solutions to the problem. As a result, it may be advantageous to minimize an amount of residual energy of the physical system to determine optimized solutions through quantum computation.
  • Reduction of residual energy can be achieved through conventional forward annealing techniques.
  • a description of reduction of residual energy through forward annealing can be found in King et al. (A.D. King et al., Quantum critical dynamics in a 5000-qubit programmable spin glass, 2023, //arxiv.org/pdf/2207.13800.pdf).
  • energy of a quantum processor can decrease via quantum diffusion, including coherent single qubit moves and/or energy dissipation to the environment.
  • benefits of the residual energy reduction obtained through forward annealing may be at least partially counteracted due to presence of thermal noise in the quantum processor.
  • An increase in annealing time beyond a relaxation time of the quantum processor can lead to a thermal environment significantly slowing down the decay of residual energy, which limits a scaling advantage of forward annealing in approaching a ground state energy of the quantum processor.
  • a probability density of eigenvalues of a problem Hamiltonian can be localized around the mean classical energy with an exponentially decaying tail reaching towards the low-energy states, and the initial state can be located within the tail of the distribution.
  • an eigenstate of the initial state also overlaps with a large subset of eigenstates within the tail that have energies within a narrow range centered around the energy of the initial state.
  • introduction of a transverse field B x to the physical system causes hybridization of classical states associated with the subset of eigenstates into a band (also referred to as a “conduction band”).
  • the energy range of the band is approximately equal to an average tunneling amplitude A between states within the band, and each state within the band is a superposition of the classical states associated with the subset of eigenstates.
  • population transfer between states within the band is achieved by coherent tunneling in a time of ⁇ 1/A, which scales as a square root of the time used to perform classical searches. This can result in a significant population transfer speed-up to solve a problem more efficiently.
  • Population transfer protocols using reverse quantum annealing are further described in Smelyanskiy et a/.(V.N.
  • forward and reverse annealing techniques can be combined as part of an iterative protocol. Due to performance of reverse annealing, the eigenstates become delocalized resulting in an energy band, and coherent population transfer moves the physical system to an excited state within the band.
  • population transfer occurs in a paramagnetic phase, in which the physical system (/.e., qubits within a quantum processor) are weakly attracted by an applied external magnetic field, and form internal, induced magnetic fields in a direction of the external magnetic field.
  • “Delocalization” refers to spreading of classical states over a basis of states having energies within the band. Subsequent forward annealing can bring the physical system into a lower energy state to arrive at a local minimum associated with the excited state, and return the physical system to a spin-glass phase, which has a disordered magnetic state characterized by time dependence.
  • FIG. 4A is a graph 400a that illustrates a plot of a first iteration of an iterative protocol for population transfer and residual energy reduction.
  • the plot includes an energy landscape 402 that represents an amount of potential energy relative to a state of a physical system in a quantum processor (/.e., defined by qubits in a quantum processor), such as quantum processor 126 or the quantum processor of circuit 200 or 300.
  • the first iteration begins at point 404, at which the initial state is a local minimum of energy landscape 402.
  • Performance of a first instance of reverse annealing causes the physical system to pass through a delocalization transition point into a delocalized paramagnetic phase, such that the initial state at point 404 hybridizes into first energy band 406.
  • Point 410 is an excited state within first energy band 406 that is located at a non-minimum point in a solution valley of energy landscape 402 that differs from the solution valley of point 404.
  • Point 414 is a local minimum of energy landscape 402 that is located in a same solution valley as the excited state of point 410.
  • Point 414 is a low-energy state determined after a first iteration of the iterative protocol applied to a problem to be solved by the quantum processor.
  • FIG. 4B is a graph 400b that illustrates a plot of a second iteration of the iterative protocol that is performed after the first iteration shown in FIG. 4A.
  • an initial state of the physical system is point 414 of energy landscape 402, which was the solution to the first iteration of the iterative protocol as shown in FIG. 4A.
  • the reverse and forward annealing are performed as described above with respect to FIG. 4A.
  • the initial state at point 414 hybridizes into second energy band 407.
  • the physical system then undergoes a second population transfer 416 from the initial state at point 414 to point 418 via coherent tunneling with a second tunneling amplitude A 2 .
  • Point 418 is an excited state within second energy band 407 that is located at a non-minimum point in a solution valley of energy landscape 402 that differs from the solution valleys of points 404 and 414.
  • a second energy reduction 420 occurs as part of a second instance of forward annealing.
  • second energy reduction 420 causes the energy of the physical system to lower from an energy at point 418 to an energy of point 422 in the graph 400b.
  • Point 422 is a local minimum of energy landscape 402 that located in a same solution valley as the excited state of point 418, and is a second low-energy state of the problem that has been determined after the second iteration of the iterative protocol.
  • exit criteria can include a particular number of iterations, which can be performed as defined, for example, by a user.
  • exit criteria can include saturation of reduction in an amount of residual energy. For example, the protocol can be iterated until a determined solution no longer reduces an amount of residual energy of the processor, or until a determined solution reduces an amount of residual energy of the processor by less than a threshold.
  • Quantum coherence exists when there is a definite phase relation between different states of qubits within a quantum processor, and allows for computation of quantum information encoded in the quantum states of the qubits.
  • the energy reduction and population transfers described above as part of the iterative protocol are performed in the coherent regime, such that quantum information is not lost due to interaction with the environment in a thermodynamically irreversible manner. Due to the limited thermal relaxation time of the quantum processor, it can be challenging to perform several quantum computations before quantum information decoheres.
  • the first term A(t)H 0 is the product of an initial Hamiltonian H o and a time-dependent tunneling amplitude A(t).
  • the second term B(t)Hp is a product of a delocalization (/.e., problem) Hamiltonian H P and a timedependent energy parameter B(t). Both A(t) and B(t) are coefficients that control a rate of evolution that lie in the range [0,1],
  • the Hamiltonian H of equation (1) can be augmented with a term H ref that favors an initial state of the quantum processor.
  • This augmented Hamiltonian is as follows:
  • the augmented Hamiltonian of equation (2) is a sum of three terms: a driver Hamiltonian term, a reference Hamiltonian term, and a problem Hamiltonian term.
  • the first term of equation (2) is the driver Hamiltonian term, which is equivalent to the first term of equation (1 ).
  • the parameter B x (t) is a time-dependent transverse magnetic field, which is equivalent to the tunneling amplitude A(t) of equation (1 ).
  • the third term of equation (2) is the problem Hamiltonian term H p , which is equivalent to the second term of equation (1 ).
  • the second term of equation (2) which is the reference Hamiltonian term, is the aforementioned added term that favors the initial state of the quantum processor.
  • o z l is the Pauli z-matrix for an I th qubit in the quantum processor.
  • the term s r l ef is a reference state (/.e., initial state) of an I th qubit of a set of reference states
  • S ref s ⁇ ef , ... s ef ⁇ of qubits in the quantum processor.
  • the parameter B z (t) is a time-dependent longitudinal magnetic field that can be used to tune a magnitude of H ref .
  • the reference Hamiltonian H ref is designed such that the set of reference states S ref is the ground state, and that all other eigenstates of the total Hamiltonian H have higher energies than S ref .
  • the local minima in an energy landscape of the quantum processor are separated from one another by Hamming distances, such that an eigenstate of each minimum differs from another by a number of bit flips of qubits in the quantum processor.
  • the increase in energy of an eigenstate in the Hamiltonian H is proportional to a Hamming distance of the eigenstate relative to S ref .
  • the inclusion of the reference Hamiltonian term H ref in the augmented Hamiltonian of equation (2) sets states of H corresponding to local minima in resonance with the ground state of the quantum processor, which is set to S ref .
  • the presence of reference Hamiltonian H ref reduces energies of these resonant states in the total Hamiltonian H relative to their energies in the problem Hamiltonian H p . Therefore, performance of an energy conserving population transfer in a quantum processor governed by the Hamiltonian of equation (2) can reduce an amount of residual energy in the problem Hamiltonian H p , which results in an improved solution to a problem solved by the quantum processor relative to a problem solved governed by the Hamiltonian of equation (1 ).
  • an iterative protocol can be performed for quantum optimization based on the Hamiltonian of equation (2), such as the protocol taught by Wang et al. (H. Wang et al., Many-body localization enables iterative quantum optimization, 2021 , //arxiv.org/pdf/2111 .00842.pdf).
  • each qubit in a quantum processor may be biased toward a state that was determined to be a best solution obtained by previous iterations of the protocol.
  • Reverse annealing and forward annealing are performed as described above with respect to the iterative protocol illustrated in FIGs 4A and 4B.
  • States of the qubits in the quantum processor are read out following each iteration for post-processing, which is performed by a digital computer coupled to the quantum processor. While this protocol provides the desired energy reduction and polynomial time scaling described above, benefits relating to optimization speed-up are at least partially counteracted by programming, readout, and post-processing overhead incurred at each iteration.
  • optimization through residual energy reduction in a quantum processor It can be advantageous to provide a system and a method to reduce the residual energy of a quantum processor used to solve an optimization problem through quantum computation.
  • the problem can be executed by a quantum processor that performs an iterative protocol including coherent reverse annealing and forward annealing that results in the quantum processor being in the spin-glass phase, thereby reducing susceptibility thereof to effects of the thermal environment.
  • Behavior of the quantum processor during forward and reverse annealing can be governed by the augmented Hamiltonian of equation (2) to reduce an amount of residual energy in the problem Hamiltonian H p .
  • the system and method can leverage existing hardware communicatively coupled to the quantum processor to eliminate programming and reading out from the quantum processor as part of each iteration, for example, through using on-chip radio frequency-superconducting quantum interference devices (rf-SQUIDs) that can store quantum information as bias sources for the computational qubits at the onset of each iteration.
  • rf-SQUIDs radio frequency-superconducting quantum interference devices
  • FIG. 5 is a schematic diagram of an example system 500 to determine a solution to a problem having reduced residual energy, in accordance with the presently described systems, devices, articles, and methods.
  • System 500 includes a digital computer 502 having at least one digital processor 504, which is communicatively coupled to a quantum computer 506 having at least one quantum processor 508.
  • system 500 may be part of a hybrid computing system such as computing system 100 in FIG. 1.
  • digital computer 502 and digital processor 504 may be digital computer 102 and digital processor(s) 106, respectively.
  • quantum computer 506 and quantum processor 508 may be quantum computer 104 and quantum processor 126, respectively.
  • digital computer 502 may be a physical computing system having components arranged in a single location or it may be a cloud computing system having components arranged in geographically remote locations.
  • Digital computer 502 includes digital processor 504 and an optimization subsystem 512, which are arranged in communication with one another.
  • Optimization subsystem 512 can be used to determine an improved solution to a problem using an iterative protocol, in which an improved solution obtained by quantum processor 508 has a reduced residual energy relative to a residual energy of a previously obtained solution.
  • at least a portion of optimization subsystem 512 can be computer-readable and/or processor-executable instructions, that, when executed by digital processor 504, perform method(s) for determining the improved solution to the problem as discussed in further detail below.
  • optimization subsystem 512 can include a portion of the memory associated with digital computer 502, such as system memory 122, such that computer-readable instructions to execute the methods described herein (/.e., methods 700, 900, and 1000) may be stored as part of optimization subsystem 512. Additionally, or alternatively, at least a portion of optimization subsystem 512 may include at least a portion of a digital processor that is dedicated to executing instructions to solve optimization problems.
  • digital processor 504 is shown as part of digital computer 502 in FIG. 5, digital processor 504 can alternatively be arranged externally to, but in communication with, digital computer 502 (e.g., as part of a different digital computer).
  • more than one digital processor may be included as part of system 500, and at least one digital processor 504 may be arranged within digital computer 502 and one or more of these digital processors may be arranged externally to digital computer 502 (e.g., as part of one or more different digital computers).
  • each digital processor arranged externally to digital computer 502 may be communicatively coupled to digital computer 502, which may be communicatively coupled to at least one digital processor 504 within digital computer 502 and/or optimization subsystem 512.
  • optimization subsystem 512 is shown as part of digital computer 502 in FIG. 5, optimization subsystem 512 can optionally be arranged in a distributed manner, such that all or a portion of optimization subsystem 512 is located externally to a physical computing system of digital computer 502.
  • a portion of optimization subsystem 512 may be processor-executable instructions stored on a cloud and accessed via digital processor 504 of digital computer 502.
  • digital computer 502 may include more than one physical computing systems, and may include components in different physical locations that are in communication with one another.
  • Quantum computer 506 is illustrated as including at least one quantum processor 508. Quantum computer 506 is arranged in communication with digital computer 502. In some implementations, digital processor 504 of digital computer 502 can provide instructions to quantum computer 506 that control the behavior of one or more components of quantum processor 508. In some implementations, digital processor 504 of digital computer 502 can instruct quantum processor 508 to perform operations directed to optimization, such as those described herein to iterate the protocol to reduce residual energy in quantum processor 508. In some implementations, optimization subsystem 512 is arranged in communication with quantum processor 508 via a superconductive control system 510.
  • Quantum processor 508 can be a quantum processor that performs quantum annealing, and/or adiabatic quantum computing.
  • digital processor 504 of digital computer 502 can transmit signals that instruct quantum processor 508 to perform quantum annealing.
  • optimization subsystem 512 can include non-transitory computer-readable or processor-executable instructions, that, when executed by digital processor 504, cause quantum processor 508 to perform quantum annealing as described herein.
  • Quantum processor 508 includes a plurality of qubits 516.
  • plurality of qubits 516 can, for example, take the form of qubits 201 , 202 of FIG. 2 and/or computational qubit 302 of FIG. 3.
  • Plurality of qubits 516 can be superconducting qubits, such as superconducting flux qubits or superconducting charge qubits.
  • Qubits of plurality of qubits 516 can be magnetically, galvanically, or capacitively coupled to one another by couplers, such as coupler 210 of circuit 200.
  • plurality of qubits 516 can optionally comprise two subsets of qubits therewithin: plurality of computational qubits 516a, which can be a first subset thereof used to represent variables of a problem to be solved by quantum processor 508, and plurality of source qubits 516b, which can be a second subset thereof used to control the first subset of qubits.
  • Each qubit of plurality of computational qubits 516a can be communicatively coupled to a respective qubit of plurality of source qubits 516b in the topology of quantum processor 508 via a respective tunable coupler.
  • plurality of computational qubits 516a can compromise computational qubit 302 of FIG. 3 and plurality of source qubits 516b can compromise source qubit 303, which is communicatively coupled to computational qubit 302 via tunable coupler 315.
  • Superconductive control system 510 of quantum computer 506 is communicatively coupled to plurality of qubits 516, and can be used as part of a control system of quantum computer 506.
  • superconductive control system 510 is part of quantum processor 508, as shown in FIG. 5.
  • this is not intended to be limiting and superconductive control system 510 can be arranged as a part of quantum computer 506 that is external to quantum processor 508.
  • superconductive control system 510 can be used: to program plurality of qubits 516 as part of qubit control system 130; to program superconducting couplers as part of coupler control system 132; and/or, to read out states of plurality of qubits as part of readout control system 128 of computing system 100.
  • superconductive control system 510 can include superconducting control system 301 of FIG. 3, which can include at least superconductive shift register 306, or a combination of superconductive shift register 306 and mediator latch 304 of superconducting control system 301 .
  • superconductive control system 510 can include any superconductive shift register and/or control system as described in: US Patents No. 7,843,209 and 8,169,231 , and International Patent Application PCT/US2022/079944 published as W02023091936A1 .
  • Superconductive control system 510 includes a plurality of QFPs 518, which can be mediator QFPs that each couple a qubit of plurality of qubits 516 to a respective shift register stage of a superconductive shift register in superconductive control system 510.
  • each QFP of plurality of QFPs 518 can be mediator latch 304 of portion of superconducting control system 301 , which can transmit qubit state information of computational qubit 302 to superconductive shift register 306.
  • Digital processor 504 can transmit signals to plurality of QFPs 518, for example, via instructions stored in optimization subsystem 512 to apply or modify bias signals to plurality of QFPs 518.
  • System 500 can be used to determine an optimized (e.g., optimal or near-optimal) solution to a problem through use of a protocol performed by at least quantum computer 506 that iteratively reduces an amount of residual energy of a solution following quantum computation of quantum processor(s) 508.
  • the protocol performed by quantum computer 506 evolves according to a Hamiltonian designed to reduce residual energy of its problem Hamiltonian during coherent reverse annealing and forward annealing.
  • the protocol uses plurality of QFPs 518 of superconductive control system 510 to store results of previous iterations, to bias plurality of qubits 516, or more particularly plurality of computational qubits 516a, at the onset of each iteration, and to modify controllable annealing parameters during the course of each iteration as described below.
  • the protocol uses plurality of source qubits 516b to store results of previous iterations, to bias plurality of computational qubits 516a at the onset of each iteration, and to modify controllable annealing parameters during the course of each iteration as described below.
  • use of plurality of QFPs 518 as the source rf-SQUIDs to bias plurality computational qubits 516a may allow for more complex problems to be solved by quantum processor 508.
  • no qubits of plurality of qubits 516 are reserved as bias sources, such that all qubits therewithin can be used as qubits of plurality of computational qubits 516a. This enables mapping of problems that include a larger number of variables, or more connectivity between variables, to be mapped and embedded onto quantum processor 508.
  • use of plurality of source qubits 516b as the source rf-SQUIDs to bias plurality computational qubits 516a may enable more precise control over the hardware used in the iterative protocols described herein. Parameters of the source rf-SQUIDs can be modified with additional degrees of control when source rf-SQUIDs are plurality of source qubits 516b that include CCJJs relative to implementations in which source rf-SQUIDs comprise only CJJs, such as QFPs of plurality of QFPs 518.
  • the tunable couplers can be programmed to modify feedback from plurality of source qubits 516b on a per-device basis. For instance, a coupling strength of each tunable coupler (e.g., of tunable coupler 315 of FIG. 3 communicatively coupling computational qubit 302 to source qubit 303) can be modified independently to coupling strengths of other ones of the tunable couplers as needed.
  • a coupling strength of each tunable coupler e.g., of tunable coupler 315 of FIG. 3 communicatively coupling computational qubit 302 to source qubit 303
  • FIG. 6 is a graph 600 that illustrates one iteration of a quantum optimization protocol, in accordance with the presently described systems, devices, articles, and methods.
  • Graph 600 plots B z /J on an x-axis, which is a ratio of the longitudinal magnetic field of the quantum processor (B z ) to the total local magnetic field of the quantum processor (/), relative to B x /J on a y-axis, which is a ratio of the transverse magnetic field of the quantum processor (B x ) to the total local magnetic field of the quantum processor (/).
  • Graph 600 includes: spin-glass region 602, indicative of a region in which the quantum processor is in a spin-glass phase; localized paramagnetic region 604, indicative of a region in which the quantum processor is in a localized paramagnetic phase; and, delocalized paramagnetic region 606, indicative of a region in which the quantum processor is in a delocalized paramagnetic phase.
  • the Hamiltonian H of equation (2) is dominated by the problem Hamiltonian term H p .
  • H of equation (2) is dominated by the reference Hamiltonian term B z (t)H ref .
  • H of equation (2) is dominated by the driver Hamiltonian term B x (t)H q .
  • graph 600 includes first order transition boundary 608, marked as a dashed line, and second order transition boundary 610, marked as a solid line.
  • Spin-glass region 602 is located in proximity to an origin point 614 of graph 600, and is delineated by first and second order transition boundaries 608, 610.
  • the quantum processor crosses first order transition boundary 608.
  • the quantum processor crosses second order transition boundary 610.
  • Graph 600 also illustrates tri-critical point 612, which is marked by a star.
  • Tri-critical point 612 is located at the intersection of first order transition boundary 608 and second order transition boundary 610, which is also the intersection of all three of: spin-glass region 602, localized paramagnetic region 604, and delocalized paramagnetic region 606. Iteratively cycling magnetic field energy of the quantum processor around tri-critical point 612 can systematically decrease an amount of residual energy of the quantum processor.
  • FIG. 7 is a flow diagram of a method 700 to perform the quantum optimization protocol illustrated in FIG. 6.
  • Method 700 can include acts 702, 704, 706, 708, 710, 712, 714, and 716, though those of skill in the art will appreciate that alternative embodiments may omit certain acts and/or include additional acts.
  • Method 700 can be performed by system 500, which includes quantum computer 506 that comprises quantum processor 508 and plurality of QFPs 518.
  • forward annealing is performed by the quantum processor to obtain a low-energy solution to a computational problem that includes a set of reference states.
  • quantum processor 508 in response to receiving a topological representation of a problem to be solved, performs forward annealing to evolve plurality of computational qubits 516a and obtain a first low- energy solution to the problem.
  • the first low-energy solution to the problem can be a local minimum of an energy landscape of quantum processor 508.
  • the set of reference states are stored in source rf-SQUIDs that are communicatively coupled to the qubits in the quantum processor to continue to bias the qubits.
  • Each reference state of set of reference states S ref are loaded from one computational qubit of plurality of computational qubits 516a into a respective source rf-SQUID of plurality of source rf-SQUIDs of quantum computer 506, which can be either plurality of QFPs 518 or plurality of source qubits 516b.
  • plurality of QFPs 518 or plurality of source qubits 516b is latched to set of reference states S ref that have been loaded into plurality of QFPs 518 or plurality of source qubits 516b, such that S ref is maintained therein to bias a next iteration of the iterative protocol. At this time, it is not necessary to perform readout of set of reference states S ref loaded into plurality of QFPs 518 or plurality of source qubits 516b.
  • set of reference states S ref is held in plurality of QFPs 518 or plurality of source qubits 516b at an onset of the iterative protocol, states of plurality of computational qubits 516a of quantum processor 508 at the beginning of the first iteration are biased toward the initial low-energy solution.
  • each QFP of plurality of QFPs 518 is mediator latch 304 of FIG. 3, and, storing and latching of a reference state in mediator latch 304 can include: application of a bias to Josephson structure 320 to set mediator latch 304 to a bistable state; loading a state of computational qubit 302 into mediator latch 304 across qubit-to-latch interface 312 and latch-to-qubit interface 318a; and, continuously communicating, by mediator latch 304, the loaded state of computational qubit 302.
  • each source qubit of plurality of source qubits 516b is source qubit 303 of FIG. 3, and, storing and latching of a reference state in source qubit 303 can include: application of a bias to Josephson structure 311 to set source qubit 303 to a bistable state; loading a state of computational qubit 302 into source qubit 303 across tunable coupler 315; and, continuously communicating, by source qubit 303, the loaded state of computational qubit 302.
  • bias signals are applied to Josephson structures of the source rf-SQUIDs to increase longitudinal field energy.
  • Each iteration of the iterative protocol of acts 706, 708, 710, 712, and 714 begins with application of bias signals to plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 516b) that are communicatively coupled to plurality of computational qubits 516a.
  • source rf-SQUIDs of plurality of source rf-SQUIDs are kept in their bistable state and remain latched, though barrier heights of Josephson structures of plurality of source rf-SQUIDs (/.e., CJJs of plurality of QFPs 518 or CCJJs of plurality of second qubits 516b) are increased to increase longitudinal magnetic field energy B z of quantum processor 508.
  • each iteration can begin at origin point 614 at which plurality of computational qubits 516a are biased by plurality of rf- SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 516b), such that quantum processor 508 is in spin-glass region 602.
  • Arrow 616 illustrates an increase of B z , causing the field energy of quantum processor 508 to move to point 618 on graph 600, which is in localized paramagnetic region 604.
  • Arrow 616 crosses first order transition boundary 608 from spin-glass region 602 to localized paramagnetic region 604, at which point the change in B z results in changes in relative energies of states.
  • the H ref term of the Hamiltonian of equation (2) is dominant, and set of reference states S ref is separated from other states by a discernable gap to establish S ref as a low-energy state of total Hamiltonian H.
  • the low energy state is the global ground state of total Hamiltonian H .
  • reverse annealing is performed to increase transverse field energy.
  • Act 708 of each iteration can include performance of reverse annealing by quantum processor 508 to evolve plurality of computational qubits 516a.
  • introduction or increase of B x as part of reverse annealing can hybridize classical states of eigenstates near S re - into a band, and coherent population transfer can move states of plurality of computational qubits 516a of quantum processor 508 to an excited state within the band.
  • Biases of Josephson structures of source rf-SQUIDs i.e., CJJs of plurality of QFPs 518 or CCJJs of plurality of source qubits 516b are kept fixed throughout the reverse annealing of act 708.
  • act 708 of each iteration can begin at point 618 in localized paramagnetic region 604 of graph 600.
  • Arrow 620 represents a change in field caused by reverse annealing, during which transverse field energy B x of plurality of computational qubits 516a in quantum processor 508 is increased.
  • Arrow 620 crosses second order boundary 610 and terminates at point 622, which indicates that quantum processor 508 transitions into delocalized paramagnetic region 606 during the reverse anneal.
  • Eigenstates of quantum processor 508 are delocalized in the computational basis after the transition to delocalized paramagnetic region 606, enabling generation of the conduction band for coherent population transfer.
  • forward annealing is performed to evolve computational qubits to updated states and biases are applied to Josephson structures of the source rf-SQUIDs to decrease longitudinal and transverse field energies.
  • Act 710 of each iteration can include performance of coherent forward annealing by quantum processor 508, which evolves plurality of computational qubits 516a to an updated state and reduces the transverse field energy B x of quantum processor 508.
  • the longitudinal field energy B z of quantum processor 508 is proportionally reduced relative to B x through modification of biases applied to plurality of source rf-SQUIDs (i.e., plurality of QFPs 518 or plurality of source qubits 516b).
  • performance of coherent forward annealing can include quantum dissipation and/or quantum diffusion to reduce an amount of energy of quantum processor 508 following coherent population transfer, which can bring quantum processor 508 from an excited state in a band associated with S ref into a different local minimum.
  • Coherent forward annealing can also evolve plurality of computational qubits 516a according to the parameters of Hamiltonian H of equation (2) to provide a set of updated states representing a solution to the problem.
  • application of biases to CJ Js of plurality of QFPs 518 at act 710 can include application or modification of a bias signal to Josephson structure 320 of mediator latch 304.
  • the bias signal can be carried by signal line 322a and transmitted to Josephson structure 320 through interface 322b. Transmission of the bias signal to mediator latch 304 causes a barrier height of Josephson structure 320 to be reduced while still remaining in a bistable state.
  • application of biases to CJJs or CCJJs of plurality of source qubits 516b at act 710 can include application or modification of a bias signal to Josephson structure 311 of source qubit 303.
  • the bias signal can be carried by signal line 313a and transmitted to Josephson structure 311 through interface 313b. Transmission of the bias signal to source qubit 303 causes a barrier height of Josephson structure 311 to be reduced while still remaining in a bistable state.
  • act 710 of each iteration can begin at point 622 in delocalized paramagnetic region 606 of graph 600.
  • Simultaneous reduction of B x via forward annealing of plurality of computational qubits 516a and B z via biasing Josephson structures of plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 516b) is illustrated by arrow 624, which terminates at origin point 614.
  • arrow 624 crossing second order transition boundary 610 during this act, energy reduction through quantum dissipation and/or quantum diffusion occurs when forward annealing is performed by quantum processor 508 in spin-glass region 602.
  • dynamics of quantum processor 508 do not couple to the thermal environment and effects of thermal noise do not diminish the impact of reduced residual energy.
  • updated states are stored in the source rf-SQUIDs to replace the reference states.
  • Act 712 of each iteration can include storing the set of updated states after quantum evolution of plurality of computational qubits 516a at act 710 in plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 516b).
  • the set of updated states replaces the set of reference states S ref that are currently stored in plurality of source rf-SQUIDs.
  • Replacement of the reference states enables the updated states to become the new set of reference states, such that the solution found at the current iteration can bias plurality of computational qubits 516a in a next iteration of the iterative protocol, in the event that another iteration is performed.
  • storing the set of updated states in plurality of QFPs 518 at act 712 can include unlatching mediator latch 304 to no longer output a reference state (/.e., clearing a previous reference state), loading an updated state of computational qubit 302 into mediator latch 304, and latching mediator latch 304 to the updated state.
  • Unlatching of mediator latch 304 comprises a reduction of longitudinal field energy B z , and consequently a reduction in barrier height of Josephson structure 320, to bring mediator latch 304 into a monostable state in which mediator latch 304 no longer holds the reference state information.
  • the updated state information can then be loaded into mediator latch 304.
  • mediator latch 304 is latched to the updated states, which comprises application of a bias signal to Josephson structure 320 to increase its barrier height for return to a bistable state.
  • storing the set of updated states in plurality of source qubits 516b at act 712 can include unlatching source qubit 303 to no longer output a reference state and reduce longitudinal field energy B z , loading an updated state of computational qubit 302 into source qubit 303, and latching source qubit 303 to the updated state through application of a bias signal to Josephson structure 311 to increase the barrier height thereof.
  • the processor evaluates whether one or more exit criteria of the iterative protocol have been met.
  • the one or more exit criteria can include one or more of the following: an amount of residual energy of the quantum processor has fallen below a threshold; an amount of residual energy of the quantum processor has saturated; the iterative protocol has been performed for a specific, fixed amount of time; and, the iterative protocol has been performed for a fixed number of iterations.
  • saturation of an amount of residual energy in the quantum processor refers to a point at which performance of successive iterations of the iterative protocol results in a change of residual energy that falls below a specific threshold.
  • the residual energy in the quantum processor is measured at 714 during some or all iterations of the iterative protocol in order to assess one or more exit criteria when the criteria includes the amount of residual energy falling below a threshold and/or saturation of an amount of residual energy. For instance, the amount of residual energy can be measured after every m iterations of the iterative protocol.
  • method 700 proceeds to act 716. Alternatively, if it is determined that the one or more exit criteria have not been met, method 700 returns to act 706, and an additional iteration of the iterative protocol is performed. Acts 706, 708, 710, 712, and 714 are repeated to iterate the protocol until it is determined at act 714 that the one or more exit criteria has been met, at which point method 700 advances to act 716.
  • the reference states are returned as an optimized solution to the problem solved by the quantum processor.
  • the iterative protocol ends, and the set of reference states stored in plurality of QFPs 518 is determined to be an optimized solution to the problem solved by quantum processor 508.
  • the set of updated states can be transmitted from superconductive control system 510 to digital computer 502 of system 500 based on an instruction executed by digital processor 504.
  • the set of updated states can be provided directly to optimization subsystem 512 for use in a larger hybrid optimizer that makes use of method 700.
  • the set of updated states can be stored in a memory of optimization subsystem 512 or a memory associated with optimization subsystem 512.
  • return of the reference states as an optimized solution can include transmitting and/or shifting the set of updated states stored in plurality of QFPs 518 to an additional component of superconductive control system 510, such as: superconductive shift register 306 of FIG. 3; a superconductive shift register of US Patents No. 7,843,209 and 8,169,231 , and International Patent Application Publication No. WQ2023091936A1 ; or, any suitable superconductive readout system.
  • superconductive shift register 306 of FIG. 3 such as: superconductive shift register 306 of FIG. 3; a superconductive shift register of US Patents No. 7,843,209 and 8,169,231 , and International Patent Application Publication No. WQ2023091936A1 ; or, any suitable superconductive readout system.
  • return of the reference states as an optimized solution can include transmitting and/or shifting the set of updated states stored in each source qubit of plurality of source qubits 516b to respective ones of plurality of QFPs 518 that are communicatively coupled thereto.
  • return of the reference states as an optimized solution can include latching plurality of QFPs 518 that are communicatively coupled to plurality of computational qubits 516a to capture the set of updates states therein.
  • the return of the reference states can then include propagation thereof to an additional component of superconductive control system 510, such as: superconductive shift register 306 of FIG. 3; a superconductive shift register of US Patents No. 7,843,209 and 8,169,231 , and International Patent Application Publication No.
  • WQ2023091936A1 any suitable superconductive readout system.
  • Residual energy of quantum processor 508 may decrease as a number of iterations of the iterative protocol performed increases. During each iteration of the iterative protocol, there is coherent population transfer and energy reduction in quantum processor 508, through which the magnetic state of quantum processor 508 travels around tri-critical point 612 on graph 600, resulting in a decrease of residual energy in polynomial time.
  • the iterative protocol of graph 600 and method 700 can be performed when the Hamiltonian H of equation (2) does not include individual qubit local field bias terms h t (herein, also s t and also referred to as: “qubit biases”) in its problem Hamiltonian H p .
  • the reference Hamiltonian H ref can be set at each iteration by qubit biases of states stored in plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source rf-SQUIDs).
  • each one of plurality of QFPs 518 is mediator latch 304 of FIG. 3
  • mediator latch 304 can bias computational qubit 302 to set H ref
  • the longitudinal magnetic field energy B z can be varied using analog control lines, such as signal line 322a.
  • qubit bias terms of H ref can be controlled independently of problem Hamiltonian H p .
  • each one of plurality of source qubits 516b is source qubit 303 of FIG. 3
  • source qubit 303 can bias computational qubit 302 to set H ref
  • the longitudinal magnetic field energy B z can be varied using analog control lines, such as signal line 313a.
  • qubit bias terms of H ref can be controlled independently of problem Hamiltonian H p .
  • the iterative protocol of graph 600 and method 700 might not be suitable for solving problems governed by a Hamiltonian H of equation (2) in which problem Hamiltonian H p includes individual qubit bias terms /i z .
  • an alternative iterative energy protocol can be provided.
  • longitudinal magnetic field energy B z is fixed for an entire duration of each iteration of the iterative protocol.
  • qubit biases h t of the reference Hamiltonian H ref can be added to qubit biases in the problem Hamiltonian H p with fixed coefficients, so that there is no need for independent control of qubit biases in H ref via Josephson structures of the plurality of rf-SQUIDs.
  • This alternative protocol can also be beneficial for use with a quantum computer in which the bandwidth of signal lines to bias Josephson structures of the source rf-SQUIDs cannot modify B z at a rate proportional to a rate of change of B x during forward annealing.
  • FIG. 8 is a graph 800 that illustrates one iteration of an alternative quantum optimization protocol, in accordance with the presently described systems, devices, articles, and methods.
  • Graph 800 plots B z /J on an x-axis relative to B x /J on a y-axis.
  • Graph 800 includes: spin-glass region 802, localized paramagnetic region 804, and delocalized paramagnetic region 806, which are regions in which the quantum processor is in a corresponding magnetic phase and can respectively be spin-glass, localized paramagnet, and delocalized paramagnetic regions similar to regions 602, 604, 606 of graph 600 in FIG. 6.
  • Graph 800 also includes: first order transition boundary 808, second order transition boundary 810, and tri-critical point 812, which can be respectively described in manners similar to first order transition boundary 608, second order transition boundary 610, and tri-critical point 612 of graph 600.
  • FIG. 9 is a flow diagram of a method 900 to perform the alternative quantum optimization protocol illustrated in FIG. 8.
  • Method 900 can include acts 902, 904, 906, 908, 910, 912, 914, and 916, though those of skill in the art will appreciate that alternative embodiments may omit certain acts and/or include additional acts.
  • Method 900 can be performed by system 500, which includes quantum computer 506 that comprises quantum processor 508 and plurality of QFPs 518.
  • Act 902 forward annealing is performed to obtain a low-energy solution that includes a set of reference states. Act 902 can be performed in the same manner as act 702 of method 700 described above.
  • the set of reference states are stored in QFPs that are communicatively coupled to the qubits in the quantum processor to continue to bias the qubits.
  • Act 904 can be performed in the same manner as act 704 of method 700 described above.
  • bias signals are applied to Josephson structures of the source rf-SQUIDs to fix a longitudinal field energy of the quantum processor.
  • Act 906 of each iteration of the iterative protocol can include fixing a bias of plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 516b) communicatively coupled to plurality of computational qubits 516a.
  • the biases applied to Josephson structures of the plurality of source rf-SQUIDs can be the sums of qubit biases of terms in the reference Hamiltonian H ref and qubit biases of terms in the problem Hamiltonian H p of the Hamiltonian of equation (2).
  • the applied biases set a longitudinal magnetic field energy B z to a value at which plurality of source rf- SQUIDs are kept in a bistable state and remain latched for the entire duration of the iteration.
  • each iteration can begin at origin point 814 at which quantum processor 508 is in spin-glass region 802.
  • a bias can be applied to plurality of QFPs 518, shown by arrow 816, to set a value of longitudinal magnetic field energy B z of quantum processor 508 to point 818 on graph 800, which remains substantially constant throughout the remainder of the iteration at.
  • point 818 is located in localized paramagnetic region 804, it can be seen that arrow 816 crosses first order transition boundary 808, at which point the change in B z results in relative changes in energies of states.
  • Set of reference states S ref is then separated from other states by a discernable gap (i.e., a gap having a sufficient size to prevent state transition and/or state mixing), which establishes S ref as the low-energy state of total Hamiltonian H of equation (2).
  • a discernable gap i.e., a gap having a sufficient size to prevent state transition and/or state mixing
  • reverse annealing is performed to increase transverse field energy.
  • Act 908 of each iteration can include performance of reverse annealing by quantum processor 508 to evolve plurality of qubits 516.
  • Act 908 can be performed in substantially the same manner as act 708 of method 700 described above.
  • act 908 of each iteration can begin at point 818 in localized paramagnetic region 804 of graph 800.
  • Arrow 820 represents an increase in transverse magnetic field B x in quantum processor 508 caused by the performance of reverse annealing.
  • Arrow 820 crosses first order transition boundary 808 and second order transition boundary 810, and terminates at point 822.
  • second order transition boundary 810 After crossing second order transition boundary 810 into delocalized paramagnetic region 606, eigenstates of plurality of qubits 516 of quantum processor 508 can delocalize and then hybridize into the band in which coherent population transfer occurs during reverse annealing.
  • forward annealing is performed to evolve qubits to updated states and decrease the transverse field energy.
  • quantum processor 508 performs coherent forward annealing to evolve plurality of computational qubits 516a from a current state to an updated state, and the cumulative set of updated states represents a solution to the problem solved by quantum processor 508.
  • the transverse field energy B x of quantum processor 508 also reduces as part of coherent forward annealing. Residual energy of quantum processor 508 is reduced at act 910 due to quantum dissipation and/or quantum diffusion.
  • act 910 of each iteration can begin at point 822 in delocalized paramagnetic region 806 of graph 800. Forward annealing is performed by quantum processor 508 to lower B x , as shown by arrow 824. Arrow 824 traverses from delocalized paramagnetic region 806 to spin-glass region 802 across second order transition boundary 810, and then from spin-glass region 802 to localized paramagnetic region 804 across first order transition boundary 808. As a value of B z remains fixed during method 900, act 910 terminates at point 818 back in localized paramagnetic region 804, in which quantum processor 508 is susceptible to effects of the thermal environment.
  • updated states are stored in the plurality of source rf- SQUIDs to replace the reference states.
  • Act 912 of each iteration can include storing the set of updated states after quantum evolution at act 910 of plurality of computational qubits 516a in the plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 516b).
  • mediator latch 304 can be unlatched to no longer output a reference state (/.e., clearing a previous reference state), an updated state of computational qubit 302 can be loaded into mediator latch 304, and mediator latch 304 can be latched to the updated state.
  • longitudinal field energy B z of quantum processor 508 is reduced to bring Josephson structure 320 of mediator latch 304 to a monostable state in which mediator latch 304 no longer holds the reference state information.
  • the barrier height of Josephson structure 320 of mediator latch 304 can be raised to return to a bistable state via application or modification of a bias signal transmitted thereto through interface 322b.
  • the plurality of rf-SQUIDs is plurality of source qubits 516b, and each one thereof is source qubit 303 of FIG. 3: longitudinal field energy B z of source quit 303 can be reduced to unlatch source qubit 303 such that the reference state therein is cleared; an updated state of computational qubit 302 can be loaded into source qubit 303; and, source qubit 303 be latched to the updated through the application or modification of a bias signal transmitted to Josephson structure 311 through interface 313b.
  • act 912 of each iteration can begin at point 818 in localized paramagnetic region 804 in graph 800.
  • a bias applied to qubits of plurality of computational qubits 516a via plurality of source rf-SQUIDS reduces B z in quantum processor 508, as shown by arrow 826.
  • arrows 816 and 826 are not shown to be overlapping, it is to be understood that that both arrows 816 and 826 extend along the x-axis of graph 800 at which a value of B z /J is a minimum value (herein, the minimum value is zero in an ideal system, but in non-ideal implementations can include values that are substantially zero), and that arrows 816 and 826 are illustrated as separated from one another for visual clarity.
  • Arrow 826 traverses from localized paramagnetic region 804 to spin-glass region 802 across first order transition boundary 808 to return quantum processor 508 to origin point 814.
  • the reduction in B z reduces a barrier height of Josephson structure 320 or Josephson structure 311 to unlatch the reference state stored in a respective one of mediator latch 304 or source qubit 303, such that updated states of quantum processor 508 after quantum evolution at act 910 can be stored in their place.
  • Act 914 it is determined whether one or more exit criteria of the iterative protocol has been met. Act 914 can be performed in the same manner as act 714 of method 700 described above.
  • Act 916 the updated states are returned as an optimized solution to the problem solved by the quantum processor. Act 916 can be performed in the same manner as act 716 of method 700 described above.
  • the iterative protocol of method 700 and graph 600 and the alternative iterative protocol of method 900 and graph 800 both reduce residual energy in a quantum processor at each iteration.
  • the QFPs of an existing superconductive control system or a subset of qubits in the quantum processor are used to set reference states to a low- energy state of a problem based on the augmented Hamiltonian of equation (2).
  • This set low-energy state also enables strategic transition of the quantum processor to a delocalized paramagnetic phase during reverse annealing to perform coherent population transfer, and enables strategic transition of the quantum processor through or to a spin-glass phase during forward annealing for desirable energy reduction with limited thermal effects.
  • the low-energy state is a global ground state of the problem. In other implementations, the low-energy state is a local minimum of the problem.
  • Updated states of the quantum processor determined during forward annealing can be stored in the source rf-SQUIDs (/.e., QFPs or source qubits) to bias a next iteration of an iterative protocol until exit criteria are met, at which point efficient optimization has been performed.
  • the iterative protocol of method 900 and graph 800 can be used to determine an optimized solution for a broader variety of problem types (7.e. , is not limited to problems without qubit bias terms h t in the problem Hamiltonian H p ), the iterative protocol of method 900 and graph 800 can be less efficient than the iterative protocol of method 700 and graph 600 in some implementations.
  • act 710 includes performance of forward annealing and biasing the QFPs to simultaneously decrease longitudinal and transverse energies, which, as shown by arrow 624 of the protocol of graph 600, returns the quantum processor to origin point 614 where energy values are at a minimum.
  • act 710 the quantum processor has crossed both first and second order transition boundaries 608, 610, and act 712 can be performed immediately thereafter when the quantum processor is at origin point 614.
  • act 910 includes only performance of reverse annealing such that, as shown by 824 in graph 800, only transverse field energy is reduced.
  • the quantum processor is at point 818 and has a magnetic phase in localized paramagnetic region 804, at which storage of the updated states cannot be performed. So, after the forward anneal, an additional action is required to reduce the longitudinal energy to return the quantum processor to origin point 814 (shown in graph 800 as arrow 826) before the QFPs can be unlatched, loaded, and re-latched to store the updated states.
  • the iterative protocol of method 900 and graph 800 may require additional time to complete.
  • the simultaneous actions at act 710 cause a larger portion of the forward anneal to occur in spin-glass region 602 relative to the portion of the forward anneal at act 910 that occurs in spin-glass region 802 of graph 800, such that a greater energy reduction may be incurred per iteration.
  • FIG. 10 is an example method 1000 to obtain an optimized solution to a computational problem.
  • Method 1000 can be performed by at least a quantum computer that includes at least one quantum processor, such as by quantum computer 104 including quantum processor 126, circuit 200, or quantum computer 506 including quantum processor(s) 508.
  • Method 1000 includes act 1002, which includes acts 1002a, 1002b, 1002c, 1002d, and 1002e, and act 1004. Those of skill in the art will appreciate that alternative embodiments may omit certain acts and/or include additional acts.
  • method 1000 can be performed when at least one digital processor, such as digital processor 504, executes processorexecutable instructions or other logic associated with optimization subsystem 512 that cause the at least one digital processor to perform acts 1002 and 1004.
  • at least one digital processor such as digital processor 504
  • the quantum processor used in method 1000 includes a plurality of qubits, which comprises at least a first subset of qubits. Each qubit of the plurality of qubits is coupled to a respective controllable storage device of a plurality of controllable storage devices.
  • the first subset of qubits can be plurality of computational qubits 516a of quantum processor(s) 508.
  • the plurality of controllable devices can be a plurality of existing on- chip source rf-SQUIDs.
  • the plurality of controllable storage devices can be plurality of QFPs 518 coupled to plurality of computational qubits 516a.
  • the plurality of qubits can also comprise a second subset of qubits, each of which is communicatively coupled to a respective qubit of the first subset of qubits via a tunable coupler.
  • the plurality of controllable storage devices can be plurality of source qubits 516b coupled to plurality of computational qubits 516a.
  • Quantum processor 508 can be programmed according to the augmented Hamiltonian of equation (2).
  • digital processor 504 of digital computer 502 can instruct quantum computer 506 to execute acts of method 1000.
  • method 1000 can include: receipt by the at least one digital processor of a problem to be solved by the quantum processor.
  • digital processor 504 can receive an optimization problem, for example, from user-provided instructions to digital processor 504 via a component of a user input/output subsystem.
  • a problem to be solved by quantum processor 508 can be received by digital processor 504 in response to a function call or invocation within a larger program, such as a program executing a larger optimization solver, network, or architecture.
  • the problem received can be a sub-problem of a problem being solved by a hybrid solver or a training model to be optimized.
  • a hybrid solver may determine an initial solution of either the entire problem or a subproblem thereof through classical computation. Then, the classically-determined initial solution to the problem or sub-problem may be provided to a quantum processor to seek an improved solution through the acts of method 1000.
  • the at least one digital processor can determine a topological representation of the problem to be solved by the quantum processor and embed the topological representation of the problem onto the quantum processor.
  • logic to map the received problem onto quantum processor 508 includes instructions for digital processor 504 to map the received problem onto a topological representation and embedding the topological representation onto quantum processor 508, which can be stored in a memory associated with digital computer 502 and/or optimization subsystem 512.
  • the received problem can be mapped to a topological representation that is embedded onto a quantum processor.
  • the topological representation can be in a form of at least one of: a planar graph or a non-planar graph.
  • the topological representation can be a graph in the form of: a plurality of vertices, and one or more edges.
  • the topological representation can be an interconnected graph of the same structure had by the topology of qubits, and in some implementations, more particularly by the topology of the first subset of qubits.
  • the quantum processor can be programmed such that qubit biases of qubits belonging to the first subset of qubits, coupler biases of couplers that communicatively couple qubits of the first subset of qubits to one another, and coupling strengths between the qubits of the first subset of qubits map the relationships between variables as represented by the topological representation.
  • Some techniques used to embed the topological representations of the problem onto the quantum processor are described in US Patents No. 7,984,012; 8,244,662; and 9,501 ,747. Examples of fixed topologies are described in greater detail in: US Patents No. 7,533,068; 9,170,278; 9,178,154; and, 11507871 ;; and, International Patent Application Publication W02023009609A1.
  • method 1000 includes: performance of an initial instance of forward annealing by the quantum processor to obtain a low-energy state of the problem comprising an initial set of reference states; and, storing the initial set of the reference states in the plurality of controllable storage devices coupled to the first subset of qubits.
  • these actions may correspond to acts 702 and 704 of method 700 or acts 902 and 904 of method 900.
  • the at least one digital processor can cause the quantum processor to perform the initial instance of forward annealing, and can transmit bias signals to the plurality of controllable storage devices to cause them to store the initial set of the reference states.
  • method 1000 can include modification of coupling strengths between the qubits of the first subset of qubits and qubits of the second subset of qubits.
  • Modification of the coupling strengths can comprise application or modification of an amount of flux in Josephson structures of the plurality of tunable couplers to modify a magnitude thereof.
  • modification of a coupling strength between computational qubit 302 and the source qubit 303 can include transmission of one or more control signals through signal line 321a to bias Josephson structure 319 of tunable coupler 315.
  • an iterative protocol is performed until one or more exit criteria are met.
  • the one or more exit criteria can be based on one or more of: an amount of residual energy of the quantum processor has fallen below a threshold; saturation of the residual energy of the quantum processor; performance of the iterative protocol for a fixed amount of time; and, performance of a fixed number of iterations of the iterative protocol.
  • Act 1002 includes acts 1002a, 1002b, 1002c, 1002d, and 1002e.
  • the iterative protocol performed at 1002 can include: the protocol illustrated by graph 600 of FIG. 6 defined by acts 706-714 of FIG. 7 or the protocol illustrated by graph 800 of FIG. 8 defined by acts 906-914 of FIG. 9.
  • a plurality of controllable storage devices is biased in order to bias the first subset of qubits.
  • the controllable storage devices store a set of reference states corresponding to a low-energy state of the quantum processor.
  • the low-energy state is a global ground state of the problem.
  • the low-energy state is a local minimum of the problem.
  • the first subset of qubits is biased based on the reference states stored in the controllable storage devices and/or the additional bias applied to the controllable storage devices.
  • a plurality of source rf-SQUIDs (/.e., plurality of QFPs 518 or plurality of source qubits 303) can bias plurality of computational qubits 516a based at least on set of reference states stored therein that represent a previously determined solution to a problem being solved by quantum processor 508. In each iteration, a further bias can be applied to the plurality of source rf-SQUIDs to modify a longitudinal field energy B z of quantum processor 508.
  • quantum processor 508 Upon application of the bias, quantum processor 508 is in a localized paramagnetic phase, in which a relative difference in energies of states separates the set of reference states from energies of other states due at least to the reference Hamiltonian term in equation (2). As a result, the low-energy state of quantum processor 508 is set to the set of reference states.
  • the at least one digital processor can transmit a first set of iteration bias signals to the plurality of controllable storage devices (/.e., plurality of QFPs 518 or plurality of source qubits 516b).
  • the first set of iteration bias signals can set a low-energy state of the quantum processor to the set of reference states stored in the plurality of controllable storage devices.
  • act 1002a may correspond to act 706 of method 700 (FIG. 7), in which bias signals are applied to Josephson structures of source rf-SQUIDs to increase a longitudinal field energy. This is illustrated by the movement from origin point 614 in spin-glass region 602 to point 618 in localized paramagnetic region 604 along arrow 616 in FIG. 6.
  • a controllable storage device can be mediator latch 304 or source qubit 303 of FIG. 3 that stores a previously determined state of a qubit of the first subset of qubits, which can be computational qubit 302.
  • the longitudinal field energy of a quantum processor comprising computational qubit 302 can be increased through one of: transmission of a bias signal along signal line 322a that is applied to Josephson structure 320 of mediator latch 304 or transmission of a bias signal along signal line 313a that is applied to Josephson structure 311 of source qubit 303.
  • application of the bias to mediator latch 304 imposes a bias on computational qubit 302 via qubit-to-latch interface 312 and latch-to-qubit interface 318a.
  • application of the bias to source qubit 303 imposes a bias onto computational qubit 302 via tunable coupler 315.
  • the bias signal is only applied to the one of mediator latch 304 or source qubit 303 for a duration of act 706.
  • act 1002a may correspond to act 906 of method 900 (FIG. 9), in which bias signals are applied to Josephson structures of source rf-SQUIDs to fix a longitudinal field energy, as illustrated by the movement from origin point 814 to point 818 along arrow 816 in FIG. 8.
  • This applied bias may be kept constant for the remaining duration of the iteration.
  • a controllable storage device can be mediator latch 304 or source qubit 303 of FIG. 3 that stores a previously determined state of a qubit of the first subset of qubits, which can be computational qubit 302.
  • a fixed bias signal can be applied to Josephson structure 320 or 311 of a respective one of mediator latch 304 or source qubit 303 via signal line 322a or 313a to impose a bias on computational qubit 302.
  • Application of the fixed bias signal causes the bias applied by mediator latch 304 or source qubit 303 onto computational qubit 302 of the quantum processor to remain constant throughout acts 908 and 910 of method 900, which correspond to acts 1002b and 1002c of method 1000. As such, the longitudinal field energy remains constant during this time.
  • the quantum processor performs reverse quantum annealing to cause the quantum processor to undergo a coherent population transfer.
  • quantum processor 508 can perform reverse quantum annealing, which raises a transverse field energy of quantum processor 508 such that quantum processor 508 transitions to a delocalized paramagnetic phase.
  • eigenstates of quantum processor 508 delocalize and then hybridize into an energy band, such as first energy band 406 of FIG. 4A or second energy band 407 of FIG. 4B.
  • quantum processor 508 can move into an excited state in the energy band that is associated with a state of a different local minimum of an energy landscape of quantum processor 508, such as population transfer 408 from the point 404 to point 410 in FIG. 4A or population transfer 416 from point 414 to point 418 in FIG. 4B.
  • the at least one digital processor can cause the quantum processor to perform reverse quantum annealing.
  • act 1002b may correspond to act 908 of method 900, as illustrated by the movement from point 818 in localized paramagnetic region 804 to point 822 in delocalized paramagnetic region 806 along arrow 820 in graph 800.
  • the quantum processor performs forward quantum annealing to cause the quantum processor to undergo an energy reduction when transitioning through a spin-glass phase and to cause the first subset of qubits to evolve to a set of updated states.
  • Performance of forward quantum annealing by quantum processor 508 reduces a transverse field energy of quantum processor 508 in each iteration of the iterative protocol. This also reduces an amount of residual energy in quantum processor 508 through movement from the excited state in the energy band to an associated local minimum of the energy landscape of quantum processor 508, for instance, as shown by energy reduction 412 between points 410 and 414 in FIG. 4A and energy reduction 420 between points 418 and 422 in FIG. 4B. Quantum processor 508 moves from a delocalized paramagnetic phase through the spin-glass phase for at least part of the forward quantum anneal.
  • the first subset of qubits (e.g., plurality of computational qubits 516a of quantum processor 508) is evolved during the forward quantum anneal to an updated set of states of an improved solution to the problem relative to the solution represented by the set of reference states.
  • act 1002c can also include modification of bias signals applied to the plurality of controllable storage devices at the same time as performance of forward quantum annealing.
  • Act 1002c may correspond to act 710 of method 700, in which forward annealing is performed and bias signals are applied to Josephson structures of the source rf-SQUIDs simultaneously to proportionally decrease the transverse field energy and the longitudinal field energy of quantum processor 508. This is illustrated in graph 600 by the movement from point 622 in delocalized paramagnetic region 606 to origin point 614 in spin-glass region 602 along arrow 624.
  • controllable storage device is mediator latch 304 or source qubit 303 of FIG. 3
  • transverse field energy is reduced through modification of a bias signal applied to Josephson structure 320 or 311 of mediator latch 304 or source qubit 303 via a respective one of signal line 322a or 313a during performance of forward annealing.
  • act 1002c may correspond to act 910 of method 900 and only forward quantum annealing is performed. This is illustrated in graph 800 by the movement from point 822 in delocalized paramagnetic region 806 to point 818 in localized paramagnetic region 804 along arrow 824. Arrow 824 crosses both second order transition boundary 810 and first order transition boundary 808, such that quantum processor 508 is in spin-glass region 802 for a portion of the forward anneal, during which dynamics of quantum processor 508 are favorable for efficient energy reduction.
  • the at least one digital processor causes the quantum processor to perform forward annealing and optionally to transmit a second set of iteration bias signals to the controllable storage devices.
  • the second set of iteration bias signals can reduce the longitudinal field energy of the quantum processor at a rate proportional to the reduction in transverse field energy.
  • the set of updated states of the first subset of qubits are stored in the plurality of controllable storage devices as the set of reference states to replace the current set of reference states.
  • the set of updated states are to be used as the set of reference states in a next iteration of the iterative protocol.
  • the least one digital processor can transmit a final set of iteration bias signals to the plurality of controllable storage devices.
  • the final set of iteration bias signals can cause the plurality of controllable storage devices to store the set of updated states as the set of reference states.
  • the set of reference states stored in the plurality of source rf-SQUIDs (7.e. , plurality of QFPs 518 or plurality of source qubits 516b) can be cleared and replaced with the set of updated states determined as a result of the forward annealing at act 1002c.
  • barrier heights of Josephson structures of the plurality of source rf-SQUIDs can be reduced in order to set the plurality of source rf-SQUIDs to monostable states.
  • act 1002d may correspond to act 712 of method 700 or act 912 of method 900. [00293] In some implementations, act 1002d may correspond to act 712 of method 700 (FIG. 7).
  • act 1002d may correspond to act 912 of method 900 (FIG. 9).
  • controllable storage device is mediator latch 304 or source qubit 303 of FIG. 3
  • a bias signal is first applied to Josephson structure 320 or 311 of mediator latch 304 or source qubit 303 via a respective one of signal line 322a or 313a to modify the previously-fixed bias of mediator latch 304 or source qubit 303 that was applied at act 906.
  • Said bias signal is to reduce the longitudinal field energy of the quantum processor to a minimum value (/.e., zero or substantially zero) and return the quantum processor to the spinglass phase before being able to store the updated state of computational qubit 302 in either mediator latch 304 or source qubit 303.
  • the one or more exit criteria are evaluated. If it is determined that the one or more exit criteria have not been met, method 1000 returns to act 1002a and another iterative of the iterative protocol is performed. Conversely, if the one or more exit criteria have been met, method 1000 proceeds to act 1004.
  • the set of updated states stored in the plurality of controllable storage devices are returned as the optimized solution to the problem.
  • the controllable storage devices are QFPs
  • quantum processor 508 quits execution of the iterative protocol of act 1002 and the set of updated states in plurality of QFPs 518 is output via superconductive control system 510.
  • the controllable storage devices are source qubits
  • quantum processor 508 quits execution of the iterative protocol of act 1002 and the set of updated states stored in plurality of source qubits 516b can be transmitted to QFPs of plurality of QFPs 518 coupled thereto and then output via superconductive control system 510.
  • QFPs of plurality of QFPs 518 that are communicatively coupled to plurality of computational qubits 516a can be latched to capture the set of updated states that have also been latched to plurality of source qubits 516b, and the set of updated states can be transmitted from plurality of QFPs 518 to superconductive control system 510 for readout.
  • the set of updated states are returned from quantum computer 506 to optimization subsystem 512 of digital computer 502 for use in a broader optimization solver, network, or architecture.
  • the superconductive control system includes a superconducting shift register.
  • Each controllable storage device of the plurality of controllable storage devices can be communicatively coupled to a respective shift register stage of the superconducting shift register.
  • return of the optimized solution to the problem can include: transmission of the set of updated states stored in the plurality of controllable storage devices to shift register stages in the superconducting shift register; propagation of the set of updated states along the superconducting shift register; and, transmission of the set of updated states from to the digital computer as the optimized solution to the problem.
  • superconductive control system is superconductive control system 510 of FIG. 5 or superconducting control system 301 of FIG. 3.
  • an updated state of a qubit of the first subset of qubits e.g., computational qubit 302 is stored in either mediator latch 304 or source qubit 303 is part of an optimized solution to a problem.
  • the updated state can be transmitted to shift register stage 324 of superconductive shift register 306 based on application of a control signal to Josephson structure 328 of shift register stage 324 via signal line 332a.
  • the updated state information is propagated along superconductive shift register 306 via application of control signals to subsequent shift register stages until reaching a terminal end thereof at which the state information can be read out.
  • the at least one digital processor can receive the set of reference states stored in the plurality of controllable storage devices as the optimized solution to the problem.
  • Method 1000 can be used to determine an optimized (e.g., optimal or near optimal) solution to a problem to be solved through determination of a solution having a reduced residual energy.
  • a superconductive control system can be used to program or read out qubit data that includes controllable storage devices coupled to a first subset of qubits within the quantum processor, and can be controlled as an on-chip memory without requiring additional hardware. This enables the first subset of qubits to be biased based on a previous solution without the overhead associated with reading out the previous solutions and programming the first subset of qubits at the onset of each iteration.
  • Each iteration of the iterative protocol reduces an amount of residual energy in the quantum processor by cycling through magnetic phases around, or in proximity, to the tri-critical point, to strategically advance the state of the quantum processor in phases having favorable quantum dynamics.
  • the cycling of magnetic phases can optionally be achieved in part through modification of biases of the controllable storage devices at different acts of an iteration of the protocol.
  • the quantum processor is programmed based on an augmented Hamiltonian that has a term to proportionally increase energies of local minima based on their distance from an initial state, which limits a probability that the quantum processor becomes stuck in a local minimum and is unable to find an optimal solution to a problem to be solved.
  • the above described method(s), process(es), or technique(s) could be implemented by a series of processor readable instructions stored on one or more non-transitory processor-readable media. Some examples of the above described method(s), process(es), or technique(s) method are performed in part by a specialized device such as an adiabatic quantum computer or a quantum annealer or a system to program or otherwise control operation of an adiabatic quantum computer or a quantum annealer, for instance a computer that includes at least one digital processor.
  • the above described method(s), process(es), or technique(s) may include various acts, though those of skill in the art will appreciate that in alternative examples certain acts may be omitted and/or additional acts may be added.

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Abstract

Des systèmes et des procédés pour obtenir des solutions optimisées en utilisant un processeur quantique peuvent consister à réduire l'énergie résiduelle à l'intérieur de celui-ci en utilisant un protocole itératif. Le processeur quantique comprend des bits quantiques couplés à des dispositifs de stockage pouvant être commandés d'un système de commande supraconducteur. Le protocole itératif comprend : l'application de polarisations aux dispositifs de stockage pouvant être commandés pour définir des états de référence stockés dans ceux-ci comme état de faible énergie ; la réalisation d'un recuit inverse pour provoquer un transfert de population cohérente ; la réalisation d'un quantique vers l'avant pour provoquer une réduction d'énergie lors de la transition par une phase de verre de spin et obtenir des états mis à jour ; et le stockage des états mis à jour dans les dispositifs de stockage pouvant être commandés pour remplacer les états de référence. Pendant chaque itération, une phase magnétique des cycles de processeur quantique autour d'un point tricritique et des recuits sont effectués dans des phases ayant une dynamique favorable pour réduire efficacement l'énergie résiduelle et limiter les effets thermiques. L'utilisation de dispositifs de stockage pouvant être commandés sur puce existants réduit le surdébit de lecture et de programmation de l'optimisation.
PCT/US2024/060597 2023-12-21 2024-12-17 Systèmes et procédés d'optimisation par réduction itérative d'énergie dans un processeur quantique Pending WO2025188389A2 (fr)

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