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WO2025165863A1 - Systems and methods for frequency stabilization hardware - Google Patents

Systems and methods for frequency stabilization hardware

Info

Publication number
WO2025165863A1
WO2025165863A1 PCT/US2025/013573 US2025013573W WO2025165863A1 WO 2025165863 A1 WO2025165863 A1 WO 2025165863A1 US 2025013573 W US2025013573 W US 2025013573W WO 2025165863 A1 WO2025165863 A1 WO 2025165863A1
Authority
WO
WIPO (PCT)
Prior art keywords
frequency
signal
transceiver
received
perform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/US2025/013573
Other languages
French (fr)
Inventor
Boris Sijanec
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Air Wireless Inc
Original Assignee
Air Wireless Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Air Wireless Inc filed Critical Air Wireless Inc
Publication of WO2025165863A1 publication Critical patent/WO2025165863A1/en
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • H04W56/0035Synchronisation arrangements detecting errors in frequency or phase
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14Demodulator circuits; Receiver circuits
    • H04L27/144Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
    • H04L27/152Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements

Definitions

  • the field of the invention relates generally to frequency stabilization hardware, and more specifically, to systems and methods for frequency stabilization in fixed wireless access networks.
  • FWA fixed wireless access
  • CPE customer premises equipment
  • frequency synchronization is crucial. Allowing synchronized operation across the network reduces interference and enhances overall performance. Remote frequency stabilization helps to resolve several issues, such as, regulatory compliance and frequency drift compensation, for example. Regulatory bodies allocate specific frequency bands for FWA services to prevent interference and ensure efficient use of the radio spectrum. Electronic components and environmental conditions can cause the frequency of a wireless signal to drift over time and temperature compensation. Additionally, temperature changes can impact the s tabil i ty of electronic components, further affecting performance.
  • DOCSIS 3. 1 International Standard is used as transport standard in FWA situations.
  • the DOCSIS 3.1 standard enhances the capabilities of cable networks, allowing for higher data throughput and more efficient use of existing cable infrastructure.
  • the DOCSIS 3.1 standards requires low phase noise to achieve high throughputs.
  • the implications of phase noise in the realm of DOCSIS 3. 1 are multi-faceted. First, excessive phase noise can introduce distortions to the signal, posing challenges to its quality and making accurate demodulation more difficult. Additionally, higher levels of phase noise may contribute to elevated bit error rates, thereby diminishing the overall reliability of data transmission.
  • QAM Quadrature Amplitude Modulation
  • a communication system includes at least one transceiver.
  • the at least one transceiver includes at least one processor in communication with at least one memory device configured to store computer-executable instructions.
  • the instructions When executed by the processor, the instructions cause the transceiver to receive a radio frequency continuous wave signal.
  • the instructions also cause the transceiver to perform a downconversion on the radio frequency to an intermediate frequency.
  • the instructions further cause the transceiver to activate a Phase-Locked Loop (PLL) implementation feedback control system to compare the phase of the received signal with a reference signal generated by a Voltage-Controlled Oscillator (VCO).
  • PLL Phase-Locked Loop
  • the instructions cause the transceiver to perform a frequency comparison to compare the frequency of the received radio frequency signal with the locally generated reference frequency. Moreover, the instructions cause the transceiver to establish a feedback loop within the PLL to continuously adjust the VCO frequency based on the phase difference between the received signal and a local oscillator signal. Furthermore, the instructions cause the transceiver to perform frequency locking, wherein the local oscillator becomes frequency-locked to the received RF signal.
  • the communication system may include additional, less, or alternate functionality, including that discussed elsewhere herein.
  • Figure 1 illustrates an exemplary process for achieving frequency stabilization using a radio frequency (RF) Continuous Wave (CW) signal, in accordance with at least one embodiment.
  • RF radio frequency
  • CW Continuous Wave
  • Figure 2 illustrates an exemplary transceiver for frequency stabilization using the process shown in Figure 1.
  • the present embodiments may relate to. inter alia, networkbased system and method for frequency stabilization in fixed wireless access (FWA) networks.
  • the process may be performed by a frequency stabilization (FS) system.
  • the FS system may include a midbox or interface between two or more transmission and/or receiving devices
  • frequency stabilization is performed by using a received radio frequency continuous wave signal utilizing the known characteristics of the incoming signal to correct or adjust for the signal of a local oscillator.
  • the transceiver must get into a ’lock" state to ensure that it operates at the correct frequency.
  • the lock state is mandatory to enable transmission on the transceiver.
  • FIG. 1 illustrates an exemplary process 100 for achieving frequency stabilization using a radio frequency (RF) Continuous Wave (CW) signal, in accordance with at least one embodiment.
  • process 100 illustrates how frequency stabilization is achieved with help of a radio frequency (RF) Continuous Wave (CW) signal.
  • the transceiver 200 receives 105 a RF continuous wave signal.
  • the RF CW signal is received on a high frequency.
  • the continuous wave signal is a steady-state sinusoidal waveform with a constant frequency, making it suitable for frequency reference purposes
  • the transceiver 200 performs a downconversion 110 to an intermediate frequency (IF).
  • the transceiver 200 downconverts 110 the received RF signal to an Intermediate Frequency (IF) using a mixer and a local oscillator in the receiver. This involves heterodyning, where the RF signal is mixed with the output of a local oscillator to produce the IF.
  • the transceiver 200 activates a Phase-Locked Loop (PLL) 115 implementation.
  • the transceiver 200 integrates a Phase-Locked Loop (PLL) 115 in the receiver circuit.
  • a PLL 115 is a feedback control system that compares the phase of the received signal with a reference signal generated by a Voltage-Controlled Oscillator (VCO).
  • VCO Voltage-Controlled Oscillator
  • the transceiver 200 performs 120 a frequency comparison.
  • the transceiver 200 uses the PLL to compare the frequency of the received RF signal with the locally generated reference frequency.
  • the PLL continuously adjusts the VCO frequency to minimize the phase difference between the received signal and the local oscillator signal.
  • the transceiver 200 compares the received signal to the Temperature Compensated Crystal Oscillator (TCXO).
  • TCXO Temperature Compensated Crystal Oscillator
  • the transceiver 200 activates 125 a Feedback Mechanism.
  • the transceiver 200 establishes a feedback loop within the PLL to continuously adjust the VCO frequency based on the phase difference between the received signal and the local oscillator signal. This feedback mechanism keeps the local oscillator frequency synchronized with the incoming RF signal.
  • the transceiver 200 performs 130 frequency locking.
  • the local oscillator becomes frequency-locked to the received RF signal. This frequency locking ensures that the receiver operates at the exact frequency of the incoming signal, providing stability and accuracy.
  • the transceiver 200 performs 135 output stability.
  • the stabilized frequency from the local oscillator is then used as a stable reference for downstream and upstream signal conversion and other receiver operations.
  • the transceiver 200 performs continuous monitoring and adjustment.
  • the described process provides an effective means of stabilizing the frequency of a local oscillator in a receiver, contributing to improved overall performance and signal quality.
  • Figure 2 illustrates an exemplary transceiver 200 for frequency stabilization using the process 100 (show n in Figure 1).
  • At least one of the technical problems addressed by this system may include: (i) improved frequency stabilization; (ii) improved transmission accuracy; (iii) enhanced network performance; (iv) higher data throughput over the available frequency bands; and/or (v) improved bandwidth.
  • a technical effect of the systems and processes described herein may be achieved by performing at least one of the following steps: a) receive one or more messages for transmission to the receiver; b) convert the one or more messages using a wireless transport standard; c) analyze the converted one or more message to determine one or more appropriate overhead reduction techniques; d) perform GFDM and OQAM modulation on the one or more converted messages; and/or e) transmit the one or more messages at a higher modulation over the wired connection to the at least one receiver.
  • the above-described embodiments of the disclosure may be implemented using computer programming or engineering techniques including computer software, firmw are, hardware or any combination or subset thereof. Any such resulting program, having computer-readable code means, may be embodied or provided within one or more computer-readable media, thereby making a computer program product, i.e., an article of manufacture, according to the discussed embodiments of the disclosure.
  • the computer-readable media may be, for example, but is not limited to, a fixed (hard) drive, diskette, optical disk, magnetic tape, semiconductor memory such as read-only memory (ROM), and/or any transmitting/receiving medium such as the Internet or other communication network or link.
  • the article of manufacture containing the computer code may be made and/or used by executing the code directly from one medium, by copying the code from one medium to another medium, or by transmitting the code over a network.
  • database can refer to either a body of data, a relational database management system (RDBMS), or to both.
  • RDBMS relational database management system
  • a database can include any collection of data including hierarchical databases, relational databases, flat file databases, object-relational databases, object-oriented databases, and any other structured collection of records or data that is stored in a computer system.
  • RDBMS includes, but are not limited to including, Oracle® Database, MySQL, IBM® DB2, Microsoft® SQL Server, and PostgreSQL.
  • any database can be used that enables the systems and methods described herein.
  • a processor may include any programmable system including systems using micro-controllers, reduced instruction set circuits (RISC), application specific integrated circuits (ASICs), logic circuits, and any other circuit or processor capable of executing the functions described herein.
  • RISC reduced instruction set circuits
  • ASICs application specific integrated circuits
  • logic circuits any other circuit or processor capable of executing the functions described herein.
  • the above examples are example only and are thus not intended to limit in any way the definition and/or meaning of the term “processor.”
  • the terms “software” and “firmware” are interchangeable and include any computer program stored in memory for execution by a processor, including RAM memory, ROM memory, EPROM memory, EEPROM memory 7 , and non-volatile RAM (NVRAM) memory.
  • RAM memory random access memory
  • ROM memory read-only memory
  • EPROM memory erasable programmable read-only memory
  • EEPROM memory 7 electrically erasable programmable read-only memory
  • NVRAM non-volatile RAM
  • a computer program is provided, and the program is embodied on a computer-readable medium.
  • the system is executed on a single computer system, without requiring a connection to a server computer.
  • the system is being run in a Windows® environment (Windows is a registered trademark of Microsoft Corporation, Redmond, Washington).
  • the system is run on a mainframe environment and a UNIX® server environment (UNIX is a registered trademark of X/Open Company Limited located in Reading, Berkshire, United Kingdom).
  • the system is run on an iOS® environment (iOS is a registered trademark of Cisco Systems, Inc. located in San Jose, CA).
  • the system is run on a Mac OS® environment (Mac OS is a registered trademark of Apple Inc. located in Cupertino, CA). In still yet a further example, the system is run on Android® OS (Android is a registered trademark of Google, Inc. of Mountain View, CA). In another example, the system is run on Linux® OS (Linux is a registered trademark of Linus Torvalds of Boston, MA).
  • the application is flexible and designed to run in various different environments without compromising any major functionality.
  • the system includes multiple components distributed among a plurality of computing devices. One or more components may be in the form of computer-executable instructions embodied in a computer-readable medium. The systems and processes are not limited to the specific embodiments described herein. In addition, components of each system and each process can be practiced independent and separate from other components and processes described herein. Each component and process can also be used in combination with other assembly packages and processes.
  • the term “real-time” refers to at least one of the time of occurrence of the associated events, the time of measurement and collection of predetermined data, the time to process the data, and the time of a system response to the events and the environment. In the examples described herein, these activities and events occur substantially instantaneously.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A communication system is provided. The communication system includes at least one processor in communication with at least one memory device configured to store computer-executable instructions. The instructions cause the processor to a) receive a radio frequency continuous wave signal; b) perform a downconversion on the radio frequency to an intermediate frequency; c) activate a Phase-Locked Loop (PLL) implementation feedback control system to compare the phase of the received signal with a reference signal generated by a Voltage-Controlled Oscillator (VCO); d) perform a frequency comparison to compare the frequency of the received radio frequency signal with the locally generated reference frequency; e) establish a feedback loop within the PLL to continuously adjust the VCO frequency based on the phase difference between the received signal and a local oscillator signal; and f) perform frequency locking, wherein the local oscillator becomes frequency-locked to the received RF signal.

Description

SYSTEMS AND METHODS FOR FREQUENCY
STABILIZATION HARDWARE
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to and the benefit of Provisional Patent Application Serial Number 63/626,287, filed January 29, 2024, the contents of which are incorporated herein in their entirety.
FIELD OF THE DISCLOSURE
[0002] The field of the invention relates generally to frequency stabilization hardware, and more specifically, to systems and methods for frequency stabilization in fixed wireless access networks.
BACKGROUND
[0003] In fixed wireless access (FWA) networks with Point-to- Multipoint architecture, where a central base station communicates with multiple customer premises equipment (CPE) devices, frequency synchronization is crucial. Allowing synchronized operation across the network reduces interference and enhances overall performance. Remote frequency stabilization helps to resolve several issues, such as, regulatory compliance and frequency drift compensation, for example. Regulatory bodies allocate specific frequency bands for FWA services to prevent interference and ensure efficient use of the radio spectrum. Electronic components and environmental conditions can cause the frequency of a wireless signal to drift over time and temperature compensation. Additionally, temperature changes can impact the s tabil i ty of electronic components, further affecting performance.
[0004] Data Over Cable Service Interface Specification (DOCSIS) 3. 1 international standard is used as transport standard in FWA situations. The DOCSIS 3.1 standard enhances the capabilities of cable networks, allowing for higher data throughput and more efficient use of existing cable infrastructure. The DOCSIS 3.1 standards requires low phase noise to achieve high throughputs. The implications of phase noise in the realm of DOCSIS 3. 1 are multi-faceted. First, excessive phase noise can introduce distortions to the signal, posing challenges to its quality and making accurate demodulation more difficult. Additionally, higher levels of phase noise may contribute to elevated bit error rates, thereby diminishing the overall reliability of data transmission.
[0005] DOCSIS 3. 1's support for advanced modulation schemes, such as Quadrature Amplitude Modulation (QAM), may be hindered by phase noise, affecting the capability to achieve higher-order modulations and limiting potential data rates. This impact extends to spectral efficiency, where phase noise can influence the system's ability to utilize the available spectrum efficiently, potentially posing limitations on overall network performance.
[0006] Accordingly, there is a need for consistent frequency stabilization in FWA networks.
BRIEF SUMMARY
[0007] In one aspect, a communication system is provided. The communication system includes at least one transceiver. The at least one transceiver includes at least one processor in communication with at least one memory device configured to store computer-executable instructions. When executed by the processor, the instructions cause the transceiver to receive a radio frequency continuous wave signal. The instructions also cause the transceiver to perform a downconversion on the radio frequency to an intermediate frequency. The instructions further cause the transceiver to activate a Phase-Locked Loop (PLL) implementation feedback control system to compare the phase of the received signal with a reference signal generated by a Voltage-Controlled Oscillator (VCO). In addition, the instructions cause the transceiver to perform a frequency comparison to compare the frequency of the received radio frequency signal with the locally generated reference frequency. Moreover, the instructions cause the transceiver to establish a feedback loop within the PLL to continuously adjust the VCO frequency based on the phase difference between the received signal and a local oscillator signal. Furthermore, the instructions cause the transceiver to perform frequency locking, wherein the local oscillator becomes frequency-locked to the received RF signal. The communication system may include additional, less, or alternate functionality, including that discussed elsewhere herein.
[0008] Advantages will become more apparent to those skilled in the art from the following description of the preferred embodiments which have been shown and described by way of illustration. As will be realized, the present embodiments may be capable of other and different embodiments, and their details are capable of modification in various respects. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The Figures described below depict various aspects of the systems and methods disclosed therein. It should be understood that each Figure depicts an embodiment of a particular aspect of the disclosed systems and methods, and that each of the Figures is intended to accord with a possible embodiment thereof. Further, wherever possible, the following description refers to the reference numerals included in the following Figures, in which features depicted in multiple Figures are designated with consistent reference numerals.
[0010] There are shown in the drawings arrangements which are presently discussed, it being understood, however, that the present embodiments are not limited to the precise arrangements and are instrumentalities shown, wherein:
[0011] Figure 1 illustrates an exemplary process for achieving frequency stabilization using a radio frequency (RF) Continuous Wave (CW) signal, in accordance with at least one embodiment.
[0012] Figure 2 illustrates an exemplary transceiver for frequency stabilization using the process shown in Figure 1.
[0013] The Figures depict preferred embodiments for purposes of illustration only. One skilled in the art will readily recognize from the following discussion that alternative embodiments of the systems and methods illustrated herein may be employed without departing from the principles of the invention described herein.
DETAILED DESCRIPTION
[0014] The present embodiments may relate to. inter alia, networkbased system and method for frequency stabilization in fixed wireless access (FWA) networks. In one exemplary embodiment, the process may be performed by a frequency stabilization (FS) system. In the exemplary embodiment, the FS system may include a midbox or interface between two or more transmission and/or receiving devices
[0015] In the exemplary embodiment, frequency stabilization is performed by using a received radio frequency continuous wave signal utilizing the known characteristics of the incoming signal to correct or adjust for the signal of a local oscillator. The transceiver must get into a ’lock" state to ensure that it operates at the correct frequency. The lock state is mandatory to enable transmission on the transceiver.
[0016] Figure 1 illustrates an exemplary process 100 for achieving frequency stabilization using a radio frequency (RF) Continuous Wave (CW) signal, in accordance with at least one embodiment. In the exemplar}' embodiment, process 100 illustrates how frequency stabilization is achieved with help of a radio frequency (RF) Continuous Wave (CW) signal. First, the transceiver 200 (shown in Figure 2), receives 105 a RF continuous wave signal. The RF CW signal is received on a high frequency. The continuous wave signal is a steady-state sinusoidal waveform with a constant frequency, making it suitable for frequency reference purposes
[0017] Next, the transceiver 200 performs a downconversion 110 to an intermediate frequency (IF). The transceiver 200 downconverts 110 the received RF signal to an Intermediate Frequency (IF) using a mixer and a local oscillator in the receiver. This involves heterodyning, where the RF signal is mixed with the output of a local oscillator to produce the IF. [0018] Then the transceiver 200 activates a Phase-Locked Loop (PLL) 115 implementation. The transceiver 200 integrates a Phase-Locked Loop (PLL) 115 in the receiver circuit. A PLL 115 is a feedback control system that compares the phase of the received signal with a reference signal generated by a Voltage-Controlled Oscillator (VCO).
[0019] Additionally, the transceiver 200 performs 120 a frequency comparison. The transceiver 200 uses the PLL to compare the frequency of the received RF signal with the locally generated reference frequency. The PLL continuously adjusts the VCO frequency to minimize the phase difference between the received signal and the local oscillator signal. The transceiver 200 compares the received signal to the Temperature Compensated Crystal Oscillator (TCXO).
[0020] Furthermore, the transceiver 200 activates 125 a Feedback Mechanism. The transceiver 200 establishes a feedback loop within the PLL to continuously adjust the VCO frequency based on the phase difference between the received signal and the local oscillator signal. This feedback mechanism keeps the local oscillator frequency synchronized with the incoming RF signal.
[0021] Then the transceiver 200 performs 130 frequency locking. As the feedback loop operates, the local oscillator becomes frequency-locked to the received RF signal. This frequency locking ensures that the receiver operates at the exact frequency of the incoming signal, providing stability and accuracy.
[0022] Then the transceiver 200 performs 135 output stability. The stabilized frequency from the local oscillator is then used as a stable reference for downstream and upstream signal conversion and other receiver operations.
[0023] Additionally, the transceiver 200 performs continuous monitoring and adjustment. The implement mechanisms for continuous monitoring and adjustment of the PLL to ensure ongoing frequency stability7, especially in dynamic RF environments or changing operating conditions. [0024] By leveraging the received RF CW signal and employing a feedback loop with a PLL, the described process provides an effective means of stabilizing the frequency of a local oscillator in a receiver, contributing to improved overall performance and signal quality.
[0025] Figure 2 illustrates an exemplary transceiver 200 for frequency stabilization using the process 100 (show n in Figure 1).
[0026] At least one of the technical problems addressed by this system may include: (i) improved frequency stabilization; (ii) improved transmission accuracy; (iii) enhanced network performance; (iv) higher data throughput over the available frequency bands; and/or (v) improved bandwidth.
[0027] A technical effect of the systems and processes described herein may be achieved by performing at least one of the following steps: a) receive one or more messages for transmission to the receiver; b) convert the one or more messages using a wireless transport standard; c) analyze the converted one or more message to determine one or more appropriate overhead reduction techniques; d) perform GFDM and OQAM modulation on the one or more converted messages; and/or e) transmit the one or more messages at a higher modulation over the wired connection to the at least one receiver.
ADDITIONAL CONSIDERATIONS
[0028] As will be appreciated based upon the foregoing specification, the above-described embodiments of the disclosure may be implemented using computer programming or engineering techniques including computer software, firmw are, hardware or any combination or subset thereof. Any such resulting program, having computer-readable code means, may be embodied or provided within one or more computer-readable media, thereby making a computer program product, i.e., an article of manufacture, according to the discussed embodiments of the disclosure. The computer-readable media may be, for example, but is not limited to, a fixed (hard) drive, diskette, optical disk, magnetic tape, semiconductor memory such as read-only memory (ROM), and/or any transmitting/receiving medium such as the Internet or other communication network or link. The article of manufacture containing the computer code may be made and/or used by executing the code directly from one medium, by copying the code from one medium to another medium, or by transmitting the code over a network.
[0029] These computer programs (also known as programs, software, software applications, “apps,” or code) include machine instructions for a programmable processor and can be implemented in a high-level procedural and/or object-oriented programming language, and/or in assembly/machine language. As used herein, the terms “machine-readable medium"’ “computer-readable medium” refers to any computer program product, apparatus and/or device (e g., magnetic discs, optical disks, memory, Programmable Logic Devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The “machine-readable medium” and “computer-readable medium,” however, do not include transitory signals. The term “machine-readable signal” refers to any signal used to provide machine instructions and/or data to a programmable processor.
[0030] As used herein, the term “database"’ can refer to either a body of data, a relational database management system (RDBMS), or to both. As used herein, a database can include any collection of data including hierarchical databases, relational databases, flat file databases, object-relational databases, object-oriented databases, and any other structured collection of records or data that is stored in a computer system. The above examples are example only, and thus are not intended to limit in any way the definition and/or meaning of the term database. Examples of RDBMS’ include, but are not limited to including, Oracle® Database, MySQL, IBM® DB2, Microsoft® SQL Server, and PostgreSQL. However, any database can be used that enables the systems and methods described herein. (Oracle is a registered trademark of Oracle Corporation. Redwood Shores, California; IBM is a registered trademark of International Business Machines Corporation, Armonk, New York; and Microsoft is a registered trademark of Microsoft Corporation, Redmond, Washington.) [0031 ] As used herein, a processor may include any programmable system including systems using micro-controllers, reduced instruction set circuits (RISC), application specific integrated circuits (ASICs), logic circuits, and any other circuit or processor capable of executing the functions described herein. The above examples are example only and are thus not intended to limit in any way the definition and/or meaning of the term “processor.”
[0032] As used herein, the terms “software” and “firmware” are interchangeable and include any computer program stored in memory for execution by a processor, including RAM memory, ROM memory, EPROM memory, EEPROM memory7, and non-volatile RAM (NVRAM) memory. The above memory7 types are example only and are thus not limiting as to the types of memory usable for storage of a computer program.
[0033] In another example, a computer program is provided, and the program is embodied on a computer-readable medium. In an example, the system is executed on a single computer system, without requiring a connection to a server computer. In a further example, the system is being run in a Windows® environment (Windows is a registered trademark of Microsoft Corporation, Redmond, Washington). In yet another example, the system is run on a mainframe environment and a UNIX® server environment (UNIX is a registered trademark of X/Open Company Limited located in Reading, Berkshire, United Kingdom). In a further example, the system is run on an iOS® environment (iOS is a registered trademark of Cisco Systems, Inc. located in San Jose, CA). In yet a further example, the system is run on a Mac OS® environment (Mac OS is a registered trademark of Apple Inc. located in Cupertino, CA). In still yet a further example, the system is run on Android® OS (Android is a registered trademark of Google, Inc. of Mountain View, CA). In another example, the system is run on Linux® OS (Linux is a registered trademark of Linus Torvalds of Boston, MA). The application is flexible and designed to run in various different environments without compromising any major functionality. [0034] In some embodiments, the system includes multiple components distributed among a plurality of computing devices. One or more components may be in the form of computer-executable instructions embodied in a computer-readable medium. The systems and processes are not limited to the specific embodiments described herein. In addition, components of each system and each process can be practiced independent and separate from other components and processes described herein. Each component and process can also be used in combination with other assembly packages and processes.
[0035] As used herein, an element or step recited in the singular and proceeded with the word “a” or “an” should be understood as not excluding plural elements or steps, unless such exclusion is explicitly recited. Furthermore, references to “example” or “one example” of the present disclosure are not intended to be interpreted as excluding the existence of additional examples that also incorporate the recited features. Further, to the extent that terms “includes,” “including,” “has,” “contains,” and variants thereof are used herein, such terms are intended to be inclusive in a manner similar to the term “comprises” as an open transition word without precluding any additional or other elements.
[0036] Furthermore, as used herein, the term “real-time” refers to at least one of the time of occurrence of the associated events, the time of measurement and collection of predetermined data, the time to process the data, and the time of a system response to the events and the environment. In the examples described herein, these activities and events occur substantially instantaneously.
[0037] The patent claims at the end of this document are not intended to be construed under 35 U.S.C. § 112(f) unless traditional means-plus-function language is expressly recited, such as “means for” or “step for” language being expressly recited in the claim(s).
[0038] This written description uses examples to disclose the invention, including the best mode, and also to enable any person skilled in the art to practice the invention, including making and using any devices or systems and performing any incorporated methods. The patentable scope of the invention is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal language of the claims.

Claims

WHAT IS CLAIMED IS:
1. A communication system comprising at least one transceiver comprising at least one processor in communication with at least one memory device configured to store computer-executable instructions, which, when executed by the processor, cause the transceiver to: receive a radio frequency continuous wave signal: perform a downconversion on the radio frequency to an intermediate frequency; activate a Phase-Locked Loop (PLL) implementation feedback control system to compare the phase of the received signal with a reference signal generated by a Voltage-Controlled Oscillator (VCO); perform a frequency comparison to compare the frequency of the received radio frequency signal with the locally generated reference frequency; establish a feedback loop within the PLL to continuously adjust the VCO frequency based on the phase difference between the received signal and a local oscillator signal; and perform frequency locking, wherein the local oscillator becomes frequency-locked to the received RF signal.
2. The system in accordance with Claim 1, wherein the instructions further cause the transceiver to use the stabilized frequency from the local oscillator as a stable reference for downstream and upstream signal conversion and other operations.
3. The system in accordance with Claim 1, wherein the instructions further cause the transceiver to perform continuous monitoring and adjustment to ensure ongoing frequency stability.
PCT/US2025/013573 2024-01-29 2025-01-29 Systems and methods for frequency stabilization hardware Pending WO2025165863A1 (en)

Applications Claiming Priority (2)

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US202463626287P 2024-01-29 2024-01-29
US63/626,287 2024-01-29

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200091608A1 (en) * 2016-12-21 2020-03-19 Intel Corporation Wireless communication technology, apparatuses, and methods
US20200395946A1 (en) * 2019-04-23 2020-12-17 Microsoft Technology Licensing, Llc Adaptive phase lock loop that adjusts center frequency of voltage controlled oscillator therein and/or phase difference target of the adaptive phase lock loop

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200091608A1 (en) * 2016-12-21 2020-03-19 Intel Corporation Wireless communication technology, apparatuses, and methods
US20200395946A1 (en) * 2019-04-23 2020-12-17 Microsoft Technology Licensing, Llc Adaptive phase lock loop that adjusts center frequency of voltage controlled oscillator therein and/or phase difference target of the adaptive phase lock loop

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