WO2025164807A1 - Laminate for semi-additive process, printed wiring board, method for manufacturing laminate for semi-additive process, and method for manufacturing printed wiring board - Google Patents

Abstract

[Problem] To obtain a laminate for a semi-additive process in which, even with a step for forming an aperture in a substrate for a semi-additive process and forming a conductive seed layer as well as an additional conductive seed layer on the surface of the aperture, interconnects with a satisfactorily smooth and rectangular shape can be formed without retaining a metallic layer of the same type as the conductive layer of a pattern circuit on the conductive seed layer during circuit formation. [Solution] A laminate for a semi-additive process according to the present invention comprises: an insulating substrate; a first conductive seed layer with an aperture formed on at least one side of the insulating substrate; a second conductive seed layer formed on the inner surface of the aperture in the first conductive seed layer and electrically connected to the first conductive seed layer; and a cover layer covering the aperture, wherein the first conductive seed layer and the second conductive seed layer are formed from a metallic material, and the second conductive seed layer is formed from a different type of metallic material than the first conductive seed layer.

Description

Laminate for semi-additive process, printed wiring board, method for manufacturing laminate for semi-additive process, and method for manufacturing printed wiring board

The present invention relates to a planar semi-additive laminate used to electrically connect both sides of a substrate, a printed wiring board, a method for manufacturing a semi-additive laminate, and a method for manufacturing a printed wiring board.

Printed wiring boards are made by forming a metal layer of a patterned circuit on the surface of an insulating substrate. In recent years, demand for smaller and lighter electronic products has led to a demand for thinner printed wiring boards and finer circuit wiring. Traditionally, the subtractive method has been widely used to manufacture circuit wiring. This involves forming an etching resist in the shape of a patterned circuit on the surface of a copper layer formed on an insulating substrate, and then etching away the copper layer in areas where no circuit is required to form copper wiring. However, the subtractive method tends to leave copper at the base of the wiring. As the distance between wires becomes shorter due to increased circuit wiring density, this can lead to problems such as short circuits and poor insulation reliability between wires. Furthermore, when etching is continued to prevent short circuits or improve insulation reliability, the etching solution can seep under the resist, causing side etching, resulting in a thinner wire width. In particular, when areas of different wiring densities are mixed, the fine wiring in areas of lower wiring density can disappear as the etching progresses. Furthermore, the surface of the wiring obtained using the subtractive method is not smooth, and the trapezoidal or triangular shape flares out toward the substrate, resulting in wiring with varying widths in the thickness direction, which poses problems when used as an electrical transmission path.

The semi-additive method has been proposed as a way to solve these problems and create fine wiring circuits. In the semi-additive method, a conductive seed layer is formed on an insulating substrate, and a plating resist is formed on the seed layer in areas where no circuitry is to be formed. After forming wiring areas using electrolytic plating through the conductive seed layer, the resist is peeled off and the seed layer is removed from the areas where no circuitry is to be formed, forming fine wiring. With this method, plating is deposited following the shape of the resist, making it possible to create a smooth wiring surface and a rectangular cross-section. Furthermore, wiring of the desired width can be deposited regardless of the density of the pattern, making it suitable for forming fine wiring.

In the semi-additive method, a method is known in which a conductive seed layer is formed on an insulating substrate by electroless copper plating or electroless nickel plating using a palladium catalyst.
In these methods, for example, when a build-up film is used, the substrate surface is roughened using a strong chemical such as permanganate, a process known as desmear roughening, to ensure adhesion between the film substrate and the copper plating film. The plating film is formed in the resulting voids, utilizing the anchor effect to ensure adhesion between the insulating substrate and the plating film. However, roughening the substrate surface makes it difficult to form fine wiring and also leads to problems such as deterioration of high-frequency transmission characteristics. For this reason, attempts have been made to reduce the degree of roughening, but low roughening has led to the problem that the required adhesion strength between the formed wiring and the substrate cannot be obtained.

Meanwhile, a technology is also known in which a conductive seed is formed by electroless nickel plating on a polyimide film. In this case, the polyimide film is immersed in a strong alkali to open the imide rings in the surface layer, making the film surface hydrophilic, while at the same time forming a modified layer that is permeable to water. A palladium catalyst is then impregnated into this modified layer, and electroless nickel plating is performed to form a nickel seed layer (see, for example, Patent Document 1). With this technology, nickel plating is formed from within the modified layer on the outermost polyimide surface, thereby achieving adhesion strength. However, because the modified layer is in a state where the imide rings are opened, there is the problem that the film surface has a physically and chemically weak structure.

In contrast to this, a method of forming a conductive seed of nickel, titanium, or the like on an insulating substrate by sputtering is also known as a method of roughening the surface or not forming a modified layer on the surface (see, for example, Patent Document 2). While this method makes it possible to form a seed layer without roughening the substrate surface, it has problems such as the need to use expensive vacuum equipment, requiring a large initial investment, limitations on the substrate size and shape, and being a complicated process with low productivity.

As a way to solve the problems with sputtering, a method has been proposed in which a coating layer of conductive ink containing metal particles is used as a conductive seed layer (see, for example, Patent Document 3). This technology involves coating an insulating substrate made of a film or sheet with a conductive ink containing dispersed metal particles with a particle size of 1 to 500 nm, and then performing a heat treatment to fix the metal particles in the coated conductive ink as a metal layer on the insulating substrate, forming a conductive seed layer, and then plating the conductive seed layer.

Patent Document 3 proposes pattern formation by a semi-additive method, and in the examples, describes that a substrate on which a conductive ink having copper particles dispersed therein is applied and heat-treated to form a copper conductive seed layer is used as a substrate for the semi-additive method, and that a photosensitive resist is formed on the conductive seed layer, and after exposure and development, the pattern formation portion is thickened by electrolytic copper plating, the resist is peeled off, and then the copper conductive seed layer is etched away.
In addition, in the case of forming printed wiring boards using the semi-additive process, which has been studied in the past, a substrate in which a thin copper foil or a copper plating film is provided as a conductive seed on an insulating substrate is used as the substrate for the semi-additive process.

When the conductive seed layer and the conductive layer of the pattern circuit are formed from the same metal, as in this combination of a copper conductive seed layer and a copper pattern circuit, when the conductive seed layer in the non-pattern forming area is removed, the conductive layer of the pattern circuit is also etched at the same time, which is known to result in the pattern circuit becoming narrower and thinner and increasing the surface roughness of the circuit conductive layer, posing a challenge that needed to be resolved when manufacturing high-density wiring and wiring for high-frequency transmission.

In response to these issues, Non-Patent Documents 1 and 2 invent a technology for forming printed wiring boards with a smooth circuit layer surface, with good design reproducibility, and without thinning or thinning of the pattern circuit during the seed layer etching process, by using a substrate with a conductive silver particle layer formed on the surface of an insulating substrate as the substrate for semi-additive processing.

International Publication No. 2009/004774 Japanese Patent Application Publication No. 9-136378 JP 2010-272837 A

Akira Murakawa, Norimasa Fukazawa, Wataru Fujikawa, Jun Shiraga: "Copper pattern formation technology using semi-additive method with silver nanoparticles as a substrate", Proceedings of the 28th Microelectronics Symposium, pp. 285-288, 2018. Akira Murakawa, Shota Shinbayashi, Norimasa Fukazawa, Wataru Fujikawa, Jun Shiraga: "Formation of Copper Wiring by Semi-Additive Method Using Silver Seed Layer", Proceedings of the 33rd Japan Institute of Electronics Packaging Spring Conference, 11B2-03, 2019.

The technologies in Non-Patent Documents 1 and 2 allow for the formation of circuits not only on one side but also on both sides. However, to connect the circuits on both sides, when holes are formed in a semi-additive substrate having conductive silver particle layers on both sides of an insulating substrate and a conductive seed layer is formed using a conductive material, the conductive material is formed not only in the hole but also on the silver particle layer. If the conductive seed layer and the conductive layer of the pattern circuit are made of the same metal, as described above, when the conductive seed layer in the non-pattern forming area is removed, the conductive layer of the pattern circuit is also etched at the same time. This makes the pattern circuit thinner and narrower, and increases the surface roughness of the circuit conductive layer. This has been an issue that needed to be resolved in the manufacture of high-density wiring and wiring for high-frequency transmission.

The problem that this invention aims to solve is to obtain a laminate for semi-additive processing that has a smooth surface and is capable of forming good rectangular wiring, even after undergoing the steps of forming an opening in a semi-additive processing substrate, forming a conductive seed layer, and forming another conductive seed layer on the surface of the opening, without retaining a metal layer of the same type as the conductive layer of the pattern circuit on the conductive seed layer during circuit formation.

As a result of extensive research to solve the above-mentioned problems, the inventors discovered that a laminate for semi-additive processes comprising an insulating substrate, a first conductive seed layer having an opening formed on at least one surface of the insulating substrate, a second conductive seed layer formed on the inner surface of the opening in the first conductive seed layer and electrically connected to the first conductive seed layer, and a cover layer covering the opening, and that by constructing the first conductive seed layer and the second conductive seed layer from different metal materials, it is possible to form wiring with a good rectangular shape during circuit formation. The present invention is based on this finding. Specifically, the gist of the present invention is as follows.

[1] an insulating substrate;
a first conductive seed layer having an opening formed on at least one surface of the insulating substrate;
a second conductive seed layer formed on the inner surface of the opening in the first conductive seed layer and electrically connected to the first conductive seed layer;
a cover layer covering the opening;
Equipped with
the first conductive seed layer and the second conductive seed layer are made of a metal material;
A laminate for semi-additive processing, wherein the second conductive seed layer is composed of a metal material different from that of the first conductive seed layer.
[2] The laminate for semi-additive processes according to [1], wherein the metal material constituting the first conductive seed layer is silver, and the metal material constituting the second conductive seed layer is copper.
[3] The laminate for semi-additive processes according to [1] or [2], which has a primer layer between the insulating substrate and the first conductive seed layer.
[4] A printed wiring board using the laminate for semi-additive processes according to any one of [1] to [3].
[5] A method for producing the laminate for semi-additive manufacturing according to any one of [1] to [3],
forming an opening in an insulating substrate having a first conductive seed layer on at least one surface of the substrate;
forming a second conductive seed layer made of a metal different from that of the first conductive seed layer on a surface of the first conductive seed layer and on an inner surface of the opening;
forming a cover layer covering the opening;
A method for producing a laminate for semi-additive manufacturing, comprising:
[6] The method for producing a laminate for a semi-additive process according to [5], wherein an opening is formed in a state where a protective layer is formed on the first conductive seed layer.
[7] The method for producing a laminate for semi-additive processes according to [6], wherein the protective layer is a peelable cover layer.
[8] The method for producing a laminate for a semi-additive process according to [5] or [6], wherein the protective layer is made of the same metal material as the metal material that forms the second conductive seed layer.
[9] A method for producing a printed wiring board using a laminate for semi-additive processing obtained by the production method according to any one of [5] to [8],
removing a portion of the second conductive seed layer on the first conductive seed layer of the semi-additive manufacturing laminate to expose a surface of the first conductive seed layer;
removing a cover layer covering the opening;
forming a plating resist on a portion of the exposed first conductive seed layer;
forming a patterned circuit portion on the second conductive seed layer and the exposed first conductive seed layer by electroplating;
stripping the plating resist to expose the first conductive seed layer;
removing the exposed first conductive seed layer;
A method for manufacturing a printed wiring board, comprising:
[10] The method for manufacturing a printed wiring board according to [9], wherein the metal material constituting the first conductive seed layer is silver, and the metal material constituting the second conductive seed layer is copper.
[11] The method for producing a printed wiring board according to [9] or [10], wherein a primer layer is provided between the insulating substrate and the first conductive seed layer.

The present invention provides a laminate for semi-additive processes that has a smooth surface and allows for the formation of well-formed rectangular wiring without retaining a metal layer of the same type as the conductive layer of the pattern circuit on the conductive seed layer during circuit formation, even after processes of forming openings in a semi-additive process substrate and forming a conductive seed layer on the surface of the opening, and a printed wiring board using the same.

1A to 1C are cross-sectional views showing the manufacturing process of a printed wiring board according to the present invention. 2A to 2C are cross-sectional views showing the manufacturing process of a printed wiring board according to the present invention. 3A to 3C are cross-sectional views showing the manufacturing process of the printed wiring board according to the present invention. 4A to 4C are cross-sectional views showing the manufacturing process of a printed wiring board according to the present invention.

The semi-additive laminate of the present invention comprises an insulating substrate; a first conductive seed layer having an opening formed on at least one surface of the insulating substrate; a second conductive seed layer formed on the inner surface of the opening in the first conductive seed layer and electrically connected to the first conductive seed layer; and a cover layer covering the opening, wherein the first conductive seed layer and the second conductive seed layer are made of a metal material, and the second conductive seed layer is made of a metal material different from that of the first conductive seed layer.

Furthermore, the method for manufacturing a laminate for semi-additive processes according to the present invention includes the steps of: forming an opening in a semi-additive process substrate having a first conductive seed layer on at least one surface of an insulating substrate; forming a second conductive seed layer made of a metal different from that of the first conductive seed layer on the surface of the first conductive seed layer and the inner surface of the opening; and forming a cover layer to cover the opening.

Furthermore, a method for manufacturing a printed wiring board using the semi-additive laminate of the present invention includes the steps of: forming an opening in a semi-additive substrate having a first conductive seed layer on at least one surface of the insulating substrate; forming a second conductive seed layer made of a metal different from that of the first conductive seed layer on the surface of the first conductive seed layer and the inner surface of the opening; and forming a cover layer to cover the opening.

The method for manufacturing a printed wiring board using the semi-additive process laminate of the present invention preferably further includes the steps of removing a portion of the second conductive seed layer on the first conductive seed layer to expose the surface of the first conductive seed layer; removing the cover layer that covers the opening; forming a plating resist on the exposed portion of the first conductive seed layer; forming a pattern circuit portion on the second conductive seed layer and the exposed first conductive seed layer by electrolytic plating; stripping the plating resist to expose the first conductive seed layer; and removing the exposed first conductive seed layer.

Preferably, the metal material constituting the first conductive seed layer is silver, and the metal material constituting the second conductive seed layer is copper. Also, it is preferable to provide a primer layer between the insulating substrate and the first conductive seed layer.
In the present invention, the term "opening" refers collectively to vias and through holes. The electrolytic plating method is preferably copper electrolytic plating.

Examples of materials for the insulating substrate include polyimide resin, polyamide-imide resin, polyamide resin, polyethylene terephthalate resin, polybutylene terephthalate resin, polyethylene naphthalate resin, polycarbonate resin, acrylonitrile-butadiene-styrene (ABS) resin, polyarylate resin, polyacetal resin, acrylic resins such as poly(methyl meth)acrylate, polyvinylidene fluoride resin, polytetrafluoroethylene resin, polyvinyl chloride resin, polyvinylidene chloride resin, vinyl chloride resin graft-copolymerized with acrylic resin, polyvinyl alcohol resin, polyethylene resin, polypropylene resin, urethane resin, cycloolefin resin, polystyrene, liquid crystal polymer (LCP), polyether ether ketone (PEEK) resin, polyphenylene sulfide (PPS), polyphenylene sulfone (PPSU), cellulose nanofiber, silicon, silicon carbide, gallium nitride, sapphire, ceramics, glass, diamond-like carbon (DLC), and alumina.

In addition, resin substrates containing a thermosetting resin and an inorganic filler can also be suitably used as the insulating substrate. Examples of thermosetting resins include epoxy resins, phenolic resins, unsaturated imide resins, cyanate resins, isocyanate resins, benzoxazine resins, oxetane resins, amino resins, unsaturated polyester resins, allyl resins, dicyclopentadiene resins, silicone resins, triazine resins, and melamine resins. Examples of inorganic fillers include silica, alumina, talc, mica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, aluminum borate, and borosilicate glass. These thermosetting resins and inorganic fillers can be used alone or in combination of two or more. Substrates containing a thermoplastic resin and an inorganic filler can also be suitably used. These thermoplastic resins and inorganic fillers can be used alone or in combination of two or more.

The insulating substrate may be in the form of a flat flexible material, rigid material, or rigid-flexible material. More specifically, commercially available materials formed into films, sheets, or plates may be used, or materials formed by applying and drying a solution, melt, or dispersion of the above-mentioned resins into a flat surface may be used. The insulating substrate may also be a substrate formed from a solution, melt, or dispersion of the above-mentioned resins on a conductive material such as metal, or a substrate formed by laminating the above-mentioned resin material on a printed wiring board on which a pattern circuit is formed.

When a printed wiring board is manufactured using the semi-additive laminate of the present invention, the first conductive seed layer serves as a plating base layer when a pattern circuit layer that will become the pattern wiring described below is formed by a plating process.

A variety of conductive substances can be used as the metal material that makes up the first conductive seed layer, such as gold, platinum, palladium, aluminum, tin, copper, nickel, titanium, indium, and iridium, as long as the plating and etching processes described below can be carried out without any problems. Of these, silver is preferred because it has the highest electrical conductivity.

When silver is selected as the metal material constituting the first conductive seed layer, metal materials other than silver can be contained to the extent that the plating process described below can be carried out without problems. However, the proportion of metal materials other than silver is preferably 5 parts by mass or less, and more preferably 2 parts by mass or less, per 100 parts by mass of silver, as this further improves the etching removability of the non-circuit forming portions described below.

The method for forming the first conductive seed layer on both sides of the planar insulating substrate is not particularly limited, and examples include a method of applying a conductive particle dispersion to both sides of the insulating substrate. The method for applying the particle dispersion is not particularly limited as long as it can successfully form the first conductive seed layer, and various application methods may be selected appropriately depending on the shape, size, and degree of rigidity of the insulating substrate used. Specific application methods include, for example, gravure printing, offset printing, flexography, pad printing, gravure offset printing, letterpress printing, letterpress reverse printing, screen printing, microcontact printing, reverse printing, air doctor coater printing, blade coater printing, air knife coater printing, squeeze coater printing, impregnation coater printing, transfer roll coater printing, kiss coater printing, cast coater printing, spray coater printing, inkjet printing, die coater printing, spin coater printing, bar coater printing, and dip coater printing. In this case, the first conductive seed layer may be formed simultaneously on both sides of the insulating substrate, or may be formed on one side of the insulating substrate and then on the other side.

The insulating substrate and the primer layer (described below) formed on the insulating substrate may be surface-treated before the conductive particle dispersion is applied, in order to improve the coatability of the conductive particle dispersion and the adhesion of the pattern circuit layer formed in the plating process to the substrate. The surface treatment method for the insulating substrate is not particularly limited, and various methods may be selected as appropriate, as long as the surface roughness does not increase to the point where fine-pitch pattern formation or signal transmission loss due to a rough surface becomes an issue. Examples of such surface treatment methods include UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, corona treatment, and plasma treatment. These surface treatment methods can be performed alone or in combination.

After the conductive particle dispersion is applied to the insulating substrate or the primer layer, the coating is dried, causing the solvent contained in the conductive particle dispersion to volatilize, and the first conductive seed layer is formed on the insulating substrate or the primer layer.

The drying temperature and time can be selected appropriately depending on the heat resistance temperature of the substrate used and the type of solvent used in the conductive particle dispersion liquid described below, but a range of 20 to 350°C and a time of 1 to 200 minutes are preferred. Furthermore, in order to form a first conductive seed layer with excellent adhesion on the substrate, the drying temperature is more preferably in the range of 0 to 250°C.

If necessary, after the drying process, the insulating substrate on which the first conductive seed layer is formed, or the insulating substrate on which the primer layer is formed, may be further annealed to reduce the electrical resistance of the first conductive seed layer or to improve adhesion between the insulating substrate or the primer layer and the first conductive seed layer. The annealing temperature and time can be selected appropriately depending on the heat resistance temperature of the substrate used, the required electrical resistance, productivity, etc., and may be performed at a temperature in the range of 60 to 350°C for a time period of 1 minute to 2 weeks. Furthermore, in the temperature range of 60 to 180°C, a time period of 1 minute to 2 weeks is preferable, and in the range of 180 to 350°C, a time period of approximately 1 minute to 5 hours is preferable.

The drying may be performed with or without air blowing. Drying may be performed in the atmosphere, in an atmosphere substituted with an inert gas such as nitrogen or argon, under an air current, or in a vacuum.

The coating film can be dried naturally at the coating location, or in a dryer such as a ventilation oven or a constant temperature dryer. Furthermore, if the insulating substrate is a roll film or roll sheet, drying and baking can be carried out following the coating process by continuously moving the roll material in an installed unheated or heated space. Examples of heating methods for drying and baking include ovens, hot air drying ovens, infrared drying ovens, laser irradiation, microwaves, and light irradiation (flash irradiation devices). These heating methods can be used alone or in combination.

The film thickness of the first conductive seed layer formed on the insulating substrate or the primer layer may be selected appropriately depending on the specifications and application of the printed wiring board manufactured using the present invention. Specifically, a range of 1 nm to 5 μm is preferred, with a range of 1 nm to 3 μm being more preferred. Furthermore, a range of 10 nm to 1 μm is even more preferred, as this facilitates the formation of a conductive layer in the plating process described below and the seed layer removal process by etching described below.

Details of the components constituting the first conductive seed layer can be confirmed using well-known and commonly used analytical methods such as X-ray fluorescence, atomic absorption spectrometry, and ICP.

Furthermore, in the process of exposing a pattern circuit to actinic light on a resist layer (described below), in order to suppress reflection of actinic light from the first conductive seed layer, the first conductive seed layer may contain, as a light absorber, a pigment or dye that absorbs actinic light, such as graphite or carbon, cyanine compounds, phthalocyanine compounds, dithiol metal complexes, naphthoquinone compounds, diimmonium compounds, or azo compounds, as long as the first conductive seed layer can be formed, the electrolytic plating (described below) can be performed without problems, and the etching removability (described below) can be ensured. These pigments or dyes may be selected appropriately depending on the wavelength of the actinic light to be used. These pigments or dyes may be used alone or in combination of two or more. Furthermore, to incorporate these pigments or dyes into the first conductive seed layer, these pigments or dyes may be blended into the conductive particle dispersion (described below).

The conductive particle dispersion used to form the first conductive seed layer is a dispersion of conductive particles in a solvent. There are no particular restrictions on the shape of the conductive particles, as long as they successfully form the first conductive seed layer, and conductive particles of various shapes can be used, including spherical, lenticular, polyhedral, plate-like, rod-like, and wire-like shapes. These conductive particles can be used alone or in combination with two or more different shapes.

When the conductive particles have a spherical or polyhedral shape, the average particle diameter is preferably in the range of 1 to 20,000 nm. Furthermore, when forming a fine pattern circuit, the average particle diameter is more preferably in the range of 1 to 200 nm, and even more preferably in the range of 1 to 50 nm, because this further improves the homogeneity of the first conductive seed layer and the removability by an etching solution described below.
The "average particle size" of nanometer-sized particles is a volume average value measured by diluting the conductive particles with a good dispersion solvent and using a dynamic light scattering method. This measurement can be performed using a "Nanotrac UPA-150" manufactured by Microtrac.

On the other hand, when the conductive particles have a lens-like, rod-like, wire-like or other shape, the minor axis is preferably in the range of 1 to 200 nm, more preferably in the range of 2 to 100 nm, and even more preferably in the range of 5 to 50 nm.

The conductive particles are preferably composed primarily of silver particles, but as long as this does not interfere with the plating process described below or impair the removability of the first conductive seed layer with the etching solution described below, a portion of the silver constituting the conductive particles may be replaced with another metal, or metal components other than silver may be mixed in.

The metals to be substituted or mixed include one or more metal elements selected from the group consisting of gold, platinum, palladium, ruthenium, aluminum, tin, copper, nickel, iron, cobalt, titanium, indium, and iridium.

The ratio of the metal substituted or mixed with the silver particles is preferably 5% by mass or less in the silver particles, and more preferably 2% by mass or less from the viewpoint of the plating properties of the first conductive seed layer and its removability by an etching solution.

The silver particle dispersion used to form the first conductive seed layer is prepared by dispersing silver particles in various solvents, and the particle size distribution of the silver particles in the dispersion may be monodisperse and uniform, or may be a mixture of particles with an average particle size within the above-mentioned range.

The solvent used for the dispersion of silver particles can be an aqueous medium or an organic solvent. Examples of aqueous media include distilled water, ion-exchanged water, pure water, ultrapure water, and mixtures of water and organic solvents that are miscible with water.

Examples of the water-miscible organic solvent include alcohol solvents such as methanol, ethanol, n-propanol, isopropanol, ethyl carbitol, ethyl cellosolve, and butyl cellosolve; ketone solvents such as acetone and methyl ethyl ketone; alkylene glycol solvents such as ethylene glycol, diethylene glycol, and propylene glycol; polyalkylene glycol solvents such as polyethylene glycol, polypropylene glycol, and polytetramethylene glycol; and lactam solvents such as N-methyl-2-pyrrolidone.
When the organic solvent is used alone, examples of the organic solvent include alcohol compounds, ether compounds, ester compounds, and ketone compounds.

Examples of the alcohol solvent or ether solvent include methanol, ethanol, n-propanol, isopropyl alcohol, n-butanol, isobutyl alcohol, sec-butanol, tert-butanol, heptanol, hexanol, octanol, nonanol, decanol, undecanol, dodecanol, tridecanol, tetradecanol, pentadecanol, stearyl alcohol, allyl alcohol, cyclohexanol, terpineol, terpineol, dihydroterpineol, 2-ethyl-1,3-hexanediol, ethylene glycol, diethylene glycol, triethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, 1,2-butanediol, 1,3-butanediol, Examples include 1,4-butanediol, 2,3-butanediol, glycerin, ethylene glycol monomethyl ether, ethylene glycol monoethyl ether, ethylene glycol monobutyl ether, diethylene glycol monoethyl ether, diethylene glycol monomethyl ether, diethylene glycol monobutyl ether, tetraethylene glycol monobutyl ether, propylene glycol monomethyl ether, dipropylene glycol monomethyl ether, tripropylene glycol monomethyl ether, propylene glycol monopropyl ether, dipropylene glycol monopropyl ether, propylene glycol monobutyl ether, dipropylene glycol monobutyl ether, and tripropylene glycol monobutyl ether.

Examples of the ketone solvent include acetone, cyclohexanone, and methyl ethyl ketone. Furthermore, examples of the ester solvent include ethyl acetate, butyl acetate, 3-methoxybutyl acetate, and 3-methoxy-3-methyl-butyl acetate. Furthermore, other organic solvents include hydrocarbon solvents such as toluene, particularly hydrocarbon solvents with 8 or more carbon atoms.

Examples of the hydrocarbon solvents having 8 or more carbon atoms include non-polar solvents such as octane, nonane, decane, dodecane, tridecane, tetradecane, cyclooctane, xylene, mesitylene, ethylbenzene, dodecylbenzene, tetralin, and trimethylbenzenecyclohexane, and these can be used in combination with other solvents as needed. Furthermore, mixed solvents such as mineral spirits and solvent naphtha can also be used in combination.

There are no particular restrictions on the solvent, as long as it stably disperses silver particles and satisfactorily forms the first conductive seed layer on the insulating substrate or a primer layer formed on the insulating substrate, as described below. Furthermore, the solvents can be used alone or in combination of two or more types.

The content of silver particles in the silver particle dispersion may be appropriately adjusted using the various coating methods described above so that the amount of the first conductive seed layer formed on the insulating substrate is in the range of 0.01 to 30 g/ ^m2, and may also be adjusted so that the viscosity has optimal coating suitability depending on the various coating methods described above. The content of silver particles in the silver particle dispersion is preferably in the range of 0.1 to 50% by mass, and more preferably in the range of 0.5 to 20% by mass.

The silver particle dispersion preferably maintains dispersion stability for a long period of time in the various solvents mentioned above without the silver particles aggregating, fusing, or precipitating, and preferably contains a dispersant for dispersing the silver particles in the various solvents mentioned above. Such dispersants are preferably dispersants having a functional group that coordinates with the metal particles, such as a carboxyl group, an amino group, a cyano group, an acetoacetyl group, a phosphorus atom-containing group, a thiol group, a thiocyanato group, or a glycinato group.

The dispersant can be a commercially available or independently synthesized low- or high-molecular-weight dispersant. It can be selected appropriately depending on the purpose, such as the solvent for dispersing the metal particles and the type of insulating substrate onto which the metal particle dispersion is applied. Suitable examples include dodecanethiol, 1-octanethiol, triphenylphosphine, dodecylamine, polyethylene glycol, polyvinylpyrrolidone, polyethyleneimine, polyvinylpyrrolidone; fatty acids such as myristic acid, octanoic acid, and stearic acid; and polycyclic hydrocarbon compounds having a carboxyl group such as cholic acid, glycyrrhizic acid, and apicic acid. When forming a first conductive seed layer on a primer layer (described below), it is preferable to use a compound having a reactive functional group [Y] capable of forming a bond with a reactive functional group [X] possessed by the resin used in the primer layer (described below), as this improves adhesion between the two layers.

Examples of compounds having a reactive functional group [Y] include compounds having an amino group, an amide group, an alkylolamide group, a carboxyl group, a carboxyl anhydride group, a carbonyl group, an acetoacetyl group, an epoxy group, an alicyclic epoxy group, an oxetane ring, a vinyl group, an allyl group, a (meth)acryloyl group, a (blocked) isocyanate group, an (alkoxy)silyl group, and the like, and silsesquioxane compounds. In particular, the reactive functional group [Y] is preferably a basic nitrogen atom-containing group, as this can further improve adhesion between the primer layer and the first conductive seed layer. Examples of the basic nitrogen atom-containing group include an imino group, a primary amino group, and a secondary amino group.

The dispersant may have one or more basic nitrogen atom-containing groups in one molecule.
By containing multiple basic nitrogen atoms in the dispersant, some of the basic nitrogen atom-containing groups contribute to the dispersion stability of the metal particles through interaction with the metal particles, and the remaining basic nitrogen atom-containing groups contribute to improving adhesion to the insulating substrate. Furthermore, when a resin having a reactive functional group [X] is used in the primer layer described below, the basic nitrogen atom-containing group in the dispersant can form a bond with this reactive functional group [X], which is preferable, thereby further improving adhesion.

The dispersant is preferably a polymer dispersant, as this allows for the stability and coatability of the silver particle dispersion and the formation of a first conductive seed layer that exhibits good adhesion to the insulating substrate. Preferred polymer dispersants include polyalkyleneimines such as polyethyleneimine and polypropyleneimine, and compounds in which polyoxyalkylene is added to the polyalkyleneimines.

The compound in which a polyoxyalkylene is added to the polyalkyleneimine may be one in which the polyethyleneimine and polyoxyalkylene are bonded in a linear chain, or one in which the polyoxyalkylene is grafted onto a side chain of the main chain made of the polyethyleneimine.

Specific examples of compounds in which polyoxyalkylene is added to the polyalkyleneimine include block copolymers of polyethyleneimine and polyoxyethylene, compounds in which a polyoxyethylene structure is introduced by addition reaction of ethylene oxide with some of the imino groups present in the main chain of polyethyleneimine, and compounds in which an amino group in a polyalkyleneimine, a hydroxyl group in a polyoxyethylene glycol, and an epoxy group in an epoxy resin are reacted.

Commercially available polyalkyleneimines include "PAO2006W," "PAO306," "PAO318," and "PAO718" from the "Epomin (registered trademark) PAO series" manufactured by Nippon Shokubai Co., Ltd.

The number average molecular weight of the polyalkyleneimine is preferably in the range of 3,000 to 30,000.

The amount of the dispersant required to disperse the silver particles is preferably in the range of 0.01 to 50 parts by mass per 100 parts by mass of the silver particles. Furthermore, since a first conductive seed layer exhibiting good adhesion can be formed on the insulating substrate or the primer layer described below, the amount is preferably in the range of 0.1 to 10 parts by mass per 100 parts by mass of the silver particles. Furthermore, since the plating properties of the first conductive seed layer can be improved, the amount is more preferably in the range of 0.1 to 5 parts by mass.

The method for producing the silver particle dispersion is not particularly limited, and various methods can be used for production. For example, silver particles produced using a gas phase method such as low-vacuum gas evaporation may be dispersed in a solvent, or a silver particle dispersion may be directly prepared by reducing a silver compound in the liquid phase.
In both the gas phase and liquid phase methods, the solvent composition of the dispersion during production and the dispersion during coating can be changed appropriately and as needed by solvent exchange or solvent addition. Of the gas phase and liquid phase methods, the liquid phase method is particularly suitable for use in terms of the stability of the dispersion and the simplicity of the production process. In the liquid phase method, for example, the silver ion can be reduced in the presence of the polymer dispersant to produce the silver ion dispersion.

If necessary, the silver particle dispersion may further contain organic compounds such as surfactants, leveling agents, viscosity modifiers, film-forming aids, antifoaming agents, and preservatives.

Examples of the surfactant include nonionic surfactants such as polyoxyethylene nonylphenyl ether, polyoxyethylene lauryl ether, polyoxyethylene styrylphenyl ether, polyoxyethylene sorbitol tetraoleate, and polyoxyethylene-polyoxypropylene copolymer; anionic surfactants such as fatty acid salts such as sodium oleate, alkyl sulfate ester salts, alkylbenzenesulfonates, alkyl sulfosuccinates, naphthalenesulfonates, polyoxyethylene alkyl sulfates, sodium alkanesulfonates, and sodium alkyldiphenylethersulfonates; and cationic surfactants such as alkylamine salts, alkyltrimethylammonium salts, and alkyldimethylbenzylammonium salts.

General leveling agents can be used as the leveling agent, such as silicone-based compounds, acetylene diol-based compounds, and fluorine-based compounds.

The viscosity adjuster can be a common thickener, such as an acrylic polymer that can be thickened by adjusting the alkalinity, synthetic rubber latex, a urethane resin that can be thickened by molecular association, hydroxyethyl cellulose, carboxymethyl cellulose, methyl cellulose, polyvinyl alcohol, hydrated castor oil, amide wax, oxidized polyethylene, metal soap, or dibenzylidene sorbitol.

The film-forming aid may be a typical film-forming aid, such as an anionic surfactant such as dioctyl sulfosuccinate sodium salt, a hydrophobic nonionic surfactant such as sorbitan monooleate, polyether-modified siloxane, or silicone oil.

General defoaming agents can be used as the defoaming agent, such as silicone-based defoaming agents, nonionic surfactants, polyethers, higher alcohols, and polymer surfactants.

The preservative may be a common preservative, such as an isothiazolinone preservative, a triazine preservative, an imidazole preservative, a pyridine preservative, an azole preservative, or a pyrithione preservative.

Furthermore, a more preferred embodiment of the semi-additive construction laminate of the present invention is a laminate further having a primer layer between the insulating substrate layer and the first conductive seed layer. A semi-additive construction laminate provided with this primer layer is preferred because it can further improve the adhesion of the pattern circuit layer to the insulating substrate.

The primer layer can be formed by applying a primer to part or the entire surface of the insulating substrate and then removing the solvent, such as an aqueous medium or organic solvent, contained in the primer. Here, the primer is used to improve the adhesion of the pattern circuit layer to the insulating substrate, and is a liquid composition in which various resins, described below, are dissolved or dispersed in a solvent.

There are no particular restrictions on the method for applying the primer to the insulating substrate, as long as a good primer layer can be formed. Various application methods can be selected appropriately depending on the shape, size, and degree of rigidity of the insulating substrate used. Specific application methods include, for example, gravure printing, offset printing, flexography, pad printing, gravure offset printing, letterpress printing, letterpress reverse printing, screen printing, microcontact printing, reverse printing, air doctor coater, blade coater, air knife coater, squeeze coater, impregnation coater, transfer roll coater, kiss coater, cast coater, spray coater, inkjet printing, die coater, spin coater, bar coater, and dip coater.

Furthermore, the method for applying the primer to both sides of the insulating substrate in the form of a film, sheet, or plate is not particularly limited as long as a good primer layer can be formed, and any of the application methods exemplified above may be selected as appropriate. In this case, the primer layer may be formed simultaneously on both sides of the insulating substrate, or may be formed first on one side of the insulating substrate and then on the other side.

The insulating substrate may be surface-treated before the primer is applied in order to improve the coatability of the primer and the adhesion of the pattern circuit layer to the substrate. The surface treatment method for the insulating substrate can be the same as the surface treatment method used when forming the first conductive seed layer on the insulating substrate described above.

A common method for forming a primer layer by applying the primer to the surface of an insulating substrate and then removing the solvent contained in the coating layer is, for example, drying using a dryer to volatilize the solvent. The drying temperature may be set within a range that allows the solvent to volatilize and does not adversely affect the insulating substrate, and may be room temperature drying or heat drying.
Specifically, the drying temperature is preferably in the range of 20 to 350° C., more preferably in the range of 60 to 300° C. The drying time is preferably in the range of 1 to 200 minutes, more preferably in the range of 1 to 60 minutes.

The drying may be performed with or without air blowing. Drying may be performed in the air, in a substituted atmosphere such as nitrogen or argon, under an air current, or in a vacuum.

If the insulating substrate is a sheet film, sheet, or plate, it can be dried naturally at the coating location, or in a dryer such as a ventilation oven or constant temperature dryer. Furthermore, if the insulating substrate is a roll film or roll sheet, drying can be carried out following the coating process by continuously moving the roll material in an installed unheated or heated space.

The film thickness of the primer layer can be selected appropriately depending on the specifications and application of the printed wiring board manufactured using the present invention, but a thickness in the range of 10 nm to 30 μm is preferred, a range of 10 nm to 5 μm is more preferred, and a range of 10 nm to 3 μm is even more preferred, as this further improves adhesion between the insulating substrate and the pattern circuit layer.

When the dispersant for the metal particles contains a reactive functional group [Y], the resin forming the primer layer preferably contains a reactive functional group [X] that is reactive with the reactive functional group [Y]. Examples of the reactive functional group [X] include amino groups, amide groups, alkylolamide groups, keto groups, carboxyl groups, carboxyl anhydride groups, carbonyl groups, acetoacetyl groups, epoxy groups, alicyclic epoxy groups, oxetane rings, vinyl groups, allyl groups, (meth)acryloyl groups, (blocked) isocyanate groups, and (alkoxy)silyl groups. Silsesquioxane compounds can also be used as the compound forming the primer layer.

In particular, when the reactive functional group [Y] in the dispersant is a basic nitrogen atom-containing group, the adhesion of the conductive layer to the insulating substrate can be further improved. Therefore, it is preferable that the resin forming the primer layer has a reactive functional group [X] that is a keto group, carboxyl group, carbonyl group, acetoacetyl group, epoxy group, alicyclic epoxy group, alkylolamide group, isocyanate group, vinyl group, (meth)acryloyl group, or allyl group.

Examples of resins that form the primer layer include urethane resin, acrylic resin, core-shell composite resins with a urethane resin shell and an acrylic resin core, epoxy resin, imide resin, amide resin, melamine resin, phenolic resin, urea-formaldehyde resin, blocked isocyanate polyvinyl alcohol obtained by reacting polyisocyanate with a blocking agent such as phenol, and polyvinylpyrrolidone. Core-shell composite resins with a urethane resin shell and an acrylic resin core can be obtained, for example, by polymerizing acrylic monomers in the presence of urethane resin. These resins can be used alone or in combination of two or more.

Among the resins that form the primer layer, resins that generate reducing compounds when heated are preferred, as they can further improve the adhesion of the conductive layer to the insulating substrate. Examples of reducing compounds include phenol compounds, aromatic amine compounds, sulfur compounds, phosphoric acid compounds, and aldehyde compounds. Of these reducing compounds, phenol compounds and aldehyde compounds are preferred.

When a resin that generates reducing compounds when heated is used as a primer, reducing compounds such as formaldehyde and phenol are generated during the heat drying step when forming the primer layer.
Specific examples of resins that generate reducing compounds upon heating include resins obtained by polymerizing a monomer containing N-alkylol(meth)acrylamide, core-shell composite resins having a urethane resin as the shell and a resin obtained by polymerizing a monomer containing N-alkylol(meth)acrylamide as the core, resins that generate formaldehyde upon heating such as urea-formaldehyde-methanol condensates, urea-melamine-formaldehyde-methanol condensates, poly N-alkoxymethylol(meth)acrylamide, formaldehyde adducts of poly(meth)acrylamide, and melamine resins; and resins that generate phenolic compounds upon heating such as phenol resins and phenol-blocked isocyanates. Among these resins, from the viewpoint of improving adhesion, core-shell composite resins having a urethane resin as the shell and a resin obtained by polymerizing a monomer containing N-alkylol(meth)acrylamide as the core, melamine resins, and phenol-blocked isocyanates are preferred.

In the present invention, "(meth)acrylic" refers to either or both of "methacrylic" and "acrylic."

Resins that generate reducible compounds when heated can be obtained by polymerizing monomers that have functional groups that generate reducible compounds when heated using polymerization methods such as radical polymerization, anionic polymerization, or cationic polymerization.

Examples of monomers having a functional group that generates a reducing compound upon heating include N-alkylol vinyl monomers, and specific examples include N-methylol (meth)acrylamide, N-methoxymethyl (meth)acrylamide, N-ethoxymethyl (meth)acrylamide, N-propoxymethyl (meth)acrylamide, N-isopropoxymethyl (meth)acrylamide, N-n-butoxymethyl (meth)acrylamide, N-isobutoxymethyl (meth)acrylamide, N-pentoxymethyl (meth)acrylamide, N-ethanol (meth)acrylamide, and N-propanol (meth)acrylamide.

Furthermore, when producing the above-mentioned resin that generates a reducing compound when heated, various other monomers, such as (meth)acrylic acid alkyl esters, can also be copolymerized together with monomers having functional groups that generate a reducing compound when heated.

When the blocked isocyanate is used as the resin that forms the primer layer, the primer is formed by forming uretdione bonds through self-reaction between isocyanate groups, or by forming bonds between isocyanate groups and functional groups possessed by other components. The bonds formed in this case may be formed before the metal particle dispersion liquid is applied, or may not be formed before the metal particle dispersion liquid is applied and may be formed by heating after the metal particle dispersion liquid is applied.

The blocked isocyanate may be one having a functional group formed by blocking an isocyanate group with a blocking agent.

The blocked isocyanate preferably has the functional group in the range of 350 to 600 g/mol per mole of blocked isocyanate.

From the viewpoint of improving adhesion, the blocked isocyanate preferably has 1 to 10 functional groups per molecule, and more preferably has 2 to 5 functional groups.

Furthermore, from the viewpoint of improving adhesion, the number average molecular weight of the blocked isocyanate is preferably in the range of 1,500 to 5,000, and more preferably in the range of 1,500 to 3,000.

Furthermore, from the viewpoint of further improving adhesion, it is preferable that the blocked isocyanate has an aromatic ring. Examples of the aromatic ring include a phenyl group and a naphthyl group.

The blocked isocyanate can be produced by reacting some or all of the isocyanate groups in an isocyanate compound with a blocking agent.

Examples of isocyanate compounds that can be used as raw materials for the blocked isocyanate include polyisocyanate compounds with aromatic rings such as 4,4'-diphenylmethane diisocyanate, 2,4'-diphenylmethane diisocyanate, carbodiimide-modified diphenylmethane diisocyanate, crude diphenylmethane diisocyanate, phenylene diisocyanate, tolylene diisocyanate, and naphthalene diisocyanate; and aliphatic polyisocyanate compounds or polyisocyanate compounds with alicyclic structures such as hexamethylene diisocyanate, lysine diisocyanate, cyclohexane diisocyanate, isophorone diisocyanate, dicyclohexylmethane diisocyanate, xylylene diisocyanate, and tetramethylxylylene diisocyanate. Also included are biuret forms, isocyanurates, adducts, and the like of the above-mentioned polyisocyanate compounds.

Further examples of the isocyanate compound include those obtained by reacting the polyisocyanate compounds exemplified above with compounds containing hydroxyl groups or amino groups.

When introducing an aromatic ring into the blocked isocyanate, it is preferable to use a polyisocyanate compound having an aromatic ring. Furthermore, among polyisocyanate compounds having an aromatic ring, 4,4'-diphenylmethane diisocyanate, tolylene diisocyanate, the isocyanurate form of 4,4'-diphenylmethane diisocyanate, and the isocyanurate form of tolylene diisocyanate are preferred.

Blocking agents used in the production of the blocked isocyanates include, for example, phenolic compounds such as phenol and cresol; lactam compounds such as ε-caprolactam, δ-valerolactam, and γ-butyrolactam; oxime compounds such as formamide oxime, acetaldoxime, acetone oxime, methyl ethyl ketoxime, methyl isobutyl ketoxime, and cyclohexanone oxime; 2-hydroxypyridine, butyl cellosolve, propylene glycol monomethyl ether, benzyl alcohol, and methanol. , ethanol, n-butanol, isobutanol, dimethyl malonate, diethyl malonate, methyl acetoacetate, ethyl acetoacetate, acetylacetone, butyl mercaptan, dodecyl mercaptan, acetanilide, acetic acid amide, succinimide, maleimide, imidazole, 2-methylimidazole, urea, thiourea, ethylene urea, diphenylaniline, aniline, carbazole, ethyleneimine, polyethyleneimine, 1H-pyrazole, 3-methylpyrazole, 3,5-dimethylpyrazole, etc. Among these, blocking agents that can dissociate to generate isocyanate groups upon heating in the range of 70 to 200°C are preferred, and blocking agents that can dissociate to generate isocyanate groups upon heating in the range of 110 to 180°C are more preferred. Specifically, phenol compounds, lactam compounds, and oxime compounds are preferred, and phenol compounds are particularly preferred because they become reducing compounds when the blocking agent is released by heating.

Examples of methods for producing the blocked isocyanate include a method in which the isocyanate compound produced in advance is mixed with the blocking agent and reacted, and a method in which the blocking agent is mixed with the raw materials used to produce the isocyanate compound and reacted.

More specifically, the blocked isocyanate can be produced by reacting the polyisocyanate compound with a compound having a hydroxyl group or an amino group to produce an isocyanate compound having an isocyanate group at its terminal, and then mixing and reacting the isocyanate compound with the blocking agent.

The content of the blocked isocyanate obtained by the above method in the resin forming the primer layer is preferably in the range of 50 to 100% by mass, and more preferably in the range of 70 to 100% by mass.

Examples of the melamine resin include mono- or polymethylolmelamine in which 1 to 6 moles of formaldehyde are added to 1 mole of melamine; etherified products of (poly)methylolmelamine such as trimethoxymethylolmelamine, tributoxymethylolmelamine, and hexamethoxymethylolmelamine (the degree of etherification is optional); and urea-melamine-formaldehyde-methanol condensates.
In addition to the method using a resin that generates a reducing compound upon heating as described above, a method of adding a reducing compound to a resin can also be used. In this case, examples of the reducing compound to be added include phenol-based antioxidants, aromatic amine-based antioxidants, sulfur-based antioxidants, phosphoric acid-based antioxidants, vitamin C, vitamin E, sodium ethylenediaminetetraacetate, sulfites, hypophosphorous acid, hypophosphites, hydrazine, formaldehyde, sodium borohydride, dimethylamine borane, and phenol.

In the present invention, the method of adding a reducing compound to a resin may ultimately result in residual low-molecular-weight components or ionic compounds, which may degrade the electrical properties. Therefore, a method using a resin that generates a reducing compound when heated is more preferable.

Furthermore, preferred resins for forming the primer layer include those containing a compound having an aminotriazine ring. The compound having an aminotriazine ring may be a low molecular weight compound or a higher molecular weight resin.

The low-molecular-weight compound having an aminotriazine ring can be any of a variety of additives having an aminotriazine ring. Commercially available products include 2,4-diamino-6-vinyl-s-triazine ("VT" manufactured by Shikoku Chemicals Co., Ltd.), "VD-3" and "VD-4" manufactured by Shikoku Chemicals Co., Ltd. (compounds having an aminotriazine ring and a hydroxyl group), and "VD-5" manufactured by Shikoku Chemicals Co., Ltd. (compound having an aminotriazine ring and an ethoxysilyl group). These can be used as additives by adding one or more types to the resin that forms the primer layer.

The amount of the low-molecular-weight compound having an aminotriazine ring used is preferably 0.1 parts by mass or more and 50 parts by mass or less, and more preferably 0.5 parts by mass or more and 10 parts by mass or less, per 100 parts by mass of the resin.

As the resin having an aminotriazine ring, one in which the aminotriazine ring is covalently bonded to the polymer chain of the resin can also be suitably used. Specific examples include aminotriazine-modified novolac resins.

The aminotriazine-modified novolac resin is a novolac resin in which an aminotriazine ring structure and a phenol structure are bonded via a methylene group. The aminotriazine-modified novolac resin can be obtained, for example, by co-condensing an aminotriazine compound such as melamine, benzoguanamine, or acetoguanamine with a phenolic compound such as phenol, cresol, butylphenol, bisphenol A, phenylphenol, naphthol, or resorcinol and formaldehyde at near-neutral pH, either in the presence of a weak alkaline catalyst such as an alkylamine or without a catalyst, or by reacting an alkyl ether of an aminotriazine compound such as methyl-etherified melamine with the phenolic compound.

The aminotriazine-modified novolac resin preferably contains substantially no methylol groups. Furthermore, the aminotriazine-modified novolac resin may contain molecules in which only aminotriazine structures are methylene-linked, molecules in which only phenol structures are methylene-linked, etc., which are produced as by-products during production. Furthermore, it may contain a small amount of unreacted raw materials.

Examples of the phenol structure include phenol residue, cresol residue, butylphenol residue, bisphenol A residue, phenylphenol residue, naphthol residue, and resorcinol residue. The term "residue" used here refers to a structure in which at least one hydrogen atom bonded to a carbon atom in an aromatic ring has been removed. For example, in the case of phenol, it refers to a hydroxyphenyl group.

Examples of the triazine structure include structures derived from aminotriazine compounds such as melamine, benzoguanamine, and acetoguanamine.

The phenol structure and the triazine structure can each be used alone or in combination of two or more types. Furthermore, since these structures can further improve adhesion, a phenol residue is preferred as the phenol structure, and a melamine-derived structure is preferred as the triazine structure.

Furthermore, the hydroxyl value of the aminotriazine-modified novolak resin is preferably 50 mgKOH/g or more and 200 mgKOH/g or less, more preferably 80 mgKOH/g or more and 180 mgKOH/g or less, and even more preferably 100 mgKOH/g or more and 150 mgKOH/g or less, as this can further improve adhesion.

The aminotriazine-modified novolak resins can be used alone or in combination of two or more types.

Furthermore, when an aminotriazine-modified novolac resin is used as the compound having an aminotriazine ring, it is preferable to use an epoxy resin in combination.

Examples of the epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, biphenyl type epoxy resin, cresol novolac type epoxy resin, phenol novolac type epoxy resin, bisphenol A novolac type epoxy resin, alcohol ether type epoxy resin, tetrabromobisphenol A type epoxy resin, naphthalene type epoxy resin, phosphorus-containing epoxy compounds having a structure derived from a 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide derivative, epoxy resins having a structure derived from a dicyclopentadiene derivative, and epoxidized oils and fats such as epoxidized soybean oil. These epoxy resins can be used alone or in combination of two or more.

Among the above epoxy resins, bisphenol A type epoxy resins, bisphenol F type epoxy resins, biphenyl type epoxy resins, cresol novolac type epoxy resins, phenol novolac type epoxy resins, and bisphenol A novolac type epoxy resins are preferred, as they can further improve adhesion, with bisphenol A type epoxy resins being particularly preferred.

Furthermore, the epoxy equivalent of the epoxy resin is preferably 100 g/equivalent or more and 300 g/equivalent or less, more preferably 120 g/equivalent or more and 250 g/equivalent or less, and even more preferably 150 g/equivalent or more and 200 g/equivalent or less, as this further improves adhesion.

When the primer layer is a layer containing an aminotriazine-modified novolac resin and an epoxy resin, the molar ratio [(x)/(y)] of the phenolic hydroxyl group (x) in the aminotriazine-modified novolac resin to the epoxy group (y) in the epoxy resin is preferably 0.1 or more and 5 or less, more preferably 0.2 or more and 3 or less, and even more preferably 0.3 or more and 2 or less, in order to further improve adhesion.

When forming a layer containing an aminotriazine-modified novolac resin and an epoxy resin as the primer layer, a primer resin composition containing the compound having an aminotriazine ring and the epoxy resin is used.

Furthermore, the primer resin composition used to form the primer layer containing the aminotriazine-modified novolac resin and epoxy resin may contain other resins, such as urethane resin, acrylic resin, blocked isocyanate resin, melamine resin, phenolic resin, etc., as needed. These other resins may be used alone or in combination of two or more.

From the standpoint of coatability and film-forming properties, the primer used to form the primer layer preferably contains 1 to 70 mass % of the resin, and more preferably 1 to 20 mass %.

Solvents that can be used for the primer include various organic solvents and aqueous media. Examples of organic solvents include toluene, ethyl acetate, methyl ethyl ketone, and cyclohexanone, while examples of aqueous media include water, organic solvents that are miscible with water, and mixtures of these.

Examples of the water-miscible organic solvents include alcohol solvents such as methanol, ethanol, n-propanol, isopropanol, ethyl carbitol, ethyl cellosolve, and butyl cellosolve; ketone solvents such as acetone and methyl ethyl ketone; alkylene glycol solvents such as ethylene glycol, diethylene glycol, and propylene glycol; polyalkylene glycol solvents such as polyethylene glycol, polypropylene glycol, and polytetramethylene glycol; and lactam solvents such as N-methyl-2-pyrrolidone.

Furthermore, the resin forming the primer layer may, as necessary, have functional groups that contribute to a crosslinking reaction, such as alkoxysilyl groups, silanol groups, hydroxyl groups, or amino groups. The crosslinked structure formed using these functional groups may already be formed prior to the subsequent step of forming the first conductive seed layer, or may be formed after the step of forming the first conductive seed layer. When forming a crosslinked structure after the step of forming the first conductive seed layer, the crosslinked structure may be formed in the primer layer before forming the pattern circuit layer, or the crosslinked structure may be formed in the primer layer after forming the pattern circuit layer, for example, by aging to promote the reaction.

If necessary, the primer layer may contain known additives such as a crosslinking agent, pH adjuster, film-forming aid, leveling agent, thickener, water repellent, and antifoaming agent.

Examples of the crosslinking agent include metal chelate compounds, polyamine compounds, aziridine compounds, metal salt compounds, and isocyanate compounds. These include thermal crosslinking agents that react at relatively low temperatures of around 25 to 100°C to form a crosslinked structure, and thermal crosslinking agents that react at relatively high temperatures of 100°C or higher to form a crosslinked structure, such as melamine compounds, epoxy compounds, oxazoline compounds, carbodiimide compounds, and blocked isocyanate compounds, as well as various photocrosslinking agents. When the aminotriazine-modified novolac resin and epoxy resin are used in the primer layer, it is preferable to use a polycarboxylic acid as the crosslinking agent in the primer resin composition. Examples of the polycarboxylic acid include trimellitic anhydride, pyromellitic anhydride, maleic anhydride, and succinic acid. These crosslinking agents can be used alone or in combination of two or more. Among these crosslinking agents, trimellitic anhydride is preferred because it can further improve adhesion.

The amount of the crosslinking agent used varies depending on the type, but from the perspective of improving adhesion of the pattern circuit layer to the substrate, it is preferably in the range of 0.01 to 60 parts by mass, more preferably 0.1 to 10 parts by mass, and even more preferably 0.1 to 5 parts by mass, per 100 parts by mass of the total resin contained in the primer.

When the crosslinking agent is used, the crosslinked structure may already be formed before the subsequent step of forming the first conductive seed layer, or the crosslinked structure may be formed after the step of forming the first conductive seed layer. If the crosslinked structure is formed after the step of forming the first conductive seed layer, the crosslinked structure may be formed in the primer layer before forming the pattern circuit layer, or the crosslinked structure may be formed in the primer layer after forming the pattern circuit layer, for example, by aging.

In the present invention, the method for forming the first conductive seed layer on the primer layer is the same as the method for forming the first conductive seed layer on the insulating substrate.

Furthermore, similar to the insulating substrate, the primer layer may be surface-treated before the silver particle dispersion is applied in order to improve the coatability of the silver particle dispersion and the adhesion of the pattern circuit layer to the substrate.

An alternative method for forming the first conductive seed layer on both sides of the planar insulating substrate is to form the first conductive seed layer on a temporary substrate and then transfer it onto the insulating substrate.

As the temporary substrate, since it is necessary to finally peel off the first conductive seed layer after transferring it onto the insulating substrate, it is preferable to select a temporary substrate that allows easy peeling at the interface between the temporary substrate and the first conductive seed layer. For example, examples of polymer films include aromatic polyesters such as polyethylene terephthalate, polybutylene terephthalate (PBT), polyethylene naphthalate, and polybutylene naphthalate; fluororesins such as polytetrafluoroethylene, tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, tetrafluoroethylene-ethylene copolymer, vinylidene fluoride resin, trifluorochloroethylene resin, trifluorochloroethylene-ethylene copolymer, tetrafluoroethylene-perfluorodioxol copolymer, vinyl fluoride resin, and polyvinylidene fluoride; polymethylpentene (TPX), polypropylene (PP) [including biaxially oriented polypropylene (OPP) and nonaxially oriented polypropylene (CPP)], and polyethylene (PE) [high density polyethylene]. Examples of suitable temporary substrates include olefin resins such as polyethylene (HDPE), low-density polyethylene (LDPE), and linear low-density polyethylene (LLDPE); polystyrene (PS); polyimide resins such as polyvinyl chloride (PVC), polyimide, and transparent polyimide; polyamide resins such as polyamideimide and polyamide; polycarbonate, acrylonitrile-butadiene-styrene (ABS) resin, polymer alloys of ABS and polycarbonate, acrylic resins such as polymethyl (meth)acrylate, polyvinyl chloride, polyvinylidene chloride, polyvinyl alcohol, polycarbonate, polyethylene, polypropylene, polyurethane, liquid crystal polymer (LCP), polyether ether ketone (PEEK), polyphenylene sulfide (PPS), polyphenylene sulfone (PPSU), and epoxy resins. Among these, aromatic polyesters, polyethylene, olefin resins, fluorine-based resins, polyimide resins, LCP, and polyphenylene sulfide can be used as the temporary substrate.

In addition, metals may be used as the temporary substrate, including copper, aluminum, aluminum alloys, titanium, stainless steel, beryllium copper, phosphor bronze, nickel, nichrome, nickel alloys, tin, zinc, lead, gold, tantalum, molybdenum, niobium, iron, and silver. Other inorganic substrates that can be suitably used as temporary substrates include silicon, ceramics, and glass.

The shape of the temporary substrate is not particularly limited, but using a film- or sheet-shaped temporary substrate allows for good handling. The film thickness of the temporary substrate is typically preferably in the range of 1 to 5,000 μm, more preferably in the range of 1 to 300 μm, more preferably in the range of 1 to 200 μm, even more preferably in the range of 1 to 100 μm, and even more preferably in the range of 1 to 50 μm. Since the temporary substrate is no longer needed after the first conductive seed layer is transferred onto the insulating substrate, it is preferable that it be thin enough that workability is not compromised from a cost perspective.

The formation of the first conductive seed layer on the temporary substrate may be adjusted as appropriate with reference to the method for forming the first conductive seed layer on the insulating substrate described above.
Furthermore, when manufacturing a laminate for semi-additive processing having a configuration in which a primer layer is provided between an insulating substrate and a first conductive seed layer, the first conductive seed layer is formed on the temporary substrate, and then a primer layer is formed on the first conductive seed layer. The method for forming the primer layer can be appropriately adjusted by using the method for forming a primer layer on an insulating substrate described above.

As a method for transferring the first conductive seed layer, or the first conductive seed layer and primer layer, onto the insulating substrate, the first conductive seed layer on the temporary substrate or the surface of the primer layer can be bonded to the insulating substrate using heat and pressure. Suitable methods for this purpose include, for example, thermal lamination, hot roll transfer, pressing, and vacuum pressing.

The laminate for semi-additive manufacturing of the present invention can have a peelable cover layer laminated on the first conductive seed layer as a protective layer.

By laminating the peelable cover layer on the first conductive seed layer, it is possible to prevent organic and inorganic debris (smear) generated during the process of forming openings in the first conductive seed layer (described below) in the method for manufacturing a printed wiring board of the present invention from adhering to the surface of the first conductive seed layer.

The material for the peelable cover layer is not particularly limited, as long as the purpose of protecting the first conductive seed layer is achieved in the method for manufacturing a printed wiring board of the present invention. Various commercially available resins and metal films can be used, but polyethylene, polypropylene, and polyethylene terephthalate films are preferably used.

The peelable cover layer may be a film of polyethylene, polypropylene, polyethylene terephthalate, or the like, with a silicone layer on top to improve peelability.

The peelable cover layer may be a film of polyethylene, polypropylene, polyethylene terephthalate, or the like, with adhesive properties to ensure adhesion to the first conductive seed layer sufficient to withstand the processes described below.

The film thickness of the peelable cover layer used in the present invention is preferably 10 to 100 μm, and more preferably 15 to 70 μm, from the viewpoints of film handling, protection of the first conductive seed layer, and ease of forming through-holes in the substrate.

The releasable cover layer used in the present invention can be laminated on the first conductive seed layer after the first conductive seed layer has been applied. For example, when the first conductive seed layer is applied using a roll coater, the releasable cover layer can be laminated by winding it up together with the first conductive seed layer.

Furthermore, when the first conductive seed layer is formed on an insulating substrate by the transfer method, the temporary substrate can be used as a peelable cover layer.

An alkali-soluble resin may also be used as the material for the peelable cover layer of the present invention. There are no particular limitations on the alkali-soluble resin, as long as it can be developed with an alkaline developer, and known, commonly used resins can be used, such as amide-imide resins and resins having alkali-soluble functional groups such as carboxyl groups and phenolic hydroxyl groups. The alkali-soluble resin may be formed into a film by coating a resin solution onto the first conductive seed layer, or a film may be used in advance. When a film is used, the first conductive seed layer can be coated with a roll coater, and the peelable cover layer can be wound up together with the first conductive seed layer during winding, as described above, to form the layer.

The semi-additive construction laminate of the present invention can have a protective layer made of the same metal material as the second seed layer laminated on the first conductive seed layer.

By laminating the protective layer on the first conductive seed layer, it is possible to prevent organic and inorganic debris (smear) generated during the process of forming through holes penetrating both sides, described below, in the method for manufacturing a printed wiring board of the present invention from adhering to the surface of the first conductive seed layer.

Furthermore, by constructing the protective layer from the same metal material as that constituting the second conductive seed layer, the second conductive seed layer and the protective layer are integrated when the second conductive seed layer is formed, and the entire layer functions as a second conductive seed layer.

There are no particular restrictions on the thickness of the protective layer, so long as the process of forming an opening in the first conductive seed can be carried out smoothly and the subsequent process of removing a portion of the second conductive seed can be carried out without any problems. However, from the perspective of operational efficiency in the process of forming the opening, it is preferable that the thickness be in the range of 0.1 to 10 μm, and from the perspective of operational efficiency in the subsequent process of removing a portion of the second conductive seed, it is preferable that the thickness be in the range of 0.2 to 3 μm.

The protective layer composed of the metal can be formed on the first conductive seed layer using known, commonly used dry or wet plating methods. Furthermore, when forming the first conductive seed layer using the aforementioned transfer method, a temporary substrate for transfer may be made of the same metal as the second conductive seed, and attached to an insulating substrate, and the temporary substrate may be used as a metal protective layer.

The metal material constituting the second conductive seed layer can be a variety of conductive substances, such as gold, platinum, palladium, aluminum, tin, copper, nickel, titanium, indium, and iridium, as long as the plating and etching processes described below can be carried out without any problems. However, if the type or mixture of metal is different from that of the first conductive seed layer, a metal with a different composition must be selected.

(Manufacturing process of laminates for semi-additive processes)
The manufacturing process of the laminate for semi-additive manufacturing according to the present invention will be described with reference to FIGS. 1 and 2. FIG.

In step (1), a substrate is prepared in which a circuit 12 (copper, etc.) is formed on an insulating base material (base) 10.

Next, in step (2), an insulating base material 13 (e.g., prepreg or interlayer insulating material), a primer layer 14, and a first conductive seed layer 16 (e.g., silver) are formed on the substrate in this order. The insulating base material 13, the primer layer 14, and the first conductive seed layer 16 may be formed one layer at a time or all at once. Although not shown, a protective layer (e.g., a resin or metal film) may be optionally provided on the surface of the first conductive seed layer 16.
In the example process shown in FIG. 1, the primer layer 14 and the first conductive seed layer 16 are formed on one side of the substrate 10, but the primer layer and the conductive seed layer may be formed on both sides of the substrate.

In step (3), via processing (laser, etc.) is performed on the first conductive seed layer 16 (or any protective layer) to form vias (openings) 18. The method for forming the vias (openings) 18 can be selected from known and commonly used methods, such as drilling, laser processing, and processing methods that combine laser processing with chemical etching of the insulating substrate using an oxidizing agent, alkaline chemical, acidic chemical, etc. In the example shown, so-called blind vias are used, but through-holes can also be formed.

The diameter of the holes formed by the drilling process is preferably in the range of 0.01 to 1 mm, more preferably in the range of 0.01 to 0.5 mm, and even more preferably in the range of 0.02 to 0.1 mm.

The organic and inorganic debris (smear) generated during the drilling process can cause poor plating deposition, reduced plating adhesion, and impaired plating appearance during the electrical connection on both sides and the plating process that forms the conductive layer, as described below, so it is preferable to remove the debris (desmearing). Desmearing methods include, for example, dry processes (dry desmear) such as plasma treatment and reverse sputtering, and wet processes (wet desmear) such as cleaning with an aqueous oxidizing agent solution such as potassium permanganate, cleaning with an aqueous alkali or acid solution, and cleaning with an organic solvent.

In step (4), electroless copper plating is performed on the entire surface, including the inside of the via (opening) 18, to form a second conductive seed layer 20 (copper).

Next, in step (5), as shown in Figure 2, a cover layer 22 is formed on the entire surface. In the example shown, the cover layer 22 is an etching resist, and is formed by applying a film-like etching resist, but the cover layer 22 can also be formed by applying a liquid material.

In step (5), which is the step of forming the cover layer 22, the surface of the second conductive seed layer 20 may be subjected to a surface treatment, such as cleaning with an acidic or alkaline cleaning solution, corona treatment, plasma treatment, UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, or treatment with a surface treatment agent, before the formation of the cover layer 22, in order to improve adhesion to the cover layer 22. These surface treatments can be performed using one method or two or more methods in combination.

Examples of treatments using the surface treatment agents include a treatment method using a rust inhibitor consisting of a triazole compound, a silane coupling agent, and an organic acid, as described in JP 7-258870 A; a treatment method using an organic acid, a benzotriazole rust inhibitor, and a silane coupling agent, as described in JP 2000-286546 A; a treatment method using a substance having a structure in which a nitrogen-containing heterocycle such as triazole or thiadiazole is bonded to a silyl group such as a trimethoxysilyl group or a triethoxysilyl group via an organic group having a thioether (sulfide) bond, as described in JP 2002-363189 A; and a treatment method using a compound having a structure in which a triazine ring and an amine group are bonded to a nitrogen-containing heterocycle such as triazole or thiadiazole via an organic group having a thioether (sulfide) bond, as described in WO 2013/186941 A. Examples of methods that can be used include treatment with a silane compound having an amino group, treatment with an imidazole silane compound obtained by reacting a formyl imidazole compound with an aminopropyl silane compound (disclosed in JP 2015-214743 A), treatment with an azole silane compound (disclosed in JP 2016-134454 A), treatment with a solution containing an aromatic compound having an amino group and an aromatic ring in one molecule, a polybasic acid having two or more carboxyl groups, and halide ions (disclosed in JP 2017-203073 A), and treatment with a surface treatment agent containing a triazole silane compound (disclosed in JP 2018-16865 A).

In step (6), the cover layer 22 is patterned. If a negative etching resist is used as the cover layer, the exposed portions will be insoluble in the subsequent developer, while the unexposed portions will dissolve in the developer and be removed. After removal, the cover layer 22 that covers the opening is formed.

In step (6), the cover layer 22 is exposed to actinic light in a pattern by passing it through a photomask or using a direct exposure machine. The exposure dose can be set appropriately as needed. The latent image formed in the photosensitive resist by exposure is removed using a developer, thereby patterning the cover layer 22.

The developer may be a dilute aqueous alkaline solution of 0.3 to 2% by mass of sodium carbonate, potassium carbonate, or the like. A surfactant, an antifoaming agent, or a small amount of an organic solvent to promote development may be added to the dilute aqueous alkaline solution. Furthermore, development can be carried out by immersing the exposed substrate in the developer or by spraying the developer onto the resist with a spray, etc., and this development can form a patterned resist in which the pattern-forming portion has been removed.

When forming the cover layer 22, you may also use plasma descum treatment or a commercially available resist residue remover to remove resist residue, such as the trailing edge at the boundary between the hardened resist and the substrate, and resist deposits remaining on the substrate surface.

The cover layer 22 used in the present invention can be made from commercially available resist ink, liquid resist, or dry film resist, and can be selected appropriately depending on the desired pattern resolution, the type of exposure machine used, the type of chemical solution used in the subsequent plating process, pH, etc.

Commercially available resist inks include, for example, "Plating Resist MA-830" and "Etching Resist X-87" manufactured by Taiyo Ink Mfg. Co., Ltd.; etching resists and plating resists manufactured by NAZDAR; and the "Etching Resist PLAS FINE PER" series and "Plating Resist PLAS FINE PPR" series manufactured by GOO Chemical Industry Co., Ltd. Examples of electrodeposition resists include the "Eagle Series" and "Peper Series" manufactured by The Dow Chemical Company. Examples of commercially available dry films include, for example, the "Photec" series manufactured by Resonac Inc.; the "ALPHO" series manufactured by Nikko Materials Co., Ltd.; the "Sunfort" series manufactured by Asahi Kasei Corporation; and the "Riston" series manufactured by DuPont.

The use of dry film resist is a convenient way to efficiently manufacture printed wiring boards, and when forming fine circuits in particular, dry film for semi-additive processes can be used. Commercially available dry films for this purpose include, for example, "ALFO LDF500" and "NIT2700" manufactured by Nikko Materials Co., Ltd., "Sunfort UFG-258" manufactured by Asahi Kasei Corporation, "RD Series (RD-2015, 1225)" and "RY Series (RY-5319, 5325)" manufactured by Resonac Inc., and "PlateMaster Series (PM200, 300)" manufactured by DuPont.

In step (6), the diameter of the cover layer 22 after patterning preferably has a ratio of 1.05 to 3.0, more preferably 1.05 to 2.5, and even more preferably 1.05 to 2.0, where the diameter of the via (opening) 18 is taken as 1. If the diameter of the cover layer 22 after patterning is too small, it may be difficult to cover the via (opening) 18, and if the diameter of the cover layer 22 after patterning is too large, it may be difficult to improve the wiring density.
If the patterns of the via (opening) 18 and the cover layer 22 are not perfect circles, the above ratio can be set based on the diameter of the circle inscribed in each of them.

In this manner, the semi-additive laminate of the present invention can be manufactured.

In the above steps (5) and (6), a manufacturing example using a resist is shown as a method for forming a cover layer that covers the opening, but this is not particularly limited in the present invention, and any known, commonly used material and method can be used as long as it functions as a cover layer that covers the opening when the second conductive seed layer described below is etched and can be removed thereafter.

(Printed wiring board manufacturing process)
2 to 4, a description will be given of a manufacturing process for a printed wiring board using the semi-additive laminate according to the present invention. In step (7), the portion of the second conductive seed layer 20 that is not covered by the cover layer 22 is removed by etching to expose the first conductive seed layer 16. Etching is carried out under conditions that do not etch the underlying first conductive seed layer 16, such as using a sulfuric acid-hydrogen peroxide or persulfate-based etching solution, with the temperature, concentration, and etching time appropriately adjusted.

When removing the second conductive seed layer, a physical removal process may be carried out in addition to chemical etching using a chemical solution, as long as the seed function of the first conductive seed layer is not impaired. For example, a wet blasting process may be carried out, in which an aqueous solution mixed with an abrasive is sprayed with air.

In step (8), the cover layer 22 is removed by immersion in a stripping solution such as sodium hydroxide.

In step (9), plating resist 24 is formed over the entire surface. In the example shown, plating resist 24 is formed by applying a film, but plating resist can also be formed by applying a liquid.

In the step of forming the plating resist 24 in step (9), for the same purpose as in step (5), the surface of the first conductive seed layer 16 may be subjected to a surface treatment such as cleaning with an acidic or alkaline cleaning solution, corona treatment, plasma treatment, UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, or treatment with a surface treatment agent before forming the plating resist 24. These surface treatments may be performed using one method or two or more methods in combination.

In step (10), the plating resist 24 is patterned so that the resist remains in the non-circuit forming areas. If the plating resist 24 is a negative type, the exposed areas will be insoluble in the subsequent developer, and the unexposed areas will dissolve in the developer and be removed.

In step (11), the entire surface is subjected to an electrolytic plating process such as electrolytic copper plating to form the pattern circuit 26. Note that either filled plating, which plates up the inside of the via (opening) 18 to the same height as the wiring, or conformal plating can be used only on the inner walls of the via (opening) 18.

In step (11), the first conductive seed layer 16 is used as a cathode electrode for electrolytic copper plating, and electrolytic copper plating is performed on the first conductive seed layer 16 exposed by development, thereby connecting the vias (openings) 18 of the laminate with copper plating and simultaneously forming a patterned circuit layer.

Prior to forming the pattern circuit 26 by electrolytic copper plating, the surface of the first conductive seed layer 16 may be subjected to a surface treatment, if necessary. Examples of such surface treatments include cleaning with an acidic or alkaline cleaning solution, corona treatment, plasma treatment, UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, and treatment with a surface treatment agent, provided that the surface of the first conductive seed layer 16 and the patterned plating resist 24 that has been formed are not damaged. These surface treatments can be performed using one method or two or more methods in combination.

In step (11), when forming the pattern circuit 26, annealing may be performed after plating to relieve stress in the plating film and improve adhesion. Annealing may be performed before the etching step described below, after the etching step, or both before and after etching.

The annealing temperature can be selected appropriately within the range of 40 to 300°C depending on the heat resistance of the substrate used and the intended use, but a range of 40 to 250°C is preferred, and a range of 40 to 200°C is even more preferred in order to prevent oxidative degradation of the plating film. Furthermore, the annealing time should be 10 minutes to 10 days when the temperature is in the range of 40 to 200°C, and approximately 5 minutes to 10 hours when annealing at temperatures above 200°C. When annealing the plating film, a rust inhibitor may be applied to the plating film surface as appropriate.

In step (12), the plating resist 24 is stripped by immersion in a stripping solution such as sodium hydroxide.

In step (13), the first conductive seed layer 16 is etched using a chemical solution, such as an organic acid, that does not etch the pattern circuit 26.

By repeating the above steps, a multi-layer board with the required number of layers can be formed. Also, while the above example assumes a rigid board, the same process can be carried out on both sides of a flexible board.

In step (12), the plating resist 24 is stripped, and then in step (13), the first conductive seed layer 16 in the non-pattern-forming areas is removed using an etching solution. The plating resist 24 can be stripped under the recommended conditions described in the catalog or specifications of the photosensitive resist used. The resist stripper used to strip the plating resist 24 can be a commercially available resist stripper or a 1.5 to 3 mass % aqueous solution of sodium hydroxide or potassium hydroxide set to 45 to 60°C. The plating resist 24 can be stripped by immersing the substrate on which the pattern circuit 26 is formed in the stripper, or by spraying the stripper with a spray or the like.

Furthermore, it is preferable that the etching solution used to remove the first conductive seed layer 16 in the non-pattern forming areas selectively etches only the first conductive seed layer 16, and does not etch the copper that forms the pattern circuit 26. An example of such an etching solution is a mixture of carboxylic acid and hydrogen peroxide.

Examples of carboxylic acids include acetic acid, formic acid, propionic acid, butyric acid, valeric acid, caproic acid, enanthic acid, caprylic acid, pelargonic acid, capric acid, lauric acid, myristic acid, palmitic acid, margaric acid, stearic acid, oleic acid, linoleic acid, linolenic acid, arachidonic acid, eicosapentaenoic acid, docosahexaenoic acid, oxalic acid, malonic acid, succinic acid, benzoic acid, salicylic acid, phthalic acid, isophthalic acid, terephthalic acid, gallic acid, mellitic acid, cinnamic acid, pyruvic acid, lactic acid, malic acid, citric acid, fumaric acid, maleic acid, aconitic acid, glutaric acid, adipic acid, and amino acids. These carboxylic acids can be used alone or in combination. Of these carboxylic acids, acetic acid is preferably used primarily because it is easy to manufacture and handle as an etching solution.

When a mixture of carboxylic acid and hydrogen peroxide is used as the etching solution, it is believed that the hydrogen peroxide reacts with the carboxylic acid to produce percarboxylic acid (peroxycarboxylic acid). It is presumed that the produced percarboxylic acid preferentially dissolves the silver that makes up the first conductive seed layer 16 while suppressing the dissolution of the copper that makes up the pattern circuit 26.

The mixing ratio of the mixture of carboxylic acid and hydrogen peroxide is preferably in the range of 2 to 100 moles of hydrogen peroxide per 1 mole of carboxylic acid, and more preferably in the range of 2 to 50 moles of hydrogen peroxide, as this can suppress dissolution of the copper pattern circuit 26.

The mixture of carboxylic acid and hydrogen peroxide is preferably an aqueous solution diluted with water. Furthermore, the content ratio of the mixture of carboxylic acid and hydrogen peroxide in the aqueous solution is preferably in the range of 2 to 65% by mass, more preferably 2 to 30% by mass, since this can suppress the effect of temperature rise in the etching solution.

The water used for the above dilution is preferably water from which ionic substances and impurities have been removed, such as ion-exchanged water, pure water, or ultrapure water.

A protective agent may be added to the etching solution to protect the pattern circuit 26 and prevent dissolution. An azole compound is preferably used as the protective agent.

Examples of azole compounds include imidazole, pyrazole, triazole, tetrazole, oxazole, thiazole, selenazole, oxadiazole, thiadiazole, oxatriazole, and thiatriazole.

Specific examples of azole compounds include 2-methylbenzimidazole, aminotriazole, 1,2,3-benzotriazole, 4-aminobenzotriazole, 1-bisaminomethylbenzotriazole, aminotetrazole, phenyltetrazole, 2-phenylthiazole, and benzothiazole. These azole compounds can be used alone or in combination of two or more.

The concentration of the azole compound in the etching solution is preferably in the range of 0.001 to 2 mass%, and more preferably in the range of 0.01 to 0.2 mass%.

It is also preferable to add polyalkylene glycol as a protective agent to the etching solution, as this can prevent the copper pattern circuit 26 from dissolving.

Examples of polyalkylene glycols include water-soluble polymers such as polyethylene glycol, polypropylene glycol, and polyoxyethylene-polyoxypropylene block copolymers. Of these, polyethylene glycol is preferred. Furthermore, the number-average molecular weight of the polyalkylene glycol is preferably in the range of 200 to 20,000.

The concentration of polyalkylene glycol in the etching solution is preferably in the range of 0.001 to 2% by mass, and more preferably in the range of 0.01 to 1% by mass.

If necessary, additives such as sodium salts, potassium salts, or ammonium salts of organic acids may be added to the etching solution to suppress pH fluctuations.

In step (13), the first conductive seed layer 16 can be removed by immersing the substrate in an etching solution after forming the pattern circuit 26, or by spraying the etching solution onto the substrate with a spray or the like.

When using an etching device to remove the first conductive seed layer 16 in the non-pattern formation areas, for example, all components of the etching solution may be prepared to have a predetermined composition and then supplied to the etching device, or each component of the etching solution may be supplied separately to the etching device and mixed within the device to prepare the predetermined composition.

Etching solutions are preferably used in the temperature range of 10 to 35°C, and when using etching solutions containing hydrogen peroxide, it is preferable to use them in the temperature range of 30°C or less, as this can prevent the decomposition of hydrogen peroxide.

After removing the first conductive seed layer 16 with an etching solution, a cleaning operation may be performed in addition to rinsing with water to prevent silver components dissolved in the etching solution from adhering to and remaining on the printed wiring board. For the cleaning operation, it is preferable to use a cleaning solution that dissolves silver oxide, silver sulfide, and silver chloride but hardly dissolves silver. Specifically, it is preferable to use an aqueous solution containing thiosulfate or tris(3-hydroxyalkyl)phosphine, or an aqueous solution containing mercaptocarboxylic acid or its salt as the cleaning solution.

Examples of thiosulfates include ammonium thiosulfate, sodium thiosulfate, and potassium thiosulfate. Examples of tris(3-hydroxyalkyl)phosphines include tris(3-hydroxymethyl)phosphine, tris(3-hydroxyethyl)phosphine, and tris(3-hydroxypropyl)phosphine. These thiosulfates and tris(3-hydroxyalkyl)phosphines can be used alone or in combination of two or more.

When using an aqueous solution containing thiosulfate, the concentration can be set appropriately depending on the process time, the characteristics of the cleaning equipment used, etc., but a range of 0.1 to 40% by mass is preferred, and a range of 1 to 30% by mass is more preferred from the standpoint of cleaning efficiency and chemical solution stability during continuous use.

Furthermore, when using an aqueous solution containing tris(3-hydroxyalkyl)phosphine, the concentration can be set appropriately depending on the process time, the characteristics of the cleaning equipment used, etc., but a range of 0.1 to 50% by mass is preferred, and a range of 1 to 40% by mass is more preferred from the standpoint of cleaning efficiency and chemical solution stability during continuous use.

Examples of mercaptocarboxylic acids include thioglycolic acid, 2-mercaptopropionic acid, 3-mercaptopropionic acid, thiomalic acid, cysteine, and N-acetylcysteine. Examples of salts of mercaptocarboxylic acids include alkali metal salts, ammonium salts, and amine salts.

When using an aqueous solution of mercaptocarboxylic acid or its salt, the concentration is preferably in the range of 0.1 to 20% by mass, and from the standpoint of cleaning efficiency and process costs when treating large quantities, the range of 0.5 to 15% by mass is more preferable.

Methods for carrying out the above-mentioned cleaning operation include, for example, immersing the printed wiring board obtained by etching away the first conductive seed layer 16 in the non-pattern-forming areas in a cleaning solution, or spraying the cleaning solution onto the printed wiring board with a spray or the like. The cleaning solution can be used at room temperature (25°C), but since this allows for stable cleaning without being affected by the outside temperature, it may also be set to a temperature of, for example, 30°C.

Furthermore, the process of removing the first conductive seed layer 16 from the non-pattern forming areas using an etching solution and the cleaning operation can be repeated as necessary.

In the method for manufacturing a printed wiring board of the present invention, after removing the first conductive seed layer 16 from the non-pattern-forming areas with an etching solution as described above, a further cleaning operation may be carried out as necessary to further improve the insulation of the non-pattern-forming areas. For this cleaning operation, for example, an alkaline permanganate solution prepared by dissolving potassium permanganate or sodium permanganate in an aqueous solution of potassium hydroxide or sodium hydroxide can be used.

Cleaning using an alkaline permanganate solution can be done by immersing the printed wiring board obtained by the above method in an alkaline permanganate solution set to 20-60°C, or by spraying the alkaline permanganate solution onto the printed wiring board using a spray or other method. Prior to cleaning, the printed wiring board can be treated by contacting it with a water-soluble organic solvent containing an alcoholic hydroxyl group in order to improve the wettability of the alkaline permanganate solution to the substrate surface and improve cleaning efficiency. Examples of such organic solvents include methyl alcohol, ethyl alcohol, n-propyl alcohol, and isopropyl alcohol. These organic solvents can be used alone or in combination of two or more.

The concentration of the alkaline permanganate solution can be selected as needed, but it is preferable to dissolve 0.1 to 10 parts by mass of potassium permanganate or sodium permanganate in 100 parts by mass of a 0.1 to 10% by mass aqueous solution of potassium hydroxide or sodium hydroxide. From the standpoint of cleaning efficiency, it is even more preferable to dissolve 1 to 6 parts by mass of potassium permanganate or sodium permanganate in 100 parts by mass of a 1 to 6% by mass aqueous solution of potassium hydroxide or sodium hydroxide.

When cleaning with an alkaline permanganate solution, it is preferable to treat the cleaned printed wiring board with a solution that has neutralizing and reducing properties after cleaning with the alkaline permanganate solution. Examples of solutions that have neutralizing and reducing properties include 0.5 to 15% by mass of dilute sulfuric acid or an aqueous solution containing an organic acid. Examples of organic acids include formic acid, acetic acid, oxalic acid, citric acid, ascorbic acid, and methionine.

Cleaning with alkaline permanganate solution may be performed after cleaning to prevent silver components dissolved in the etching solution from adhering to and remaining on the printed wiring board, or cleaning with alkaline permanganate solution alone may be performed instead of cleaning to prevent silver components dissolved in the etching solution from adhering to and remaining on the printed wiring board.

Furthermore, the printed wiring board obtained by the method for manufacturing a printed wiring board of the present invention may be appropriately and optionally subjected to lamination of a coverlay film on the pattern circuit, formation of a solder resist layer, and nickel/gold plating, nickel/palladium/gold plating, or palladium/gold plating as a final surface treatment of the pattern circuit.

The method for manufacturing printed wiring boards using the semi-additive laminate of the present invention described above makes it possible to produce double-sided and via-connected circuit boards that have high adhesion, good design reproducibility, and patterned circuits with smooth surfaces and good rectangular cross-sectional shapes on a variety of smooth substrates. Therefore, by using the method for manufacturing printed wiring boards using the semi-additive laminate of the present invention, high-density, high-performance printed wiring board substrates and printed wiring boards of various shapes and sizes can be provided efficiently and at low cost, making the method highly applicable industrially in the printed wiring board field. Furthermore, the laminate can be used to manufacture not only printed wiring boards, but also various components that have a patterned metal layer on a flat substrate surface, such as connectors, electromagnetic shields, antennas for RFID and the like, and film capacitors.

The present invention will be explained in more detail below using examples and comparative examples. In the following examples and comparative examples, "parts" and "%" are all by mass.

[Production Example 1: Production of primer]
In a nitrogen-substituted vessel equipped with a thermometer, a nitrogen gas inlet tube, and a stirrer, 100 parts by mass of polyester polyol (a polyester polyol obtained by reacting 1,4-cyclohexanedimethanol, neopentyl glycol, and adipic acid), 17.6 parts by mass of 2,2-dimethylolpropionic acid, 21.7 parts by mass of 1,4-cyclohexanedimethanol, and 106.2 parts by mass of dicyclohexylmethane-4,4'-diisocyanate were reacted in a mixed solvent of 178 parts by mass of methyl ethyl ketone to obtain a urethane prepolymer solution having an isocyanate group at its terminal.

Next, 13.3 parts by mass of triethylamine was added to the urethane prepolymer solution to neutralize the carboxyl groups in the urethane prepolymer, and 380 parts by mass of water was then added and thoroughly stirred to obtain an aqueous dispersion of the urethane prepolymer.

To the aqueous dispersion of the urethane prepolymer obtained above, 8.8 parts by mass of a 25% by mass aqueous solution of ethylenediamine was added, and the mixture was stirred to extend the chain of the urethane prepolymer.
The mixture was then aged and desolvated to obtain an aqueous dispersion of urethane resin (non-volatile content: 30% by mass). The weight average molecular weight of the urethane resin was 53,000.

Next, 140 parts by mass of deionized water and 100 parts by mass of the aqueous dispersion of urethane resin obtained above were placed in a reaction vessel equipped with a stirrer, reflux condenser, nitrogen inlet tube, thermometer, monomer mixture dropping funnel, and polymerization catalyst dropping funnel, and the temperature was raised to 80°C while nitrogen was blown in. Then, with stirring, a monomer mixture consisting of 60 parts by mass of methyl methacrylate, 30 parts by mass of n-butyl acrylate, and 10 parts by mass of N-n-butoxymethylacrylamide, and 20 parts by mass of a 0.5% by mass aqueous ammonium persulfate solution were added dropwise from separate dropping funnels over 120 minutes while maintaining the temperature inside the reaction vessel at 80°C.

After the dropwise addition was completed, the mixture was stirred at the same temperature for an additional 60 minutes, then the temperature inside the reaction vessel was cooled to 40°C and the mixture was diluted with deionized water to a non-volatile content of 20% by mass. The mixture was then filtered through a 200-mesh filter cloth to obtain an aqueous dispersion of a resin composition for the primer layer, which is a core-shell composite resin with the urethane resin as the shell layer and an acrylic resin made from raw materials such as methyl methacrylate as the core layer. Next, isopropyl alcohol and deionized water were added to and mixed with this aqueous dispersion so that the mass ratio of isopropanol to water was 7/3 and the non-volatile content was 2% by mass, yielding a primer.

Preparation Example 1: Preparation of silver particle dispersion
A dispersion containing silver particles and a dispersant was prepared by dispersing silver particles having an average particle size of 30 nm in a mixed solvent of 45 parts by mass of ethylene glycol and 55 parts by mass of ion-exchanged water using a compound formed by adding polyoxyethylene to polyethyleneimine as a dispersant. Next, ion-exchanged water, ethanol, and a surfactant were added to the resulting dispersion to prepare a 5% by mass silver particle dispersion.

Preparation Example 2: Preparation of silver etching solution
A silver etching solution was prepared by adding 2.6 parts by mass of acetic acid to 47.4 parts by mass of ion-exchanged water, and then adding 50 parts by mass of 35% by mass of hydrogen peroxide solution. The molar ratio of hydrogen peroxide to carboxylic acid (hydrogen peroxide/carboxylic acid) in this silver etching solution was 13.6, and the content of the mixture of hydrogen peroxide and carboxylic acid in the silver etching solution was 22.4% by mass.

Preparation Example 3: Preparation of copper etching solution
A copper etching solution was prepared by mixing 37.5 g/L of sulfuric acid and 13.5 g/L of hydrogen peroxide with ion-exchanged water.

Example 1
The primer obtained in Production Example 1 was applied to the surface of a polyimide film ("Kapton 100EN-C" manufactured by DuPont-Toray Co., Ltd.; thickness: 25 μm) serving as an insulating substrate using a small desktop coater ("K Printing Profer" manufactured by RK Print Coat Instruments Co., Ltd.) so that the thickness after drying would be 300 nm, and then dried for 5 minutes at 80°C using a hot air dryer. Further, the film was turned over, and the primer obtained in Production Example 1 was applied to the surface in the same manner as above so that the thickness after drying would be 300 nm, and then dried for 5 minutes at 80°C using a hot air dryer, thereby forming primer layers on both surfaces of the polyimide film.

The silver particle dispersion obtained in Preparation Example 1 was applied to the polyimide film obtained above having primer layers on both surfaces using a small desktop coater (RK Printing Profer, manufactured by RK Print Coat Instruments) so that the silver particle layer after drying would be 0.5 g/ ^m² . The film was then dried for 5 minutes at 160°C using a hot air dryer. The film was then turned over, and the silver particle dispersion obtained in Preparation Example 1 was applied to the polyimide film in the same manner as above so that the silver particle layer would be 0.5 g/ ^m². The film was then dried for 5 minutes at 160°C using a hot air dryer, thereby forming silver particle layers on both surfaces of the polyimide film. The film substrate thus obtained was baked for 5 minutes at 250°C, and the conductivity of the silver particle layer was confirmed with a tester. A polyimide film having a primer and a first conductive seed layer (silver particle layer) on both surfaces of the polyimide was obtained.

A 38 μm thick polyester removable adhesive tape (Panaprotect HP/CT, manufactured by Panac Corporation) was laminated as a peelable cover layer onto the polyimide film obtained above, which had first conductive seed layers on both surfaces, using a roll laminator (VA-770, manufactured by Taisei Laminator Co., Ltd.), producing a laminate for semi-additive construction in which the first conductive seed layer and peelable cover layer were sequentially laminated on both surfaces of the polyimide film, which served as an insulating substrate.

A 50 μm diameter via was formed on the peelable cover layer of the laminate using a CO ₂ laser processing machine (manufactured by Via Mechanics Co., Ltd.). After that, smears generated by via processing were removed by plasma treatment, and the peelable cover layer was peeled off to expose the first conductive seed layer. Next, the entire surface, including the inside of the via, was subjected to electroless copper plating (immersion in an electroless copper plating solution ("Circuposit 6550" manufactured by Rohm and Haas Electronic Materials Co., Ltd.) at 35° C. for 10 minutes) to form a copper layer, which is a second conductive seed layer.

Next, as a cover layer, an etching resist (Photec RY-3110, manufactured by Resonac Corporation, resist film thickness 25 μm) was formed over the entire surface using a roll laminator (VA-770, manufactured by Taisei Laminator Co., Ltd.) at 100°C. After that, a pattern was exposed using an exposure device (manufactured by Oak Manufacturing Co., Ltd.) equipped with a high-pressure mercury lamp, designed to protect the via area. Development was then carried out at 30°C with a 1% by weight aqueous solution of sodium carbonate, removing the etching resist from areas other than those above the vias.

Next, the electroless copper plating portions not covered by the etching resist were removed by etching using the sulfuric acid/hydrogen peroxide-based copper etching solution prepared in Preparation Example 3, and the etching resist was then stripped by immersion in a 3% by mass aqueous sodium hydroxide solution at 50°C.

A plating resist (Resonac Corporation, Photec RY-5125, resist film thickness 15 μm) was formed over the entire surface using a roll laminator (Taisei Laminator Co., Ltd., VA-770) at 100°C, after which the pattern was exposed using an exposure device equipped with a high-pressure mercury lamp (Oak Manufacturing Co., Ltd.), and the plating resist in the via and wiring areas was removed by developing at 30°C with a 1% by weight aqueous solution of sodium carbonate.

The surfaces of the first conductive seed layer and the second conductive seed layer formed on the surfaces of the openings were placed on the cathode, and phosphorus-containing copper was used as the anode. An electrolytic plating solution containing copper sulfate (copper sulfate 60 g/L, sulfuric acid 190 g/L, chloride ions 50 mg/L, additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) was used to perform electrolytic copper plating at a current density of 2.4 A/ ^dm2 for 30 minutes, thereby plating up the via portion and the wiring portion to the same height. Thereafter, the plated resist was stripped by immersion in a 3 mass % aqueous sodium hydroxide solution at 50°C.
Finally, the laminate obtained above was immersed in the silver etching solution obtained in Preparation Example 2 at 25°C for 30 seconds to remove the first conductive seed layer other than the conductive layer pattern, thereby obtaining a printed wiring board.

Example 2
A printed wiring board was obtained through the same steps as in Example 1, except that no primer layer was provided.

Example 3
A printed wiring board was obtained through the same steps as in Example 1, except that no peelable cover layer was provided and the peeling step of the peelable cover layer was not carried out.

Example 4
In Example 1, instead of forming a 38 μm thick Panaprotect HP/CT peelable cover layer on the polyimide film having first conductive seed layers on both surfaces thereof, the first conductive seed layer was placed as the cathode, and phosphorous copper was used as the anode. An electrolytic plating solution containing copper sulfate (copper sulfate 60 g/L, sulfuric acid 190 g/L, chloride ions 50 mg/L, additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) was used to perform electrolytic copper plating at a current density of 2.0 A/ ^dm2 for 2.5 minutes, thereby forming a 2 μm thick copper layer on the first conductive layer. A laminate was obtained through the same steps as in Example 1, except that a 2 μm thick copper layer was formed on the first conductive layer.

A 100 μm diameter via was formed on the copper layer of the laminate using a CO ₂ laser processing machine (manufactured by Via Mechanics Co., Ltd.). Smears generated by the via processing were then removed by wet desmearing using permanganic acid. Next, the entire surface, including the interior of the via, was subjected to electroless copper plating (immersion in an electroless copper plating solution ("Circuposit 6550" manufactured by Rohm and Haas Electronic Materials Co., Ltd.) at 35° C. for 10 minutes) to form a copper layer serving as a second conductive seed layer.

After forming the copper layer, which served as the second conductive seed layer, the copper-plated portions not covered by the etching resist were removed by etching using the sulfuric acid/hydrogen peroxide-based copper etching solution prepared in Preparation Example 3, in the same manner as in Example 1, and a printed wiring board was obtained in the same manner as in Example 1.

Example 5
In Example 4, the type of the first conductive seed layer was changed to aluminum, and an aluminum layer having a thickness of 500 nm was formed by vapor deposition, followed by the same steps as in Example 4 to obtain a laminate. Aluminum etching was performed using a mixed acid Al etching solution (manufactured by Kanto Chemical Co., Inc.).

(Comparative Example 1)
After forming a copper layer, which was the second conductive seed layer of the laminate, a conductive layer pattern was produced using a plating resist without going through the process of removing the electroless copper plating using an etching resist, and a printed wiring board was obtained through the same process as in Example 1, except that etching was performed using the sulfuric acid/hydrogen peroxide-based copper etching solution produced in Preparation Example 3.

[Evaluation Method 1: Smoothness of Wiring Surface]
The surface shape of the wiring on the printed wiring board obtained above was confirmed by magnifying it 1,000 times using a scanning electron microscope (JSM7600F manufactured by JEOL Ltd.) so that the surface of the wiring could be observed.
◎: The shape of the wiring surface was smooth. ○: The shape of the wiring surface was partially smooth. ×: The shape of the wiring surface was not smooth.

[Evaluation Method 2: Rectangularity of Wiring Cross Section]
The printed wiring board obtained above was resin-sealed and polished so that the cross section of the wiring could be observed, and then the cross-sectional shape was confirmed using a scanning electron microscope (JEOL Ltd., "JSM7600F") at 5,000 times magnification.
○: The cross-sectional shape was rectangular ×: The cross-sectional shape was not rectangular

10: Insulating substrate (base)
12: Circuit 13: Insulating substrate 14: Primer layer 16: First conductive seed layer 18: Via (opening)
20: second conductive seed layer 22: cover layer 24: plating resist 26: pattern circuit

Claims (11)

an insulating substrate;
a first conductive seed layer having an opening formed on at least one surface of the insulating substrate;
a second conductive seed layer formed on the inner surface of the opening in the first conductive seed layer and electrically connected to the first conductive seed layer;
a cover layer covering the opening;
Equipped with
the first conductive seed layer and the second conductive seed layer are made of a metal material;
A laminate for semi-additive processing, wherein the second conductive seed layer is composed of a metal material different from that of the first conductive seed layer. The laminate for semi-additive manufacturing according to claim 1, wherein the metal material constituting the first conductive seed layer is silver and the metal material constituting the second conductive seed layer is copper. The laminate for semi-additive manufacturing according to claim 1, which has a primer layer between the insulating substrate and the first conductive seed layer. A printed wiring board using the semi-additive laminate described in any one of claims 1 to 3. A method for producing the laminate for semi-additive manufacturing according to any one of claims 1 to 3,
forming an opening in an insulating substrate having a first conductive seed layer on at least one surface of the substrate;
forming a second conductive seed layer made of a metal different from that of the first conductive seed layer on a surface of the first conductive seed layer and on an inner surface of the opening;
forming a cover layer covering the opening;
A method for producing a laminate for semi-additive manufacturing, comprising: The method for manufacturing a laminate for semi-additive manufacturing according to claim 5, wherein the opening is formed with a protective layer formed on the first conductive seed layer. The method for manufacturing a laminate for semi-additive manufacturing according to claim 6, wherein the protective layer is a peelable cover layer. The method for manufacturing a laminate for semi-additive processing according to claim 6, wherein the protective layer is composed of the same metal material as the metal material forming the second conductive seed layer. A method for producing a printed wiring board using a laminate for semi-additive processing obtained by the production method according to claim 5 or 6,
removing a portion of the second conductive seed layer on the first conductive seed layer of the semi-additive manufacturing laminate to expose a surface of the first conductive seed layer;
removing a cover layer covering the opening;
forming a plating resist on a portion of the exposed first conductive seed layer;
forming a patterned circuit portion on the second conductive seed layer and the exposed first conductive seed layer by electroplating;
stripping the plating resist to expose the first conductive seed layer;
removing the exposed first conductive seed layer;
A method for manufacturing a printed wiring board, comprising: The method for manufacturing a printed wiring board according to claim 9, wherein the metal material constituting the first conductive seed layer is silver and the metal material constituting the second conductive seed layer is copper. The method for manufacturing a printed wiring board according to claim 9 or 10, further comprising a primer layer between the insulating substrate and the first conductive seed layer.