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WO2025157410A1 - Module détecteur de rayonnement - Google Patents

Module détecteur de rayonnement

Info

Publication number
WO2025157410A1
WO2025157410A1 PCT/EP2024/051781 EP2024051781W WO2025157410A1 WO 2025157410 A1 WO2025157410 A1 WO 2025157410A1 EP 2024051781 W EP2024051781 W EP 2024051781W WO 2025157410 A1 WO2025157410 A1 WO 2025157410A1
Authority
WO
WIPO (PCT)
Prior art keywords
input
contacts
substrate
readout
sensor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/EP2024/051781
Other languages
English (en)
Inventor
Michael RISSI
Niklaus LEHMANN
Oliver LUESCHER
Alfonso Gonzalez TABOADA
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DECTRIS AG
Original Assignee
DECTRIS AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DECTRIS AG filed Critical DECTRIS AG
Priority to PCT/EP2024/051781 priority Critical patent/WO2025157410A1/fr
Publication of WO2025157410A1 publication Critical patent/WO2025157410A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16—Measuring radiation intensity
    • G01T1/24—Measuring radiation intensity with semiconductor detectors
    • G01T1/247—Detector read-out circuitry
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16—Measuring radiation intensity
    • G01T1/17—Circuit arrangements not adapted to a particular type of detector
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H10F39/189—X-ray, gamma-ray or corpuscular radiation imagers
    • H10F39/1895—X-ray, gamma-ray or corpuscular radiation imagers of the hybrid type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/811—Interconnections

Definitions

  • the present invention relates to a radiation detector module .
  • an x-ray source emits a beam towards a patient .
  • the transmitted beam is collected in an x-ray detector, commonly arranged in an arc shape opposite to the X-ray source .
  • the arc-shape is usually assembled by accurately placing together small detector modules , e . g . of si ze 4 * 2 cm 2 .
  • the detector modules are desired to butt against each other at their four sides assuming rectangular or square shaped detector modules .
  • Hybrid pixel detectors comprise a pixe- lated sensor, which is connected pixel-by-pixel to a readout chip (ROC ) .
  • the semiconductor sensor typically is made from one or more of Si , GaAs , CdTe and CZT and absorbs ioni zing radiation energy by means of photoelectric or Compton interaction, leading to the generation of a charge pulse .
  • the corresponding signal travels through the sensor pixel that is interconnected with dedicated circuitry in the ROC, also referred to as ROC pixel , where it is analysed and digitali zed .
  • the ROC pixels are connected to a readout board by means of wire bonds .
  • a hybrid pixel detector is manufactured following a modular assembly approach .
  • Several detector modules each comprising a sensor, a ROC pixel and a readout board are assembled together in a two-dimensional arrangement up to the final detector dimensions .
  • the wire bond connections lead to an existence of dead detection areas, i.e. gaps, between the detector modules, and in particular gaps between the sensors of the modules.
  • the existence of gaps in the detector is not compatible with most of the imaging applications and, in particular, with medical imaging.
  • a radiation detector module is provided according to claim 1.
  • the radiation detector module comprises at least one sensor tile, preferably made from semiconductor material, preferably made from one or more of Si, GaAs, CdTe and CZT, i.e. a sensor material for absorbing ionizing radiation energy by means of photoelectric or Compton interaction.
  • the sensor tile preferably is made from a high Z material in the case of computer tomography imaging applications.
  • the sensor tile typically is a flat tile with a horizontal extension in x and y dimension each exceeding its extension in the third dimension z orthogonal to the horizontal plane, i.e. its height.
  • the sensor tile comprises a set of pixels of electrically conducting material in contact with the sensor material.
  • a pixel is defined as a surface area in the horizontal plane, preferably at the bottom surface of the sensor tile, typically made from metal.
  • a pixel may refer to a corresponding area defined by an electrically conducting diffusion layer on or in the sensitive material of the sensor tile with a metal contact on top.
  • the diffusion layer may e.g. be part of a PIN diode structure formed inside e.g. by means of a layer of silicon of the sensor tile.
  • the detector module allows for position-resolved detection.
  • the amount of radiation e.g. a number of photons, a number of electrons, or deposited energy
  • the detector module spatial resolution i.e. the number of pixels or measurement values per unit area, depends on the pixel pitch.
  • the pitch preferably is defined as space period of the pixels across an homogeneous pixel matrix distribution.
  • the pixel pitch corresponds to the distance between adjacent pixels measured e.g. pixel center to pixel center .
  • the pitch of the pixels is uniform across the sensor tile.
  • the pixels are of rectangular shape and in particular of square shape with a side length typically between 5 pm and 1000 pm, preferably between 30 pm and 450 pm.
  • the pixels of the set may be arranged grid-like, e.g. in a rectangular grid, ideally covering a large fraction of the sensitive material of the sensor tile, e.g. at least 90%, 95% or 99%.
  • the number of sensor pixels in the set of sensor pixels of a sensor tile exceeds at least four.
  • the radiation detector module further comprises at least one ROC, preferably in form of an ASIC (Application Specific Integrated Circuit) .
  • Each ROC comprises input contacts, preferably arranged at the top surface of the ROC, each input contact internally connecting to an assigned readout circuit implemented in the ROC, which individual readout circuit , preferably including the corresponding input contact , is also referred to as ROC pixel .
  • Each sensor pixel is electrically connected, in a 1 : 1 relation, to an assigned ROC pixel via intermediary interconnect means to be introduced below .
  • the one or more ROCs are preferably configured to process the electrical signals from the sensor pixels .
  • Processing may in particular comprise one or more of ampli fying the signal from the sensor pixel , comparing the ampli fied signal with a threshold and supplying an electrical pulse for the duration the ampli fied signal exceeds the threshold, determining an amount of electrical charge per pixel and time , counting a number of incident photons or electrons above a given signal threshold converted to electrical charge per pixel and time , and further processing such as calibration .
  • the one or more readout chips also have a hori zontal extension and are arranged in parallel to the sensor tile .
  • a single ROC is assigned to a single sensor tile for processing the signals of all sensor pixels .
  • multiple ROCs are assigned to a single sensor tile for processing the signals of all sensor pixels .
  • multiple ROCs are assigned to multiple sensor tiles for processing the signals of all sensor pixels of the multiple sensor tiles . In case of multiple ROCs , these ROCs are arranged next to each other in the horizontal plane .
  • a pitch of the input contacts in the ROC is defined analog to the pitch of sensor pixels , with respect to the input contacts of the individual readout circuits in the ROC .
  • the pitch of the input contacts is uni form across the ROC .
  • the pitch between two input contacts preferably is between 20 um and 500 um .
  • the pitch of the ROC pixels is smaller than the pitch of the sensor pixels . The reason for this is that additional space is required next to the one or more ROCs for providing output wiring .
  • the radiation detector module further comprises a substrate , preferably a printed circuit board ( RGB ) or a moulded interconnect device (MID) , the material of which MID preferably is an epoxy based compound, or a glass substrate .
  • the substrate is arranged in parallel with the sensor tile , and preferably is arranged in a stack with the sensor tile oriented in the third dimension, the sensor tile being arranged on top of the substrate .
  • the substrate comprises a set of input contacts .
  • the number of input contacts preferably correspond to the accumulated number of input contacts of the one or more ROCs . Accordingly, wiring is provided in the substrate for electrically connecting its input contacts with the input contacts of the one or more ROCs , which wiring is referred to as input wiring .
  • the substrate extends hori zontally and comprises a top surface and a bottom surface .
  • the input contacts are arranged at the top surface .
  • the input contacts of the substrate are electrically connected with the sensor pixels , in a 1 : 1 relation, by interconnect means , e . g . including one of solder bumps , C4 , Cu pillars , Cu pillars with solder, Au stud bumps , anisotropic conductive adhesives and any other suitable microinterconnects .
  • the pitch of the input contacts of the substrate is defined analog to the pitch of the sensor pixels and the pitch of the ROC pixels .
  • the pitch of the input contacts of the substrate corresponds to the pitch of the sensor pixels , and - in an assembled state of the sensor tile and the substrate - centers of the input contacts of the substrate and centers of the sensor pixels match each other in the third dimension, i . e . there is no lateral of fset between the corresponding centers .
  • the substrate further comprises one or more output contacts arranged at its bottom surface .
  • Each ROC also provides one or more output contacts , preferably at its top surface , i . e . the same surface its input contacts are arranged .
  • the one or more output contacts supply processed input signals .
  • the number of output contacts of the ROC is lower than the number of its input contacts given since the 1 : 1 relationship does not need to be maintained .
  • the processed information in particular the count information, may be supplied via the one or more output contacts e . g . in a multiplexed manner and/or otherwise digiti zed .
  • this may imply providing supply voltages and ground voltages to the AS IC or providing digital configuration data to the AS IC and the pixels .
  • the substrate also comprises wiring referred to as output wiring connecting its one or more output contacts to the one or more output contacts of the one or more ROCs .
  • the present arrangement connects the sensor pixels with input contacts of the substrate first , while only the substrate input contacts are connected in some way to the input contacts of the ROC/ s .
  • the sensor pixels directly are connected to the input contact of the ROC/ s .
  • the one or more ROCs are embedded in the substrate .
  • Embedding is understood that at least the top and bottom surfaces of the one or more ROCs are covered by insulating substrate material .
  • each ROC preferably is cast into substrate material .
  • all four front ends of each ROC i.e. the sides between the top and bottom surface, are covered by the substrate material, i.e. not exposed and, hence, mechanically protected by the surrounding substrate.
  • the ROC is fully cast into the material of the substrate, i.e. all its surfaces are covered by the material of the substrate.
  • the material of the substrate is an insulating material, and it is the same material covering all the surfaces of the ROC.
  • a height of the substrate in the third dimension exceeds a height of the ROC.
  • at least one of the front ends is uncovered by the substrate material.
  • each of the sensor tile, the ROC and the substrate is of rectangular shape, and in particular is of square shape.
  • the sensor tile and the substrate are stacked and have the same extensions in the horizontal plane.
  • the sensor tile comprises a top surface, e.g. comprising a top electrode and a bottom surface comprising the set of pixels. In the top region of the sensor tile, the incident radiation is converted into electrical charge.
  • the sensor pixels at the bottom surface face the substrate, and, hence, face the input contacts of the substrate.
  • a single ROC is embedded in the substrate.
  • at least two ROCs are embedded in the substrate.
  • eight ROCs are embedded in the substrate, preferably arranged in two rows, i.e. 2 * 4 ROCs, in particular for computer tomography imaging applications. In case of multiple ROCs, these are arranged next to each other.
  • a module only has a single substrate.
  • the extension of the ROC/s in the horizontal plane preferably is smaller than the extension of the one or more sensor tile/s in the same plane, at least in one dimension, e.g. x, preferably in both dimensions x and y.
  • the extension of the substrate exceeds the extension of the or each ROC in the hori zontal plane , preferably in at least one dimension x or y, preferably in both dimensions , i . e . x and y .
  • This enables suf ficient space for the output wiring connecting the output contact/ s of the readout chip with the output contact/ s of the substrate , the output wiring preferably one or more vias extending in the third dimension and through the substrate next to the ROC .
  • the module comprising the one or more ROCs embedded in the substrate represents a new 3D packaging approach .
  • fourside buttable X-ray or electron detector modules can be fabricated .
  • a module can be assembled with additional , preferably identical modules to a radiation detector .
  • an extension of the substrate in the two dimensions x and y is equal to or smaller than the extension of the sensor tile in the very same two dimensions . Accordingly, a stack is formed from the sensor tile/ s and the substrate .
  • the resulting modules have cuboid or cube shape and can be arranged next to each other on a common base plate .
  • the set of ROCs and redistribution layer (RDL ) circuitry in the substrate are shadowed by the sensor tile , yielding a gapless module , and yielding a large area gapless detector, e . g . a flat panel , in case of arranging multiple modules next to each other, e . g . in a grid .
  • RDL redistribution layer
  • a radiation detector comprising a base plate and radiation detector modules according to any of the preceding claims arranged on the base plate .
  • the wiring in the substrate acts as the redistribution layer for adapting the pitch of the sensor pixels to the smaller pitch of the input contacts of the readout chip .
  • Output signals will be routed from the ROC to the substrate bottom, i . e . preferably the module bottom, by means of vias fabricated in the space of the substrate next to the ROC or between the ROCs .
  • output wiring between the output contacts of the substrate and the output contacts of the ROC may comprise wiring arranged in one or more layers of the substrate between the bottom surface of the substrate and the top surface of the ROC .
  • the substrate is a PCB
  • the layers may represent metal layers of a multilayer PCB . While it is referred to output signals , contacts and wiring in this context , these terms shall not be restricted to signals and related contacts and wiring for leaving the module .
  • output contacts are also referred to as I /O contacts .
  • the proposed concept is cost-ef ficient given that scalable substrate technology can be used . Therefore , the manufacturing is facilitated and has less environmental constraints .
  • Another advantage of this package is that it requires only one flip-chip step, i . e . when the sensor tile/ s is/are attached to the substrate .
  • a further advantage is that the present module allows to use a single AS IC design in di f ferent products , e . g . sensors of di f ferent pixel pitches .
  • the sensor pixel pitch often is speci fied by the customer in the CT market .
  • the set of input contacts of the substrate is arranged at its top surface and the set of input contacts and the one or more output contacts of the readout chip are arranged at its top surface , such that the input wiring is arranged in one or more layers of the substrate between its top surface and the top surface of the readout chip .
  • the substrate is a PCB
  • the layers may represent metal layers of a multilayer PCB .
  • the substrate portion covering the top surface of the ROC/ s act as a redistribution layer (RDL ) .
  • the RDL is integrated in the substrate comprising the embedded ROC/ s and adapts the ROC pixel pitch to the sensor pixel pitch .
  • the input wiring connecting the input contacts of the substrate with the input contacts of the ROC comprises via portions , i . e . portions extending vertically / in the third dimension in the substrate .
  • the pitch matrix of the sensor pixels is trans formed to the pitch matrix of the input contacts of the ROC by two di fferent redistribution layers , one being the RDL integrated into the substrate as introduced above .
  • the pitch of the substrate ' s input contacts no longer match the pitch of the sensor pixels , but is smaller .
  • the other one may be embodied in form of an interposer arranged in parallel to the sensor tile , and in particular arranged between the sensor tile/ s and the substrate .
  • the interposer is understood as an element extending hori zontally across the extension of the sensor tile/ s .
  • the sensor tiles are mounted to .
  • the interposer comprises input contacts at its top surface facing the bottom surface of the sensor tile . A pitch of the input contacts of the interposer matches the pitch of the sensor pixels .
  • the input contacts of the interposer are electrically connected to the sensor pixels in a 1 : 1 relation by means of interconnect means , such as solder balls or any of the alternatives listed above .
  • the interposer further comprises a set of output contacts arranged at its bottom surface .
  • the number of output contacts preferably matches the number of its input contacts and, hence , the number of the sensor pixels .
  • a pitch of the output contacts of the interposer preferably is smaller than the pitch of the interposer' s input contacts , and hence , is smaller than the pitch of the sensor pixels .
  • Wiring inside the interposer is provided, including vertical portions , to electrically connect each input contact with a corresponding output contact .
  • the pitch of the output contacts of the interposer preferably is equal to the pitch of the input contacts of the substrate , but exceeds the pitch of the input contacts of the readout chip .
  • the output contacts of the interposer are electrically connected in a 1 : 1 relation to the input contacts of the substrate by means of interconnects and via the input wiring of the substrate to the input contacts of the ROC .
  • the other redistribution layer is embodied in the sensor tile .
  • the sensor tile preferably comprises a monolithically integrated wiring layer covering the set of pixels .
  • the wiring layer comprises a set of output contacts at its bottom surface facing the substrate , as well as wiring electrically connecting its output contacts to the sensor pixels .
  • a pitch of the output contacts of the wiring layer preferably is smaller than the pitch of the sensor pixels such that this wiring layer acts as the other redistribution layer .
  • the pitch of the output contacts of the wiring layer preferably is equal to the pitch of the input contacts of the substrate such that the output contacts of the wiring layer are electrically connected with the input contacts of the substrate by means of interconnect means , such as solder balls , or any of the other alternatives listed above .
  • the radiation detector module comprises a single substrate , m sensor tiles with m>l , and n readout chips embedded in the substrate with n>l .
  • the following combinations are preferred :
  • each readout chip is electrically connected to only an assigned one of the sensor tiles .
  • a pitch of the input contacts of each readout chip is smaller than a pitch of the sensor pixels of the assigned sensor tile .
  • the output wiring in the substrate comprises one or more vias extending in the third dimension and through the substrate next to the readout chips .
  • the vias belonging to the output wiring of two adj acent readout chips extend between the adj acent readout chips .
  • the substrate acts as interposer and is arranged between the one or more sensor tiles on the one hand and the one or more readout chips on the other hand . Accordingly, the substrate is sandwiched between the sensor tile/ s and the readout chip/ s .
  • the readout chip/ s is/are bonded to the bottom surface of the substrate , e . g . by means of interconnects such as solder balls , or the alternatives listed above .
  • an underfill may be ap- plied between the substrate and the ROC .
  • Underfill compounds are widely used in packaging as they provide mechanical stability, mitigate the impact of mechanical stress , and protect against moisture .
  • the underfill fluid preferably is dispensed between the substrate and the ROC after electrically interconnecting the two components with each other, and then is cured .
  • the pitch of the input contacts of the substrate match the pitch of the sensor pixels , such that interconnect means such as the solder balls or any of the alternatives listed above provide for the vertical electrical connection .
  • the substrate now provides further output contacts at its bottom surface of a pitch smaller than the pitch of its input contacts .
  • the pitch of the additional output contacts matches the pitch of the input contacts of the readout circuit/ s .
  • the wiring in the substrate hence , represents a redistribution wiring .
  • the output contacts of the readout chip/ s are routed by the substrate at its bottom surface to the substrate ' s output contacts .
  • the substrate ' s output contacts are preferably connected to the outside world by means of solder balls with an enough large diameter, e . g . 50 um ⁇ d ⁇ 500 um, or Cu pillars or any other suitable micro interconnect technology of a corresponding height /vertical extension, in order to vertically exceed the arrangement of the ROC underneath the substrate .
  • All embodiments comprising a redistribution layer for connecting sensor pixels with ROC pixels of di f ferent pitch si zes inherently have wires in the redistribution layer of di f ferent length, with an associated individual wiring capacitance .
  • a high interconnect wiring density of such redistribution layer may result in the accumulation of parasitic capacitances between neighboring RDL wires .
  • a fan-out RDL may therefore result in an accumulation of capacitance at the input of each ROC pixel of the readout chip .
  • each ROC pixel comprises an ampli bomb stage for pre-ampli f ication purposes.
  • each ROC pixel may affect the signal transmitted by the wire and therefore a length of the pulses at the respective amplifier stage output. Furthermore, a distribution of accumulated capacitances across the ROC pixel matrix may be inhomogeneous, affecting the analog amplifying performance of each ROC pixel differently.
  • each ROC pixel may be affected due to the fan-out RDL accumulated capacitance (Ci) representing a capacitance from at least the input wiring between the input contact of the substrate and the input contacts of the ROC, typically resulting in a longer signal pulse shape.
  • the pulse signals rate may increase and lead to an enhancement of the probability of pulse overlap events, also referred to as pile up events.
  • pile up events the subsequent pulse raises before the preceding pulse has completely fallen down to a given level. This may result in a photon or electron count loss.
  • Longer pulse signals which may arise in view of the RDL in the present embodiments of the radiation detector module, increase the risk of pile-up evens at even lower fluxes.
  • the input contacts of the readout chip are arranged in groups, wherein a pitch between the input contacts of a group is smaller than a distance between the input contacts of adjacent groups.
  • groups may comprise one of 2 x 2, 3 x 3, 4 x 4, 5 x 5, or g x h input contacts, with g > 1 and h > 1.
  • the input contacts of a group are arranged in a grid. Accordingly the wiring lengths in the redistribution layer e.g. of the substrate are reduced in average.
  • the sensor pixels may be arranged in a grid with a uniform pitch across the sensor tile.
  • the sensor pixels may also be arranged into groups.
  • a reason for doing so may be to reduce the impact of scattered (e . g . Compton, or to a lesser extent Rayleigh) radiation on the image quality during CT scans in case of Computer Tomography .
  • gaps between groups of sensor pixels are used for a grid, also referred to as anti-scatter grid (ASG) .
  • the grid comprises of a stripes pattern from an absorbent material .
  • the anti-scatter grid is preferably placed on top of the sensor tile , i . e . between the sensor tile and an X-ray source .
  • the layout of the sensor pixels preferably is designed to match the ASG .
  • the grid selectively absorbs scattered radiation and allows primary X-rays to reach the detector .
  • a pitch of the sensor pixels of a group preferably is smaller than a distance between the sensor pixels of adj acent groups .
  • Such groups may comprise one of 2 x 2 , 3 x 3 , 4 x 4 , 5 x 5 or g x h sensor pixels , with g > 1 and h > 1 .
  • the group si ze and group layout for the sensor pixels matches the group si ze and layout of the ROC' s input contacts .
  • each group of sensor pixels is assigned to a corresponding group of input contacts of the substrate and the readout chip, such that pixels of this group are only connected to input contacts of the corresponding groups .
  • capacitance variations evoked by the input wiring is addressed individually per ROC pixel , e . g . parameters may take di f ferent values per ROC pixel , e . g . dependent on the wiring length of the redistribution layer .
  • each readout circuit is electrically connected to an assigned one of the input contacts and is configured to process a signal received from the assigned sensor pixel via the input contact .
  • Each readout circuit preferably comprises a comparator, also referred to as discriminator, configured to compare the received signal to a threshold and to output a pulse for a duration the threshold is exceeded by the signal .
  • the defined length Atd is also referred to as retrigger time given that each time the pulse length Atp exceeds the defined length Atd, a new counting pulse is triggered .
  • each readout circuit preferably comprises an ampli fier stage configured to ampli fy the signal received at the corresponding input contact .
  • the output of the ampli fier stage is electrically connected to the input of the comparator for comparing the amplified signal with the threshold, preferably generated by a threshold generator .
  • the output of the comparator preferably is electrically connected to an input of the pulse evaluation unit .
  • At least two di f ferent thresholds are applied in the ROC, i . e . at least two ROC pixels implement di f ferent thresholds .
  • it is suggested to apply at least two di f ferent retrigger times in di f ferent readout circuits i . e . at least two ROC pixels implement di f ferent retrigger times .
  • Di f ferent thresholds and di f ferent retrigger times may also be combined .
  • Threshold and/or retrigger time may individually be set or adapted for each readout circuit . Each of the threshold and retrigger time may be selected from/ adj usted within a defined range .
  • the threshold and/or retrigger time preferably is set dependent on the input capacitance primarily stemming from the input wiring .
  • the higher the parasitic / input capacitance is for the assigned ROC pixel the lower the threshold is set, and/or the longer the retrigger time is set.
  • the threshold set in a low capacitance scenario exceeds the threshold set in a high capacitance scenario.
  • the retrigger time set in a high capacitance scenario exceeds the threshold set in a low capacitance scenario.
  • the thresholds and / or the retrigger times for the individual ROC pixels are evaluated in a calibration procedure.
  • pulses of known charge are injected into the sensor, e.g. by exposing the sensor to x-rays with a known energy.
  • the x-rays may originate from a fluorescent sample with known emission lines, e.g. from exciting K or L lines.
  • an s-curve is recorded. Its inflection point corresponds to the charge of the injected charge. This is repeated for different injected charges, e.g. for different fluorescent samples.
  • the threshold is fixed to 10%, 40%, 50% up to 90% of the injected charge, and the retrigger time is scanned.
  • the resulting counts vs retrigger time curve has a similar (multiple) s-curve shape, with different plateaus corresponding to 1,2, 3, 4, etc. counts, and multiple inflection points in between.
  • the inflection point for the shortest retrigger time corresponds then to the average length of the signal given the set threshold.
  • the pulse lengths for different threshold can be determined without knowing the precise individual input capacitance.
  • the second part of above calibration algorithm is applied for a known distribution of charges, e.g. by exposing the sensor to x-rays coming from a source with a broad x-ray spectrum.
  • the spectrum may be produced by an x-ray tube, and the calibration may be applied for different tube high voltage settings, e.g.
  • variable retrigger times a uni form response across the ROC pixels even at high fluxes can be achieved by means of a pixeltrimmed retrigger time .
  • Overlapped longer pulse signals stemming from the ROC pixels connected to long RDL paths are preferably not processed with the same retrigger time as those originating from short RDL paths .
  • the retrigger time preferably is adj usted ( trimmed) to every individual pixel in order to get an accurate rate correction .
  • a radiation detection module which integrates a redistribution wiring between di f ferent pitches of the sensor pixels and the input contacts of the readout chip into one or more of the substrate , an interposer or a wiring layer integrated in the sensor tile .
  • the redistribution wiring may generate di fferent capacitances between the wires for di f ferent pixels , which may af fect the ef fective gain, and which may depend pixel by pixel . It is preferred that means are provided for compensating for signal variations at the input contacts of the readout chip induced by capacitances stemming from the redistribution wiring between the input contacts and the sensor pixels .
  • the compensation means include circuitry using a retrigger unit in the readout circuit of each pixel , thus achieving, among other advantages , a higher max detection rate of incidents than without using such retrigger .
  • the retrigger time of such retrigger unit may be adj usted or trimmed individually for each pixel .
  • the threshold in a comparator of a readout circuit may be adj usted or trimmed individually for each pixel .
  • the former connects the embedded input contacts of the readout chip with the substrate top surface .
  • the resulting contact matrix pitch of the input contacts of the substrate matches the one of the sensor tile .
  • the ROC does not need TSVs ( Through Silicon Vias ) , the signal from output contacts of the readout chip is routed to the substrate backside through metal vias ( e . g .
  • the dimensions x and/or y of the one or more readout chips assigned to a sensor tile are preferably smaller than the ones of the sensor tile .
  • the ROC pixels are fan-out to match the dimensions of the sensor pixel matrix .
  • the substrate-ROC arrangement is then bonded to the pixelated sensor tile/ s , i . e . the sensor tile/ s provided with the pixels at its bottom surface .
  • the bonding preferably is completed by e . g . screen-printing of a low temperature solder paste onto the substrate or stud bump bonding, or anisotropic conductive adhesives and followed by flip-chip and ref low/curing process steps .
  • the radiation detector module is used in a computer tomography system .
  • Fig . 1 a pixelated sensor tile ( on the left ) and a readout chip containing an array of input contacts ( on the right ) of a radiation detector module according to the state of the art ;
  • Fig . 2 a cut view of a radiation detector module with a pixelated sensor and a pixelated readout chip according to Fig . 1 ;
  • Figs . 3 a radiation detector composed by radiation detector modules of Fig . 2 , in a cut view;
  • Fig . 4 a cut view of a radiation detector module in accordance with an embodiment of the present invention
  • Figure 5 a perspective view of a radiation detector comprising radiation detector modules , during assembly, according to an embodiment of the present invention
  • Fig . 6 a cut view of a radiation detector module in accordance with an embodiment of the present invention
  • Fig . 7 a cut view of a two radiation detector modules adj acent to each other, in accordance with an embodiment of the present invention
  • Fig . 8 a cut view of a two radiation detector modules adj acent to each other, in accordance with another embodiment of the present invention.
  • Fig . 9 a cut view of a radiation detector module , in accordance with another embodiment of the present invention
  • Fig . 10 charts illustrating signals at various stages in a readout circuit of a readout chip, according to an embodiment of the present invention
  • Fig . 11 a block diagram of a readout circuit comprised in a readout chip, according to an embodiment of the present invention
  • Fig . 12 a radiation detector module in di fferent views , in accordance with another embodiment of the present invention.
  • Fig . 13 charts illustrating signals at various stages in a readout circuit of a readout chip, according to an embodiment of the present invention
  • Fig . 14 charts illustrating signals at various stages in a readout circuit of a readout chip, according to another embodiment of the present invention.
  • Fig . 15 a radiation detector module in di fferent views , in accordance with another embodiment of the present invention .
  • Fig . 1 shows a bottom view on pixelated sensor tile 1 ( on the left ) containing an array of pixels 12 and a top view on a read out chip 2 containing an array of input contacts 21 ( on the right ) of a radiation detector module according to the state of the art .
  • the pixelated sensor tile 1 and the pixelated readout chip 2 define a radiation detector module , wherein one or multiple radiation detector modules constitute a radiation detector .
  • the sensor tile 1 comprises an array of pixels 12 , e . g . 256 x 256 pixels , contacting the sensor material , which is sensitive to the radiation .
  • the pixelated readout chip 2 ( on the right of Fig . 1 ) has the same number of input contacts 21 as the pixelated sensor tile 1 has pixels 12 , i . e . 256 x 256 .
  • the readout chip 2 comprises I /O pads 22 for input/output of electrical signals and peripheral circuitry, such as control blocks and guard rings , which consume a part of the readout chip surface .
  • the sensor pixels 12 and the input contacts 21 of the readout chip 2 are electrically connected to each other in a one-to-one relationship, meaning that the number of input contacts 21 is equal to the number of sensor pixels 12 .
  • corresponding sensor pixels 12 and input contacts 21 are located adj acent to each other .
  • the sensor pixels 12 in the outermost row and outermost column of the pixel matrix may be larger than regular sensor pixels 12 within the pixel matrix - as is illustrated in Fig . 1 , in order to cover the area above the peripheral circuitry of the readout chip 2 with sensor pixels 12 in order to be sensitive to radiation in this region as well .
  • Figure 2 illustrates a cut through a detector module , in which the sensor tile 1 and the readout chip 2 of Fig . 1 are attached to each other, with the sensor pixels 12 facing the input contacts 21 of the readout chip 2 .
  • the sensor pixels 12 and the corresponding input contacts 21 are conventionally located directly above/below each other, wherein above and below relate to a third, vertical dimension z which is defined as perpendicular to a hori zontal extension of the sensor tile 1 and the readout chip 2 in x and y dimension .
  • the electrical connection typically is established by solder balls or bump bonding or stud bumps or anisotropic conductive adhesives , or Cu pillars or any other microelectronic interconnection means 3 .
  • the radiation detector module in Fig . 2 is mounted to a high-density interconnect (HDI ) printed circuit board 4 with read out electronics .
  • HDI high-density interconnect
  • the electrical connection between I /O contacts 22 of the readout chip 2 and the HDI PCB 4 is established by wire bonds 7 .
  • the readout chip exceeds the sensor tile in at least of the dimensions x and y . Otherwise , the I /O contacts 22 would not find a place on the top surface of the readout chip 2 .
  • Fig . 3 Several radiation detector modules as the one of Fig . 2 are arranged side by side to obtain a larger detector area, thereby forming a radiation detector as shown in Fig . 3 .
  • Figs . 3 arranging state-of-the-art detector modules side by side on the PCB 4 results in gaps g between the sensor tiles 1 .
  • the radiation detector in the state of the art exhibits gaps g in the hori zontal plane x-y, where no sensor material is placed, meaning that no radiation or photons are detected in these gaps g . This leads to a loss of details in a resulting image and a loss of measured signals .
  • one sensor tile 1 is attached to each readout chip 2 , while multiple readout chips 2 sit on a common PCB 4 .
  • FIG. 4 illustrates a cut view of a radiation detector module 10 in a cut in accordance with an embodiment of the present invention .
  • a sensor tile 1 comprises sensor material that is able to absorb ioni zing radiation energy, e . g . X-rays , electrons .
  • the sensor material can be Si , GaAs , CdTe or CZT , InP, HgI2, a Perovskite compound, LGADs , or any other semiconductor material known in the field .
  • incident radiation energy leads to the generation of a charge pulse in the sensor material .
  • a top electrode 11 is provided on a top surface of the sensor material .
  • a plurality of pixels 12 in a grid structure is defined on a bottom surface of the sensor material.
  • a pitch As between the sensor pixels 1 preferably is between 5 um and 1 mm.
  • a thickness of the sensor tile 1 in z-dimension preferably ranges between 300 um and 2 mm.
  • the present radiation detector module comprises a substrate, such as the printed circuit board (PCB) 4. At least one readout chip 2 is embedded in the PCB 4.
  • the PCB comprises a set of input contacts 41 arranged at its top surface, and one or more output contacts 42 arranged at its bottom surface.
  • the one or more readout chips 2 are preferably embedded in a dielectric material of the PCB 4, compatible with microelectronic fabrication processes. Embedding manufacturing methods are e.g. listed in "Printed circuit board embedded power semiconductors: A technology review", Till Huesgen, Elsevier, Power Electronic and Devices, Vol. 3 Oct. 2022.
  • the readout chip 2 comprises a set of input contacts 21 arranged at its top surface.
  • the readout chip 2 comprises one or more output contacts 22 also arranged at its top surface.
  • the input contacts 41 of the PCB 4 have a pitch Ac that matches the pitch As of the sensor pixels 12. Accordingly, the input contacts 41 of the PCB 4, e.g. in form of contact pads on the top surface of the PCB 4, are vertically aligned with the sensor pixels 12, or, in other words, are not offset horizontally a distance longer than the sensor pixel pitch with respect to the sensor pixels 12.
  • solder balls 3 are provided as interconnect means to electrically connect the sensor pixels 12 and the input contacts 41 of the PCB 4 in a 1:1 relation.
  • other types of interconnect means may be used, such as one of C4, Cu pillars, Cu pillars with solder, Au stud bumps, anisotropic conductive adhesives or any other suitable microinterconnects .
  • the pitch Ar between the input contacts 21 of the readout chip 2 - there may be di f ferent pitches in y- and x-direction - is smaller than the pitch As between the sensor pixels 12 and the pitch Ac between the input contacts of the PCB 4 .
  • the pitch Ar of the input contacts 21 of the readout chip 2 may range between 5 um and 1 mm, for example .
  • the portion of the PCB 4 between its input contacts 41 and the input contacts 21 of the embedded readout chip 2 hence , serves as redistribution layer that connects the input contacts 21 on the top surface of the readout chip 2 with the input contacts 41 on the top surface of the PCB 4 .
  • the redistribution layer is implemented by input wiring 43 electrically connecting the contact pads 21 and 41 , preferably in a 1 : 1 manner, which input wiring 43 comprises vertical portions in z-direc- tion .
  • the PCB 4 preferably is processed in order to define the layout of the redistribution layer .
  • the embedded input contacts 21 of the readout chip 2 are preferably contacted by means of e . g . mechanical or laser drilling, or by selective chemical etching .
  • the input wiring 43 of this redistribution layer preferably is integrated by means of e . g . electroplating, electroless-plating sputtering, metal evaporation or metal printing .
  • the PCB 4 hence , implements a fan out redistribution layer that connects each input contact 21 and the corresponding readout circuit univocally with its corresponding PCB input contact 41 on the top surface of the PCB, and via the solder bumps 3 with the corresponding sensor pixel 12 on the bottom surface of the sensor tile 1 .
  • the input wiring 43 adapts the pixel pitch Ar of the readout chip 2 to the pixel pitch As of the sensor tile 1 , wherein the pixel pitch As of the sensor tile 1 exceeds the pixel pitch Ar of the readout chip 2 .
  • the input wiring 43 may consist of multiple layers with metallic traces , and vias between the layers to connect the traces between two layers .
  • the sensor tile 1 exceeds the readout chip 2 in x and/or y dimensions , preferably in both dimensions x and y, in order to create space in the PCB 4 to allocate one or more vias 45 that route output signals from the output contact/ s 22 of the readout chip 2 to the output contact/ s 42 of the PCB 42 arranged at its bottom surface .
  • an output wiring 44 , 45 is required to electrically connect these output contacts 22 and 42 .
  • the output wiring 44 may also represent a redistribution layer . It preferably includes at least one via extending vertically in the PCB, preferably next to the readout chip 2 .
  • the sensor tile 1 and the PCB 4 of the radiation detector module of Figure 4 have the same extensions in the x and y dimensions , or the sensor tile has a slightly larger extension than the PCB . Multiple of such modules may be assembled next to each other in order to build a gapless radiation detector, e . g . by arranging rectangle or square modules next to each other .
  • a radiation detector module is not limited to a 1 : 1 relation between sensor tile , readout chip and PCB .
  • the number of sensor tiles per module is more than 1
  • the number of readout chips per module is more than one
  • all components reside on or in a common PCB .
  • FIG. 5 illustrates such concept of a gapless radiation detector in a perspective view, according to an embodiment of the present invention .
  • a base plate 6 may serve as mounting plate .
  • the base plate 6 may be embodied as a printed circuit board including one or more contact fields at its top surface to contact the one or more output contacts 42 of the module ' s PCBs 4 .
  • an individual radiation detector module is referred to by reference numeral 10 .
  • a couple of modules 10 are already mounted to the base plate 6, while one module 10 is in the process of mounting.
  • the present radiation detector modules 10 comprise two sensor tiles 1 per module PCB 4 and four readout chips 2 per sensor tile 1, i.e. eight readout chips 2 per PCB 4.
  • the present radiation detector modules implement a packaging concept that allows the assembly of four side buttable X-ray or EM detectors.
  • Fig. 6 illustrates a cut view of a radiation detector module in accordance with an embodiment of the present invention.
  • the presented module 10 may be a module 10 as used in the assembly of Fig. 5.
  • the module 10 illustrated in Fig. 6 comprises a common PCB 4 for two sensor tiles 1.
  • a single readout chip 2 is assigned to each sensor tile 1, however, two, four or even more readout chips 2 may be assigned to each sensor tile 1.
  • the readout chips 2 are embedded in the common PCB 4.
  • the layout, wiring, etc. of the module 10 resembles that of Fig. 4.
  • Fig. 7 illustrates a cut view of two radiation detector modules 10 arranged adjacent to each other in accordance with an embodiment of the present invention.
  • Each module 10 preferably has a dedicated PCB 4, a sensor tile 1 and a readout chip 2 integrated in the PCB 4.
  • the extension of the PCB 4 in the horizontal dimensions x and y is smaller than the one of the sensor tile 1.
  • a pitch between input contacts 21 of the readout chip 2 is even smaller than in the other embodiments. Accordingly, it may be difficult to layout and manufacture the input wiring 43 in the PCB 4 if implemented according to the embodiment of Fig. 4. In particular, a linewidth and/or gaps between lines of the wiring 43 may become too small for the applicable processing technology.
  • an additional redistribution means is provided in form of an interposer 5.
  • the interposer 5 comprises input contacts 51 at its top side, preferably of the same pitch as the sensor pixels 12 , such that each sensor pixel 12 - input contact 51 combination can be electrically connected by a solder bump 3 or one of the other interconnect means listed above .
  • Output contacts 52 of the interposer 5 are arranged at its bottom surface , which output contacts 52 have a smaller pitch than the input contacts 51 .
  • the output contacts 52 are connected to the input contacts 51 by way of wiring 53 . However, the output contacts 52 of the interposer 5 still have an equal or larger pitch than the input contacts 21 of the readout chip 2 .
  • the pitch of the output contacts 51 matches the pitch of the input contacts 41 of the PCB, such that interconnect means such as solder bumps 3 can be used to 1 : 1 connect the output contacts 52 of the interposer 5 with the input contacts 41 of the PCB 4 .
  • the interposer 5 comprises wiring 53 acting as redistribution layer .
  • the PCB 4 still of fers input wiring 43 in form of a redistribution layer, a redistribution from the sensor pixels 12 to the ROC pixels is implemented in two steps , i . e . by the interposer 5 and by the top layer of the PCB 4 .
  • the interposer 5 preferably is made from silicon, glass or organic material .
  • Fig . 8 illustrates a cut view of two radiation detector modules 10 arranged adj acent to each other, in accordance with another embodiment of the present invention .
  • the underlying situation is the same as with respect to the embodiment of Fig . 7 , i . e . the redistribution solely in the PCB 4 may not be feasible .
  • a pixel pitch di f ference between the input contacts 21 of the readout chip 2 and the sensor pixels 12 of the sensor tile 1 is adapted by the combination of two fan-out redistribution layers .
  • the first one is integrated in the PCB 4 as with the embodiments of Fig . 4 and Fig . 7 .
  • the other redistribution layer now is monolithically integrated in the sensor tile 1 in form of a wiring layer 13 , and preferably is manufactured by means of micro technology fabrication processes , e . g . lithography, PVD, spin or spray coating of dielectric materials , photoresists isolating polymers and metals .
  • the wiring layer 13 covers the sensor pixels 12 .
  • Output contacts 131 of the wiring layer 13 are arranged at its bottom surface and have a pitch smaller than the pitch of the pixels 12 of the sensor tile 1 .
  • the output contacts 131 are connected to the sensor pixels 12 by way of wiring 132 . However, the output contacts 131 of the wiring layer 131 still have an equal or larger pitch than the input contacts 21 of the readout chip 2 .
  • the pitch of the output contacts 131 matches the pitch of the input contacts 41 of the PCB, such that interconnect means , e . g . solder bumps 3 , can be used to 1 : 1 connect the output contacts 131 of the wiring layer 13 with the input contacts 41 of the PCB 4 .
  • Fig . 9 illustrates a cut view of a radiation detector module 10 in accordance with another embodiment of the present invention .
  • the module 10 comprises two sensor tiles 1 , two readout chips 2 , and one PCB 4 .
  • the readout chips 2 are not embedded in the PCB 4 .
  • the PCB 4 acts as interposer and is sandwiched between the sensor tiles 1 and the readout chips 2 .
  • the input contacts 41 of the PCB 4 are connected to the sensor pixels 12 via interconnect means such as solder balls 3 , and have the same pitch as the sensor pixels 12 .
  • the PCB 4 comprises additional output contacts 46 at its bottom surface .
  • the additional output contacts 46 have the same pitch as the input contacts 21 of the readout chips 2 and are connected to each other via interconnect means such as solder balls 3 .
  • the output contacts 22 of the readout chips 2 are also connected to contacts at the bottom surface of the PCB 4 , and are connected via wiring 44 in the PCB or on the bottom surface of the PCB 4 to the output contacts 42 at the bottom surface of the PCB 4 .
  • the output contacts 42 of the PCB are connected via interconnect means , such as solder balls 3 , to input contacts 71 of a readout board 7 , which substrate 7 connects to the outside world via one or more output contacts 72 at its bottom surface .
  • the PCB 4 may also be considered as redistribution layer and/or interposer, and preferably is made out of silicon, glass or organic material .
  • Fig . 10 shows the responses of two di f ferent ROC pixels to an increasing rate of e- or X-ray photons , one on the left , the other one on the right .
  • the underlying circuitry of a ROC pixel is illustrated in Fig . 11 .
  • Fig . 11 shows a block diagram of a ROC pixel 23 , aka readout circuit 23 comprised in the readout chip 2 representing its core functions .
  • the charge created in the sensor material of the sensor tile dri fts through the sensor tile to one or several sensor pixels , and via interconnects and the redistribution layer to the input contact 21 of the ROC pixel 23 of the readout chip 2 .
  • the charge enters an ampli fier stage 231 , which converts the created charge into a voltage pulse .
  • the ampli fier stage 231 preferably is designed to be able to create very short pulses with a FWHM pulse duration between 5 ns - 500 ns , and more preferably with a FWHM pulse duration advantageously chosen to be shorter than 40 ns , 20 ns or 10 ns .
  • the ampli fier stage 231 is followed by a fast discriminator, also referred to as comparator 232 , where the voltage pulses are discriminated . Pulses with a voltage above a threshold are converted into a digital pulse with a pulse length corresponding to the duration of the analog pulse voltage being above the threshold voltage .
  • Pulses not exceeding the threshold do not make it to the output of the discrimination stage 232 . Accordingly, in the discrimination stage 232 the voltage pulses are compared to the threshold .
  • a threshold generator 233 is provided for providing the threshold. The threshold preferably is determined subject a global voltage applied to the readout chip 2, preferably combined with an individual trimming per pixel as will be described later on.
  • a retrigger unit is used, also referred to as pulse evaluation unit 234.
  • the pulse evaluation unit 234 preferably can be disabled or enabled by the user.
  • An adjustable retrigger length i.e. the period in time after which a retrigger event is initiated, preferably matches an average analog voltage pulse duration, where the analog voltage pulse duration is defined as the duration the analog pulse spends above the threshold voltage.
  • the retrigger duration is set to be slightly longer than the analog pulse duration, e.g. by 2 ns, 5 ns, 10 ns or 20 ns longer than the analog pulse duration.
  • the instant pulse evaluation unit 234 re-evaluates the pulse signal supplied by the discrimination stage 232.
  • the subsequent counting unit 235 is triggered to add a count in case of pulse pile-up.
  • this linear counting unit 235 also referred to as counter
  • each pulse created at the output of the retrigger unit 234 increases the counter in the counting unit 235 by one.
  • the counting unit 235 comprises at least two counters that can be switched between subsequent exposures and allow for continuous (dead time-free) readout reading one of the counters while the other one is active for counting.
  • the x-axis in Fig. 10 represents time.
  • the y-axis of the top-most chart represents the (analog) input signal amplitude collected from the corresponding input contact 21 amplified by the amplifier stage 231, and shaped by a shaper following the amplifier stage 231 (not shown in Fig. 11) .
  • the second top most chart illustrates the according output of the comparator 232, i.e. the amplified input signal compared with a threshold, which comparator 232 provides a pulse shaped signal.
  • the duration of a pulse in the pulse shaped signal represents the period in time the amplified input signal exceeds the assigned threshold.
  • the pulse shaped signal then is preferably fed into a shortening unit (not shown in Fig. 11) for shortening the pulses in the pulse shaped signal to a predefined, uniform duration.
  • the pulse shaped, paralyzed signal according to Fig. 10b) is also fed into the retrigger unit
  • the retrigger unit 234 of the respective ROC pixel 23 The retrigger unit
  • the retrigger unit 235 detects if the length of a pulse supplied from the discriminator stage 232 exceeds the predefined retrigger length, which may represent the duration an amplified signal for typical single event in a low flux detection scenario exceeds the assigned threshold. In case the retrigger length is exceeded, another shortened pulse is generated by the retrigger unit 235.
  • the counter 236 counts the shortened pulses from the shortening circuit, including the retriggered pulses, to provide a pile-up- free count.
  • This ROC pixel is able to cope with pulses generated at low flux input (1) , but even at high flux input (2) in response to high e- and X-ray excitation rates, however, up to a limit (3) where a signal pile-up prevents the counting of individual photons in a paralyzable mode.
  • the amplified input signal in response to a first impact has not yet fallen under the threshold E Th (dashed line) before the amplified input rises again beyond the threshold in response to the subsequent impact.
  • scenario (3) absent any adjustment means results in a single, long pulse at the output of the comparator 232 instead of three pulses that can be distinguished from each other.
  • the output of the shortening unit supplies the corresponding shortened pulses, see diagram FiglO (c) .
  • the information, that at (3) three pulses hit the sensor pixel is lost at the output of the shortening unit.
  • retriggering functionality in form of the retrigger unit 235 of Fig. 11 reevaluates the pulsed amplified input signal at Fig. 10 (b) as to its duration / length and efficiently counts the incoming photons, see output of retrigger unit 235 in Fig. 10 (d) .
  • the sensor pixel and the corresponding ROC pixel are connected through a more complex RDL wire, e.g. a longer wire than the wire underlying the scenario of the left hand side ROC pixel.
  • a longer wire is more prone to accumulate self-and parasitic capacitance.
  • the input wiring 43 of the PCB 4 of the right hand ROC pixel exceeds the input wiring 43 of the left hand ROC pixel.
  • the relevant 43 presently shall include the wiring between input contact 21 of the ROC pixel and the corresponding input contact 41 of the PCB 4.
  • the output of the amplifier stage hence, is a longer signal (4) , and the pile up effects arise at lower e- and X ray excitation rates, see (5) and (6) .
  • the performance of the detector module is extremely affected under moderated X ray and e- fluxes if the instant retriggering functionality is not implemented.
  • the pulse width of the signal in each individual pixel thus depends on precise geometry, capacity etc. of the RDL connection.
  • a retrigger unit 235 and a corresponding retriggering functionality that monitors the pulse duration / length of the pulses of the output of the discriminator unit 232, and in particular restarts (retriggers) the counting in case the defined retrigger time is exceeded after each count which indicates a pile-up event.
  • the retriggering function allows non-paralyzable counting and allows for enhanced count rate correction.
  • the ROC pixels and possibly the sensor pixels can be arranged in a layout that simplifies the redistribution layer (RDL) design.
  • the input contacts of the readout chip are not arranged equidistant from each other all across the top surface of the readout chip.
  • sub groups aka sub matrices aka macro pixels are formed that provide for a uniform pixel pitch amongst the input contacts belonging to the same sub group.
  • a distance between (neighboring) input contacts of different sub groups are different from the pitch of the input contacts within a sub group. This leads to a reduced overall length of the wires in the RDL, and to a reduced complexity in routing in the RDL.
  • self-capacitances and eventual parasitic coupling with neighbor ROC pixels is reduced.
  • the space between submatrices of pixels in the readout chip can be allocated to I /0 pads, test pads, routing periphery etc..
  • Fig. 12b illustrates a top view on a readout chip 2, absent a sensor tile.
  • the individual ROC pixels and their input contacts 12 respectively are illustrated by shaded rectangles.
  • the corresponding RDL wires, i.e. the input wiring is denoted by 43.
  • the ROC pixels 21 are grouped in sub groups of 3 x 3.
  • Fig. 12c) illustrates a transparent top view on one of the sub groups, also including the corresponding sensor pixels 12. A cut along the dotted line of Fig.
  • Fig. 12d is illustrated in Fig. 12d) , i.e. a side cut through the three middle input contacts 21 and sensor pixels 12 and the corresponding input wiring 43.
  • the middle ROC pixel - sensor pixel combination of each sub group shows the shortest possible wiring, i.e. a straight vertical connection between the ROC pixel and the corresponding sensor pixel.
  • the adjacent ROC pixel - sensor pixel combinations at least show a moderate wiring length which is shorter than respective wiring lengths if the ROC pixels were not grouped .
  • Figure 12a illustrates a top transparent view on a sensor tile 1 arranged on top of the ROC 2 of Fig. 12a) , with homogeneously arranged sensor pixels 12, i.e. the sensor pixels pitch is constant, no groups are formed .
  • Fig. 15 illustrates radiation detector module according to another embodiment of the present invention.
  • the views and elements correspond to the illustrations of Figure 12.
  • the sensor pixels 12 are not homogeneously arranged, but are arranged in groups.
  • the ROC pixels 21 are arranged in groups identical or similar to the embodiment of Figure 12.
  • Fig. 15a which shows a top transparent view on the sensor tile 1
  • the corresponding sensor pixels 12 are grouped into sub groups of 3 x 3, e.g. in connection with the usage of an anti-scattering grid.
  • This arrangement may additionally be implemented to the sub-grouping of the ROC pixels.
  • the sub groups of sensor pixels show a distance exceeding the pitch of sensor pixels within a sub group .
  • sub group sizes other than 3 x 3 are possible, e.g. 4 x 4, 5 x 5, etc.
  • non-square shaped sub groups are possible, e.g. 2 x 3, 4 x 3, etc.
  • Pulse signals stemming from the different ROC pixels can differ to a large extent in height and length.
  • the pulse shape disparity can affect the detector performance.
  • Fig. 13 shows one of the potential issues affecting the detector performance associated to the fan out RDL .
  • Two signal pulses in two different ROC pixels generated from the same X-ray or electron beam can result in a different number of counts due to RDL induced pulse shape variation. This effect is illustrated in the top chart of Fig. 13al) , which shows the output of the amplifier stage of Figure 11 over time for two different ROC pixels with different corresponding wiring length in the redistribution layer.
  • Signal (1) stems from a ROC pixel that is connected via a short wire to the corresponding sensor pixel
  • signal (2) stems from a ROC pixel that is connected via a long wire to the corresponding sensor pixel.
  • the signal (2) accumulating more capacitance in the RDL does not reach the threshold E Th 2 that is easily exceeded by the signal (1) . Accordingly, it is preferred to adjust the threshold for the second ROC pixel associated with the higher capacitance signal input to E Thi ⁇ ETH2.
  • the individual threshold per pixel may be set dependent on at least the individual wiring length in the redistribution layer.
  • the individual thresholds may be set in such way absent any measurements for individual ROC pixels.
  • a lowest and a highest possible value are defined up-front and the individual threshold is set within the range between the lowest and highest value, which range is also referred to as trimming range.
  • the various ROC pixels responses e.g. the output signals of the amplifier stage, are determined for the various ROC pixels by radiating the sensor tile with the same energy.
  • the thresholds are adjusted pixel-wise dependent on the measured responses.
  • the threshold is individually set or adjusted per ROC pixel .
  • Fig. 13a2) illustrates the trimming range, wherein the highest threshold value E Th 2 is set as threshold for the ROC pixels yielding signal (1) , and the lowest threshold value E Thi is set as threshold for the ROC pixel yielding signal (2) .
  • the charts 13b) and 13c) illustrate the corresponding outputs of the comparator 234 and the retriggering unit 235 for signals (1) and (2) .
  • Fig. 14 illustrates another approach for compensating for the different wiring patterns in the RDL and the associate different input capacities.
  • the retriggering time is adjusted individually for each pixel .
  • left hand illustrates the output signal of the amplifier stage over time for a ROC pixel that is connected via a short wire to the corresponding sensor pixel
  • right hand illustrates the output signal of the amplifier stage for a ROC pixel that is connected via a long wire to the corresponding sensor pixel.
  • the threshold E Th is set uniform for the two / all ROC pixels, and is set rather low such that even the output signals of the high input capacitance ROC pixels (right hand in Fig. 14a) reach the threshold E Th .
  • the retriggering times are set at least dependent on the wiring in the RDL, in particular dependent on the length of the individual wires .

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Abstract

Un module détecteur de rayonnement (10) destiné à la détection à résolution de position d'un rayonnement comprend au moins un pavé capteur (1) s'étendant dans deux dimensions (x,y) d'un plan horizontal. Le pavé capteur (1) comprend un matériau capteur sensible au rayonnement et un ensemble de pixels (12) de matériau électroconducteur en contact avec le matériau capteur. Le module détecteur de rayonnement (10) comprend en outre au moins une puce de lecture (2) disposée en parallèle avec le pavé capteur (1) et configurée pour traiter des signaux fournis par l'ensemble de pixels (12). La puce de lecture (2) comporte une extension dans au moins l'une des deux dimensions qui est inférieure à l'extension du pavé capteur (1) dans cette dimension. La puce de lecture (2) comprend un ensemble de contacts d'entrée (21) en connexion électrique avec les pixels (12) et un ou plusieurs contacts de sortie (22) permettant de fournir les signaux traités. La puce de lecture (2) comprend en outre un substrat (4) disposé en parallèle avec le pavé capteur (1). Le substrat (4) comprend un ensemble de contacts d'entrée (41), un câblage d'entrée (43) connectant électriquement ses contacts d'entrée (41) avec les contacts d'entrée (21) de la puce de lecture (2), un ou plusieurs contacts de sortie (42) au niveau de sa surface inférieure, et un câblage de sortie (44, 45) connectant son ou ses contacts de sortie (42) avec le ou les contacts de sortie (22) de la puce de lecture (2).
PCT/EP2024/051781 2024-01-25 2024-01-25 Module détecteur de rayonnement Pending WO2025157410A1 (fr)

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Citations (5)

* Cited by examiner, † Cited by third party
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