WO2025153009A1 - Apparatus and method for dry etching of aluminum gallium arsenide optical waveguides using argon gas plasma - Google Patents
Apparatus and method for dry etching of aluminum gallium arsenide optical waveguides using argon gas plasmaInfo
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- WO2025153009A1 WO2025153009A1 PCT/CN2025/072705 CN2025072705W WO2025153009A1 WO 2025153009 A1 WO2025153009 A1 WO 2025153009A1 CN 2025072705 W CN2025072705 W CN 2025072705W WO 2025153009 A1 WO2025153009 A1 WO 2025153009A1
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12035—Materials
- G02B2006/12078—Gallium arsenide or alloys (GaAs, GaAlAs, GaAsP, GaInAs)
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12083—Constructional arrangements
- G02B2006/12097—Ridge, rib or the like
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12176—Etching
Definitions
- AlGaAs with different aluminum contents have similar lattice constants, enabling multiple layers of different compositions to be grown on the top of each other.
- Waveguide cores with a higher refractive index for total internal reflection can be realized using AlGaAs layers with lower aluminum contents than its cladding layers.
- More complicated waveguide structures involving multiple AlGaAs layers can be designed and fabricated for lasers and for phase matching purposes.
- a method for dry etching to fabricate an AlGaAs optical waveguide includes steps as follows: providing at least one AlGaAs-on-insulator substrate which comprising a substrate layer, a buried layer formed over the substrate layer, a bonding interlayer formed over the buried layer, and an AlGaAs layer formed over the bonding interlayer; forming a hardmask film on the AlGaAs layer; forming a photoresist film on the hardmask film; transferring a pattern to the photoresist film; etching the hardmask film to transfer the pattern from the photoresist film to the hardmask film; and, etching the AlGaAs layer using inductively coupled plasma reactive-ion etching (ICP-RIE) with Ar plasma to form a waveguide structure having a trapezoidal-shaped upper portion with positive slope sidewalls and a horizontally extending lower portion for the AlGaAs layer, wherein
- ICP-RIE inductively coupled plasma reactive-ion etch
- FIG. 2 illustrates a cross-sectional view of layers in an AlGaAs-on-insulator substrate during a mask patterning process for patterning AlGaAs thin films, according to some embodiments of the present invention
- FIG. 5 shows a table for process parameters of a dry etching process according to some embodiments of the present invention
- FIG. 6 demonstrates scanning electron microscope (SEM) images with parts (a) and (b) , in which the part (a) shows sidewalls of an AlGaAs waveguide and the part (b) shows a cross-section of an AlGaAs waveguide;
- FIG. 7 demonstrates SEM images of waveguide cross-sections in parts (a) and (b) , in which the part (a) shows a BCB-bonded (benzocyclobutene-bonded) AlGaAs-on-insulator substrate and the part (b) shows an ALD-bonded (atomic layer deposition-bonded) AlGaAs-on-insulator substrate;
- FIG. 8 demonstrates SEM images with parts (a) and (b) , where part (a) shows a dry-etched silica hardmask, and part (b) shows the dry-etched AlGaAs-on-insulator waveguide sidewalls;
- FIG. 10A shows a schematic cross-section of a waveguide directional coupler according to some embodiments of the present invention
- FIG. 10B shows graphs for simulated transverse electric (TE) -and transverse magnetic (TM) -polarized mode-field amplitudes of the waveguide directional coupler of FIG. 10A according to some embodiments of the present invention
- FIG. 10C shows schematic illustration of a fabrication process flow for a waveguide directional coupler
- the metal mask in this work is a large area whole metal mesh comprising periodic holes for patterning nanowires.
- the pattern for a photonic integrated circuit is typically much more complicated than a periodic metal mesh.
- the metal mask for a photonic integrated circuit may not be a continuous film, making it difficult to apply bias across the entire metal mask.
- a related work or literature uses the ICP-RIE method to pattern the AlGaAs waveguides. They use a gas combination of Cl 2 and nitrogen (N 2 ) of an undisclosed ratio to etch their AlGaAs film.
- the choice of a reactant gas here indicates that the etching is accomplished through chemical reaction. Therefore, there will inevitably be differences when using such a method to etch AlGaAs films of different aluminum compositions.
- a related work or literature uses the ICP-RIE method to pattern the AlGaAs waveguides. They adopted a mix of BCl 3 and Ar in the publication. They use chromium as a hardmask in their method of AlGaAs etching. The adoption of chromium will cause absorption loss of the propagating light in a waveguide if the chromium is not fully removed.
- the present invention provides a novel technical solution.
- a method of dry etching aluminum gallium arsenide thin film on silica (AlGaAs-on-insulator) films is provided.
- ICP-RIE with only argon (Ar + ) ions to dry-etch AlGaAs films is applied through physical bombardment to knock off atoms at areas of the film that are not protected by the dielectric hardmask.
- the method excludes any reactive chemical etching using volatile reactive gases such as BCl 3 , Cl 2 , SiCl 4 , CH 4 , H 2 or other gases of varying amounts.
- volatile reactive gases such as BCl 3 , Cl 2 , SiCl 4 , CH 4 , H 2 or other gases of varying amounts.
- volatile reactive gases such as BCl 3 , Cl 2 , SiCl 4 , CH 4 , H 2 or other gases of varying amounts.
- step S10 involves the preparation of an AlGaAs-on-insulator substrate.
- the AlGaAs-on-insulator substrate 100 includes a substrate layer 102, a buried layer 104, a bonding interlayer 106, and an AlGaAs layer 108.
- the substrate layer 102 may include silicon, sapphire, gallium arsenide (GaAs) , or silicon carbide (SiC) .
- the buried layer 104 is formed over the substrate layer 102 and may include a buried oxide layer, a nitride layer, or a combination of oxide and nitride layers.
- the bonding interlayer 106 is formed over the buried layer 104 and may include divinylsiloxane benzocyclobutene (DVS-BCB) , alumina, silicon dioxide (SiO 2 ) , or a polymer-based adhesive.
- the AlGaAs layer 108 is formed over the bonding interlayer 106. The formation of the AlGaAs layer 108 may involve techniques such as ALD-assisted molecular bonding, BCB bonding, or other bonding processes.
- the step S20 a mask patterning process, is performed.
- the mask patterning process can begin with the deposition of a dielectric hardmask film (e.g., silica or silicon nitride) on the AlGaAs-on-insulator substrate 100.
- a dielectric hardmask film e.g., silica or silicon nitride
- a hardmask film 110 is formed on the AlGaAs layer 108.
- the hardmask film 110 is a layer of tetraethyl orthosilicate (TEOS) silica with a thickness of approximately formed using plasma-enhanced chemical vapor deposition (PECVD) .
- PECVD plasma-enhanced chemical vapor deposition
- the hardmask film 110 may also be a PECVD silica layer, a silicon nitride layer, or a combination thereof.
- a photoresist film 112 is formed on the hardmask film 110.
- a layer using AZ-7908 with thick is formed via spin-coating at 4000 rpm on the hardmask film 110. After the spin-coating, soft baking can be performed on the photoresist at 90°C for 60 s.
- the photoresist film 112 degrades after the dry etching (e.g., RIE) performed on the hardmask layer 110.
- the photoresist film 112 is completely removed prior to the ICP-RIE process for the AlGaAs layer 108 using O 2 plasma ashing.
- other manners/means of photoresist removal e.g., buffered oxide etch (BOE)
- BOE buffered oxide etch
- the AlGaAs layer 108 includes and a bottom portion with a horizontally extending profile and a trapezoidal-shaped head portion connected to the bottom portion.
- the AlGaAs layer 108 may feature tilted sidewalls conforming to the sidewall profile of the hardmask layer 110, forming a continuous profile collectively along the sides of the trapezoidal shape.
- the sidewall profile of the hardmask layer 110 has a vertical part which is discontinuous to the tilted sidewalls of the AlGaAs layer 108 in the trapezoidal shape.
- FIG. 4 shows a schematic of an ICP-RIE process chamber 200 used for dry etching an AlGaAs layer according to some embodiments of the present invention.
- the ICP-RIE process chamber 200 includes gas inlets 202 and 204, a radio-frequency (RF) coil 206, a first RF power source 208, a substrate chuck 216, a second RF power source 218, a liquid inlet 220, a port 222, a liquid outlet 224, a valve 226, and a load-lock chamber 228.
- RF radio-frequency
- FIG. 5 shows a table for process parameters of a dry etching process according to some embodiments of the present invention.
- the etch process conditions are as follows: the RF coil power is set to 750 Watts, which generates the plasma in the chamber; the RF platen power is set to 100 Watts to control ion energy and aid in the etching process.
- the RF coil and platen RF powers are set at a frequency of 13.56 MHz.
- the chamber pressure is maintained at 4 milli-Torr (mTorr) to keep proper plasma characteristics.
- Argon gas flows at 25 standard cubic centimeters per minute (sccm) , and oxygen gas is supplied at 60 sccm to assist in plasma formation and the etching reaction.
- the substrate chuck temperature (e.g., the substrate chuck 216) is controlled at 20 degrees Celsius to prevent damage to the sample.
- the chamber Prior to etching, the chamber undergoes a cleaning process with oxygen for 600 seconds to minimize contamination.
- the etching process itself lasts for 270 seconds, during which the sample is exposed to the plasma for the required etching. The use of these parameters is intended to facilitate the smooth progression of the aforementioned fabrication process, thereby making the etching procedure achieve the desired outcome.
- FIG. 8 demonstrates SEM images with parts (a) and (b) , where part (a) shows a dry-etched silica hardmask, and part (b) shows the dry-etched AlGaAs-on-insulator waveguide sidewalls.
- the dielectric hardmask includes an upper portion 304 and a bottom portion 306, with the bottom portion 306 having a sidewall that is nearly vertical.
- the etched AlGaAs waveguide includes an upper portion 308 and a bottom portion 310, where the bottom portion 310 serves as the base for the upper portion 308.
- the upper portion 308 has a sidewall with a positive slope. It is apparent that the distinctive waveguide sidewall slope of the AlGaAs layer in the etched AlGaAs waveguide is formed after the ICP-RIE step using Ar plasma, and not due to the RIE of the dielectric hardmask during the pattern transferring.
- the previously described fabrication process is suitable for the creation of waveguides, particularly in the context of AlGaAs-on-insulator platforms. These waveguides, which feature a sloped profile, benefit from the control of waveguide geometry enabled by the dry etching process.
- AlGaAs is an ideal material for waveguides, as it exhibits high second-and third-order optical nonlinearities, making it particularly useful for applications such as photon-pair generation through spontaneous parametric down-conversion (SPDC) and spontaneous four-wave mixing (SFWM) , respectively.
- SPDC spontaneous parametric down-conversion
- SFWM spontaneous four-wave mixing
- the waveguides fabricated using this process offer the potential for efficient light guiding and coupling, with their structure optimized for both phase-matching and modal-phase matching.
- the method provided in the present invention demonstrates high reliability, allowing for the simultaneous fabrication of dual-channel waveguides, with the differences between channels maintained within an acceptable range.
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- Engineering & Computer Science (AREA)
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- Optics & Photonics (AREA)
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- Optical Integrated Circuits (AREA)
Abstract
A method for dry etching to fabricate an AlGaAs optical waveguide is provided. The method includes steps as follows: providing at least one AlGaAs-on-insulator substrate(100) which comprising a substrate layer(102), a buried layer(104) formed over the substrate layer(102), a bonding interlayer(106) formed over the buried layer(104), and an AlGaAs layer(108) formed over the bonding interlayer(106), forming a hardmask film (110)on the AlGaAs layer(108), forming a photoresist film (112)on the hardmask film(110), transferring a pattern to the photoresist film(112), etching the hardmask film(110) to transfer the pattern from the photoresist film(112) to the hardmask film(110), and etching the AlGaAs layer(108) using ICP-RIE with Ar plasma to form a waveguide structure having a trapezoidal-shaped upper portion with positive slope sidewalls and a horizontally extending lower portion for the AlGaAs layer(108), wherein only physical bombardment of Ar + ions is applied to the AlGaAs layer(108) to pattern the waveguide structure.
Description
Inventors: Bo Xue TAN; and Wing On Andrew POON
The present invention relates to dry etching technologies; and more particularly to apparatuses and methods for dry etching of aluminum gallium arsenide optical waveguides using argon gas plasma.
Aluminum gallium arsenide (AlGaAs) features excellent electronic and optical properties, a high second-order optical nonlinearity and a high third-order optical nonlinearity, which makes it a promising integrated photonic platform for lasers, semiconductor optical amplifiers, nonlinear and quantum photonics. The aluminum content x of the AlxGa1-xAs compound semiconductor enables the tuning of the bandgap energy of the material and also the optical properties of the material. The optical properties that can be tuned through the aluminum content x includes the (1) refractive index, (2) linear absorption (the transparency window) , (3) two-photon nonlinear absorption, (4) second-order nonlinear susceptibility χ (2) and (5) third-order nonlinear susceptibility χ ($) . Moreover, AlGaAs with different aluminum contents (from GaAs to AlAs) have similar lattice constants, enabling multiple layers of different compositions to be grown on the top of each other. Waveguide cores with a higher refractive index for total internal reflection can be realized using AlGaAs layers with lower aluminum contents than its cladding layers. More complicated waveguide structures involving multiple AlGaAs layers can be designed and fabricated for lasers and for phase matching purposes.
Researchers have leveraged the high optical nonlinearity and the versatility of the material to demonstrate second-order nonlinear optical frequency conversions such as second-harmonic generation and difference-frequency generation on AlGaAs-based integrated photonic chips. The aluminum content x was chosen to avoid two-photon absorption loss at the 1550 nm wavelength range and to avoid linear absorption loss at 775 nm wavelengths. Various photon-pair generation work have been demonstrated on the integrated photonic platform that leverage the nonlinear optical parametric conversion processes.
Most of the AlGaAs nonlinear and quantum photonic work reported in the literature require smooth waveguide sidewalls to minimize the scattering loss at both the pump and the generated wavelengths. Moreover, a high-fidelity patterning will be important due to the typical stringent requirements imposed by the phase matching needed for nonlinear optical frequency conversion processes. A critical step to ensuring high-fidelity patterning and a smooth waveguide sidewall profile is the etching process that transfers the pattern from a mask to the device film. In the case of devices with multiple AlGaAs layers, the etching process also needs to have equirate etching between layers of different aluminum contents to ensure uniform etching profile.
Wet etching and chlorine-based inductively-coupled plasma reactive-ion etching (ICP-RIE) are some of the methods developed by the community to pattern AlGaAs waveguides of different aluminum contents x. The former method etches AlGaAs isotropically, resulting in waveguides with curved sidewalls. The isotropic nature of wet etching makes it impossible to pattern high-aspect-ratio features such as narrow waveguides and narrow coupling gap spacing. The latter method typically involves reactive compound gases, including BCl3, Cl2, SiCl4, CH4 and H2 of varying amounts. There is also a mixture of inert gases such as argon and N2 to control the degree of anisotropy. The mix of reactive gases and inert gases balances the physical bombardment and the chemical etching. Multiple work have systematically studied the parameters that influence the different choices of gas mixtures on the AlGaAs etching profiles and relative etch rates between AlGaAs layers of different x values. However, those etching recipes are not readily repeatable as they are sensitive to the detailed conditions of individual equipment. Moreover, these works typically exhibit a sensitive dependence on the etching parameters, e.g., a 10 ~ 13 %N2 gas mix to ensure an anisotropic profile and minimal roughness at the etched bottom. As a result, there is to our knowledge no standard etching recipe for the AlGaAs optoelectronic community. For example, a research group at the University of California Santa Barbara (UCSB) uses Cl2/N2, while a group at the Technical University of Denmark (DTU) uses only BCl3 and a group at the University of Glasgow (UofG) uses SiCl4/Ar/N2 in their respective ICP-RIE process. The chemical etching component due to reactive gases will inevitably exhibit a certain degree of aluminum dependence as the process causes the formation of volatile by-products such as AlCl3, GaCl2 and GaCl3.
Therefore, there is a need to develop methods that produce a sloped waveguide profile with smooth sidewalls while preventing the formation of non-volatile etching by-products that could increase surface roughness.
It is an objective of the present invention to provide devices and methods to address the aforementioned shortcomings and unmet needs in the state of the art.
In the present invention, an ICP-RIE dry-etching method that uses only argon Ar+ ions to etch AlGaAs waveguides is provided, yielding a sloped waveguide profile and a smooth waveguide sidewall. In the present invention, the provided solution leverages only the physical bombardment of Ar+ ions to pattern waveguides, avoiding the possible generation of non-volatile etching by-products that will cause roughness to the waveguide.
According to the provided solution, a method for dry etching aluminum gallium arsenide film to form optical waveguides and other integrated optical components with a sloped waveguide sidewall is disclosed herein. A dielectric hardmask is deposited and patterned on an aluminum gallium arsenide film. The dielectric hardmask pattern defines the optical waveguides through a plurality of recesses. Areas of the aluminum gallium arsenide film not covered by the dielectric hardmask will be removed through a dry etching process. The dry etching process uses argon plasma generated in an inductively-coupled plasma reactive ion etching process chamber to etch the aluminum gallium arsenide film. The process comprises a three-step process to ignite and stabilize the argon plasma.
In accordance with a first aspect of the present invention, a method for dry etching to fabricate an AlGaAs optical waveguide is provided. The method includes steps as follows: providing at least one AlGaAs-on-insulator substrate which comprising a substrate layer, a buried layer formed over the substrate layer, a bonding interlayer formed over the buried layer, and an AlGaAs layer formed over the bonding interlayer; forming a hardmask film on the AlGaAs layer; forming a photoresist film on the hardmask film; transferring a pattern to the photoresist film; etching the hardmask film to transfer the pattern from the photoresist film to the hardmask film; and, etching the AlGaAs layer using inductively coupled plasma reactive-ion etching (ICP-RIE) with Ar plasma to form a waveguide structure having a trapezoidal-shaped upper portion with positive slope sidewalls and a horizontally extending lower portion for the AlGaAs layer, wherein only physical bombardment of Ar+ ions is applied to the AlGaAs layer to pattern the waveguide structure.
Moreover, aluminum gallium arsenide (AlGaAs) is a promising semiconductor photonic platform for photon-pair generation through spontaneous parametric down-conversion (SPDC) or spontaneous four-wave mixing (SFWM) due to its high second-and third-order optical nonlinearities. In the present invention, it enables the fabrication of high-Q microresonators in an AlGaAs-on-insulator (AlGaAsOI) platform. This invention also provides a structure and manufacturing method for a waveguide directional coupler.
Embodiments of the invention are described in more details hereinafter with reference to the drawings, in which:
FIG. 1 shows a process flowchart of process steps included in a method of patterning AlGaAs thin films using dry etching according to some embodiments of the present invention;
FIG. 2 illustrates a cross-sectional view of layers in an AlGaAs-on-insulator substrate during a mask patterning process for patterning AlGaAs thin films, according to some embodiments of the present invention;
FIG. 3 illustrates a process flow of transferring a mask pattern from a hardmask to an AlGaAs layer using the proposed method according to some embodiments of the present invention;
FIG. 4 shows a schematic of an ICP-RIE process chamber used for dry etching an AlGaAs layer according to some embodiments of the present invention;
FIG. 5 shows a table for process parameters of a dry etching process according to some embodiments of the present invention;
FIG. 6 demonstrates scanning electron microscope (SEM) images with parts (a) and (b) , in which the part (a) shows sidewalls of an AlGaAs waveguide and the part (b) shows a cross-section of an AlGaAs waveguide;
FIG. 7 demonstrates SEM images of waveguide cross-sections in parts (a) and (b) , in which the part (a) shows a BCB-bonded (benzocyclobutene-bonded) AlGaAs-on-insulator substrate and the part (b) shows an ALD-bonded (atomic layer deposition-bonded) AlGaAs-on-insulator substrate;
FIG. 8 demonstrates SEM images with parts (a) and (b) , where part (a) shows a dry-etched silica hardmask, and part (b) shows the dry-etched AlGaAs-on-insulator waveguide sidewalls;
FIG. 9 demonstrates cross-sectional SEM images with parts (a) and (b) , in which the part (a) shows a single AlGaAs waveguide and the part (b) shows an AlGaAs waveguide coupler;
FIG. 10A shows a schematic cross-section of a waveguide directional coupler according to some embodiments of the present invention;
FIG. 10B shows graphs for simulated transverse electric (TE) -and transverse magnetic (TM) -polarized mode-field amplitudes of the waveguide directional coupler of FIG. 10A according to some embodiments of the present invention;
FIG. 10C shows schematic illustration of a fabrication process flow for a waveguide directional coupler; and
FIG. 11 shows a table comparing the method disclosed in the present invention with other relevant prior arts.
In the following description, to apparatuses and methods for dry etching of aluminum gallium arsenide optical waveguides using argon gas plasma and the likes are set forth as preferred examples. It will be apparent to those skilled in the art that modifications, including additions and/or substitutions may be made without departing from the scope and spirit of the invention. Specific details may be omitted so as not to obscure the invention; however, the disclosure is written to enable one skilled in the art to practice the teachings herein without undue experimentation.
Some works or literature have already made contributions in the relevant field; however, they still have certain shortcomings or trade-offs that need to be addressed, as described below.
A related work or literature discusses a method of dry etching multiple layers of III-V compound semiconductors including gallium arsenide and indium phosphide. The dry etching described in this process involves switching between different etching steps with different reactant gases. This work uses a combination of methane (CH4) and hydrogen (H2) in one step and a combination of CH4, H2 and chlorine (Cl2) in another step. However, the gas mix in this work is designed to selectively etch a particular III-V compound semiconductor. Therefore, it may not be able to etch AlGaAs of different aluminum contents. Moreover, the use of methane in the etching process has a known disadvantage of polymer redeposition.
A related work or literature discusses a method of fabricating gallium arsenide nanowires. This work discloses a method for fabricating a thin metal film mesh and using the mesh as an anode for electro-chemical wet etching of gallium arsenide film. The metal-semiconductor interface at those areas covered by the metal mesh will generate free hole carriers and oxidize the semiconductor when a bias is applied. The oxidized areas are etched by an appropriately chosen etchant, resulting in an anisotropic wet etch which is not characteristic of wet etching processes. However, the need for a metal mask for the process is a major complication for waveguide patterning in AlGaAs. The metal mask in this work is a large area whole metal mesh comprising periodic holes for patterning nanowires. However, the pattern for a photonic integrated circuit is typically much more complicated than a periodic metal mesh. The metal mask for a photonic integrated circuit may not be a continuous film, making it difficult to apply bias across the entire metal mask.
Also, there are other related works or literatures discussing various laser diode designs and the associated methods of fabrication. The methods disclosed patterning the AlGaAs films using wet chemical etching involving chemicals such as NH4OH, H2O2, HCl, etc. Wet chemical etching of AlGaAs thin films will yield optical waveguides with isotropic profiles.
A related work or literature uses the ICP-RIE method to pattern the AlGaAs waveguides. They use a gas combination of Cl2 and nitrogen (N2) of an undisclosed ratio to etch their AlGaAs film. The choice of a reactant gas here indicates that the etching is accomplished through chemical reaction. Therefore, there will inevitably be differences when using such a method to etch AlGaAs films of different aluminum compositions.
A related work or literature uses the ICP-RIE method to pattern the AlGaAs waveguides. They reported various mixes of BCl3 and N2 in the publication. The pure BCl3 gas with a silicon carrier gives a balanced result of having a smooth sidewall and an anisotropic waveguide profile. However, there is a noticeable loading effect and an anisotropic profile in the narrow coupling region due to the lower concentration of etchants in the narrow gap spacing.
A related work or literature uses the ICP-RIE method to pattern the AlGaAs waveguides. They adopted a mix of BCl3 and Ar in the publication. They use chromium as a hardmask in their method of AlGaAs etching. The adoption of chromium will cause absorption loss of the propagating light in a waveguide if the chromium is not fully removed.
In view of the aforementioned challenges or existing shortcomings, the present invention provides a novel technical solution.
In the present invention, a method of dry etching aluminum gallium arsenide thin film on silica (AlGaAs-on-insulator) films is provided. ICP-RIE with only argon (Ar+) ions to dry-etch AlGaAs films is applied through physical bombardment to knock off atoms at areas of the film that are not protected by the dielectric hardmask. The method excludes any reactive chemical etching using volatile reactive gases such as BCl3, Cl2, SiCl4, CH4, H2 or other gases of varying amounts. The exclusion of volatile reactive gases enables equirate etching for AlGaAs of various aluminum contents without the need for meticulous tuning of different reactive gases such as BCl3 and Cl2. Moreover, the invention presents a simplified method of dry etching AlGaAs thin films without having to consider the species of reactive gases and the complicated interplay among reactive gases and their etching by-products. The reduced degrees of freedom significantly simplify the process tuning for dry etching of AlGaAs thin films.
The provided solution of the present invention can be applied to the patterning of photonic integrated circuits on AlGaAs-on-insulator thin films with sloped waveguide profiles. The provided solution of the present invention has potential wafer-level scalability and relative ease of adoption. The provided solution of the present invention can be applied to pattern other AlGaAs thin films with multiple layers of different aluminum contents.
FIG. 1 shows a process flowchart of process steps included in a method of patterning AlGaAs thin films using dry etching according to some embodiments of the present invention. As shown in FIG. 1, the process flow includes steps S10, S20, and S30. The step S10 is providing an AlGaAs-on-insulator. The step S20 is a mask patterning process. The step S30 is a process of dry-etching AlGaAs thin films.
FIG. 2 illustrates a cross-sectional view of layers in an AlGaAs-on-insulator substrate during a mask patterning process for patterning AlGaAs thin films, according to some embodiments of the present invention. The illustrations in FIG. 2 include stages (a) , (b) , (c) , (d) , and (e) , involving transferring a mask pattern onto a silica hardmask layer.
In stage (a) of FIG. 2, step S10 involves the preparation of an AlGaAs-on-insulator substrate. The AlGaAs-on-insulator substrate 100 includes a substrate layer 102, a buried layer 104, a bonding interlayer 106, and an AlGaAs layer 108. The substrate layer 102 may include silicon, sapphire, gallium arsenide (GaAs) , or silicon carbide (SiC) . The buried layer 104 is formed over the substrate layer 102 and may include a buried oxide layer, a nitride layer, or a combination of oxide and nitride layers. The bonding interlayer 106 is formed over the buried layer 104 and may include divinylsiloxane benzocyclobutene (DVS-BCB) , alumina, silicon dioxide (SiO2) , or a polymer-based adhesive. The AlGaAs layer 108 is formed over the bonding interlayer 106. The formation of the AlGaAs layer 108 may involve techniques such as ALD-assisted molecular bonding, BCB bonding, or other bonding processes.
In stages (b) , (c) , (d) , and (e) of FIG. 2, the step S20, a mask patterning process, is performed. After the preparation of the AlGaAs-on-insulator substrate 100, the mask patterning process can begin with the deposition of a dielectric hardmask film (e.g., silica or silicon nitride) on the AlGaAs-on-insulator substrate 100.
As shown in the stage (b) , a hardmask film 110 is formed on the AlGaAs layer 108. In some embodiments, the hardmask film 110 is a layer of tetraethyl orthosilicate (TEOS) silica with a thickness of approximately formed using plasma-enhanced chemical vapor deposition (PECVD) . In some embodiments, the hardmask film 110 may also be a PECVD silica layer, a silicon nitride layer, or a combination thereof.
As shown in the stage (c) , a photoresist film 112 is formed on the hardmask film 110. In some embodiments, a layer using AZ-7908 with thick is formed via spin-coating at 4000 rpm on the hardmask film 110. After the spin-coating, soft baking can be performed on the photoresist at 90℃ for 60 s.
As shown in the stage (d) , a desired pattern is transferred to the photoresist film 112. In some embodiment, the pattern transferring is performed using an i-line (e.g., 365 nm) photolithography stepper with an exposure dose of 240-320 mJ/cm2. Then, the exposed photoresist film 112 undergoes a post-exposure bake at 110 ℃for 60 s. The baked photoresist film 112 is developed by immersing in a tetramethylammonium hydroxide (TMAH) solution for 60s. Herein, the patterning of the hardmask film 110 is not limited to using i-line photolithography and photoresist material (AZ-7908) . In some embodiments, other means/materials of lithography (e.g., electron-beam lithography (EBL) ) and resist materials (e.g., hydrogen silesquioxane (HSQ) ) can be used to pattern the hardmask film 110.
As shown in the stage (e) , the pattern of the photoresist film 112 is transferred from the photoresist film 112 to the hardmask film 110 in an etching chamber. Prior to placing the resulted structure into the etching chamber, the etching chamber is cleaned using 10 minutes of O2 plasma, to minimize the likelihood of particle contaminants falling onto the sample surface. In some embodiment, the pattern transferring is performed using dry etch; for example, RIE is applied to the hardmask film 110. The dry etching of the hardmask film 110 can be performed using a gas mixture of CHF3/O2 = 87/1.5 sccm, with a chamber pressure of 68 mTorr. The RIE power may be set to 85 W. After the dry etching, the AlGaAs layer 108 of the AlGaAs-on-insulator substrate 100 is exposed from the hardmask film 110.
FIG. 3 illustrates a process flow of transferring a mask pattern from a hardmask to an AlGaAs layer using the proposed method according to some embodiments of the present invention. After the dry etching at the stage (e) of FIG. 2, the AlGaAs layer is to be taken to patterning using an ICP-RIE process.
As shown in the stage (a) of FIG. 3, the photoresist film 112 degrades after the dry etching (e.g., RIE) performed on the hardmask layer 110. In some embodiments, the photoresist film 112 is completely removed prior to the ICP-RIE process for the AlGaAs layer 108 using O2 plasma ashing. In some embodiments, other manners/means of photoresist removal (e.g., buffered oxide etch (BOE) ) can be used to remove the photoresist film 112. Before placing the AlGaAs-on-insulator substrate 100 with the hardmask layer 110 into an ICP-RIE chamber for 10 minutes of O2 plasma cleaning is performed on the ICP-RIE chamber. The ICP-RIE chamber is conditioned by running the etching process without the sample for at least 10 minutes prior to the actual etching run, so as to ensure reproducible results.
As shown in the stage (b) of FIG. 3, Ar plasma is ignited using a three-step process to achieve the desired etching settings. The chamber pressure is initially set to 18 mTorr for 10 seconds, then reduced to 10 mTorr for 5 seconds, and finally lowered to 4 mTorr for the remainder of the dry etching process. The higher initial chamber pressure facilitates reliable plasma ignition, and the gradual reduction ensures plasma stability. In this regard, consistent plasma ignition cannot be achieved if the chamber pressure is directly set to 4 mTorr at the start of the process. In some embodiments, during the dry etching process in this stage (b) of FIG. 3, only the physical bombardment of Ar+ ions is applied to the AlGaAs layer 108 of the AlGaAs-on-insulator substrate 100, avoiding the potential generation of non-volatile etching by-products that will cause roughness to the AlGaAs layer 108. In some embodiments, during the dry etching process of the AlGaAs layer 108, Ar plasma is used as the sole etching gas, with no additional substances involved in the etching of the AlGaAs layer 108, ensuring a process free from potential by-products that could cause surface roughness.
After the dry etching process using Ar plasma, the AlGaAs layer 108 includes and a bottom portion with a horizontally extending profile and a trapezoidal-shaped head portion connected to the bottom portion. In some embodiment, the AlGaAs layer 108 may feature tilted sidewalls conforming to the sidewall profile of the hardmask layer 110, forming a continuous profile collectively along the sides of the trapezoidal shape. In some embodiment, the sidewall profile of the hardmask layer 110 has a vertical part which is discontinuous to the tilted sidewalls of the AlGaAs layer 108 in the trapezoidal shape.
FIG. 4 shows a schematic of an ICP-RIE process chamber 200 used for dry etching an AlGaAs layer according to some embodiments of the present invention. The ICP-RIE process chamber 200 includes gas inlets 202 and 204, a radio-frequency (RF) coil 206, a first RF power source 208, a substrate chuck 216, a second RF power source 218, a liquid inlet 220, a port 222, a liquid outlet 224, a valve 226, and a load-lock chamber 228.
The internal space of the ICP-RIE process chamber 200 is connected to the gas inlets 202 and 204 for oxygen and argon gas input, respectively. The plasma for etching or O2 clean is generated by the RF coil 206 driven by the first RF power source 208 at 13.56 MHz. A sample 212 is formed or connected to a silicon carrier wafer 214 (e.g., a 6” silicon carrier wafer) for the etching process, in which the sample 212 may applies the structure of the AlGaAs-on-insulator substrate 100 with the hardmask layer 110 as afore-mentioned. The generated plasma 210 can etch the sample 212 or clean the process chamber. The plasma is accelerated towards the substrate chuck 216 that is driven by the second RF power source 218. The substrate chuck 216 can be cooled to 20℃ using de-ionized water driven through liquid inlet 220 and the liquid outlet 224. The silicon wafer carrier 214 is cooled from the back through helium gas flowing through the port 222. The chamber pressure of the ICP-RIE process chamber 200 is regulated through the valve 226. The sample 212 to be etched is loaded and unloaded into the ICP-RIE process chamber 200 through a load-lock chamber 228 to maintain high vacuum and low moisture levels in the process chamber. This is important because moisture can negatively affect the AlGaAs etching process, as AlGaAs with higher aluminum content is more likely to oxidize.
FIG. 5 shows a table for process parameters of a dry etching process according to some embodiments of the present invention. In some embodiments, the etch process conditions are as follows: the RF coil power is set to 750 Watts, which generates the plasma in the chamber; the RF platen power is set to 100 Watts to control ion energy and aid in the etching process. The RF coil and platen RF powers are set at a frequency of 13.56 MHz. The chamber pressure is maintained at 4 milli-Torr (mTorr) to keep proper plasma characteristics. Argon gas flows at 25 standard cubic centimeters per minute (sccm) , and oxygen gas is supplied at 60 sccm to assist in plasma formation and the etching reaction. The substrate chuck temperature (e.g., the substrate chuck 216) is controlled at 20 degrees Celsius to prevent damage to the sample. Prior to etching, the chamber undergoes a cleaning process with oxygen for 600 seconds to minimize contamination. The etching process itself lasts for 270 seconds, during which the sample is exposed to the plasma for the required etching. The use of these parameters is intended to facilitate the smooth progression of the aforementioned fabrication process, thereby making the etching procedure achieve the desired outcome.
The AlGaAs with an inverted trapezoidal morphology, produced through the aforementioned dry etching process, can be used as a waveguide. Further description of the physical properties of the waveguide is provided below.
FIG. 6 demonstrates SEM images with parts (a) and (b) , in which the part (a) shows sidewalls of an AlGaAs waveguide and the part (b) shows a cross-section of an AlGaAs waveguide. In FIG. 6, a dielectric hardmask layer 300 and a sidewall of an etched AlGaAs waveguide 302 are illustrated. The etched AlGaAs waveguide 302 has a positive slope of 66°-68° by using an etch rate aroundThe profile of the sloped etched AlGaAs waveguide 302 eases the deposition of the upper-cladding film as it avoids the formation of voids.
FIG. 7 demonstrates SEM images of waveguide cross-sections in parts (a) and (b) , in which the part (a) shows a BCB-bonded AlGaAs-on-insulator substrate and the part (b) shows an ALD-bonded AlGaAs-on-insulator substrate. The BCB-bonded and ALD-bonded AlGaAs-on-insulator substrates can be processed to form waveguides using the same method for equal durations. Both samples exhibit similar waveguide slope angles, indicating that the process recipe has similar effects on AlGaAs-on-insulator substrates with different bonding interlayers. Therefore, even when using the same only-Ar plasma process on AlGaAs with different substrate types, waveguide structures with positive slope angles between 66° and 68° can be consistently achieved for those AlGaAs layers.
FIG. 8 demonstrates SEM images with parts (a) and (b) , where part (a) shows a dry-etched silica hardmask, and part (b) shows the dry-etched AlGaAs-on-insulator waveguide sidewalls. In some embodiments, the dielectric hardmask includes an upper portion 304 and a bottom portion 306, with the bottom portion 306 having a sidewall that is nearly vertical. The etched AlGaAs waveguide includes an upper portion 308 and a bottom portion 310, where the bottom portion 310 serves as the base for the upper portion 308. The upper portion 308 has a sidewall with a positive slope. It is apparent that the distinctive waveguide sidewall slope of the AlGaAs layer in the etched AlGaAs waveguide is formed after the ICP-RIE step using Ar plasma, and not due to the RIE of the dielectric hardmask during the pattern transferring.
FIG. 9 demonstrates cross-sectional SEM images with parts (a) and (b) , in which the part (a) shows a single AlGaAs waveguide and the part (b) shows an AlGaAs waveguide coupler. The width of the recess 311 is about 2.06 μm and the width of the recess 312 is about 399 nm. The waveguide sidewall slope angles are consistently within the range of 66°-68°. This indicates that the waveguide sidewall slope angles are independent of the widths of recesses.
The previously described fabrication process is suitable for the creation of waveguides, particularly in the context of AlGaAs-on-insulator platforms. These waveguides, which feature a sloped profile, benefit from the control of waveguide geometry enabled by the dry etching process. AlGaAs is an ideal material for waveguides, as it exhibits high second-and third-order optical nonlinearities, making it particularly useful for applications such as photon-pair generation through spontaneous parametric down-conversion (SPDC) and spontaneous four-wave mixing (SFWM) , respectively. The waveguides fabricated using this process offer the potential for efficient light guiding and coupling, with their structure optimized for bothphase-matching and modal-phase matching. Furthermore, the method provided in the present invention demonstrates high reliability, allowing for the simultaneous fabrication of dual-channel waveguides, with the differences between channels maintained within an acceptable range.
FIG. 10A shows a schematic cross-section of a waveguide directional coupler 400 according to some embodiments of the present invention; and FIG. 10B shows graphs for simulated transverse electric (TE) -and transverse magnetic (TM) -polarized mode-field amplitudes of the waveguide directional coupler of FIG. 10A according to some embodiments of the present invention.
The waveguide directional coupler 400 is formed using an AlGaAsOI substrate. The waveguide directional coupler 400 includes a buried oxide layer 410, a bonding layer 412, and a AlGaAs layer 414, and a cladding layer 416. The bonding layer 412 is deposited above the buried oxide layer 410 and may include metal oxides, such as Al2O3. The AlGaAs layer 414 is located above the bonding layer 412 and forms a dual channel for the waveguide directional coupler 400. For example, it is a waveguide structure by etching the AlGaAs layer to form a dual-channel waveguide with two channels being optically coupled to function as a waveguide directional coupler. In some embodiment, the AlGaAs layer 414 uses Al0.5Ga0.5As. The cladding layer 416 covers the AlGaAs layer 414 and may include silicon oxide, such as SiO2. The cladding layer 416 is conformal with a top surface of the AlGaAs layer 414. These layers collectively establish a waveguide structure.
Specifically, the AlGaAs layer 414 includes a bottom portion 418 with a height of approximately 230 nm and an upper portion 420 with a height of approximately 370 nm. The bottom portion 418 serves as a base for the upper portion 420, which has a trapezoidal shape. The upper portion 420 extends from the bottom portion 418 and features sidewalls with a positive slope angle of about 66°. The upper portion 420 is formed as two waveguide channels separated by a distance of approximately 350 nm. Each channel has a top surface with a width of about 900 nm. The cladding layer 416 with a height if approximately 300 nm can extend into the gap between the two waveguide channels of the upper portion 420. The morphology of the upper portion 420 helps prevent the formation of voids when the cladding layer 416 is deposited over the AlGaAs layer 414. In some embodiments, the height of the bottom portion 418 ranges from approximately 230 nm to 350 nm, the height of the upper portion 420 ranges from approximately 250 nm to 370 nm, and the positive slope angle ranges from about 66° to 68°.
FIG. 10C shows schematic illustration of a fabrication process flow for a waveguide directional coupler. The fabrication process flow includes at least six steps. The first step is hardmask deposition, which is identical or similar to the aforementioned descriptions. The second step is i-line photolithography using i-line illumination, configured for dual channels. The third step is hardmask etching to form a hardmask with a dual-strip pattern. The fourth step is AlGaAs etching using Ar+ ions (e.g., Ar plasma) to pattern an AlGaAs layer. The fifth step is hardmask removal to expose the top surface of the AlGaAs layer. The sixth and final step is cladding deposition, which involves covering waveguide channels of the AlGaAs layer with a cladding layer.
The following outlines the differences between the technical solutions provided by this invention and the prior art.
A related work or literature liter discloses a dry etching method that uses reactive gases, including CH4, H2 and Cl2 to etch multiple layers of III-V compound semiconductors. The gas mix includes methane, which is prone to polymer redeposition that can cause roughness to the waveguide sidewalls. The solution provided by the present invention does not include any methane gas, thus avoiding the possibility of polymer redeposition.
Some related works or literatures require a metal mask that may complicate the fabrication process and potentially affect the optical performance of the fabricated waveguide if not completely removed. The solution provided by the present invention does not require the use of a metal mask. Instead, a silica hardmask is applied to the solution provided by the present invention. The silica hardmask does not adversely affect the optical performance of the fabricated waveguides even if it is not completely removed.
Some related works or literatures use different chemicals to wet etch multiple AlGaAs layers. The AlGaAs waveguides etched with such a method will have an isotropic sidewall profile. Such an isotropic sidewall profile is not suitable for directional coupler designs with a narrow coupling gap spacing. The solution provided by the present invention will enable an anisotropic waveguide sidewall profile through the argon plasma dry etching.
A related work or literature uses the ICP-RIE method with Cl2 and N2 to pattern the AlGaAs waveguides. The etching process from this gas mix is reaction-based, thus requiring tuning for different aluminum contents. The solution provided by the present invention uses only physical bombardment from the Ar+ ions. Therefore, the etching results for AlGaAs films of different aluminum contents could be highly similar.
A related work or literature demonstrates an ICP-RIE method with BCl3 and N2 to pattern the AlGaAs waveguides. The fabricated device has a pronounced local loading effect where the narrow coupling gap spacing exhibits shallower etch depths. The coupling gap spacing also exhibit an isotropic profile. The method disclosed in the present invention reduces the extent of local loading effects as the etching is not reaction-based. The solution provided by the present invention etches AlGaAs waveguides with a sloped profile. The sloped waveguide profile extends the lateral distribution of the waveguide mode. The extended modal distribution along with a waveguide slab layer enables a larger mode overlap between adjacent waveguides. Such a sloped waveguide geometry thus facilitates optical coupling between waveguides at the near-visible (e.g., ~775 nm) wavelengths without an extremely narrow coupling gap spacing.
The method disclosed in the present invention is compared with other relevant prior arts in Table shown in FIG. 11.
Spatial references such as “on, ” “above, ” “below, ” and similar terms are defined relative to a component or plane as shown in the figure. These terms are for illustration only and do not limit the actual arrangement, provided the described embodiments retain their intended benefits.
It is noted that although the illustrations depict various structures as roughly rectangular, their actual shapes may vary in practice due to fabrication conditions. These variations may include curved edges, rounded corners, or differences in thickness. The straight lines and right angles shown in the figures are solely for representational convenience in illustrating the layers and feature
In this disclosure, the terms “a, ” “an, ” and “the” should be interpreted to include both singular and plural forms unless explicitly specified otherwise by the context. Additionally, when describing embodiments, a component positioned “on” or “over” another component can refer to cases where the two components are directly in contact or where one or more intermediate components are situated between them.
The foregoing description of the present invention has been provided for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations will be apparent to the practitioner skilled in the art.
The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications that are suited to the particular use contemplated.
Claims (14)
- A method for dry etching to fabricate an AlGaAs optical waveguide, comprising:providing at least one AlGaAs-on-insulator substrate which comprising a substrate layer, a buried layer formed over the substrate layer, a bonding interlayer formed over the buried layer, and an AlGaAs layer formed over the bonding interlayer;forming a hardmask film on the AlGaAs layer;forming a photoresist film on the hardmask film;transferring a pattern to the photoresist film;etching the hardmask film to transfer the pattern from the photoresist film to the hardmask film;etching the AlGaAs layer using inductively coupled plasma reactive-ion etching (ICP-RIE) with Ar plasma to form a waveguide structure having a trapezoidal-shaped upper portion with positive slope sidewalls and a horizontally extending lower portion for the AlGaAs layer, wherein only physical bombardment of Ar+ ions is applied to the AlGaAs layer to pattern the waveguide structure.
- The method according to claim 1, wherein the etching using the Ar plasma for the AlGaAs layer is performed without any additional etching gases, avoiding by-products that causes surface roughness on the AlGaAs layer.
- The method according to claim 2, wherein the etching using the Ar plasma for the AlGaAs layer is performed without any methane gas.
- The method according to claim 3, wherein the etching using the Ar plasma for the AlGaAs layer is performed to enable an anisotropic waveguide sidewall profile.
- The method according to claim 1, wherein the hardmask film is formed from tetraethyl orthosilicate (TEOS) silica, silicon nitride, or a combination thereof, and is free from any metal material.
- The method according to claim 1, wherein the positive slope sidewalls have positive slope angles ranging from 66° to 68°.
- The method according to claim 1, wherein the waveguide structure formed by etching the AlGaAs layer comprises a dual-channel waveguide with two channels being optically coupled to function as a waveguide directional coupler.
- The method according to claim 7, wherein the positive slope sidewalls of both the channels of the dual-channel waveguide have positive slope angles ranging from 66° to 68°.
- The method according to claim 1, wherein the AlGaAs layer is a Al0.5Ga0.5As layer.
- The method according to claim 1, wherein the providing the at least one AlGaAs-on-insulator substrate comprises providing a BCB-bonded AlGaAs-on-insulator substrate and an ALD-bonded AlGaAs-on-insulator substrate, and wherein the etching comprises:etching an AlGaAs layer of the BCB-bonded AlGaAs-on-insulator substrate with only physical bombardment of Ar+ ions applied to the AlGaAs layer of the BCB-bonded AlGaAs-on-insulator substrate for a first duration; andetching an AlGaAs layer of the ALD-bonded AlGaAs-on-insulator substrate with only physical bombardment of Ar+ ions applied to the AlGaAs layer of the ALD-bonded AlGaAs-on-insulator substrate for a second duration the same as the first duration, wherein both the AlGaAs layers of the BCB-bonded AlGaAs-on-insulator substrate and the ALD-bonded AlGaAs-on-insulator substrate form the waveguide structures with positive slope angles between 66° and 68°.
- The method according to claim 1, wherein the etching of the AlGaAs layer using the Ar plasma is performed with an Ar gas flow rate of 25 standard cubic centimeters per minute (sccm) .
- The method according to claim 1, wherein the etching of the AlGaAs layer using the Ar plasma is conducted for a duration of 270 seconds.
- The method according to claim 1, further comprising:removing the hardmask film from the AlGaAs layer; andforming a cladding layer to cover the AlGaAs layer.
- The method according to claim 1, wherein the transferring the pattern to the photoresist film is performed by using i-line photolithography.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002198359A (en) * | 2000-12-27 | 2002-07-12 | Canon Inc | Dry etching method and method for manufacturing semiconductor element |
| CN102598223A (en) * | 2009-11-09 | 2012-07-18 | 3M创新有限公司 | Process for anisotropic etching of semiconductors |
| CN102893378A (en) * | 2009-11-09 | 2013-01-23 | 3M创新有限公司 | Etching process for semiconductors |
| CN105870007A (en) * | 2016-04-22 | 2016-08-17 | 杭州立昂东芯微电子有限公司 | Gallium arsenide back hole dry-etching process by inductive coupling plasma |
| US20220208550A1 (en) * | 2020-12-31 | 2022-06-30 | Spts Technologies Limited | Method and Apparatus for Plasma Etching |
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- 2025-01-16 WO PCT/CN2025/072705 patent/WO2025153009A1/en active Pending
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002198359A (en) * | 2000-12-27 | 2002-07-12 | Canon Inc | Dry etching method and method for manufacturing semiconductor element |
| CN102598223A (en) * | 2009-11-09 | 2012-07-18 | 3M创新有限公司 | Process for anisotropic etching of semiconductors |
| CN102893378A (en) * | 2009-11-09 | 2013-01-23 | 3M创新有限公司 | Etching process for semiconductors |
| CN105870007A (en) * | 2016-04-22 | 2016-08-17 | 杭州立昂东芯微电子有限公司 | Gallium arsenide back hole dry-etching process by inductive coupling plasma |
| US20220208550A1 (en) * | 2020-12-31 | 2022-06-30 | Spts Technologies Limited | Method and Apparatus for Plasma Etching |
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