WO2025145860A1 - Multi-layer doping source structure, and high-quality emitter and controllable preparation method therefor - Google Patents

Abstract

The present invention provides a multi-layer doping source structure, and a high-quality emitter and a controllable preparation method therefor. The multi-layer doping source structure comprises a dielectric layer, a nitrogen silicide layer and a doping source layer, which are stacked on the front surface of a crystalline silicon substrate, wherein the dielectric layer is a silicon oxide film or a silicon oxynitride film, the doping source layer is boron-doped amorphous silicon doped with functional elements or phosphorus-doped amorphous silicon doped with functional elements, and the functional elements doped in the doping source layer are carbon and/or nitrogen. In the present invention, the doping source structure is composed of the dielectric layer, a nitrogen silicide and boron-/phosphorus-doped amorphous silicon doped with functional elements; the multi-layer doping source structure has both a strong laser absorption capability and a high boron or phosphorus doping concentration, thereby facilitating a reduction in the laser power and the illumination time required by a laser selective emitter technique; moreover, such a multi-layer doping source structure is favorable for reducing the surface boron concentration, decreasing defects and improving the passivation effect of an emitter, and therefore an improvement in battery efficiency can be promoted.

Description

A multi-layer doping source structure, high-quality emitter and controllable preparation method thereof Technical Field

The present invention relates to the technical field of photovoltaic cells, and in particular to a multi-layer doping source structure, a high-quality emitter and a controllable preparation method thereof.

Background Art

Preparing a selective emitter (SE) on the front of a crystalline silicon cell is one of the effective methods to improve cell efficiency. Selective emitter refers to high-concentration doping at and near the contact point between the metal grid and the silicon wafer to reduce the contact resistance between the metal electrode and the silicon wafer; low-concentration doping in areas outside the electrode can reduce the recombination of the diffusion layer. The application of selective emitters can increase the open circuit voltage and fill factor of the cell, thereby improving the cell conversion efficiency. The use of lasers to prepare SE is a commonly used method in the industry, and has been industrially applied in p-type emitter passivation and back contact (PERC) cells, which can increase cell efficiency by about 0.3% to 0.4%.

For the next generation of industrial high-efficiency cells using n-type crystalline silicon substrates, the tunneling oxide passivation contact (TOPCon) cell, the laser doping process is still a problem. This is because the solid solubility of boron in silicon is lower than that of phosphorus. The boron source used in the current industrial laser SE technology is borosilicate glass (BSG) formed by the diffusion of BBr ₃ or BCl _3. The use of BSG as a boron source has the following problems: 1) The boron concentration in the BSG boron source is very low, and it is difficult to dope the boron atoms in it into silicon. 2) The solid solubility of boron in BSG is higher than that in silicon, which further increases the difficulty of introducing boron atoms in BSG into silicon. 3) Since the main component of BSG is silicon oxide, its high band gap and high transmittance material characteristics result in very low absorption utilization of lasers or basically no absorption. The existing industry uses green lasers around 532nm, and its mechanism is mainly to act on silicon wafers, heat BSG through the reverse thermal effect of silicon wafers, and introduce boron into the silicon surface. Its mechanism of action is not direct enough. 4) Using laser to promote the diffusion of boron requires very high power or very long irradiation time to achieve sufficient junction depth and square resistance, which can easily damage the suede structure on the surface of the silicon wafer. If the power is too low, the energy during promotion may be insufficient, and the laser will have difficulty in doping the boron in the BSG into the emitter layer, resulting in the metallization heavy doping area failing to meet the concentration requirements.

Patent document CN116130539A discloses a laminated solid-state doping source structure, which uses a dielectric layer/boron-doped amorphous silicon solid source for boron diffusion, which is expected to solve the problem of laser doping, but the dielectric layer is easily damaged at high temperatures, which reduces the passivation performance of the boron emitter. Patent document CN116994945A discloses a diffusion structure of dielectric layer/boron-doped silicon oxide/boron-doped amorphous silicon, which can avoid the formation of stacking fault defects during high-temperature annealing. The passivation effect of the boron emitter formed by this patented technology is improved, but due to the damage to the silicon substrate during the preparation of the dielectric layer, the difficulty in regulating the surface boron concentration of boron-doped silicon oxide, the difficulty in controlling the sheet resistance, and the low passivation quality, the comprehensive performance of the prepared emitter is not good, and there is still a lot of room for improvement.

Summary of the invention

In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is how to improve the laser absorption capacity of the doping source, while reducing the concentration of diffused elements on the emitter surface and improving the emitter passivation effect.

To solve the above problems, the first aspect of the present invention provides a multi-layer doping source structure, including a dielectric layer, a nitride silicon layer and a doping source layer stacked on the front side of a crystalline silicon substrate, the dielectric layer is a silicon oxide film or a silicon nitride film, the doping source layer is boron-doped amorphous silicon doped with functional elements or phosphorus-doped amorphous silicon doped with functional elements, and the functional elements doped in the doping source layer are carbon and/or nitrogen.

The present invention comprises a doping source structure composed of a dielectric layer, a nitrogen silicide and a boron/phosphorus-doped amorphous silicon doped with functional elements. The multi-layer doping source structure takes into account both strong laser absorption capability and high boron or phosphorus doping concentration, which is beneficial to reducing the laser power and illumination time required for laser SE technology. At the same time, the multi-layer doping source structure is beneficial to reducing the surface boron/phosphorus concentration, reducing defects, improving the emitter passivation effect, and promoting the improvement of battery efficiency.

Furthermore, the thickness of the doping source layer is 10 to 500 nm, the thickness of the nitride silicide layer is 1 to 100 nm, and the thickness of the dielectric layer is 1 to 3 nm. The existence of the dielectric layer can reduce interface defects, adjust the boron/phosphorus activation concentration in the non-laser area, and improve the passivation effect; nitride silicide can avoid the formation of stacking fault defects and adjust the boron/phosphorus diffusion concentration and depth; the doping source layer doped with functional elements has a stronger absorption capacity for lasers and can be effectively diffused under low-power lasers.

Furthermore, the nitrogen content in the nitride silicide layer is 0.5at% to 50at%. The nitride silicide layer has the following multiple functions: 1) avoiding crystal defects such as stacking faults caused by epitaxial growth of amorphous silicon relative to a single crystal silicon substrate during high temperature annealing, significantly improving the passivation effect of the emitter in the non-laser region; 2) nitride silicide has a good boron blocking effect, which can effectively reduce the surface boron concentration in the non-laser region, thereby further improving its passivation effect; 3) by adjusting the thickness and nitrogen content of the nitride silicide layer, the square resistance, junction depth and passivation performance can be adjusted.

Furthermore, the content of the functional elements in the doping source layer is 0.1at% to 10at%, and the boron/phosphorus doping concentration is 5E17 to 5E21cm ^-3 . The doping source layer contains a higher boron/phosphorus concentration and has a strong laser absorption ability. The doping of functional elements C and N can effectively reduce the crystallization rate of the film and the activation concentration of boron/phosphorus, reduce the emitter surface concentration, and improve the passivation performance.

A second aspect of the present invention provides a controllable preparation method for a high-quality emitter, using the above-mentioned multi-layer doping source structure, and the controllable preparation method comprises the following steps:

S1, preparing a dielectric layer on the front side of the crystalline silicon substrate;

S2, performing plasma treatment on the dielectric layer;

S3, depositing a nitride silicon layer on the surface of the dielectric layer;

S4, depositing a doping source layer on the surface of the nitride silicide layer to obtain a doping source structure;

S5, performing laser processing on the designed electrode region to diffuse boron or phosphorus into the crystalline silicon substrate;

S6, performing high temperature annealing treatment to cause secondary diffusion of boron or phosphorus in the laser treated area and diffusion of boron or phosphorus in the non-laser treated area;

S7. The remaining doping source structure is removed, and a selective emitter structure is formed on the front side of the crystalline silicon substrate.

Furthermore, in step S1, the dielectric layer is prepared by a method selected from a wet chemical method, a high temperature oxidation method, an ozone oxidation method, and a plasma-assisted oxidation method. The dielectric layer, as a barrier layer for boron/phosphorus diffusion, can effectively reduce the surface boron/phosphorus concentration in the non-laser region, thereby further improving its passivation effect; by adjusting the thickness of the dielectric layer, the square resistance and junction depth can be adjusted.

Furthermore, in step S2, the plasma is selected from one or more of H ₂ , Ar, N ₂ O, C ₂ O, and NH _3. Using plasma to treat the dielectric layer can improve its quality, adjust its chemical composition, and help improve its barrier effect.

Furthermore, the silicide nitride layer is prepared by chemical vapor deposition technology in step S3, and the doping source layer is prepared by chemical vapor deposition technology in step S4. The use of CVD technology to deposit the silicide nitride layer and the doping source layer avoids the use of a conventional _BBr3 thermal diffusion furnace, saves production costs, and can ensure uniform deposition, so that the emitter square resistance has a high uniformity.

Furthermore, in step S5, the source layer is surface treated by laser. The light absorption capacity of boron/phosphorus-doped amorphous silicon doped with functional elements is much greater than that of BSG, and more effective boron/phosphorus diffusion can be performed under the same laser power and irradiation time. Therefore, lower power and shorter irradiation time are used to achieve the same doping effect as the conventional BSG source layer, which is beneficial to reduce laser damage to the velvet surface and laser process costs.

Furthermore, in step S6, the high temperature process may cause the functional elements in the doping source structure to diffuse into the silicon substrate.

Further, the step S7 specifically includes: the step S7 specifically includes: using alkaline solution wet etching to remove the doping source layer, using hydrofluoric acid wet etching to nitride silicide layer and dielectric layer, and then using alkaline solution to etch the surface of silicon crystal silicon substrate, the alkaline solution is selected from one of KOH, NaOH, TMAH, ammonia and TMAH/IPA mixed solution. This step etches away the multi-layer doping source structure and removes a small amount of surface with high boron concentration and boron-related defects, which is beneficial to improving the passivation performance of the emitter.

The third aspect of the present invention provides a high-quality emitter, which is prepared by the above-mentioned controllable preparation method. The high-quality emitter prepared by the process of the present invention can effectively reduce the contact resistance between the emitter and the metal electrode, while reducing the recombination of the area outside the electrode, and the emitter passivation performance formed in the non-laser area after annealing is excellent. The square resistance of the laser-processed area of the selective emitter structure is adjustable in the range of tens to hundreds of Ω/sq, usually 40 to 150Ω/sq, and the square resistance of the non-laser-processed area is adjustable in the range of tens to thousands of Ω/sq, usually 100 to 350Ω/sq.

Furthermore, the high-quality emitter contains nitrogen, which can suppress micro defects in silicon when it enters the emitter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a doping source structure in a specific embodiment of the present invention.

FIG. 2 is a schematic flow chart of a method for preparing a selective emitter in a specific embodiment of the present invention.

FIG. 3 is a schematic diagram of the structure of a selective emitter in a specific embodiment of the present invention.

FIG4 is a comparison diagram of the absorption spectra of Example 1 of the present invention and Comparative Example 1.

FIG. 5 is a graph showing the selective emitter boron diffusion curve in Example 5 of the present invention.

FIG. 6 is a graph showing selective emitter boron diffusion curves in Example 9 of the present invention and Comparative Example 7.

Description of reference numerals:

1-crystalline silicon substrate, 2-dielectric layer, 3-nitrogen silicide layer, 4-doping source layer, 5-laser processed area, 6-non-laser processed area.

DETAILED DESCRIPTION

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. It should be noted that the following embodiments are only used to illustrate the implementation method and typical parameters of the present invention, and are not used to limit the parameter range described in the present invention. Reasonable changes derived therefrom are still within the scope of protection of the claims of the present invention.

It should be noted that the endpoints and any values of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values should be understood to include values close to these ranges or values. For numerical ranges, the endpoint values of each range, the endpoint values of each range and the individual point values, and the individual point values can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically disclosed in this article.

A specific embodiment of the present invention provides a multilayer doping source structure, as shown in FIG1, comprising a dielectric layer 2, a nitride silicon layer 3 and a doping source layer 4 stacked in sequence on the front side of a crystalline silicon substrate 1. The doping source structure is suitable for silicon wafers with different surface morphologies, including velvet, alkaline polished, acid polished, etc.

The dielectric layer 2 is a silicon oxide film or a silicon oxynitride film. In a specific embodiment, the thickness of the dielectric layer 2 is 1 to 3 nm. The presence of the dielectric layer 2 can adjust the boron/phosphorus activation concentration in the non-laser region and improve the passivation effect.

The doping source layer 4 is boron-doped amorphous silicon doped with functional elements or phosphorus-doped amorphous silicon doped with functional elements, and the functional elements are carbon and/or nitrogen, preferably carbon. In a specific embodiment, the thickness of the doping source layer 4 is 10-500 nm, the content of the functional elements in the doping source layer 4 is 0.1 at%-10 at%, and the boron/phosphorus doping concentration is 5E17-5E21 cm ^-3 .

Adding a silicide nitride layer 3 between the doping source layer 4 and the dielectric layer 2 can effectively inhibit the boron diffusion and defects on the surface of the silicon substrate in the non-laser area, and significantly increase the passivation effect of the boron/phosphorus emitter in the non-laser area. In a specific embodiment, the thickness of the silicide nitride layer 3 is 1 to 100 nm, and the nitrogen content in the silicide nitride layer 3 is 0.5 at% to 50 at%. By adjusting the thickness and nitrogen content of the silicide nitride layer 3, the square resistance, junction depth and passivation performance can be adjusted. In theory, the thinner the silicide nitride or the lower the nitrogen content, the smaller the square resistance, the deeper the junction depth, and the worse the passivation effect; the thicker the silicide nitride or the higher the nitrogen content, the larger the square resistance, the smaller the junction depth, and the better the passivation effect.

The above-mentioned doping source structure takes into account both strong laser absorption ability and high boron concentration, which is beneficial to reducing the laser power and illumination time required for laser SE technology. At the same time, this multi-layer doping source structure is beneficial to reducing the surface boron concentration, reducing defects, improving the emitter passivation effect, and promoting the improvement of battery efficiency.

The specific embodiment of the present invention also provides a method for preparing a high-quality emitter using the above-mentioned doping source structure. Taking an n-type crystalline silicon substrate as an example, a typical process flow is shown in FIG2 , and includes the following steps:

S0. Prepare an n-type silicon wafer, clean and texture the front side, and use it as a crystalline silicon substrate 1.

S1. Prepare a dielectric layer 2 on the front side of the crystalline silicon substrate 1. The dielectric layer 2 is a silicon oxide film or a silicon nitride film. The dielectric layer 2 is prepared by wet chemical method, high temperature oxidation method, ozone oxidation method, plasma assisted oxidation method and other methods to reduce interface defects.

S2. Plasma treatment is performed on the dielectric layer 2. The plasma is selected from one or more of _H2 , Ar, _N2O , _C2O , and _NH3 . The plasma treatment method is preferably PECVD. This step can improve the quality of the dielectric layer 2, adjust the chemical composition, and help improve its barrier effect.

S3. Depositing a nitride silicide layer 3 on the surface of the plasma-treated dielectric layer 2. The nitride silicide layer 3 is prepared by chemical vapor deposition techniques, including APCVD, LPCVD, PECVD, HWCVD, etc.

S4, depositing a doping source layer 4 on the surface of the nitride silicide layer 3, the doping source layer 4 being a boron/phosphorus-doped amorphous silicon film doped with carbon and/or nitrogen. The doping source layer 4 is prepared by chemical vapor deposition technology, including APCVD, LPCVD, PECVD, HWCVD, etc. After completing this step, a doping source structure consisting of the dielectric layer 2, the nitride silicide layer 3 and the doping source layer 3 is obtained.

S5. Laser treatment is performed on the designed electrode region to diffuse the boron/phosphorus of the doping source structure into the crystalline silicon substrate 1. This step can achieve the same doping effect as the conventional BSG source layer using lower power and shorter illumination time, which is beneficial to reducing laser damage to the texture surface and laser process cost.

S6. Perform high temperature annealing to cause secondary diffusion of boron/phosphorus in the laser processed area and diffusion of boron/phosphorus in the non-laser processed area. The high temperature process will diffuse the functional elements C and N in the doping source structure into the crystalline silicon substrate 1.

S7, remove the remaining doping source structure. A wet etching process is used. In a specific embodiment, the etching solution includes alkali solution and HF, wherein the alkali solution is selected from one of KOH, NaOH, TMAH, ammonia water and TMAH/IPA mixed solution, which has a large etching selectivity for amorphous silicon and nitride silicon. In the wet etching process, the doping source layer 4 can be etched away with alkali solution first, and then the nitride silicon layer 3 and the dielectric layer 2 are completely etched away using an HF system solution, and finally the surface of the crystalline silicon substrate 1 is etched again with alkali solution to remove a small amount of surface with high boron concentration and boron-related defects.

After completing the above steps, a laser-processed area 5 and a non-laser-processed area 6 with different doping concentrations are formed on the front side of the crystalline silicon substrate 1, and the structure is shown in FIG3, that is, a selective emitter structure is obtained. In addition to boron or phosphorus, nitrogen can also be detected in the selective emitter, and nitrogen can suppress micro-defects in silicon. If the functional elements of the doping source layer 4 include carbon, carbon can also be detected in the selective emitter. In a specific embodiment, the square resistance range of the laser-processed area 5 of the selective emitter structure prepared by the above method is adjustable in the range of tens to hundreds of Ω/sq, usually 40 to 150Ω/sq, and the square resistance of the non-laser-processed area 6 is adjustable in the range of tens to thousands of Ω/sq, usually 100 to 350Ω/sq.

The above method is also applicable to preparing laser-doped phosphorus emitters on p-type silicon wafers.

The technical scheme and technical effects of the present invention will be further described below through specific embodiments.

Example 1

Prepare an n-type quartz substrate, clean it, and use PECVD to treat the silicon oxide dielectric layer with _N2O / _H2 plasma. Then deposit a 5nm nitride silicide film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%).

Comparative Example 1

Prepare an n-type quartz substrate, clean it, and then deposit a 50nm borosilicate glass (BSG) film on the surface of the silicon wafer in a BBr ₃ diffusion furnace.

The light absorption spectra of the samples prepared in Example 1 and Comparative Example 2 were tested, and the results are shown in Figure 4. From the absorption spectrum of Figure 4, it can be seen that the carbon-doped boron-doped amorphous silicon deposited by PECVD has a much greater light absorption capacity than BSG, thus having a better laser doping effect.

Example 2

Prepare an n-type crystalline silicon substrate, clean it and make a texturing. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 50W, scanning rate is 30m/s) to carry out boron driving treatment. Clean and etch to remove the source layer.

Example 3

Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m/s) to carry out boron driving treatment. Clean and etch to remove the source layer.

Comparative Example 2

Prepare n-type crystalline silicon substrate, clean and texturize it. Place the crystalline silicon substrate in a BBr ₃ diffusion furnace to deposit a 50nm borosilicate glass (BSG) film. Use a nanosecond pulse laser with a wavelength of 325nm (laser power of 50W, scanning rate of 30m/s) to push boron on it. Clean and etch to remove the source layer.

Comparative Example 3

Prepare n-type crystalline silicon substrate, clean and texturize it. Place the crystalline silicon substrate in a BBr ₃ diffusion furnace to deposit a 50nm borosilicate glass (BSG) film. Use a nanosecond pulse laser with a wavelength of 325nm (laser power of 25W, scanning rate of 15m/s) to push boron on it. Clean and etch to remove the source layer.

The square resistance and junction depth of the laser processed area of the samples prepared in Example 2-3 and Comparative Example 2-3 were tested, and the results are shown in Table 1 below.

Table 1. Sample laser processing area square resistance, junction depth

It can be seen from the test results in Table 1 that under the same laser conditions, the dielectric layer/nitrogen silicide/carbon-doped boron-doped amorphous silicon doping source structure can be doped more effectively; under low laser power conditions, the BSG boron source is difficult to dope, while the dielectric layer/nitrogen silicide/doped boron-doped amorphous silicon boron source can still achieve a good doping effect.

Example 4

Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 5at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution to selectively etch the boron source layer, then use HF to etch the nitride silicon film and the dielectric layer, and finally use KOH solution to etch the surface of the silicon substrate. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

Example 5

Prepare an n-type crystalline silicon substrate, clean it and make a texturing. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing treatment at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate. The boron diffusion curve of the selective emitter prepared in this embodiment is shown in Figure 5, and its square resistance is 219Ω/Sq.

Example 6

Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 25at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

Example 7

Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110℃ HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to treat the silicon oxide dielectric layer with N ₂ O/H ₂ plasma. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 15at%). Perform annealing at 1000℃ for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate. Use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

Example 8

Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 25at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

Comparative Example 4

Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Then deposit a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform annealing at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface.

Comparative Example 5

Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform annealing treatment at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface.

Comparative Example 6

Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C _HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform _N2O / _H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform annealing treatment at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface.

The emitter square resistance, junction depth, single-sided saturation current density (J _0,s ) and implicit open circuit voltage (iV _oc ) of the emitter passivation sheets prepared in Examples 4-8 and Comparative Examples 4-6 were tested and the results are shown in Table 2 below.

Table 2. Key parameters of emitter in non-laser treated area of passivation film

It can be seen from the test results in Table 2 that plasma treatment of the silicon oxide dielectric layer and adding a nitride silicide layer between the silicon oxide and the boron-doped amorphous silicon can effectively inhibit the boron diffusion and defects on the surface of the silicon substrate in the non-laser area, and significantly increase the passivation effect of the boron emitter in the non-laser area.

Example 9

Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m/s) to carry out boron advancement treatment, followed by a high temperature annealing treatment of 1000°C for 240min to form a heavily doped structure. Then use KOH solution and HF alternately to selectively etch the boron source layer.

Comparative Example 7

Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a BBr ₃ diffusion furnace to deposit a BSG layer of about 50nm on the front side. Use a nanosecond pulse laser with a wavelength of 325nm (laser power of 25W, scanning rate of 15m/s) to carry out boron advancement treatment, followed by annealing at 1000℃ for 240min to form a heavily doped structure. Then alternately use KOH solution and HF to selectively etch the boron source layer.

The boron diffusion curve and square resistance of the emitters prepared in Example 9 and Comparative Example 7 were tested using ECV and four-probe, and the results are shown in Figure 6. From the test results, it can be seen that, compared with borosilicate glass, the multilayer doping source structure of the present invention can obtain a higher boron concentration and junction depth under the same laser and annealing conditions, and perform more effective doping.

Example 10

Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m/s) to carry out boron advancement treatment on the designed electrode area. The whole is annealed at 1000°C for 240 minutes to form a selective emitter structure. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface. Use screen printing to print metal electrodes in the electrode area and perform belt furnace sintering.

Comparative Example 8

Prepare n-type crystalline silicon substrate, texturing on the front, polishing on the back, and performing standard RCA cleaning. Use BBr ₃ thermal diffusion method to form a boron emitter on the silicon wafer. After etching away the boron source layer, the surface is passivated by using aluminum oxide and silicon nitride. Then use screen printing to print metal electrodes in the electrode area and perform belt furnace sintering.

The performance of the selective emitter prepared in Example 10 and the conventional boron emitter prepared in Comparative Example 8 were tested. The test contents included the overall current density (J _0,total ), the current density (J _0,met ) and contact resistivity (ρ _c,met ) of the electrode contact area, and the diffusion zone square resistance (R _sq ) and current density (J _0,pass ) of the non-electrode contact area. The results are shown in Table 3 below.

Table 3 Performance comparison of selective emitter and conventional boron emitter

It can be seen from the test results in Table 3 that the overall passivation performance, the passivation performance of the electrode contact area and the passivation performance of the non-electrode contact area of the selective emitter structure prepared in Example 10 are significantly better than those of the boron emitter prepared by the conventional method.

Embodiment 11

Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO ₃ solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to perform N ₂ O/H ₂ plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m/s) to carry out boron advancement treatment on the designed electrode area. The whole is annealed at 1000°C for 240 minutes to form a selective emitter structure. Then alternately use KOH solution and HF to selectively etch the boron source layer. Use 110°C nitric acid to treat the back side of the silicon wafer for 15 minutes, and grow about 1.5nm of silicon oxide on the back side of the silicon wafer. An 80nm phosphorus-doped amorphous silicon layer is deposited on the back of the silicon wafer using tubular PECVD, and annealed at 840℃ for 30min to form a TOPCon structure. The front side is passivated with aluminum oxide and silicon nitride. Electrodes on both sides are screen-printed and sintered in a belt furnace.

Comparative Example 9

Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Use the BBr ₃ thermal diffusion method to form a boron emitter on the silicon wafer on the front side of the crystalline silicon substrate. After RCA cleaning, use 110℃ nitric acid to treat for 15 minutes to grow about 1.5nm of silicon oxide on the back side of the silicon wafer. Use tubular PECVD to deposit a 60nm phosphorus-doped amorphous silicon layer on the back of the silicon wafer, and anneal at 840℃ for 30 minutes to form a TOPCon structure. Use aluminum oxide and silicon nitride to passivate the front side. Screen print electrodes on both sides and perform belt furnace sintering.

Key parameters of the TOPCon cells prepared in Example 11 and Comparative Example 9 were tested, including open circuit voltage (V _oc ), short circuit current (J _sc ), fill factor (FF) and conversion efficiency (PCE). The results are shown in Table 4 below.

Table 4 Comparison of key parameters of TOPCon batteries of Example 11 and Comparative Example 9

The test results in Table 4 prove that the selective emitter prepared by the method shown in this patent significantly improves the open circuit voltage and fill factor of the battery. The efficiency of the prepared TOPCon battery can be improved by about 0.33% compared with the battery without a selective emitter.

Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims (12)

A multi-layer doping source structure, characterized in that it includes a dielectric layer, a nitride silicon layer and a doping source layer stacked on the front side of a crystalline silicon substrate, the dielectric layer is a silicon oxide film or a silicon oxynitride film, the doping source layer is boron-doped amorphous silicon doped with functional elements or phosphorus-doped amorphous silicon doped with functional elements, and the functional element doped in the doping source layer is carbon and/or nitrogen. The multi-layer doping source structure according to claim 1 is characterized in that the thickness of the doping source layer is 10 to 500 nm, the thickness of the nitride silicon layer is 1 to 100 nm, and the thickness of the dielectric layer is 1 to 3 nm. The multi-layer doping source structure according to claim 1 or 2 is characterized in that the content of nitrogen in the nitride silicide layer is 0.5at% to 50at%. The multilayer doping source structure according to claim 1 or 2, characterized in that the content of the functional element in the doping source layer is 0.1at% to 10at%, the boron doping concentration is 5E17 to 5E19cm ^-3 , or the phosphorus doping concentration is 5E17 to 1E20cm ^-3 . A controllable preparation method for a high-quality emitter, characterized in that the multilayer doping source structure according to any one of claims 1 to 4 is used, and the controllable preparation method comprises the following steps: S1, preparing a dielectric layer on the front side of the crystalline silicon substrate; S2, performing plasma treatment on the dielectric layer; S3, depositing a nitride silicon layer on the surface of the dielectric layer; S4, depositing a doping source layer on the surface of the nitride silicide layer to obtain a doping source structure; S5, performing laser processing on the designed electrode region to diffuse boron or phosphorus into the crystalline silicon substrate; S6, performing high temperature annealing treatment to cause secondary diffusion of boron or phosphorus in the laser treated area and diffusion of boron or phosphorus in the non-laser treated area; S7. The remaining doping source structure is removed, and a selective emitter structure is formed on the front side of the crystalline silicon substrate. The controllable preparation method of a high-quality emitter according to claim 5 is characterized in that in the step S1, the preparation method of the dielectric layer is selected from one of a wet chemical method, a high-temperature oxidation method, an ozone oxidation method, and a plasma-assisted oxidation method. The controllable preparation method of a high-quality emitter according to claim 5, characterized in that in step S2, the plasma is selected from one or more of H ₂ , Ar, N ₂ O, C ₂ O, and NH ₃ . The controllable preparation method of a high-quality emitter according to claim 5 is characterized in that the nitride silicon layer is prepared by chemical vapor deposition technology in step S3, and the doping source layer is prepared by chemical vapor deposition technology in step S4. The controllable preparation method of a high-quality emitter according to claim 5 is characterized in that in step S6, the high-temperature annealing treatment temperature is 800-1200°C. According to the controllable preparation method of the high-quality emitter according to claim 5, it is characterized in that the step S7 specifically comprises: using alkaline solution wet etching to remove the doping source layer, using hydrofluoric acid wet etching to nitride silicon layer and dielectric layer, and then using alkaline solution to etch the surface of silicon crystal silicon substrate. A high-quality emitter, characterized in that it is made by the controllable preparation method according to any one of claims 5-10. The high-quality emitter according to claim 11, characterized in that the high-quality emitter contains nitrogen.