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WO2025142011A1 - Procédé de fabrication d'élément métallique et élément de moule - Google Patents

Procédé de fabrication d'élément métallique et élément de moule Download PDF

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Publication number
WO2025142011A1
WO2025142011A1 PCT/JP2024/035334 JP2024035334W WO2025142011A1 WO 2025142011 A1 WO2025142011 A1 WO 2025142011A1 JP 2024035334 W JP2024035334 W JP 2024035334W WO 2025142011 A1 WO2025142011 A1 WO 2025142011A1
Authority
WO
WIPO (PCT)
Prior art keywords
metal
laminate
manufacturing
mask layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2024/035334
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English (en)
Japanese (ja)
Inventor
翔 鎌田
正尚 菊池
直哉 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
Original Assignee
Dexerials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dexerials Corp filed Critical Dexerials Corp
Publication of WO2025142011A1 publication Critical patent/WO2025142011A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00—Electroforming
    • C25D1/10—Moulds; Masks; Masterforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes

Definitions

  • This disclosure relates to a manufacturing method for metal components and mold components.
  • the semiconductor element in order to dissipate the heat generated by the semiconductor element when current is applied outside the system, the semiconductor element is mounted on a heat dissipation substrate, and the heat dissipation substrate is thermally attached to a heat sink (heat dissipation fins), so that the heat generated by the semiconductor element when current is applied is transferred to the heat sink and dissipated to the outside.
  • a heat sink heat dissipation fins
  • FIG. 4 is a diagram showing an example of the configuration of a semiconductor device 1, taking as an example a power semiconductor device of an IGBT (Insulated Gate Bipolar Transistor) module.
  • a ceramic substrate 3 is joined to one surface of a heat dissipation substrate 4 with a solder bonding material 7.
  • a semiconductor element 2 IGBT
  • the semiconductor element 2 and the ceramic substrate 3 are sealed in a package case 5.
  • a heat sink 6 is attached to the other surface side of the heat dissipation substrate 4.
  • heat generated by the semiconductor element 2 is dissipated via the ceramic substrate 3, the heat dissipation substrate 4, and the heat sink 6, as indicated by the white arrow in FIG. 4.
  • solder is used to join the wiring, but solder has a high resistance and generates heat.
  • methods such as wafer-to-wafer hybrid bonding, which directly bonds copper to copper, have been developed.
  • this method has issues such as the need for large-scale equipment, wasted space if the wafers being bonded are not the same size, and the need for an extremely high degree of flatness on the wafer surface, making it less versatile.
  • Patent Document 1 describes a method of producing silver nanowires using silver precipitation in a solution. Also, Non-Patent Document 1 describes a method of producing nano-sized metal components using porous alumina as a mold.
  • the purpose of this disclosure is to provide a metal component manufacturing method and a metal component that can produce a metal component having a desired shape.
  • a method for manufacturing a metal member is a method for manufacturing a metal member made of a specified metal and having a desired shape, and includes the steps of: preparing a laminate in which a mask layer having a groove portion of the desired shape exposing the conductive substrate is formed on a conductive substrate; performing a plating process to form a metal layer made of the specified metal on the laminate by electrolytic plating; and isolating the metal layer formed in the groove portion from the laminate after the plating process.
  • the conductive substrate is a metal plate or a conductive film on which a conductive layer made of a conductive material is formed.
  • the mask layer is formed by lithography or transfer.
  • the metal member according to one embodiment is manufactured by the manufacturing method described above.
  • FIG. 1 is a flowchart illustrating a method for manufacturing a metal member according to an embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram (part 1) for explaining a method for manufacturing a metal member according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram (part 2) for explaining a method for manufacturing a metal member according to an embodiment of the present disclosure.
  • FIG. 13 is an example of a schematic diagram (part 3) for explaining a method for manufacturing a metal member according to an embodiment of the present disclosure.
  • FIG. 11 is another example of a schematic diagram (part 3) for explaining a manufacturing method of a metal component according to an embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram (part 1) for explaining a method for manufacturing a metal member according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram (part 2) for explaining a method for manufacturing a metal member according to an embodiment of the present disclosure.
  • FIG. 13 is an example of a schematic diagram (part 3) for explaining
  • a method for manufacturing a metal member according to one embodiment of the present disclosure will be described with reference to the flow chart shown in FIG. 1 and the schematic diagrams shown in FIGS. 2A to 2D.
  • the method for manufacturing a metal member according to this embodiment makes it possible to manufacture a metal member having a desired shape that can be drawn in two dimensions, such as a triangle, a rectangle, a line, a circle, a cross, a star, an ellipse, a Y-shape, or a Z-shape.
  • a conductive substrate 10 is prepared (step S11).
  • the conductive substrate 10 is, for example, a conductive film having an inorganic film 12 provided on a base film 11, as shown in FIG. 2A.
  • the inorganic film 12 is made of a metal having electrical conductivity.
  • the inorganic film 12 is made of a metal such as copper, silver, gold, aluminum, zinc, or nickel.
  • the inorganic film 12 may also be made of an alloy of these metals.
  • the metals constituting the inorganic film 12 are not limited to the above-mentioned examples, but it is preferable to use copper or silver, which have particularly high electrical conductivity.
  • the inorganic film 12 is formed on the substrate film 11 by, for example, sputtering, chemical vapor deposition, or atomic layer deposition. From the standpoints of density, productivity, and the number of applicable metal species, it is preferable to use a sputtering method for manufacturing the inorganic film 12.
  • a laminate 30 is produced in which a mask layer 20 is formed on a prepared conductive substrate 10 (step S12). As shown in FIG. 2B, the mask layer 20 has a groove 21 that exposes the conductive substrate 10. The groove 21 has the same shape as the metal component to be manufactured. That is, a laminate 30 is produced in which a mask layer 20 having a groove 21 of a desired shape that exposes the conductive substrate 10 is formed on the conductive substrate 10.
  • the mask layer 20 may be an inorganic film made of an inorganic substance, an organic film made of an organic substance, or a hybrid film made of an inorganic substance and an organic substance. From the viewpoints of ease of handling, throughput, and shape control, the mask layer 20 is preferably an organic film or a hybrid film, and more preferably an organic film.
  • the grooves 21 having the desired shape in the mask layer 20 can be formed by techniques such as lithography, ablation, transfer, or inkjet. From the viewpoints of productivity and resolution, it is preferable to form the grooves 21 by lithography, ablation, or transfer, and it is more preferable to use lithography or transfer.
  • Positive resists that can be used include resists using naphthoquinone diazide and its derivatives, resists using phenolic resins such as novolak and resol, acetals using acid generators, chemically amplified resists using secondary and/or tertiary esters, sulfonic acid ester resists, and resists in which inter-polymer bonds are cleaved with acid.
  • Water, water-based, organic solvents, organic alkaline systems, etc. can be used to develop the resist after exposure.
  • negative resists cation-curing systems such as epoxy or oxetane, radical-curing systems, acid and/or radical-curing styrene-based systems, dehydration systems or photodimerization systems of methylol or hydroxyl groups and carboxyl groups can be used.
  • negative resists resists that harden or reduce alkali solubility in the exposed areas of negative tone imaging can be used.
  • acrylic resin phenolic resin, urethane resin, amide resin, imide resin, urea resin, styrene resin, or oligomers or monomers of the above-mentioned resins can be used.
  • a transfer method it is preferable to use a nanoimprint method in which the above-mentioned resin is applied to a base material, and then a substrate on which a fine uneven shape (desired shape) is formed is pressed against the base material to transfer the shape.
  • Heat curing or photocuring can be used to harden the resin with the transferred shape.
  • the shape can be transferred by promoting the polymerization reaction using at least one of a photopolymerization initiator and a thermal polymerization initiator.
  • a substrate on which a fine shape (desired shape) is formed a film mold or a quartz substrate can be used.
  • a metal layer 40 made of a predetermined metal (the metal constituting the metal member to be manufactured) is formed on the laminate 30 by electrolytic plating as shown in FIG. 2C (step S13).
  • metals that can be plated include nickel, gold, silver, copper, tin, platinum, and indium. From the viewpoint of electrical conductivity and thermal conductivity, gold, silver, copper, or nickel is preferable as the metal constituting the metal layer 40.
  • the metal layer 40 may also be formed by sequentially plating different metals. In this case, a layer made of a different metal may be formed between two layers made of one metal.
  • a metal component made of a specified metal and having a desired shape can be manufactured.
  • Figure 3A is an SEM image taken near the curved part of a pattern with a groove width of 20 ⁇ m.
  • Figure 3B is an SEM image taken at a higher magnification of one groove.
  • a metal layer was formed not only on the straight straight line sections, but also on the curved sections with a curvature R.
  • a metal layer was formed with a width equivalent to the width of the grooves formed in the mask layer. This confirmed that it is possible to manufacture metal components with the desired shape by forming grooves in the mask layer to match the shape of the metal component to be manufactured, forming a metal layer in the grooves by plating, and isolating the formed metal layer.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

Un procédé de fabrication d'un élément métallique selon la présente divulgation comprend : une étape de fabrication d'un stratifié, dans lequel une couche de masque est formée sur un substrat conducteur, la couche de masque ayant une rainure d'une forme souhaitée pour mettre à nu le substrat conducteur ; une étape de placage pour former une couche métallique, qui est constituée d'un métal prescrit, sur le stratifié par électrodéposition ; et une étape d'isolation de la couche métallique, qui a été formée dans la rainure, du stratifié après le placage.
PCT/JP2024/035334 2023-12-25 2024-10-02 Procédé de fabrication d'élément métallique et élément de moule Pending WO2025142011A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023218561A JP2025101601A (ja) 2023-12-25 2023-12-25 金属部材の製造方法および金型部材
JP2023-218561 2023-12-25

Publications (1)

Publication Number Publication Date
WO2025142011A1 true WO2025142011A1 (fr) 2025-07-03

Family

ID=96217321

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2024/035334 Pending WO2025142011A1 (fr) 2023-12-25 2024-10-02 Procédé de fabrication d'élément métallique et élément de moule

Country Status (3)

Country Link
JP (1) JP2025101601A (fr)
TW (1) TW202525459A (fr)
WO (1) WO2025142011A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52152832A (en) * 1976-06-15 1977-12-19 Int Nickel Co Method of producing ordinary electrolytic nickel or annular nickel product from electroplating bath providing precipitates of large stress
JPH11323592A (ja) * 1998-05-14 1999-11-26 Athene Kk 電鋳金属体およびその製造方法
WO2001071065A1 (fr) * 2000-03-22 2001-09-27 Citizen Watch Co., Ltd. Structure à trous et procédé de fabrication
WO2013153578A1 (fr) * 2012-04-12 2013-10-17 株式会社Ｌｅａｐ Procédé pour la fabrication de composants par électroformage

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52152832A (en) * 1976-06-15 1977-12-19 Int Nickel Co Method of producing ordinary electrolytic nickel or annular nickel product from electroplating bath providing precipitates of large stress
JPH11323592A (ja) * 1998-05-14 1999-11-26 Athene Kk 電鋳金属体およびその製造方法
WO2001071065A1 (fr) * 2000-03-22 2001-09-27 Citizen Watch Co., Ltd. Structure à trous et procédé de fabrication
WO2013153578A1 (fr) * 2012-04-12 2013-10-17 株式会社Ｌｅａｐ Procédé pour la fabrication de composants par électroformage

Also Published As

Publication number Publication date
JP2025101601A (ja) 2025-07-07
TW202525459A (zh) 2025-07-01

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