WO2025025990A1 - Data processing method and apparatus, communication device, and computer-readable storage medium - Google Patents

Abstract

The present application provides a data processing method, a data processing apparatus, a communication device, and a computer-readable storage medium. The data processing method comprises: forming first data frames on the basis of service data of component carriers and caching the first data frames; mapping the first data frames to activated M physical transmission channels; performing high-speed serial communication coding on the data mapped to the activated physical transmission channels; performing bit-width conversion on the data subjected to the high-speed serial communication coding; caching the data subjected to the bit-width conversion; performing first physical layer processing on the data subjected to the bit-width conversion; when the number of the cached first data frames is less than or equal to a first preset threshold, stopping mapping the first data frames to the activated M channels; determining whether the data subjected to the bit-width conversion and cached on each activated physical transmission channel is empty; if the cached data subjected to the bit-width conversion is empty, stopping performing first physical layer processing on the data subjected to the bit-width conversion; and controlling to enter a power saving mode.

Description

Data processing method and device, communication equipment, and computer-readable storage medium

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to Chinese patent application No. 202310961630.4 filed on July 31, 2023, the contents of which are incorporated herein by reference in their entirety.

Technical Field

The embodiments of the present application relate to the field of communication technology, and in particular, to a data processing method, a data processing apparatus, a communication device, and a computer-readable storage medium.

Background Art

Existing radio frequency (RF) interface transmission technologies mainly include stream transmission represented by JESD204 and packet transmission represented by DigRF V4 of Mobile Industry Processor Interface (MIPI). Both transmission methods have the problem of high power consumption.

Public Content

In a first aspect, an embodiment of the present application provides a data processing method, including: forming a first data frame according to business data of a carrier unit, caching the first data frame; mapping the first data frame to M activated physical transmission channels; M is an integer greater than or equal to 1; performing high-speed serial communication encoding on the data mapped to each activated physical transmission channel; performing bit width conversion on the data after the high-speed serial communication encoding on each activated physical transmission channel; caching the bit width converted data on each activated physical transmission channel; performing first physical layer processing on the bit width converted data on each activated physical transmission channel; determining whether the number of cached first data frames is less than or equal to a first preset threshold; and stopping mapping the first data frame to the activated M if the number of cached first data frames is less than or equal to the first preset threshold. physical transmission channels; respectively determine whether the bit-width converted data cached on each activated physical transmission channel are all empty; when the number of cached first data frames is less than or equal to the first preset threshold and the bit-width converted data cached on all activated physical transmission channels are all empty, stop the first physical layer processing of the bit-width converted data on each activated physical transmission channel respectively; control to enter the power saving mode.

In a second aspect, an embodiment of the present application provides a data processing device, including: a framing unit, configured to compose a first data frame according to the business data of a carrier unit; a mapping unit, configured to map the first data frame to M activated physical transmission channels; M is an integer greater than or equal to 1; high-speed serial communication encoding is performed on the data mapped to each activated physical transmission channel respectively; a bit width conversion unit, configured to perform bit width conversion on the data after high-speed serial communication encoding on the corresponding physical transmission channel; cache the data after bit width conversion on the corresponding physical transmission channel; a physical sending unit, configured to perform first physical layer processing on the data after bit width conversion on each activated physical transmission channel respectively; and send the corresponding first physical layer processed data through the activated physical transmission channel. data; a power-saving control unit configured to cache the first data frame, and determine whether the number of cached first data frames is less than or equal to a first preset threshold; when the number of cached first data frames is less than or equal to the first preset threshold, stop outputting the cached first data frames to the mapping unit; determine whether the bit-width converted data cached on each activated physical transmission channel are all empty; when the number of cached first data frames is less than or equal to the first preset threshold, and the bit-width converted data cached on all activated physical transmission channels are all empty, control the bit-width conversion unit to stop outputting the cached bit-width converted data to the physical sending unit, and control the mapping unit, the bit-width conversion unit, and the physical sending unit to enter a power-saving mode.

In a third aspect, an embodiment of the present application provides a communication device, including: the above-mentioned data processing device.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, wherein the computer program is executed by a processor so that the processor implements the above-mentioned data processing method.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a flow chart of a data processing method provided in an embodiment of the present application;

FIG2 is a schematic diagram of the composition of a data frame according to an embodiment of the present application;

FIG3 is a schematic diagram of the composition of the payload of a data frame according to an embodiment of the present application;

FIG4 is a flow chart of a data processing method provided in an embodiment of the present application;

FIG5 is a block diagram of a data processing device according to an embodiment of the present application;

FIG6 is a block diagram of the composition of a data processing device provided in an embodiment of the present application.

DETAILED DESCRIPTION

In order to enable those skilled in the art to better understand the technical solution of the present application, the data processing method, data processing device, communication equipment, and computer-readable storage medium provided by the present application are described in detail below in conjunction with the accompanying drawings.

Some example embodiments will be described more fully below with reference to the accompanying drawings, but the example embodiments may be embodied in different forms, and the present application should not be construed as being limited to the embodiments set forth herein. The purpose of providing these embodiments is to make the present application more thorough and complete, and to enable those skilled in the art to fully understand the scope of the present application.

In the absence of conflict, the various embodiments of the present application and the various features therein may be combined with each other.

As used herein, the term "and/or" includes any and all combinations of at least one of the associated listed items.

The terms used herein are only used to describe specific embodiments and do not limit the present application. As used herein, the singular forms "a", "an" and "the" also include plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms "comprising" and/or "made of" are used in this specification, it is specified that there are specific features, wholes, steps, operations, elements and/or components, but it does not exclude the presence or addition of at least one other feature, whole, step, operation, element, component and/or its group.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this application, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined herein.

JESD204 and other streaming transmission methods do not allow changes to service configurations, addition of new service connections, or deletion of existing service connections once a transmission connection is established, which poses a challenge to the flexible scheduling of services by terminal chips. If the terminal uses the JESD204 interface as the RF interface between the digital baseband (DBB) chip and the RF chip, the RF interface must be configured to the maximum service combination that may occur in the entire life cycle of the current application scenario during the system initialization phase, and then a transmission connection is established between the DBB chip and the RF chip at a fixed sampling rate and a fixed transmission rate. When the service combination changes and the service traffic becomes smaller, the RF interface must send and receive data at the maximum traffic by sending invalid data. Therefore, the smaller the service traffic, the more serious the waste of the RF interface's bearer bandwidth, which ultimately manifests as the lack of competitiveness of the DBB chip and the RF chip in terms of power consumption and flexibility. In addition, the JESD204 interface does not allow data and control information to be transmitted on the same physical transmission channel (Lane). This requires that in addition to the RF interface, there must also be a supporting control information transmission interface, such as the Serial Peripheral Interface (SPI). Although this interface is not large in scale, it will still have an adverse effect on the chip area and input and output (IO).

The advantage of packet transmission methods such as DigRF V4 is that it can adaptively match the RF interface bearer bandwidth and service bandwidth through energy-saving mode, and also supports data and control information co-transmission in the same lane. At the same time, since all transmissions share the underlying high-speed Lane resources with large bandwidth, the utilization efficiency of the physical (PHY, PHYsical) transmission bandwidth is greatly improved. However, the biggest problem at present is that it cannot solve the problem of fixed transmission delay after restoration or new link under the conditions of service addition, deletion or reconfiguration.

In addition, both of the above two transmission modes have the problem of high power consumption.

The data processing method provided in the embodiment of the present application can be applied to two chips in a communication device that need to transmit data. The communication device can be a terminal, a base station, or other communication devices. The chip types can include DBB chips, RF chips, RF front-end (RFFE, RF Front End) chips, power management chips (PMIC, Power Management Integrated Circuit), etc.

The DBB chip mainly completes the protocol stack and physical layer baseband signal processing of modems of various wireless standards.

RF chips are mainly used to filter and amplify wireless signals and distribute antenna data. RF switch control and other functions.

FIG1 is a flow chart of a data processing method provided in an embodiment of the present application.

In a first aspect, referring to FIG. 1 , an embodiment of the present application provides a data processing method, which can be executed by a first interface module in a first chip in a communication device. The first chip can be any chip that needs to perform data transmission, such as any of the above chips.

The data processing method may include steps 100 to 102 .

Step 100, compose a first data frame according to the service data of a component carrier (CC), cache the first data frame; map the first data frame to M activated physical transmission channels; M is an integer greater than or equal to 1; perform high-speed serial communication encoding on the data mapped to each activated physical transmission channel; perform bit width conversion on the high-speed serial communication encoded data on each activated physical transmission channel; cache the bit width converted data on each activated physical transmission channel; perform first physical layer processing on the bit width converted data on each activated physical transmission channel.

In some embodiments, forming a first data frame based on the service data of the carrier unit includes: obtaining the service data of k CCs currently activated; k is an integer greater than or equal to 1; forming a periodic data pattern based on the service data of the k CCs currently activated; the periodic data pattern includes at least part of the service data of the k CCs currently activated; forming a first data frame based on the periodic data pattern; the payload of the first data frame includes: N periodic data patterns; N is an integer greater than or equal to 1.

In some implementations, obtaining the service data of the k currently activated CCs includes: receiving the service data of all CCs; caching the service data of the k currently activated CCs in the service data of all CCs; and obtaining the service data of the k currently activated CCs from the cached service data.

In some implementations, when the first chip is a DBB chip, service data of all CCs may be received from a Modem in the first chip.

In some embodiments, at least part of the service data of the k currently activated CCs are interleaved in proportion within a periodic data pattern. As shown in FIG3 , at least part of the service data of the three currently activated CCs, i.e., the service data of CC0, the service data of CC1, and the service data of CC2, are interleaved in proportion within a periodic data pattern.

In some implementations, the ratio of the service data volumes of the k CCs included in the periodic data pattern is determined according to the air interface throughputs of the k CCs.

In some implementations, when a CC is transmitted through B antennas, the air interface throughput of the CC is B times the service sampling rate of the CC, where B is an integer greater than or equal to 1.

In some implementations, the periodically arranged data pattern includes a ratio of service data volumes of k CCs that is a ratio of air interface throughputs of the k CCs.

For example, three CCs are currently activated, the service data of the first CC (i.e., CC0) is transmitted through two antennas, and the service sampling rate is 122.88 MHz. The service data of the second CC (i.e., CC1) is transmitted through four antennas, and the service sampling rate is 30.72 MHz. The service data of the third CC (i.e., CC2) is transmitted through four antennas, and the service sampling rate is 15.36 MHz. Then, the air interface throughput of CC0 is 2×122.88, the air interface throughput of CC1 is 4×30.72, and the air interface throughput of CC1 is 4×15.36. D_CC0:D_CC1:D_CC2=4:2:1, D_CC0 is the air interface throughput of CC0, D_CC1 is the air interface throughput of CC1, and D_CC2 is the air interface throughput of CC2.

Then, a data pattern of one arrangement period may include 4 bytes of CC0 service data, 2 bytes of CC1 service data, and 1 byte of CC2 service data. A data pattern of one arrangement period may also include 8 bytes of CC0 service data, 4 bytes of CC1 service data, and 2 bytes of CC2 service data. And so on, as long as the ratio of the service data volume of k CCs included in the data pattern of the arrangement period is the ratio of the air interface throughput of the k CCs.

In some embodiments, as shown in FIG2 , the first data frame includes a start of frame (SOF, Start Of Frame), a frame header (Header), a payload (PayLoad), a cyclic redundancy check (CRC, Cyclic Redundancy Check), and an end of frame (EOF, End OF Frame).

In some implementations, SOF indicates the start of a frame.

In some implementations, the Header is used to identify characteristics of the current frame.

In some implementations, the CRC is a CRC checksum generated based on the Header and the Payload.

In some implementations, EOF indicates the end position of a frame.

In some implementations, the payload of the first data frame further includes: A padding bytes; A is an integer greater than or equal to 0.

In some implementations, as shown in FIG. 3 , when the data patterns of N arrangement periods are insufficient to fill the payload of the first data frame, A padding bytes may be added to the payload of the first data frame to complete the framing.

In some embodiments, the mapping method of mapping the first data frame to the M activated physical transmission channels and the encoding method of performing high-speed serial communication encoding on the data mapped to each activated physical transmission channel can refer to the mapping method and encoding method in the DigRF V4 interface specification of MIPI.

In some implementations, the high-speed serial communication encoding may be, for example, 8B/10B encoding, 64B/66B encoding, 128B/132B encoding, or the like.

In some implementations, bit width conversion refers to converting the bit width of data encoded by high-speed serial communication into a bit width required for subsequent processing.

In some implementations, the first physical layer processing includes parallel-to-serial conversion, transmit filtering, and de-emphasis.

Step 101, determine whether the number of cached first data frames is less than or equal to a first preset threshold; when the number of cached first data frames is less than or equal to the first preset threshold, stop mapping the first data frames to the activated M physical transmission channels.

In some embodiments, when the number of cached first data frames is greater than a first preset threshold, no processing is performed, and the data processing process of the original flow continues to be executed, that is, the first data frame continues to be mapped to the activated M physical transmission channels, as well as subsequent data processing steps.

Step 102, respectively determine whether the data after bit width conversion cached on each activated physical transmission channel are all empty; when the number of cached first data frames is less than or equal to the first preset threshold and the data after bit width conversion cached on all activated physical transmission channels are all empty, stop performing the first physical layer processing on the data after bit width conversion on each activated physical transmission channel respectively; and control to enter the power saving mode.

In some embodiments, when the data after bit width conversion cached on at least one activated physical transmission channel is not empty, no processing is performed and the data processing process of the original flow continues to be executed, that is, the first physical layer processing of the data after bit width conversion on each activated physical transmission channel continues to be executed respectively.

In some embodiments, the physical transmission channels on each activated physical transmission channel are stopped. After the bit width converted data is processed by the first physical layer, the data processing method also includes: determining whether the number of cached first data frames is greater than a second preset threshold; when the number of cached first data frames is greater than the second preset threshold, continuing to map the first data frames to the activated M physical transmission channels; and controlling the exit from the power saving mode.

In some embodiments, when the number of cached first data frames is less than or equal to a second preset threshold, no processing is performed and the data processing process of the original flow continues to be executed, that is, mapping the first data frame to the activated M physical transmission channels continues to be stopped, and control continues to be in power saving mode.

In some embodiments, after respectively caching the bit-width converted data on each activated physical transmission channel, and before respectively performing the first physical layer processing on the bit-width converted data on each activated physical transmission channel, the data processing method further includes: respectively determining whether the amount of bit-width converted data cached on each activated physical transmission channel is greater than a third preset threshold; when the amount of bit-width converted data cached on all activated physical transmission channels is greater than the third preset threshold, stopping composing the first data frame according to the service data of the CC, for example, stopping composing the first data frame according to a periodically arranged data pattern.

In some embodiments, when the amount of data after bit width conversion cached on at least one activated physical transmission channel is less than or equal to a third preset threshold, no processing is performed, and the data processing process of the original process continues to be executed, that is, the first data frame is continued to be composed according to the business data of the carrier unit, for example, the first data frame is continued to be composed according to the periodically arranged data pattern, as well as subsequent data processing steps.

In some embodiments, after stopping composing the first data frame according to the periodically arranged data pattern, the data processing method further includes: separately determining whether the amount of data after bit width conversion cached on each activated physical transmission channel is less than a fourth preset threshold; when the amount of data after bit width conversion cached on all activated physical transmission channels is less than the fourth preset threshold, continuing to compose the first data frame according to the service data of the carrier unit, for example, continuing to compose the first data frame according to the periodically arranged data pattern.

In some implementations, when the amount of data after bit width conversion cached on at least one activated physical transmission channel is greater than or equal to a fourth preset threshold, no processing is performed, and the data processing process of the original flow is continued, that is, the data processing according to the carrier unit is continued to be stopped. The business data constitutes a first data frame, and subsequent data processing steps, such as continuing to stop the data pattern according to the arrangement period to constitute the first data frame, and subsequent data processing steps.

The data processing method provided in the embodiment of the present application monitors the number of cached first data frames. When the number of cached first data frames is small, it stops mapping the first data frames to the activated M physical transmission channels. When the cached data after bit width conversion are all empty, it controls to enter the power saving mode, thereby reducing power consumption.

In some embodiments, by including at least part of the service data of all currently activated carrier units in a data pattern arranged in a period, and then forming a first data frame based on the data pattern arranged in the period, in the case of service reconfiguration or addition and deletion of services, the delay jitter is limited to one arrangement period, making the transmission delay controllable and predictable, thereby effectively improving the quality and reliability of service transmission.

In some implementations, by monitoring the amount of data after the bit width conversion in the cache, when the amount of data after the bit width conversion in the cache is large, the framing, mapping, encoding and other processes are stopped, thereby simplifying the clock problem.

FIG. 4 is a flow chart of a data processing method provided in an embodiment of the present application.

In the second aspect, referring to Figure 4, an embodiment of the present application provides a data processing method, which can be executed by a second interface module in a second chip in a communication device. The second chip can be any chip that needs to perform data transmission, such as any of the above chips.

The data processing method may include steps 400 to 403 .

Step 400, obtaining a second data frame; the payload of the second data frame includes: data patterns of N arrangement periods; N is an integer greater than or equal to 1.

In some implementations, the ratio of the service data amounts of the k component carriers included in the periodically arranged data pattern is determined according to the air interface throughputs of the k component carriers.

In some implementations, when a CC is transmitted through B antennas, the air interface throughput of the CC is B times the service sampling rate of the CC, where B is an integer greater than or equal to 1.

In some implementations, the ratio of the service data volumes of k carrier components included in the periodically arranged data pattern is a ratio of the air interface throughputs of the k carrier components.

For example, 3 CCs are currently activated, the service data of the first CC (ie, CC0) is transmitted through 2 antennas, the service sampling rate is 122.88 MHz, and the service data of the second CC (ie, CC1) is transmitted through 4 antennas, the service sampling rate is 30.72 MHz. The service data of the third CC (i.e. CC2) is transmitted through 4 antennas, and the service sampling rate is 15.36 MHz. Therefore, the air interface throughput of CC0 is 2×122.88, the air interface throughput of CC1 is 4×30.72, and the air interface throughput of CC1 is 4×15.36. D_CC0:D_CC1:D_CC2=4:2:1, D_CC0 is the air interface throughput of CC0, D_CC1 is the air interface throughput of CC1, and D_CC2 is the air interface throughput of CC2.

Then, a data pattern of one arrangement period may include 4 bytes of CC0 service data, 2 bytes of CC1 service data, and 1 byte of CC2 service data. A data pattern of one arrangement period may also include 8 bytes of CC0 service data, 4 bytes of CC1 service data, and 2 bytes of CC2 service data. And so on, as long as the ratio of the service data volume of k CCs included in the data pattern of the arrangement period is the ratio of the air interface throughput of the k CCs.

In some implementations, as shown in FIG. 2 , the second data frame includes SOF, Header, PayLoad, CRC, and EOF.

In some implementations, SOF indicates the start of a frame.

In some implementations, the Header is used to identify characteristics of the current frame.

In some implementations, the CRC is a CRC checksum generated based on the Header and the Payload.

In some implementations, EOF indicates the end position of a frame.

In some implementations, the payload of the second data frame further includes: A padding bytes; A is an integer greater than or equal to 0.

In some embodiments, obtaining the second data frame includes: performing second physical layer processing on data received from each activated physical transmission channel; performing inverse bit width conversion on the second physical layer processed data on each activated physical transmission channel; performing channel alignment on the inverse bit width converted data on all activated physical transmission channels; performing symbol boundary search and high-speed serial communication decoding on the channel-aligned data; and de-physical transmission channel mapping on the decoded data on all activated physical transmission channels to obtain the second data frame.

In some implementations, the inverse bit width conversion refers to converting the bit width of the data processed by the second physical layer into a bit width required for subsequent processing.

In some embodiments, the purpose of channel alignment is to eliminate the differences between different channels. The delay jitter problem between different channels may be caused by the difference in board-level routing.

In some implementations, the high-speed serial communication decoding may be, for example, 8B/10B decoding, 64B/66B decoding, 128B/132B decoding, or the like.

In some implementations, the second physical layer processing includes equalization processing, clock recovery processing, reception filtering, and serial-to-parallel conversion.

Step 401, demodulate the second data frame to obtain N periodic data patterns; and cache the N periodic data patterns obtained by demodulation.

In some implementations, when the second data frame is demodulated to obtain data patterns of N arrangement periods, a CRC check result is also obtained. If the CRC check fails, an alarm message is generated to the local main control CPU for subsequent processing. If the check succeeds, subsequent processing continues.

Step 402, determine whether the number of data patterns of the cached arrangement period is greater than or equal to the fifth preset threshold; if the number of data patterns of the cached arrangement period is greater than or equal to the fifth preset threshold, obtain the data patterns of the cached arrangement period.

In some implementations, the fifth preset threshold is determined according to the maximum transmission delay that the system can currently tolerate. For example, the fifth preset threshold is the amount of data that can be transmitted with the maximum transmission delay that the system can currently tolerate.

In some implementations, the maximum transmission delay that the system can currently tolerate is less than or equal to the length of one scheduling cycle.

Step 403: Separate the service data of all activated CCs from the obtained data pattern of the arrangement period.

In some implementations, the service data of the k CCs currently activated may be separated from the data pattern of the arrangement period according to the ratio of the service data amounts of the k CCs currently activated in the data pattern of the arrangement period.

In some embodiments, after separating the business data of all activated CCs from the obtained data pattern of the arrangement period, the data processing method also includes: caching the separated business data of all activated CCs, and separately determining whether the amount of business data of each cached CC is greater than or equal to a sixth preset threshold; when the amount of business data of all cached CCs is greater than or equal to the sixth preset threshold, reading the business data of the cached CC for subsequent processing.

The data processing method provided in the embodiment of the present application includes at least part of the service data of all currently activated carrier units in a data pattern arranged in a period, and then composes a first data frame based on the data pattern arranged in the period. In the case of service reconfiguration or addition and deletion of services, the delay jitter is limited to one arrangement period, so that the transmission delay is controllable and predictable, which effectively improves the quality and reliability of service transmission.

FIG5 is a block diagram of the composition of a data processing device provided in an embodiment of the present application.

In a third aspect, referring to FIG. 5 , an embodiment of the present application provides a data processing device, which may be a first interface module disposed in a first chip, and the first chip may be any chip that requires data transmission, such as any of the above chips.

The data processing device includes: a framing unit 501, configured to form a first data frame according to the service data of the carrier unit; a mapping unit 502, configured to map the first data frame to M activated physical transmission channels; M is an integer greater than or equal to 1; high-speed serial communication encoding is performed on the data mapped to each activated physical transmission channel; a bit width conversion unit 503, configured to perform bit width conversion on the data after high-speed serial communication encoding on the corresponding physical transmission channel; cache the data after bit width conversion on the corresponding physical transmission channel; a physical sending unit 504, configured to perform first physical layer processing on the data after bit width conversion on each activated physical transmission channel; send the corresponding first physical layer processed data through the activated physical transmission channel; power saving control Unit 505 is configured to cache the first data frame, determine whether the number of cached first data frames is less than or equal to a first preset threshold; when the number of cached first data frames is less than or equal to the first preset threshold, stop outputting the cached first data frames to the mapping unit 502; determine whether the bit-width converted data cached on each activated physical transmission channel are all empty; when the number of cached first data frames is less than or equal to the first preset threshold, and the bit-width converted data cached on all activated physical transmission channels are all empty, control the bit-width conversion unit 503 to stop outputting the cached bit-width converted data to the physical sending unit 504, and control the mapping unit 502, the bit-width conversion unit 503, and the physical sending unit 504 to enter a power saving mode.

In some embodiments, the power saving control unit 505 is further configured to: when the number of cached first data frames is greater than the first preset threshold, do not perform any processing, and continue to execute the data processing process of the original flow, that is, continue to output the cached first data frame to the mapping unit; Yuan 502.

In some embodiments, the power saving control unit 505 is further configured to: when the data after bit width conversion cached on at least one activated physical transmission channel is not empty, do not perform any processing, and continue to execute the data processing process of the original flow, that is, continue to control the bit width conversion unit 503 to output the cached bit width conversion data to the physical sending unit 504, and control the mapping unit 502, the bit width conversion unit 503 and the physical sending unit 504 to exit the power saving mode.

In some embodiments, the data processing device also includes: a data cache unit 506, configured to obtain business data of k CCs currently activated; k is an integer greater than or equal to 1; a data pattern arranged in a periodicity is formed according to the business data of the k CCs currently activated; the data pattern of the periodicity includes at least part of the business data of the k CCs currently activated; the framing unit 501 is specifically configured to form a first data frame according to the business data of the carrier unit in the following manner: the first data frame is formed according to the data pattern of the periodicity; the payload of the first data frame includes: N data patterns arranged in a periodicity; N is an integer greater than or equal to 1.

In some embodiments, the data cache unit 506 is specifically configured to obtain the service data of the currently activated k CCs in the following manner: receiving the service data of all CCs; caching the service data of the currently activated k CCs in the service data of all CCs; and obtaining the service data of the currently activated k CCs from the cached service data.

In some implementations, when the first chip is a DBB chip, the data cache unit 506 may receive service data of all CCs from a Modem in the first chip.

In some embodiments, the data cache unit 506 can interleave at least part of the business data of the currently activated k CCs in proportion within a data pattern arranged in a periodicity. As shown in FIG3 , at least part of the business data of the currently activated three CCs, i.e., the business data of CC0, the business data of CC1, and the business data of CC2, can be interleave in proportion within a data pattern arranged in a periodicity.

In some implementations, the ratio of the service data volumes of the k CCs included in the periodic data pattern is determined according to the air interface throughputs of the k CCs.

In some implementations, when a CC is transmitted through B antennas, the air interface throughput of the CC is B times the service sampling rate of the CC, where B is an integer greater than or equal to 1.

In some embodiments, the periodic data pattern includes the services of k CCs. The ratio of the data volumes is the ratio of the air interface throughputs of the k CCs.

For example, three CCs are currently activated, the service data of the first CC (i.e., CC0) is transmitted through two antennas, and the service sampling rate is 122.88 MHz. The service data of the second CC (i.e., CC1) is transmitted through four antennas, and the service sampling rate is 30.72 MHz. The service data of the third CC (i.e., CC2) is transmitted through four antennas, and the service sampling rate is 15.36 MHz. Then, the air interface throughput of CC0 is 2×122.88, the air interface throughput of CC1 is 4×30.72, and the air interface throughput of CC1 is 4×15.36. D_CC0:D_CC1:D_CC2=4:2:1, D_CC0 is the air interface throughput of CC0, D_CC1 is the air interface throughput of CC1, and D_CC2 is the air interface throughput of CC2.

Then, a data pattern of one arrangement period may include 4 bytes of CC0 service data, 2 bytes of CC1 service data, and 1 byte of CC2 service data. A data pattern of one arrangement period may also include 8 bytes of CC0 service data, 4 bytes of CC1 service data, and 2 bytes of CC2 service data. And so on, as long as the ratio of the service data volume of k CCs included in the data pattern of the arrangement period is the ratio of the air interface throughput of the k CCs.

In some implementations, as shown in FIG2 , the first data frame includes SOF, Header, PayLoad, CRC, and EOF.

In some implementations, SOF indicates the start of a frame.

In some implementations, the Header is used to identify characteristics of the current frame.

In some implementations, the CRC is a CRC checksum generated based on the Header and the Payload.

In some implementations, EOF indicates the end position of a frame.

In some implementations, the payload of the first data frame further includes: A padding bytes; A is an integer greater than or equal to 0.

In some implementations, as shown in FIG. 3 , when the data patterns of N arrangement periods are insufficient to fill the payload of the first data frame, A padding bytes may be added to the payload of the first data frame to complete the framing.

In some implementations, the mapping method in which the mapping unit 502 maps the first data frame to the M activated physical transmission channels, and the encoding method for performing high-speed serial communication encoding on the data mapped to each activated physical transmission channel can refer to MIPI The mapping and encoding methods in the DigRF V4 interface specification.

In some implementations, the high-speed serial communication encoding may be, for example, 8B/10B encoding, 64B/66B encoding, 128B/132B encoding, or the like.

In some implementations, each activated physical transmission channel corresponds to a bit width conversion unit 503 .

In some implementations, the bit width conversion refers to converting the bit width of the data encoded by the high-speed serial communication into the bit width required by the physical sending unit 504 .

In some implementations, the first physical layer processing includes parallel-to-serial conversion, transmit filtering, and de-emphasis.

In some embodiments, the power saving control unit 505 is also configured to: determine whether the number of cached first data frames is greater than a second preset threshold; when the number of cached first data frames is greater than the second preset threshold, continue to output the cached first data frames to the mapping unit 502; control the mapping unit 502, the bit width conversion unit 503, and the physical sending unit 504 to exit the power saving mode.

In some embodiments, the power saving control unit 505 is also configured to: when the number of cached first data frames is less than or equal to a second preset threshold, do not perform any processing, and continue to execute the data processing process of the original flow, that is, continue to stop outputting the cached first data frame to the mapping unit 502, and continue to control the mapping unit 502, the bit width conversion unit 503, and the physical sending unit 504 to be in power saving mode.

In some implementations, the power saving control unit 505 can control the mapping unit 502, the bit width conversion unit 503, and the physical sending unit 504 to enter or exit the power saving mode through the stall_en signal. For example, when the stall_en signal is pulled high, the mapping unit 502, the bit width conversion unit 503, and the physical sending unit 504 are controlled to enter the power saving mode; when the stall_en signal is pulled low, the mapping unit 502, the bit width conversion unit 503, and the physical sending unit 504 are controlled to exit the power saving mode.

In some embodiments, the data processing device also includes: a back pressure control unit 507, configured to respectively determine whether the amount of data after bit width conversion cached on each activated physical transmission channel is greater than a third preset threshold; when the amount of data after bit width conversion cached on all activated physical transmission channels is greater than the third preset threshold, control the data cache unit 506 to stop outputting the periodically arranged data pattern to the framing unit 501.

In some embodiments, the back pressure control unit 507 is further configured to: when the amount of data after bit width conversion cached on at least one activated physical transmission channel is less than or equal to a third preset threshold, do not perform any processing, and continue to execute the data processing process of the original flow, that is, continue to control the data cache unit 506 to output the periodically arranged data pattern to the framing unit 501.

In some embodiments, the back pressure control unit 507 is further configured to: determine whether the amount of data after bit width conversion cached on each bit width conversion unit 503 is less than a fourth preset threshold; when the amount of data after bit width conversion cached on all bit width conversion units 503 is less than the fourth preset threshold, control the data cache unit 506 to continue to output the periodically arranged data pattern to the framing unit 501.

In some embodiments, the back pressure control unit 507 is further configured to: when the amount of data after bit width conversion cached on at least one activated physical transmission channel is greater than or equal to a fourth preset threshold, do not perform any processing and continue to execute the data processing process of the original flow, that is, continue to control the data cache unit 506 to stop outputting the periodically arranged data pattern to the framing unit 501.

In some embodiments, the back-pressure control unit 507 can control the data cache unit 506 to continue to output the data pattern of the arrangement period to the framing unit 501 or stop outputting the data pattern of the arrangement period to the framing unit 501 through the back-pressure signal pdata_en. For example, when the back-pressure signal pdata_en is pulled low, the back-pressure control unit 507 controls the data cache unit 506 to stop outputting the data pattern of the arrangement period to the framing unit 501. At this time, all units from the framing unit 501 to the bit width conversion unit 503 are in a clock gating state due to the lack of data drive; when the back-pressure signal pdata_en is pulled high, the back-pressure control unit 507 controls the data cache unit 506 to continue outputting the data pattern of the arrangement period to the framing unit 501.

In some embodiments, when the first chip is a DBB chip, the M activated physical transmission channels at the input of the physical sending unit 504 are each connected to one bit width conversion unit 503, and the output is connected to M groups of differential signal pins corresponding to the M activated physical transmission channels on the DDB chip.

The specific implementation process of the above data processing device is the same as the specific implementation process of the above data processing method, which will not be repeated here.

FIG6 is a block diagram of the composition of a data processing device provided in an embodiment of the present application.

In a fourth aspect, referring to FIG. 6 , an embodiment of the present application provides a data processing device, which may be a second interface module disposed in a second chip, and the first chip may be any chip that requires data transmission, such as any of the above chips.

The data processing device includes: a deframing unit 601, configured to obtain a second data frame; the payload of the second data frame includes: data patterns of N arrangement periods; N is an integer greater than or equal to 1; the second data frame is demodulated to obtain data patterns of N arrangement periods; a de-jitter unit 602, configured to cache the demodulated data patterns of N arrangement periods; determine whether the number of cached data patterns of the arrangement periods is greater than or equal to a fifth preset threshold; if the number of cached data patterns of the arrangement periods is greater than or equal to the fifth preset threshold, obtain the cached data patterns of the arrangement periods; and separate the service data of all activated CCs from the obtained data patterns of the arrangement periods.

In some implementations, the ratio of the service data amounts of the k component carriers included in the periodically arranged data pattern is determined according to the air interface throughputs of the k component carriers.

In some implementations, when a CC is transmitted through B antennas, the air interface throughput of the CC is B times the service sampling rate of the CC, where B is an integer greater than or equal to 1.

In some implementations, the ratio of the service data volumes of k carrier components included in the periodically arranged data pattern is a ratio of the air interface throughputs of the k carrier components.

For example, three CCs are currently activated, the service data of the first CC (i.e., CC0) is transmitted through two antennas, and the service sampling rate is 122.88 MHz. The service data of the second CC (i.e., CC1) is transmitted through four antennas, and the service sampling rate is 30.72 MHz. The service data of the third CC (i.e., CC2) is transmitted through four antennas, and the service sampling rate is 15.36 MHz. Then, the air interface throughput of CC0 is 2×122.88, the air interface throughput of CC1 is 4×30.72, and the air interface throughput of CC1 is 4×15.36. D_CC0:D_CC1:D_CC2=4:2:1, D_CC0 is the air interface throughput of CC0, D_CC1 is the air interface throughput of CC1, and D_CC2 is the air interface throughput of CC2.

Then, a data pattern of one arrangement period can include 4 bytes of CC0 service data, 2 bytes of CC1 service data, and 1 byte of CC2 service data. It is also possible to include 8 bytes of CC0 service data, 4 bytes of CC1 service data, and 2 bytes of CC2 service data in one arrangement period. And so on, as long as The ratio of the service data volumes of the k CCs included in the data pattern satisfying the arrangement period may be the ratio of the air interface throughputs of the k CCs.

In some implementations, as shown in FIG. 2 , the second data frame includes SOF, Header, PayLoad, CRC, and EOF.

In some implementations, SOF indicates the start of a frame.

In some implementations, the Header is used to identify characteristics of the current frame.

In some implementations, the CRC is a CRC checksum generated based on the Header and the Payload.

In some implementations, EOF indicates the end position of a frame.

In some implementations, the payload of the second data frame further includes: A padding bytes; A is an integer greater than or equal to 0.

In some implementations, the fifth preset threshold is determined according to the maximum transmission delay that the system can currently tolerate. For example, the fifth preset threshold is the amount of data that can be transmitted with the maximum transmission delay that the system can currently tolerate.

In some implementations, the maximum transmission delay that the system can currently tolerate is less than or equal to the time length of one scheduling cycle.

In some implementations, the de-jitter unit 602 may separate the service data of the k currently activated CCs from the periodic data pattern according to the ratio of the service data amounts of the k currently activated CCs in the periodic data pattern.

In some embodiments, when the deframing unit 601 demodulates the second data frame to obtain data patterns of N arrangement periods, it also obtains a CRC check result. After the CRC check fails, an alarm message is generated to the local main control CPU for subsequent processing. After the check succeeds, the data patterns of N arrangement periods are output to the de-jitter unit 602 for subsequent processing.

In some embodiments, the deframing unit 601 further includes: a physical receiving unit 603, configured to perform second physical layer processing on the data received from each activated physical transmission channel respectively; a reverse bit width conversion unit 604, configured to perform reverse bit width conversion on the data processed by the second physical layer; a channel alignment unit 605, configured to perform channel alignment on the reverse bit width converted data on all activated physical transmission channels; perform symbol boundary search and high-speed serial communication decoding on the channel-aligned data; a demapping unit 606, configured to perform demapping on the decoded data on all activated physical transmission channels. The second data frame is obtained by mapping.

In some embodiments, when the second chip is an RF chip, the input of the physical receiving unit 603 is connected to M groups of differential signal pins corresponding to M activated physical transmission channels on the RF chip, and the output M activated physical transmission channels are each connected to one reverse bit width conversion unit 604.

In some implementations, each activated physical transmission channel corresponds to one inverse bit width conversion unit 604 .

In some implementations, the inverse bit width conversion is to convert the bit width of the data processed by the second physical layer output by the physical receiving unit 603 into the bit width required by the channel alignment unit 605 .

In some implementations, the channel alignment unit 605 performs channel alignment mainly to eliminate the delay jitter problem between different physical transmission channels. Here, the delay jitter problem between different physical transmission channels may be caused by the difference in board-level routing.

In some implementations, the high-speed serial communication decoding may be, for example, 8B/10B decoding, 64B/66B decoding, 128B/132B decoding, or the like.

In some implementations, the second physical layer processing includes equalization processing, clock recovery processing, reception filtering, and serial-to-parallel conversion.

In some embodiments, the data processing device also includes: a control unit 607, configured to cache the business data of all activated CCs separated out, and to determine whether the amount of business data of each cached CC is greater than or equal to a sixth preset threshold; when the amount of business data of all cached CCs is greater than or equal to the sixth preset threshold, notify subsequent units to read the business data of the cached CCs for subsequent processing.

The specific implementation process of the above data processing device is the same as the specific implementation process of the above data processing method, which will not be repeated here.

In a fifth aspect, referring to FIG. 7 , an embodiment of the present application provides a communication device, including: the above-mentioned data processing device.

In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, which is executed by a processor so that the processor implements the above-mentioned data processing method.

It will be understood by those skilled in the art that all or part of the methods disclosed above Functional modules/units in certain steps, systems, and devices may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some physical components or all physical components may be implemented as software executed by a processor (such as a central processing unit, a digital signal processor, or a microprocessor), or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not in a limiting sense. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and/or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and/or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the present application as set forth in the appended claims.

Claims (5)

A data processing method, comprising: Form a first data frame according to the service data of the carrier unit, cache the first data frame; map the first data frame to the M activated physical transmission channels; wherein M is an integer greater than or equal to 1; respectively perform high-speed serial communication encoding on the data mapped to each activated physical transmission channel; respectively perform bit width conversion on the data after the high-speed serial communication encoding on each activated physical transmission channel; respectively cache the data after the bit width conversion on each activated physical transmission channel; respectively perform first physical layer processing on the data after the bit width conversion on each activated physical transmission channel; Determine whether the number of cached first data frames is less than or equal to a first preset threshold; if the number of cached first data frames is less than or equal to the first preset threshold, stop mapping the first data frames to the activated M physical transmission channels; Determine respectively whether the data after bit width conversion cached on each activated physical transmission channel are all empty; when the number of cached first data frames is less than or equal to the first preset threshold and the data after bit width conversion cached on all activated physical transmission channels are all empty, stop performing the first physical layer processing on the data after bit width conversion on each activated physical transmission channel respectively; and control to enter the power saving mode. The data processing method according to claim 1, further comprising: After stopping mapping the first data frame to the activated M physical transmission channels, determining whether the number of cached first data frames is greater than a second preset threshold; When the number of cached first data frames is greater than the second preset threshold, continue to execute the mapping of the first data frames to the activated M physical transmission channels; and control the exit of the power saving mode. A data processing device, comprising: a framing unit, configured to compose a first data frame according to the service data of the carrier unit; A mapping unit is configured to map the first data frame to the M activated physical transmission channels; wherein M is an integer greater than or equal to 1; and respectively map the first data frame to each activated physical transmission channel. High-speed serial communication encoding of data on active physical transmission channels; A bit width conversion unit is configured to perform bit width conversion on the data encoded by the high-speed serial communication on the corresponding physical transmission channel; and cache the bit width converted data on the corresponding physical transmission channel; A physical transmission unit, configured to perform first physical layer processing on the data after bit width conversion on each activated physical transmission channel respectively; and transmit the corresponding first physical layer processed data through the activated physical transmission channel; A power saving control unit is configured to cache the first data frame, determine whether the number of cached first data frames is less than or equal to a first preset threshold; when the number of cached first data frames is less than or equal to the first preset threshold, stop outputting the cached first data frames to the mapping unit; determine whether the bit-width converted data cached on each activated physical transmission channel are all empty; when the number of cached first data frames is less than or equal to the first preset threshold and the bit-width converted data cached on all activated physical transmission channels are all empty, control the bit-width conversion unit to stop outputting the cached bit-width converted data to the physical sending unit, and control the mapping unit, the bit-width conversion unit, and the physical sending unit to enter a power saving mode. A communication device, comprising: the data processing device as claimed in claim 3. A computer-readable storage medium stores a computer program, wherein the computer program is executed by a processor so that the processor implements the data processing method according to any one of claims 1 and 2.