WO2025063054A1 - Silicon carbide substrate, silicon carbide epitaxial substrate, method for producing silicon carbide semiconductor device, and method for producing silicon carbide crystal - Google Patents

Abstract

This silicon carbide substrate has a first main surface and a second main surface that is on the reverse side of the first main surface. First voids are present in the first main surface. The surface density of the first voids is less than 0.04 voids per cm². When viewed along a straight line perpendicular to the first main surface, the width of the first voids is 10-100 μm. When viewed along a straight line parallel to the first main surface, the width of the first voids increases from the first main surface toward the second main surface. When viewed along a straight line parallel to the first main surface, the depth of the first voids is smaller than the thickness of the silicon carbide substrate. The first main surface is a carbon surface or a surface that is inclined to the carbon surface at an off angle of 8° or less.

Description

Silicon carbide substrate, silicon carbide epitaxial substrate, method for manufacturing silicon carbide semiconductor device, and method for manufacturing silicon carbide crystal

This disclosure relates to a silicon carbide substrate, a silicon carbide epitaxial substrate, a method for manufacturing a silicon carbide semiconductor device, and a method for manufacturing a silicon carbide crystal. This application claims priority to Japanese Patent Application No. 2023-155591, filed on September 21, 2023. All contents of the Japanese patent application are incorporated herein by reference.

　Japanese Patent Application Laid-Open No. 2010-126375 (Patent Document 1) describes a method for producing silicon carbide crystals. The method for producing silicon carbide crystals includes a step of preparing an apparatus in which a buffer layer is placed between the inner wall of a crucible and the raw material.

JP 2010-126375 A

The silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface opposite to the first main surface. First voids are present in the first main surface. The surface density of the first voids is less than 0.04 voids/ ^cm2 . When viewed along a straight line perpendicular to the first main surface, the width of the first voids is 10 μm or more and 100 μm or less. When viewed along a straight line parallel to the first main surface, the width of the first voids increases from the first main surface toward the second main surface. When viewed along a straight line parallel to the first main surface, the depth of the first voids is smaller than the thickness of the silicon carbide substrate. The first main surface is a carbon surface or a surface inclined at an off angle of 8° or less with respect to the carbon surface.

FIG. 1 is a schematic plan view showing the configuration of a silicon carbide substrate according to this embodiment. FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. FIG. 3 is an enlarged plan view of region III in FIG. FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. FIG. 5 is an enlarged schematic cross-sectional view of a region V in FIG. FIG. 6 is a perspective plan view showing the configuration of the rectangular parallelepiped region. FIG. 7 is an enlarged schematic plan view of the second main surface. FIG. 8 is an enlarged schematic cross-sectional view of region VIII in FIG. FIG. 9 is a schematic diagram showing the configuration of a Raman spectroscopic device. FIG. 10 is a cross-sectional schematic diagram showing the configuration of a silicon carbide crystal growth apparatus according to this embodiment. FIG. 11 is a flow diagram that generally illustrates the method for manufacturing silicon carbide crystal according to the present embodiment. FIG. 12 is a schematic diagram showing the relationship between temperature and time in the process of firing the crucible and the graphite member placed in the crucible. FIG. 13 is a schematic cross-sectional view showing a step of preparing a growth apparatus. FIG. 14 is a schematic diagram showing the relationship between pressure and time in the step of preheating a silicon carbide raw material. FIG. 15 is a schematic cross-sectional view showing a step of placing a seed substrate inside the crucible. FIG. 16 is a schematic cross-sectional view showing a step of growing silicon carbide crystal on a seed substrate. FIG. 17 is an enlarged schematic diagram showing region XVII in FIG. FIG. 18 is a flow diagram illustrating a schematic method for manufacturing a silicon carbide semiconductor device according to this embodiment. FIG. 19 is a cross-sectional schematic diagram showing the configuration of a silicon carbide epitaxial substrate according to this embodiment. FIG. 20 is a schematic cross-sectional view showing a step of forming a body region. FIG. 21 is a schematic cross-sectional view showing a step of forming a source region. FIG. 22 is a schematic cross-sectional view showing a step of forming a trench in the third main surface of the silicon carbide epitaxial layer. FIG. 23 is a schematic cross-sectional view showing a step of forming a gate insulating film. FIG. 24 is a schematic cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film. FIG. 25 is a schematic cross-sectional view showing the configuration of a silicon carbide semiconductor device according to this embodiment.

[Problem that this disclosure aims to solve]
An object of the present disclosure is to provide a silicon carbide substrate, a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device that are capable of improving the yield of silicon carbide semiconductor devices.
[Advantages of this disclosure]
Advantageous Effects of Invention The present disclosure can provide a silicon carbide substrate, a silicon carbide epitaxial substrate, a method for manufacturing a silicon carbide semiconductor device, and a method for manufacturing a silicon carbide crystal, which are capable of improving the yield of silicon carbide semiconductor devices.
[Description of the embodiments of the present disclosure]
First, embodiments of the present disclosure will be listed and described.

(1) A silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface opposite to the first main surface. First voids are present in the first main surface. The surface density of the first voids is less than 0.04 voids/ ^cm2 . When viewed along a straight line perpendicular to the first main surface, the width of the first voids is 10 μm or more and 100 μm or less. When viewed along a straight line parallel to the first main surface, the width of the first voids increases from the first main surface to the second main surface. When viewed along a straight line parallel to the first main surface, the depth of the first voids is smaller than the thickness of the silicon carbide substrate. The first main surface is a carbon surface or a surface inclined at an off angle of 8° or less with respect to the carbon surface.

(2) The silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface opposite to the first main surface. A first void is present in the first main surface, and a second void is present in the second main surface. The surface density of the second void is less than 0.04 voids/ ^cm2 . When viewed along a straight line perpendicular to the first main surface, the width of each of the first voids and the second voids is 10 μm or more and 100 μm or less. When viewed along a straight line parallel to the first main surface, the width of each of the first voids and the second voids increases from the first main surface to the second main surface. When viewed along a straight line parallel to the first main surface, the depth of each of the first voids and the second voids is smaller than the thickness of the silicon carbide substrate. The second main surface is a silicon surface or a surface inclined at an off angle of 8° or less with respect to the silicon surface.

(3) One or more carbon inclusions may be present in the rectangular parallelepiped region of the silicon carbide substrate according to (1) or (2). In the direction from the first main surface to the second main surface, the distance from the first main surface to the upper end face of the rectangular parallelepiped region may be 50 μm, and the distance from the first main surface to the lower end face of the rectangular parallelepiped region may be 200 μm. When viewed along a straight line perpendicular to the first main surface, the length of the long side of the rectangular parallelepiped region may be 0.82 mm, and the length of the short side of the rectangular parallelepiped region may be 0.7 mm. When viewed along a straight line perpendicular to the first main surface, the first void may overlap the rectangular parallelepiped region. When the Raman spectrum of one or more carbon inclusions is measured, the half-width of the peak of the Raman spectrum having the Raman shift closest to 2700 cm ⁻¹ may be less than 60 cm ⁻¹ in at least one of the one or more carbon inclusions.

(4) The silicon carbide epitaxial substrate according to the present disclosure has a silicon carbide substrate according to any one of (1) to (3) above and a silicon carbide epitaxial layer. The silicon carbide epitaxial layer is provided on the silicon carbide substrate.

(5) The method for manufacturing a silicon carbide semiconductor device according to the present disclosure includes the following steps: The silicon carbide epitaxial substrate according to (4) above is prepared. An electrode is formed on the silicon carbide epitaxial layer.

(6) The method for producing silicon carbide crystals according to the present disclosure includes the following steps: A growth apparatus is prepared in which a buffer layer is disposed between a crucible and a silicon carbide raw material. After the step of preparing a growth apparatus in which a buffer layer is disposed between a crucible and a silicon carbide raw material, the silicon carbide raw material is preheated. After the step of preheating the silicon carbide raw material, a seed substrate is disposed in the crucible. A silicon carbide crystal is grown on the seed substrate by sublimating the silicon carbide raw material. In the step of preparing a growth apparatus in which a buffer layer is disposed between a crucible and a silicon carbide raw material, the silicon carbide raw material covers the buffer layer so that the buffer layer is not exposed from the surface of the silicon carbide raw material.

(7) According to the method for producing silicon carbide crystals according to (6) above, the crucible may have a bottom and a sidewall. The sidewall may be continuous with the bottom. The buffer layer may have a first portion and a second portion. The first portion may be disposed between the bottom and the silicon carbide raw material. The second portion may be continuous with the first portion. The second portion may be disposed between the sidewall and the silicon carbide raw material. In the step of preparing a growth apparatus in which a buffer layer is disposed between the crucible and the silicon carbide raw material, the value obtained by dividing the height of the second portion by the height of the silicon carbide raw material in the direction in which the second portion extends may be 0.5 or more and 0.85 or less.

(8) According to the method for producing silicon carbide crystals according to (6) above, the crucible may have a bottom and a sidewall. The sidewall may be connected to the bottom. The buffer layer may have a first portion and a second portion. The first portion may be disposed between the bottom and the silicon carbide raw material. The second portion may be connected to the first portion. The second portion may be disposed between the sidewall and the silicon carbide raw material. In the step of preparing a growth apparatus in which a buffer layer is disposed between the crucible and the silicon carbide raw material, the buffer layer may be disposed such that the buffer layer is not located in an area within 5 mm of the surface of the silicon carbide raw material in the direction in which the second portion extends.

(9) According to any one of the methods for producing silicon carbide crystals according to (6) to (8) above, the crucible may have a raw material storage section and a lid section. A buffer layer and silicon carbide raw material are placed in the raw material storage section. The lid section is placed on the raw material storage section. The growth of silicon carbide crystals may be repeated seven or more times using the raw material storage section.

(10) According to any one of the methods for producing silicon carbide crystals described above in (6) to (9), the buffer layer may contain carbon.

(11) According to the method for producing a silicon carbide crystal according to (10) above, the buffer layer may be made of a carbon sheet.

(12) According to the method for producing a silicon carbide crystal according to any one of (6) to (11) above, in the step of preheating a silicon carbide raw material, the pressure inside the crucible may be equal to or greater than 0.08 kPa and equal to or less than 0.12 kPa during the period from 3 hours before the end of the preheating to the end of the preheating.
[Details of the embodiment of the present disclosure]
Hereinafter, the details of the embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are given the same reference numerals, and the description thereof will not be repeated. In the crystallographic description in this specification, an individual orientation is indicated by [ ], a collective orientation by <>, an individual plane by ( ), and a collective plane by { }. In addition, for negative indices, a "-" (bar) is placed above the number in crystallography, but in this specification, a negative sign is placed before the number.

(Silicon carbide substrate)
First, a configuration of a silicon carbide substrate 100 according to this embodiment will be described. Fig. 1 is a plan schematic view showing the configuration of a silicon carbide substrate 100 according to this embodiment.

As shown in FIG. 1, the silicon carbide substrate 100 according to this embodiment has a first main surface 1 and an outer peripheral side surface 9. The first main surface 1 extends along each of a first direction 101 and a second direction 102. The first direction 101 is not particularly limited, but is, for example, the <11-20> direction. The second direction 102 is not particularly limited, but is, for example, the <1-100> direction. The silicon carbide substrate 100 is made of, for example, hexagonal silicon carbide. The polytype of the hexagonal silicon carbide is, for example, 4H. The silicon carbide substrate 100 contains an n-type impurity such as nitrogen.

As shown in FIG. 1, the outer peripheral side surface 9 has an orientation flat portion 7 and an arc-shaped portion 8. The arc-shaped portion 8 is connected to the orientation flat portion 7. As shown in FIG. 1, when viewed along a straight line perpendicular to the first main surface 1, the orientation flat portion 7 extends along the first direction 101.

The diameter W1 of the first main surface 1 is, for example, 150 mm. The diameter W1 is not particularly limited, but may be 150 mm or more, or 200 mm or more. The diameter W1 is not particularly limited, but may be, for example, 300 mm or less. When viewed along a straight line perpendicular to the first main surface 1, the diameter W1 is the longest straight line distance between two different points on the outer peripheral side surface 9.

FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. 1. The cross section shown in FIG. 2 is perpendicular to the first main surface 1 and parallel to the first direction 101. As shown in FIG. 2, the silicon carbide substrate 100 according to this embodiment has a second main surface 2. The second main surface 2 is opposite to the first main surface 1. The thickness E1 of the silicon carbide substrate 100 is, for example, 300 μm or more and 700 μm or less. The direction from the first main surface 1 toward the second main surface 2 is the third direction 103. The third direction 103 is perpendicular to each of the first direction 101 and the second direction 102. The thickness direction of the silicon carbide substrate 100 is the same as the third direction 103.

The first main surface 1 is a carbon surface or a surface tilted in the off direction with respect to the carbon surface. In other words, the first main surface 1 is a (000-1) surface or a surface tilted in the off direction with respect to the (000-1) surface. Similarly, the second main surface 2 is a silicon surface or a surface tilted in the off direction with respect to the silicon surface. In other words, the second main surface 2 is a (0001) surface or a surface tilted in the off direction with respect to the (0001) surface.

As shown in FIG. 2, when the first main surface 1 is inclined in the off direction with respect to the carbon plane, the inclination angle of the first main surface 1 with respect to the (0001) plane is defined as the off angle θ. The off angle θ is 8° or less. The off angle θ may be, for example, 6° or less, or 4° or less. The off angle θ may be, for example, 1° or more, or 2° or more. The off direction of the first main surface 1 is not particularly limited, but is, for example, the <11-20> direction.

FIG. 3 is an enlarged plan view of region III in FIG. 1. As shown in FIG. 3, one or more first voids 10 are present in the first main surface 1. When viewed along a straight line perpendicular to the first main surface 1, the shape of the opening of the first void 10 is, for example, a hexagon. The shape of the opening of the first void 10 is not particularly limited, but may be, for example, a circle, an ellipse, or a polygon other than a hexagon.

When viewed along a straight line perpendicular to the first main surface 1, the width of the first void 10 (first width A1) is 10 μm or more and 100 μm or less. The width of the first void 10 is the maximum width between any two points at the opening of the first void 10. The width of the first void 10 may be, for example, the width along the off direction. The first width A1 may be, for example, 20 μm or more, or 30 μm or more. The first width A1 may be, for example, 80 μm or less, or 60 μm or less.

In the first main surface 1, the surface density of the first voids 10 is less than 0.04 voids/ ^cm2 . The surface density of the first voids 10 may be, for example, 0.03 voids/ ^cm2 or less, or 0.02 voids/ ^cm2 or less. The surface density of the first voids 10 may be, for example, 0.005 voids/ ^cm2 or more, or 0.01 voids/ ^cm2 or more.

FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 3. The cross section shown in FIG. 4 is perpendicular to the first main surface 1 and parallel to the first direction 101. As shown in FIG. 4, when viewed along a straight line parallel to the first main surface 1, the width of the first void 10 increases from the first main surface 1 toward the second main surface 2.

FIG. 5 is an enlarged schematic cross-sectional view of region V in FIG. 4. As shown in FIG. 5, the first void 10 has a first opening 11, a first side portion 12, and a first bottom portion 13. The first opening 11 is located on the first main surface 1. The first bottom portion 13 is located between the first main surface 1 and the second main surface 2. The first side portion 12 is located between the first opening 11 and the first bottom portion 13. The first side portion 12 is continuous with each of the first opening 11 and the first bottom portion 13. When viewed along a straight line parallel to the first main surface 1, the first side portion 12 may be linear.

As shown in Figures 4 and 5, when viewed along a straight line parallel to the first main surface 1, the shape of the first void 10 is, for example, a trapezoid. The upper base of the trapezoid is located at the first opening 11. The lower base of the trapezoid is located at the first bottom 13. When viewed along a straight line parallel to the first main surface 1, the width of the first bottom 13 is greater than the width of the first opening 11.

When viewed along a straight line parallel to the first main surface 1, the depth of the first void 10 (first depth B1) is smaller than the thickness E1 (see FIG. 4) of the silicon carbide substrate 100. In other words, the first void 10 does not penetrate the silicon carbide substrate 100. The first void 10 is exposed only to the first main surface 1 and is not exposed to the second main surface 2.

The first depth B1 may be equal to or greater than the width (first width A1) of the first void 10 on the first main surface 1. In other words, the first depth B1 may be the same as the first width A1, or may be greater than the first width A1. The first depth B1 may be, for example, 5 times or less, or 3 times or less, the width of the first bottom 13 of the first void 10.

As shown in FIG. 5, carbon inclusions 70 are present below the first void 10. The carbon inclusions 70 may face the first bottom 13 of the first void 10. The carbon inclusions 70 are embedded in the silicon carbide region 15 of the silicon carbide substrate 100. In the thickness direction of the silicon carbide substrate 100, the distance between the first main surface 1 and the carbon inclusions 70 is, for example, 50 μm or more and 200 μm or less. From another perspective, the carbon inclusions 70 are present in the rectangular region 60 that is 50 μm or more and 200 μm or less away from the first main surface 1 in the third direction 103.

In the third direction 103, the distance (first distance D1) from the first main surface 1 to the upper end surface of the rectangular parallelepiped region 60 is 50 μm. In the third direction 103, the distance (second distance D2) from the first main surface 1 to the lower end surface of the rectangular parallelepiped region 60 is 200 μm. In the third direction 103, the distance (third distance D3) from the lower end surface to the upper end surface of the rectangular parallelepiped region 60 is 150 μm.

FIG. 6 is a perspective plan view showing the configuration of the rectangular parallelepiped region 60. As shown in FIG. 6, when viewed along a straight line perpendicular to the first main surface 1, the shape of the rectangular parallelepiped region 60 is rectangular. The length of the long side of the rectangular parallelepiped region 60 (first length L1) is 0.82 mm. The long side of the rectangular parallelepiped region 60 is parallel to the first direction 101. The length of the short side of the rectangular parallelepiped region 60 (second length L2) is 0.7 mm. The short side of the rectangular parallelepiped region 60 is parallel to the second direction 102.

When viewed along a straight line perpendicular to the first principal surface 1, the first void 10 (see FIG. 5) overlaps with the rectangular parallelepiped region 60. When viewed along a straight line perpendicular to the first principal surface 1, the rectangular parallelepiped region 60 is determined so that the center of the first void 10 coincides with the center of the rectangular parallelepiped region 60. When viewed along a straight line perpendicular to the first principal surface 1, the maximum length F1 of the carbon inclusion 70 is 5 μm or more and 50 μm or less.

In FIG. 6, carbon inclusions 70 present in a rectangular parallelepiped region 60 are shown. As shown in FIG. 6, one or more carbon inclusions 70 are present in the rectangular parallelepiped region 60. The number of carbon inclusions 70 present in the rectangular parallelepiped region 60 may be, for example, five or more, or ten or more. The number of carbon inclusions 70 present in the rectangular parallelepiped region 60 may be, for example, fifteen or less, or twelve or less.

As shown in Figures 5 and 6, the one or more carbon inclusions 70 may include a first carbon inclusion 71. Of the one or more carbon inclusions 70, at least one is a second carbon inclusion 72. The Raman spectrum of the second carbon inclusion 72 is different from the Raman spectrum of the first carbon inclusion 71. The details of the Raman spectrum will be described later. The number of first carbon inclusions 71 contained in the silicon carbide substrate 100 is smaller than the number of second carbon inclusions 72 contained in the silicon carbide substrate 100.

FIG. 7 is an enlarged schematic plan view of the second main surface 2. As shown in FIG. 7, one or more second voids 20 are present in the second main surface 2. When viewed along a straight line perpendicular to the second main surface 2, the shape of the opening of the second void 20 is, for example, a hexagon. The shape of the opening of the second void 20 is not particularly limited, but may be, for example, a circle, an ellipse, or a polygon other than a hexagon.

When viewed along a straight line perpendicular to the second main surface 2, the width of the second void 20 (second width A2) is 10 μm or more and 100 μm or less. The width of the second void 20 is the maximum width between any two points at the opening of the second void 20. The width of the second void 20 may be, for example, the width along the off direction. The second width A2 may be, for example, 20 μm or more, or 30 μm or more. The second width A2 may be, for example, 80 μm or less, or 60 μm or less.

On the second main surface 2, the surface density of the second voids 20 is less than 0.04 voids/ ^cm2 . The surface density of the second voids 20 may be, for example, 0.03 voids/ ^cm2 or less, or 0.02 voids/ ^cm2 or less. The surface density of the second voids 20 may be, for example, 0.005 voids/ ^cm2 or more, or 0.01 voids/ ^cm2 or more.

8 is an enlarged schematic cross-sectional view of region VIII in FIG. 4. As shown in FIG. 8, the width of the second void 20 increases from the first main surface 1 to the second main surface 2 when viewed along a straight line parallel to the first main surface 1. The second void 20 has a second opening 21, a second side portion 22, and a second bottom portion 23. The second opening 21 is located on the second main surface 2. The second bottom portion 23 is located between the first main surface 1 and the second main surface 2. The second side portion 22 is located between the second opening 21 and the second bottom portion 23. The second side portion 22 is connected to each of the second opening 21 and the second bottom portion 23. When viewed along a straight line parallel to the first main surface 1, the second side portion 22 may be linear.

As shown in Figures 4 and 8, when viewed along a straight line parallel to the first main surface 1, the shape of the second void 20 is, for example, a triangle. The base of the triangle is located at the second opening 21. The apex of the triangle is located at the second bottom 23.

When viewed along a straight line parallel to the first main surface 1, the depth of the second void 20 (second depth B2) is smaller than the thickness E1 of the silicon carbide substrate 100. In other words, the second void 20 does not penetrate the silicon carbide substrate 100. The second void 20 is exposed only to the second main surface 2, and is not exposed to the first main surface 1.

The second depth B2 may be equal to or greater than the width (second width A2) of the second void 20 on the second main surface 2. In other words, the second depth B2 may be the same as the second width A2, or may be greater than the second width A2. The second depth B2 may be, for example, 5 times or less, or 3 times or less, the width of the second opening 21 of the second void 20.

As shown in FIG. 4, a third void 14 is formed in the silicon carbide substrate 100. The third void 14 is located inside the silicon carbide substrate 100. The third void 14 is closed inside the silicon carbide substrate 100. From another perspective, the third void 14 is not exposed to either the first main surface 1 or the second main surface 2. When viewed along a straight line parallel to the first main surface 1, the width of the third void 14 increases from the first main surface 1 toward the second main surface 2. When viewed along a straight line parallel to the first main surface 1, the shape of the third void 14 is, for example, a triangle.

(Area Density of First Voids and Second Voids)
Next, a method for measuring the surface density of each of the first voids 10 and the second voids 20 will be described.

The first voids 10 and the second voids 20 are each identified using an optical microscope. A bottomed hole that opens into the first main surface 1, has a width of 10 μm or more and 100 μm or less when viewed along a straight line perpendicular to the first main surface 1, and whose width increases from the first main surface 1 toward the second main surface 2 is identified as a first void 10. The number of first voids 10 in the measurement region of the first main surface 1 divided by the area of the measurement region of the first main surface 1 is the surface density of the first voids 10. Note that the region of the first main surface 1 within 5 mm of the outer peripheral side surface 9 is outside the measurement region (edge exclusion).

Similarly, a bottomed hole that opens into the second principal surface 2, has a width of 10 μm or more and 100 μm or less when viewed along a straight line perpendicular to the second principal surface 2, and whose width increases from the first principal surface 1 toward the second principal surface 2, is identified as a second void 20. The number of second voids 20 in the measurement region of the second principal surface 2 divided by the area of the measurement region of the second principal surface 2 is the surface density of the second voids 20. Note that the region of the second principal surface 2 within 5 mm of the outer peripheral side surface 9 is outside the measurement region.

(Raman spectrum)
Next, the configuration of a Raman spectroscopic device for measuring Raman spectra will be described with reference to Fig. 9, which is a schematic diagram showing the configuration of the Raman spectroscopic device.

As shown in FIG. 9, the Raman spectroscopy device 30 mainly includes, for example, a light source 32, an objective lens 31, a spectroscope 33, a stage 34, a beam splitter 35, and a detector 38. As the Raman spectroscopy device 30, a LabRAM HR-800 manufactured by HORIBA JOBIN YVON can be used. The light source 32 is a YAG (Yttrium Aluminum Garnet) laser. The excitation wavelength of the light source 32 is 532 nm. The laser irradiation intensity is 0.5 mW. The measurement method is backscattering measurement. The magnification of the objective lens 31 is 100 times. The diameter of the measurement area is 1 μm. The laser irradiation time is 20 to 180 seconds. The number of integrations is 2. The filter is D1. The grating is 300 gr/mm. The hole is 100.

Next, a method for measuring the Raman spectrum will be described.
First, incident light 36 is emitted from the YAG laser of light source 32. As shown by a first arrow G1 in Fig. 9, incident light 36 is reflected by beam splitter 35 and directed toward first main surface 1 of silicon carbide substrate 100. Raman spectroscopic device 30 employs, for example, a confocal optical system. In the confocal optical system, a confocal aperture (not shown) having a circular opening is disposed at a position conjugate with the focus of objective lens 31. This makes it possible to detect light only at the focused position.

As shown by the second arrow G2 in FIG. 9, the Raman scattered light scattered by the silicon carbide substrate 100 passes through the beam splitter 35 and is introduced into the spectrometer 33. In the spectrometer 33, the Raman scattered light is resolved into wave numbers. The Raman scattered light resolved into wave numbers is detected by the detector 38. This results in a Raman spectrum with the horizontal axis representing the Raman shift (wave number) and the vertical axis representing the intensity of the Raman scattered light. The stage 34 can move in a direction parallel to the first main surface 1 of the silicon carbide substrate 100 (the direction of the third arrow G3). The Raman spectrum of the carbon inclusions 70 (see FIGS. 5 and 6) present inside the silicon carbide substrate 100 is measured.

When the Raman spectrum of the first carbon inclusion 71 (see FIGS. 5 and 6) is measured, the half width of the peak in the Raman spectrum having a Raman shift closest to 2700 cm ⁻¹ (first half width) is 60 cm ⁻¹ or more. From another point of view, when the Raman spectrum of the carbon inclusion 70 is measured, the carbon inclusion 70 may include one having a half width of the peak in the Raman spectrum having a Raman shift closest to 2700 cm ⁻¹ of 60 cm ⁻¹ or more.

The first half-width may be, for example, 63 cm ⁻¹ or more, or 66 cm ⁻¹ or more. The first half-width may be, for example, 90 cm ⁻¹ or less, or 85 cm ⁻¹ or less.

When the Raman spectrum of the second carbon inclusion 72 (see FIGS. 5 and 6) is measured, the half-width (second half-width) of the peak in the Raman spectrum having a Raman shift closest to 2700 cm ^-1 is less than 60 cm ^-1 . From another perspective, when the Raman spectrum of the carbon inclusion 70 is measured, in at least one of the carbon inclusions 70, the half-width of the peak in the Raman spectrum having a Raman shift closest to 2700 cm ^-1 is less than 60 cm ^-1 .

The second half-width may be, for example, 30 cm ⁻¹ or more, or 40 cm ⁻¹ or more. The second half-width may be, for example, 55 cm ⁻¹ or less, or 50 cm ⁻¹ or less.

(Silicon carbide crystal growth apparatus)
Next, the configuration of a silicon carbide crystal growth apparatus according to this embodiment will be described.

10 is a cross-sectional schematic diagram showing the configuration of a silicon carbide crystal growth apparatus according to this embodiment. As shown in FIG. 10, silicon carbide crystal growth apparatus 300 mainly includes crucible 130, protrusion 133, first resistive heater 141, second resistive heater 142, and third resistive heater 143. Crucible 130 is made of graphite. Crucible 130 is made of, for example, "G330", an isotropic graphite material manufactured by Tokai Carbon Co., Ltd. When the Raman spectrum of the material constituting crucible 130 is measured, the half-width (third half-width) of the peak of the Raman spectrum having the Raman shift closest to 2700 cm ^-1 is, for example, 40 cm ^-1 or more and 50 cm ^-1 or less.

The crucible 130 has a raw material storage section 132 and a lid section 131. The raw material storage section 132 has a bottom section 134 and a sidewall section 135. The bottom section 134 is, for example, disk-shaped. The bottom section 134 extends along a plane perpendicular to the growth direction 104. The growth direction 104 will be described in detail below. The sidewall section 135 is continuous with the bottom section 134. The sidewall section 135 extends along the growth direction 104. The sidewall section 135 is annular in shape.

The lid 131 is placed on the raw material storage section 132. The direction from the lid 131 toward the bottom 134 is the growth direction 104. A graphite member (not shown) is placed inside the crucible 130.

The protrusion 133 is disposed inside the crucible 130. The protrusion 133 is attached to the bottom 134. The protrusion 133 is configured to be removable from the bottom 134. The protrusion 133 is surrounded by the side wall 135. The protrusion 133 is spaced apart from the side wall 135. The shape of the protrusion 133 is, for example, cylindrical. The protrusion 133 extends along the growth direction 104.

The first resistive heater 141 is disposed above the lid portion 131. The second resistive heater 142 is disposed so as to surround the sidewall portion 135. The third resistive heater 143 is disposed below the bottom portion 134. The crucible 130 is heated by applying power to the first resistive heater 141, the second resistive heater 142, and the third resistive heater 143.

(Method for producing silicon carbide crystal)
Next, a method for producing a silicon carbide crystal according to this embodiment will be described. Fig. 11 is a flow diagram that shows a schematic diagram of the method for producing a silicon carbide crystal according to this embodiment. As shown in Fig. 11, the method for producing a silicon carbide crystal according to this embodiment includes a step of preparing a growth apparatus (S10), a step of preheating a silicon carbide raw material (S20), a step of placing a seed substrate inside a crucible (S30), and a step of growing a silicon carbide crystal on the seed substrate (S40).

First, a step (S10) of preparing a growth apparatus is performed. In the step (S10) of preparing a growth apparatus, a step of firing the crucible 130 and the graphite member placed inside the crucible 130 is performed. Specifically, in an argon gas atmosphere, the crucible 130 and the graphite member placed inside the crucible 130 are heated to a temperature of 3000°C. The heating time of the crucible 130 is, for example, 10 hours. The pressure of the argon gas is, for example, 10 kPa.

FIG. 12 is a schematic diagram showing the relationship between temperature and time in the process of firing the crucible 130 and the graphite member placed in the crucible 130. In FIG. 12, the vertical axis represents temperature and the horizontal axis represents time. As shown in FIG. 12, in the first heating step, the temperature of the crucible 130 rises from a first temperature C1 to a second temperature C2 from a first time point T1 to a second time point T2. The first temperature C1 is, for example, 1100°C. The second temperature C2 is, for example, 2200°C.

Next, in the second heating step, the temperature of the crucible 130 rises from the second temperature C2 to the third temperature C3 from the second time point T2 to the third time point T3. The third temperature C3 is the highest temperature reached. The third temperature C3 is, for example, 3000°C. The heating rate in the first heating step is, for example, 100°C/hour. The heating rate in the second heating step is 20°C/hour or less. The heating rate in the second heating step is lower than the heating rate in the first heating step.

Next, a firing process is carried out. From the third time T3 to the fourth time T4, the temperature of the crucible 130 is maintained at the third temperature C3. The time from the third time T3 to the fourth time T4 is the firing time. Next, a cooling process is carried out. From the fourth time T4, the crucible 130 is cooled. To prevent cracking of the components, the crucible 130 is cooled slowly until the temperature of the crucible 130 reaches the first temperature C1. The cooling rate of the crucible 130 is 20°C/hour or less.

In the first heating step, the second heating step, the firing step, and the cooling step, the pressure of the atmospheric gas in the crucible 130 is maintained at, for example, about 10 kPa. The atmospheric gas contains an inert gas such as argon gas or helium gas.

By carrying out the process of firing the crucible 130 and the graphite member placed inside the crucible 130, it is possible to prevent the carbon lumps generated from the crucible 130 and the graphite member placed inside the crucible 130 from being incorporated into the silicon carbide crystal 110. This makes it possible to prevent the second carbon inclusions 72 (see Figures 5 and 6) from being incorporated into the silicon carbide crystal 110.

FIG. 13 is a schematic cross-sectional view showing the step (S10) of preparing a growth apparatus. As shown in FIG. 13, a buffer layer 170 and silicon carbide raw material 153 are disposed inside the raw material storage section 132. The buffer layer 170 is disposed on the bottom 134. The buffer layer 170 is separate from the crucible 130.

The buffer layer 170 contains carbon. The buffer layer 170 is flexible. The bulk density of the material constituting the buffer layer 170 is lower than the bulk density of the material constituting the crucible 130, for example. The buffer layer 170 is made of, for example, a carbon sheet. The buffer layer 170 is made of, for example, graphite. Specifically, the buffer layer 170 is made of, for example, GRAFOIL (registered trademark), a graphite sheet manufactured by NeoGraf.

When the Raman spectrum of the material constituting the buffer layer 170 is measured, the half width (fourth half width) of the peak of the Raman spectrum having the Raman shift closest to 2700 cm ⁻¹ is, for example, 60 cm ⁻¹ or more and 90 cm ⁻¹ or less. The fourth half width is larger than the third half width.

The buffer layer 170 has a first portion 171 and a second portion 172. The first portion 171 is disposed on the bottom portion 134. The first portion 171 is in contact with the bottom portion 134. The first portion 171 covers the bottom portion 134. The first portion 171 may be in contact with the protrusion portion 133. The first portion 171 surrounds the protrusion portion 133. The shape of the first portion 171 is, for example, a disk shape. The first portion 171 extends along a plane perpendicular to the growth direction 104.

The second portion 172 is connected to the first portion 171. The second portion 172 is in contact with the side wall portion 135. The second portion 172 covers a portion of the side wall portion 135. The shape of the second portion 172 is annular. The extension direction of the second portion 172 is the same as the growth direction 104. The height of the second portion 172 in the extension direction of the second portion 172 is the first height H1.

The silicon carbide raw material 153 is disposed on the buffer layer 170. The silicon carbide raw material 153 is, for example, a polycrystalline silicon carbide powder. The silicon carbide raw material 153 covers the buffer layer 170 so that the buffer layer 170 is not exposed from the surface of the silicon carbide raw material 153. From another perspective, the buffer layer 170 is disposed between the crucible 130 and the silicon carbide raw material 153. Specifically, the first portion 171 is disposed between the bottom portion 134 and the silicon carbide raw material 153. The second portion 172 is disposed between the sidewall portion 135 and the silicon carbide raw material 153.

The buffer layer 170 is disposed between the surface and bottom 134 of the silicon carbide raw material 153. From another perspective, the buffer layer 170 is disposed in the growth direction 104 from the surface of the silicon carbide raw material 153. Note that in this specification, the surface of the silicon carbide raw material 153 is a surface formed by an assembly of the surfaces of the powder of the silicon carbide raw material 153 exposed to the space inside the crucible 130.

The silicon carbide raw material 153 is in contact with the protrusion 133. The silicon carbide raw material 153 surrounds the protrusion 133. The silicon carbide raw material 153 is in contact with the sidewall 135. A portion of the silicon carbide raw material 153 is separated from the sidewall 135 by the second portion 172. The silicon carbide raw material 153 is spaced apart from the bottom 134. The silicon carbide raw material 153 is separated from the bottom 134 by the first portion 171.

The height of the silicon carbide raw material 153 in the extension direction of the second portion 172 is set to a second height H2. The second height H2 is higher than the first height H1. The value obtained by dividing the first height H1 by the second height H2 is, for example, 0.5 or more and 0.85 or less. The value obtained by dividing the first height H1 by the second height H2 may be, for example, 0.55 or more, or 0.6 or more. The value obtained by dividing the first height H1 by the second height H2 may be, for example, 0.8 or less, or 0.75 or less.

The buffer layer 170 is arranged so that the buffer layer 170 is not located in an area within 5 mm of the surface of the silicon carbide raw material 153 in the direction in which the second portion 172 extends. From another perspective, the shortest distance I1 between the surface of the silicon carbide raw material 153 and the buffer layer 170 in the growth direction 104 is 5 mm or more. The shortest distance I1 may be, for example, 8 mm or more, or 10 mm or more. The shortest distance I1 may be, for example, 20 mm or less, or 15 mm or less. In this way, a growth apparatus 300 is prepared in which the buffer layer 170 is arranged between the crucible 130 and the silicon carbide raw material 153.

Next, the step (S20) of preheating the silicon carbide raw material is carried out. Figure 14 is a schematic diagram showing the relationship between pressure and time in the step (S20) of preheating the silicon carbide raw material. In Figure 14, the vertical axis shows the pressure inside the crucible 130, and the horizontal axis shows time.

The crucible 130 is heated by applying power to the first resistive heater 141, the second resistive heater 142, and the third resistive heater 143. This heats the silicon carbide raw material 153 and the buffer layer 170. In the step (S20) of preheating the silicon carbide raw material, the temperature of the crucible 130 (preheating temperature) is, for example, about 2200°C or higher and 2400°C or lower.

As shown in FIG. 14, the point at which the temperature of the crucible 130 reaches the preheating temperature is the fifth point in time T5. The pressure inside the crucible 130 at the fifth point in time T5 (first pressure P1) is approximately 0.1 kPa or more and 3 kPa or less.

As shown in FIG. 14, in preheating, for example, the pressure inside the crucible 130 is reduced from a first pressure P1 to a second pressure P2. The second pressure P2 is, for example, 0.08 kPa or more and 0.12 kPa or less. The second pressure P2 may be, for example, 0.085 kPa or more, or 0.09 kPa or more. The second pressure P2 may be 0.115 kPa or less, or 0.11 kPa or less.

The time when the pressure inside the crucible 130 reaches the second pressure P2 is defined as the sixth time T6. The time when the preheating ends is defined as the seventh time T7. The time between the sixth time T6 and the seventh time T7 is, for example, 3 hours or more. From another perspective, the pressure inside the crucible 130 is the second pressure P2 from the time 3 hours before the end of the preheating to the time when the preheating ends. The time between the sixth time T6 and the seventh time T7 may be 4 hours or more, or 5 hours or more. The time between the sixth time T6 and the seventh time T7 may be 7 hours or less, or 6 hours or less.

The time from the fifth point T5 to the seventh point T7 is, for example, 5 hours or more and 20 hours or less. From the seventh point T7, the crucible 130 is cooled. In this way, the silicon carbide raw material 153 is preheated.

Next, the step (S30) of placing the seed substrate inside the crucible is carried out. FIG. 15 is a schematic cross-sectional view showing the step (S30) of placing the seed substrate inside the crucible. As shown in FIG. 15, the seed substrate 150 is fixed to the lid portion 131 using, for example, an adhesive (not shown). The seed substrate 150 has a growth surface 151 and an attachment surface 152. The attachment surface 152 is opposite the growth surface 151. The growth surface 151 faces the silicon carbide raw material 153. The attachment surface 152 faces the lid portion 131. The growth surface 151 of the seed substrate 150 is arranged to face the surface of the silicon carbide raw material 153.

The seed substrate 150 is, for example, a silicon carbide single crystal substrate with a polytype of 4H. The diameter of the growth surface 151 is, for example, 150 mm. The diameter of the growth surface 151 may be 150 mm or more. The growth surface 151 is, for example, a carbon surface or a surface inclined at an off angle of about 8° or less with respect to the carbon surface. In this manner, the seed substrate 150 is placed inside the crucible 130.

Next, a step (S40) of growing a silicon carbide crystal on a seed substrate is carried out. FIG. 16 is a schematic cross-sectional view showing the step (S40) of growing a silicon carbide crystal on a seed substrate. First, the pressure inside crucible 130 is reduced while the temperature of growth surface 151 of seed substrate 150 is lower than the temperature of silicon carbide raw material 153. The pressure of the atmospheric gas inside crucible 130 is reduced to, for example, 1.0 kPa. This causes silicon carbide raw material 153 to begin to sublimate, and the sublimated silicon carbide gas recrystallizes on growth surface 151 of seed substrate 150. Silicon carbide crystal 110 begins to grow as a single crystal on growth surface 151 of seed substrate 150. The growth direction of silicon carbide crystal 110 is growth direction 104. While the silicon carbide crystal 110 is growing, the pressure inside the crucible 130 is maintained at, for example, about 0.1 kPa or more and 3 kPa or less.

During the process of growing the silicon carbide crystal 110, a carbon lump generated from the buffer layer 170 may be incorporated into the silicon carbide crystal 110, thereby forming first carbon inclusions 71 (see FIGS. 5 and 6). During the process of growing the silicon carbide crystal 110, a carbon lump generated from the crucible 130 and the graphite member (not shown) is incorporated into the silicon carbide crystal 110, thereby forming second carbon inclusions 72 (see FIGS. 5 and 6). The number of first carbon inclusions 71 incorporated into the silicon carbide crystal 110 is smaller than the number of second carbon inclusions 72 incorporated into the silicon carbide crystal 110.

In this manner, silicon carbide crystal 110 is grown on seed substrate 150 by sublimating silicon carbide raw material 153. In the step (S40) of growing silicon carbide crystal on seed substrate, the temperature of silicon carbide crystal 110 is, for example, 2100°C or higher and 2300°C or lower. The temperature of silicon carbide crystal 110 is not particularly limited, but may be, for example, 2125°C or higher or 2150°C or higher. The temperature of silicon carbide crystal 110 is not particularly limited, but may be, for example, 2250°C or lower or 2275°C or lower.

FIG. 17 is an enlarged schematic diagram showing region XVII in FIG. 16. As shown in FIG. 17, a plurality of third voids 14 are formed inside silicon carbide crystal 110. In a cross section parallel to growth direction 104, each of the plurality of third voids 14 has a shape of, for example, a triangle. The width of third void 14 in a direction perpendicular to the growth direction of silicon carbide crystal 110 decreases along the growth direction of silicon carbide crystal 110. From another perspective, the width of third void 14 in a direction perpendicular to growth direction 104 decreases from seed substrate 150 toward silicon carbide raw material 153. In this manner, silicon carbide crystal 110 is manufactured.

After the step (S40) of growing silicon carbide crystals on the seed substrate, a portion of the silicon carbide raw material 153 is carbonized. Specifically, for example, a portion of the silicon carbide raw material 153 close to the surface of the silicon carbide raw material 153 and close to the sidewall portion 135 is carbonized. The carbonized silicon carbide raw material 153 is a portion of the silicon carbide raw material 153 from which silicon has sublimated and carbon remains. The carbonized silicon carbide raw material 153 is in powder form.

The remainder of the silicon carbide raw material 153 is solidified. The solidified silicon carbide raw material 153 is adhered to the protrusion 133. The solidified silicon carbide raw material 153 may be adhered to the buffer layer 170. By disposing the buffer layer 170 between the crucible 130 and the silicon carbide raw material 153, it is possible to prevent the solidified silicon carbide raw material 153 from adhering to the bottom 134 and sidewall 135 of the crucible 130.

After the step (S40) of growing silicon carbide crystals on the seed substrate, silicon carbide raw material 153 and buffer layer 170 are removed from crucible 130. Specifically, for example, silicon carbide raw material 153, protrusion 133, and buffer layer 170 are removed as a unit from crucible 130. By using buffer layer 170 to prevent solidified silicon carbide raw material 153 from adhering to bottom 134 and sidewall 135 of crucible 130, silicon carbide raw material 153 can be easily removed from crucible 130.

The growth of silicon carbide crystal 110 may be repeated seven or more times using raw material storage section 132. Specifically, after the manufacture of silicon carbide crystal 110 has been performed, the growth of silicon carbide crystal 110 may be repeated by performing the steps of preparing the above-mentioned growth apparatus using the same raw material storage section 132 (S10), preheating the silicon carbide raw material (S20), placing a seed substrate inside the crucible (S30), and growing silicon carbide crystal on the seed substrate (S40). Lid section 131 is replaced with another lid section 131, for example, after the growth of silicon carbide crystal 110 has been performed once.

The number of times that the growth of silicon carbide crystal 110 is repeated using raw material storage section 132 may be, for example, 8 times or more. The number of times that the growth of silicon carbide crystal 110 is repeated using raw material storage section 132 may be, for example, 10 times or less, or 9 times or less.

The silicon carbide crystal 110 may be used to manufacture the silicon carbide substrate 100. Specifically, the silicon carbide crystal 110 is sliced along a plane perpendicular to the central axis of the silicon carbide crystal 110, for example, using a saw wire. This results in a plurality of silicon carbide substrates 100 (see FIG. 4). As shown in FIG. 4, the silicon carbide substrate 100 has a first main surface 1 and a second main surface 2. Of the plurality of third voids 14, the void exposed to the first main surface 1 is the first void 10. Of the plurality of third voids 14, the void exposed to the second main surface 2 is the second void 20.

Although the embodiment in which the buffer layer 170 is made of graphite has been described above, the buffer layer 170 may be made of, for example, tantalum carbide. In the step (S20) of preheating the silicon carbide raw material, the pressure inside the crucible 130 may be maintained at the second pressure P2 from the fifth time point T5 to the seventh time point T7. The silicon carbide substrate 100 may not include the first carbon inclusion 71. The silicon carbide substrate 100 may include only the second carbon inclusion 72.

(Method of Manufacturing Silicon Carbide Semiconductor Device)
Next, a method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment will be described. Fig. 18 is a flow diagram that outlines the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment. As shown in Fig. 18, the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment mainly includes a step (S1) of preparing a silicon carbide epitaxial substrate and a step (S2) of forming an electrode on the silicon carbide epitaxial layer.

First, the step (S1) of preparing a silicon carbide epitaxial substrate is carried out. In the step (S1) of preparing a silicon carbide epitaxial substrate, first, the silicon carbide substrate 100 according to this embodiment is prepared (see FIG. 4).

Next, silicon carbide epitaxial layer 40 is formed on silicon carbide substrate 100. Specifically, silicon carbide epitaxial layer 40 is formed by epitaxial growth on first main surface 1 of silicon carbide substrate 100. In the epitaxial growth, for example, silane (SiH ₄ ) and propane (C ₃ H ₈ ) are used as source gases, and hydrogen (H ₂ ) is used as a carrier gas. The temperature of the epitaxial growth is, for example, about 1400° C. or higher and 1700° C. or lower. In the epitaxial growth, an n-type impurity such as nitrogen is introduced into silicon carbide epitaxial layer 40. In this manner, silicon carbide epitaxial substrate 200 according to this embodiment is prepared.

FIG. 19 is a schematic cross-sectional view showing the configuration of a silicon carbide epitaxial substrate 200 according to this embodiment. For ease of explanation, the first void 10, the second void 20, the third void 14, and the carbon inclusions 70 are omitted in the figures following FIG. 19.

As shown in FIG. 19, the silicon carbide epitaxial substrate 200 has a silicon carbide substrate 100 and a silicon carbide epitaxial layer 40. The silicon carbide epitaxial layer 40 is provided on the silicon carbide substrate 100. The silicon carbide epitaxial layer 40 has a third main surface 3. The third main surface 3 constitutes the front surface of the silicon carbide epitaxial substrate 200. The second main surface 2 constitutes the back surface of the silicon carbide epitaxial substrate 200.

The silicon carbide epitaxial layer 40 may have a buffer layer 41 and a drift layer 42. The buffer layer 41 is in contact with the silicon carbide substrate 100 at the first main surface 1. The drift layer 42 is provided on the buffer layer 41. Each of the buffer layer 41 and the drift layer 42 contains an n-type impurity such as nitrogen. The concentration of the n-type impurity contained in the buffer layer 41 may be higher than the concentration of the n-type impurity contained in the drift layer 42.

Next, a process (S2) of forming an electrode on the silicon carbide epitaxial layer is carried out. Specifically, the silicon carbide epitaxial substrate 200 is processed as follows. First, ions are implanted into the silicon carbide epitaxial substrate 200.

FIG. 20 is a schematic cross-sectional view showing the process of forming a body region. In the process of forming the body region, p-type impurities such as aluminum are ion-implanted into the third main surface 3 of the silicon carbide epitaxial layer 40. This forms a body region 113 having p-type conductivity. The portion where the body region 113 is not formed becomes the drift layer 42 and the buffer layer 41. The thickness of the body region 113 is, for example, 0.9 μm. The silicon carbide epitaxial layer 40 includes the buffer layer 41, the drift layer 42, and the body region 113.

Next, a step of forming a source region is carried out. FIG. 21 is a schematic cross-sectional view showing the step of forming a source region. Specifically, n-type impurities such as phosphorus are ion-implanted into the body region 113. This forms a source region 114 having an n-type conductivity. The thickness of the source region 114 is, for example, 0.4 μm. The concentration of the n-type impurity contained in the source region 114 is higher than the concentration of the p-type impurity contained in the body region 113.

Next, a p-type impurity such as aluminum is ion-implanted into the source region 114 to form a contact region 118. The contact region 118 is formed so as to penetrate the source region 114 and the body region 113 and contact the drift layer 42. The concentration of the p-type impurity contained in the contact region 118 is higher than the concentration of the n-type impurity contained in the source region 114.

Next, activation annealing is performed to activate the ion-implanted impurities. The temperature of the activation annealing is, for example, 1500°C or higher and 1900°C or lower. The activation annealing time is, for example, about 30 minutes. The atmosphere of the activation annealing is, for example, an argon atmosphere.

Next, a step of forming a trench in the third main surface 3 of the silicon carbide epitaxial layer 40 is performed. FIG. 22 is a cross-sectional schematic diagram showing a step of forming a trench in the third main surface 3 of the silicon carbide epitaxial layer 40. A mask 117 having an opening is formed on the third main surface 3 including the source region 114 and the contact region 118. The source region 114, the body region 113, and a part of the drift layer 42 are removed by etching using the mask 117. For example, inductively coupled plasma reactive ion etching can be used as the etching method. Specifically, for example, inductively coupled plasma reactive ion etching using SF ₆ or a mixed gas of SF ₆ and O ₂ as a reactive gas is used. A recess is formed in the third main surface 3 by etching.

Next, thermal etching is performed in the recess. The thermal etching can be performed, for example, by heating in an atmosphere containing a reactive gas having at least one or more types of halogen atoms, with the mask 117 formed on the third main surface 3. The at least one or more types of halogen atoms include at least one of chlorine (Cl) atoms and fluorine (F) atoms. The atmosphere includes, for example, Cl ₂ , BCl ₃ , SF ₆ or CF _4. For example, a mixed gas of chlorine gas and oxygen gas is used as the reactive gas, and the thermal etching is performed at a heat treatment temperature of, for example, 700° C. or more and 1000° C. or less. The reactive gas may include a carrier gas in addition to the above-mentioned chlorine gas and oxygen gas. For example, nitrogen gas, argon gas, or helium gas can be used as the carrier gas.

As shown in FIG. 22, a trench 56 is formed in the third main surface 3 by thermal etching. The trench 56 is defined by a sidewall surface 53 and a bottom wall surface 54. The sidewall surface 53 is formed by the source region 114, the body region 113, and the drift layer 42. The bottom wall surface 54 is formed by the drift layer 42. Next, the mask 117 is removed from the third main surface 3.

Next, a step of forming a gate insulating film is carried out. FIG. 23 is a schematic cross-sectional view showing the step of forming a gate insulating film. Specifically, silicon carbide epitaxial substrate 200 having trenches 56 formed in third main surface 3 is heated in an oxygen-containing atmosphere at a temperature of, for example, 1300° C. or higher and 1400° C. or lower. This forms gate insulating film 115 that contacts drift layer 42 at bottom wall surface 54, contacts drift layer 42, body region 113, and source region 114 at side wall surface 53, and contacts source region 114 and contact region 118 at third main surface 3.

Next, a step of forming a gate electrode is carried out. FIG. 24 is a schematic cross-sectional view showing the step of forming a gate electrode and an interlayer insulating film. Gate electrode 127 is formed inside trench 56 so as to contact gate insulating film 115. Gate electrode 127 is disposed inside trench 56 and formed on gate insulating film 115 so as to face each of sidewall surface 53 and bottom wall surface 54 of trench 56. Gate electrode 127 is formed, for example, by LPCVD (Low Pressure Chemical Vapor Deposition).

Next, the interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed so as to cover the gate electrode 127 and to be in contact with the gate insulating film 115. The interlayer insulating film 126 is formed, for example, by chemical vapor deposition. The interlayer insulating film 126 is composed of a material containing, for example, silicon dioxide. Next, a portion of the interlayer insulating film 126 and the gate insulating film 115 are etched so as to form openings over the source region 114 and the contact region 118. As a result, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

Next, a process for forming a source electrode is carried out. The source electrode 116 is formed so as to contact each of the source region 114 and the contact region 118. The source electrode 116 is formed, for example, by a sputtering method. The source electrode 116 is made of a material including, for example, Ti (titanium), Al (aluminum), and Si (silicon).

Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with each of the source region 114 and the contact region 118 is held at a temperature of, for example, 900°C or higher and 1100°C or lower for about 5 minutes. As a result, at least a portion of the source electrode 116 is silicided. As a result, the source electrode 116 that forms an ohmic junction with the source region 114 is formed. The source electrode 116 may also form an ohmic junction with the contact region 118.

Next, the source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed so as to cover the source electrode 116 and the interlayer insulating film 126.

Next, a process for forming a drain electrode is carried out. First, the silicon carbide substrate 100 is polished at the second main surface 2. This reduces the thickness of the silicon carbide substrate 100. Next, the drain electrode 123 is formed. The drain electrode 123 is formed so as to be in contact with the second main surface 2. In this manner, the silicon carbide semiconductor device 400 according to this embodiment is manufactured.

FIG. 25 is a schematic cross-sectional view showing the configuration of a silicon carbide semiconductor device 400 according to this embodiment. The silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The silicon carbide semiconductor device 400 mainly includes a silicon carbide epitaxial substrate 200, a gate electrode 127, a gate insulating film 115, a source electrode 116, a drain electrode 123, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 200 includes a buffer layer 41, a drift layer 42, a body region 113, a source region 114, and a contact region 118. The silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor).

Next, the effects of the silicon carbide substrate, silicon carbide epitaxial substrate, method for manufacturing a silicon carbide semiconductor device, and method for manufacturing a silicon carbide crystal according to this embodiment will be described.

In recent years, new defects (hereafter referred to as voids) have been found in silicon carbide crystals. Unlike micropipes, voids do not penetrate the silicon carbide crystal. Furthermore, the width of a void is usually larger than the width of a micropipe. Furthermore, the width of a void is characterized by becoming smaller in the growth direction. When a silicon carbide semiconductor device 400 is manufactured using a silicon carbide substrate 100 having a void exposed on its main surface, the reliability of the silicon carbide semiconductor device 400 may decrease. As a result, the yield of the silicon carbide semiconductor device 400 may decrease.

The inventors conducted extensive research into the causes of void formation in silicon carbide substrate 100 and found that the formation of voids is due to carbon inclusions 70 that are incorporated into silicon carbide crystal 110. The inventors conducted further extensive research into the causes of carbon inclusions 70 being incorporated into silicon carbide crystal 110 and found that lumps of carbon generated from buffer layer 170 disposed inside crucible 130 are incorporated into silicon carbide crystal 110.

Based on the above findings, the inventors came up with the idea of arranging silicon carbide raw material 153 so as to cover buffer layer 170, thereby preventing carbon lumps generated from buffer layer 170 from being incorporated into silicon carbide crystal 110.

According to the method for manufacturing silicon carbide crystal 110 according to this embodiment, in the step (S10) of preparing growth apparatus 300, silicon carbide raw material 153 covers buffer layer 170 so that buffer layer 170 is not exposed from the surface of silicon carbide raw material 153. This makes it possible to suppress carbon lumps generated from buffer layer 170 from being mixed into silicon carbide crystal 110. This makes it possible to reduce the surface density of voids in silicon carbide substrate 100. As a result, when silicon carbide semiconductor device 400 is manufactured using silicon carbide substrate 100 according to this embodiment, the yield of silicon carbide semiconductor device 400 can be improved.

If the height of the buffer layer 170 is excessively low compared to the height of the silicon carbide raw material 153, the contact area between the silicon carbide raw material 153 and the crucible 130 becomes excessively large. Therefore, the portion of the silicon carbide raw material 153 that adheres to the crucible 130 after the silicon carbide crystal 110 is grown becomes excessively large. As a result, it becomes difficult to remove the silicon carbide raw material 153 from the crucible 130 after the silicon carbide crystal 110 is grown. According to the method for manufacturing the silicon carbide crystal 110 of this embodiment, in the step (S10) of preparing the growth apparatus 300, the value obtained by dividing the height (first height H1) of the second portion 172 in the direction in which the second portion 172 extends by the height (second height H2) of the silicon carbide raw material 153 in the direction in which the second portion 172 extends is 0.5 or more. This prevents the contact area between the silicon carbide raw material 153 and the crucible 130 from becoming excessively large. This makes it easier to remove the silicon carbide raw material 153 from the crucible 130 after the silicon carbide crystal 110 has grown.

According to the method for manufacturing silicon carbide crystal 110 according to this embodiment, in the step (S10) of preparing growth apparatus 300, the value obtained by dividing first height H1 by second height H2 may be 0.85 or less. This allows the shortest distance I1 between the surface of silicon carbide raw material 153 and buffer layer 170 in the extension direction of second portion 172 to be sufficiently long. From another perspective, buffer layer 170 can be sufficiently covered using silicon carbide raw material 153. As a result, it is possible to effectively prevent carbon lumps generated from buffer layer 170 from being mixed into silicon carbide crystal 110.

According to the method for manufacturing silicon carbide crystal 110 according to this embodiment, in the step (S10) of preparing a growth apparatus, buffer layer 170 may be arranged so that buffer layer 170 is not located in an area within 5 mm of the surface of silicon carbide raw material 153 in the extension direction of second portion 172. This allows the shortest distance I1 between buffer layer 170 and the surface of silicon carbide raw material 153 in the extension direction of second portion 172 to be sufficiently long. From another perspective, buffer layer 170 can be sufficiently covered with silicon carbide raw material 153. As a result, it is possible to effectively prevent carbon lumps generated from buffer layer 170 from being mixed into silicon carbide crystal 110.

If the buffer layer 170 is not disposed inside the crucible 130, an excessive amount of silicon carbide raw material 153 will adhere to the raw material storage section 132 after the silicon carbide crystal 110 has grown. This makes it difficult to remove the silicon carbide raw material 153 from the raw material storage section 132 after the silicon carbide crystal 110 has grown. This makes it difficult to repeatedly grow the silicon carbide crystal 110 using the raw material storage section 132. According to the method for manufacturing the silicon carbide crystal 110 of this embodiment, the growth of the silicon carbide crystal 110 may be repeated seven or more times using the raw material storage section 132. This reduces the cost required for manufacturing the silicon carbide crystal 110.

According to the method for producing silicon carbide crystal 110 according to this embodiment, the pressure inside crucible 130 is 0.08 kPa or more and 0.12 kPa or less from 3 hours before the end of preheating to the end of preheating. This can promote sublimation of silicon in silicon carbide raw material 153 in the step (S30) of preheating the silicon carbide raw material. This can promote carbonization of the portion of silicon carbide raw material 153 close to the surface of silicon carbide raw material 153. Carbonized silicon carbide raw material 153 is less likely to stick to crucible 130. As a result, silicon carbide raw material 153 can be easily removed from crucible 130.

According to the silicon carbide substrate 100 of this embodiment, the first voids 10 are present in the first main surface 1. The surface density of the first voids 10 is less than 0.04 pieces/ ^cm2 . When viewed along a straight line perpendicular to the first main surface 1, the width of the first voids 10 is 10 μm or more and 100 μm or less. When viewed along a straight line parallel to the first main surface 1, the width of the first voids 10 increases from the first main surface 1 toward the second main surface 2. When viewed along a straight line parallel to the first main surface 1, the depth of the first voids 10 is smaller than the thickness of the silicon carbide substrate 100. The first main surface 1 is a carbon surface or a surface inclined at an off angle θ of 8° or less with respect to the carbon surface.

In this way, the surface density of the first voids 10 is reduced in the silicon carbide substrate 100 according to this embodiment. Therefore, when the silicon carbide semiconductor device 400 is manufactured using the silicon carbide substrate 100 according to this embodiment, the yield of the silicon carbide semiconductor device 400 can be improved.

The silicon carbide substrate 100 according to this embodiment includes a first main surface 1 and a second main surface 2 opposite to the first main surface 1. The first voids 10 are present in the first main surface 1, and the second voids 20 are present in the second main surface 2. The surface density of the second voids 20 is less than 0.04 voids/ ^cm2 . When viewed along a straight line perpendicular to the first main surface 1, the width of the first voids 10 is 10 μm or more and 100 μm or less. When viewed along a straight line perpendicular to the second main surface 2, the width of the second voids 20 is 10 μm or more and 100 μm or less. When viewed along a straight line parallel to the first main surface 1, the widths of the first voids 10 and the second voids 20 increase from the first main surface 1 toward the second main surface 2. When viewed along a straight line parallel to first main surface 1, the depth of each of first void 10 and second void 20 is smaller than the thickness of silicon carbide substrate 100. Second main surface 2 is a silicon surface or a surface inclined at an off angle θ of 8° or less with respect to the silicon surface.

In this way, the surface density of the second voids 20 is reduced in the silicon carbide substrate 100 according to this embodiment. Therefore, when the silicon carbide semiconductor device 400 is manufactured using the silicon carbide substrate 100 according to this embodiment, the yield of the silicon carbide semiconductor device 400 can be improved.

(Sample preparation)
First, silicon carbide crystal 110 according to Samples 1 to 4 were prepared. Samples 1 to 3 are comparative examples. Sample 4 is an example. In the production of silicon carbide crystal 110 according to Sample 1, buffer layer 170 was exposed from the surface of silicon carbide crystal 110. In the production of silicon carbide crystal 110 according to Sample 2, buffer layer 170 was not disposed inside crucible 130. In the production of silicon carbide crystal 110 according to Samples 3 and 4, silicon carbide raw material 153 covered buffer layer 170 such that buffer layer 170 was not exposed from the surface of silicon carbide raw material 153.

In the method for producing silicon carbide crystal 110 according to Samples 1 to 3, when silicon carbide raw material 153 was preheated, the pressure inside crucible 130 was maintained at first pressure P1. From another perspective, in the method for producing silicon carbide crystal 110 according to Samples 1 to 3, when silicon carbide raw material 153 was preheated, the pressure inside crucible 130 was not reduced from first pressure P1 to second pressure P2. For silicon carbide crystal 110 according to Sample 4, the above-mentioned step (S20) of preheating the silicon carbide raw material was carried out. In other words, silicon carbide crystal 110 according to Sample 4 was produced according to the above-mentioned method for producing silicon carbide crystal 110.

(Test Method 1)
After the silicon carbide crystal 110 according to Samples 1 to 4 was produced, it was confirmed whether the crucible 130 was reusable. After the silicon carbide crystal 110 according to Samples 1 to 4 was produced, it was confirmed whether the silicon carbide raw material 153 could be taken out from the crucible 130. Using the above-mentioned method for measuring the first voids 10, the surface density of the first voids 10 in each of the plurality of silicon carbide substrates 100 obtained by slicing the silicon carbide crystal 110 according to Samples 1 to 4 was measured. The average value of the surface density of the first voids 10 in the plurality of silicon carbide substrates 100 obtained from the silicon carbide crystal 110 according to Sample 1 was taken as the surface density of the first voids 10 in Sample 1. Similarly, the surface density of the first voids 10 in the silicon carbide crystal 110 according to Samples 2 to 4 was measured.

(Test result 1)

Table 1 shows the test results for samples 1 to 4. In the "Reuse of crucible" column in Table 1, A indicates that it was possible to repeatedly grow silicon carbide crystal 110 using raw material storage section 132. B indicates that it was not possible to repeatedly grow silicon carbide crystal 110 using raw material storage section 132. In the "Removal of silicon carbide raw material" column in Table 1, A indicates that it was possible to remove silicon carbide raw material 153 from crucible 130 after silicon carbide crystal 110 was grown. B indicates that it was sometimes difficult to remove silicon carbide raw material 153 from crucible 130 after silicon carbide crystal 110 was grown. C indicates that it was not possible to remove silicon carbide raw material 153 from crucible 130 after silicon carbide crystal 110 was grown.

As shown in Table 1, it was confirmed that in samples 1, 3, and 4, the growth of silicon carbide crystal 110 could be repeatedly performed using raw material storage section 132. In sample 2, the growth of silicon carbide crystal 110 could not be repeatedly performed using raw material storage section 132. Specifically, in sample 2, after the growth of silicon carbide crystal 110, silicon carbide raw material 153 was fixed to raw material storage section 132, and therefore it was not possible to remove silicon carbide raw material 153 from crucible 130.

As shown in Table 1, in Samples 1 and 4, after the silicon carbide crystal 110 was grown, the silicon carbide raw material 153 could be easily removed from the crucible 130. In Sample 2, after the silicon carbide crystal 110 was grown, the silicon carbide raw material 153 could not be removed from the crucible 130. In Sample 3, it was sometimes difficult to remove the silicon carbide raw material 153 from the crucible 130.

As shown in Table 1, the surface density of the first voids 10 was 0.04 pieces/ ^cm2 or more in Samples 1 and 2. In Samples 3 and 4, the surface density of the first voids 10 was less than 0.04 pieces/ ^cm2 .

The above results confirm that the method for producing silicon carbide crystal 110 according to this embodiment makes it possible to easily remove silicon carbide raw material 153 from crucible 130 and to reduce the surface density of first voids 10.

(Test Method 2)
A plurality of silicon carbide crystals 110 were manufactured using the manufacturing method of silicon carbide crystal 110 according to the present embodiment described above. Specifically, growth of silicon carbide crystal 110 was repeated 15 times using the same raw material accommodation unit 132. After growth of silicon carbide substrate 100 was performed once, lid unit 131 was replaced with another lid unit 131. The surface density of first voids 10 in each of the manufactured plurality of silicon carbide crystals 110 was measured. Specifically, the surface density of first voids 10 in a plurality of silicon carbide substrates 100 obtained by slicing silicon carbide crystal 110 was measured. The average surface density of first voids 10 in a plurality of silicon carbide substrates 100 obtained from one silicon carbide crystal 110 was determined as the surface density of first voids 10 in the silicon carbide crystal 110.

(Test result 2)

Table 2 shows the surface density of the first voids 10 in each of the manufactured silicon carbide crystals 110. In Table 2, the surface density of the first voids 10 is shown when the number of uses of the raw material accommodation part 132 is 1, 5, 10, and 15. As shown in Table 2, when the number of uses of the raw material accommodation part 132 is 10 or less, the surface density of the first voids 10 is 0.09 pieces/cm ² or less. When the number of uses of the raw material accommodation part 132 is 15 times, the surface density of the first voids 10 is 0.27 pieces/cm ^2. When the number of uses of the raw material accommodation part 132 is 15 times, it is considered that the carbon lumps generated from the raw material accommodation part 132 increased due to wear of the inner wall of the raw material accommodation part 132. As a result, it is considered that the surface density of the first voids 10 increased due to the increase in the carbon inclusions 70 taken into the silicon carbide crystal 110.

The above results confirm that the method for manufacturing silicon carbide crystal 110 according to this embodiment makes it possible to reduce the surface density of first voids 10 even when the growth of silicon carbide crystal 110 is repeatedly performed using raw material storage section 132.

The embodiments disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is indicated by the claims rather than the embodiments described above, and it is intended to include the meaning equivalent to the claims and all modifications within the scope.

1. First main surface, 2. Second main surface, 3. Third main surface, 7. Orientation flat portion, 8. Arc-shaped portion, 9. Outer peripheral side surface, 10. First void, 11. First opening, 12. First side portion, 13. First bottom portion, 14. Third void, 15. Silicon carbide region, 20. Second void, 21. Second opening, 22. Second side portion, 23. Second bottom portion, 30. Raman spectroscopy device, 31. Objective lens, 32. Light source, 33. Spectrometer, 34. Stage, 35. Beam splitter, 36. Incident light, 38. Detector, 40. Silicon carbide epitaxial layer, 41. buffer layer, 42 drift layer, 53 side wall surface, 54 bottom wall surface, 56 trench, 60 rectangular parallelepiped region, 70 carbon inclusion, 71 first carbon inclusion, 72 second carbon inclusion, 100 silicon carbide substrate, 101 first direction, 102 second direction, 103 third direction, 104 growth direction, 110 silicon carbide crystal, 113 body region, 114 source region, 115 gate insulating film, 116 source electrode, 117 mask, 118 contact region, 119 source wiring, 123 drain electrode, 126 interlayer insulating film, 127 gate electrode (electrode), 130 crucible, 131 lid, 132 raw material storage section, 133 protrusion, 134 bottom, 135 side wall, 141 first resistive heater, 142 second resistive heater, 143 third resistive heater, 150 seed substrate, 151 growth surface, 152 mounting surface, 153 silicon carbide raw material, 170 buffer layer, 171 first portion, 172 second portion, 200 silicon carbide epitaxial substrate, 300 growth apparatus, 400 silicon carbide semiconductor device, A1 first width, A2 second width Width, B1 first depth, B2 second depth, C1 first temperature, C2 second temperature, C3 third temperature, D1 first distance, D2 second distance, D3 third distance, E1 thickness, F1 maximum length, G1 first arrow, G2 second arrow, G3 third arrow, H1 first height, H2 second height, I1 shortest distance, L1 first length, L2 second length, P1 first pressure, P2 second pressure, T1 first time point, T2 second time point, T3 third time point, T4 fourth time point, T5 fifth time point, T6 sixth time point, T7 seventh time point, W1 diameter, θ off angle.

Claims (12)

A silicon carbide substrate having a first main surface and a second main surface opposite the first main surface,
a first void is present in the first major surface;
The surface density of the first voids is less than 0.04 voids/cm ² ;
When viewed along a straight line perpendicular to the first main surface, the width of the first void is 10 μm or more and 100 μm or less;
When viewed along a straight line parallel to the first main surface, a width of the first void increases from the first main surface toward the second main surface,
When viewed along a straight line parallel to the first main surface, a depth of the first void is smaller than a thickness of the silicon carbide substrate;
The silicon carbide substrate, wherein the first main surface is a carbon surface or a surface inclined at an off angle of 8° or less with respect to the carbon surface. A silicon carbide substrate having a first main surface and a second main surface opposite the first main surface,
a first void is present in the first major surface and a second void is present in the second major surface;
The surface density of the second voids is less than 0.04 voids/cm ² ;
When viewed along a straight line perpendicular to the first main surface, the width of the first void is 10 μm or more and 100 μm or less;
When viewed along a straight line perpendicular to the second main surface, the width of the second void is 10 μm or more and 100 μm or less;
When viewed along a straight line parallel to the first main surface, a width of each of the first voids and the second voids increases from the first main surface toward the second main surface,
When viewed along a straight line parallel to the first main surface, a depth of each of the first voids and the second voids is smaller than a thickness of the silicon carbide substrate;
The second main surface is a silicon surface or a surface inclined at an off angle of 8° or less with respect to the silicon surface. one or more carbon inclusions are present in the rectangular parallelepiped region of the silicon carbide substrate,
In a direction from the first main surface to the second main surface, a distance from the first main surface to an upper end surface of the rectangular parallelepiped region is 50 μm, and a distance from the first main surface to a lower end surface of the rectangular parallelepiped region is 200 μm;
When viewed along a straight line perpendicular to the first main surface, the length of a long side of the rectangular parallelepiped region is 0.82 mm, and the length of a short side of the rectangular parallelepiped region is 0.7 mm;
When viewed along a straight line perpendicular to the first main surface, the first void overlaps with the rectangular parallelepiped region,
3. The silicon carbide substrate according to claim 1, wherein, when a Raman spectrum of the one or more carbon inclusions is measured, a half-width of a peak in a Raman spectrum having a Raman shift closest to 2700 cm ⁻¹ in at least one of the one or more carbon inclusions is less than 60 cm ⁻¹ . A silicon carbide substrate according to any one of claims 1 to 3;
a silicon carbide epitaxial layer provided on the silicon carbide substrate. A step of preparing a silicon carbide epitaxial substrate according to claim 4;
and forming an electrode on the silicon carbide epitaxial layer. preparing a growth apparatus having a buffer layer disposed between a crucible and a silicon carbide source;
After the step of preparing the growth apparatus in which the buffer layer is disposed between the crucible and the silicon carbide source material, a step of preheating the silicon carbide source material;
After the step of preheating the silicon carbide raw material, placing a seed substrate in the crucible;
and growing a silicon carbide crystal on the seed substrate by sublimating the silicon carbide raw material.
a growth apparatus having a buffer layer disposed between the crucible and the silicon carbide raw material, the silicon carbide raw material covering the buffer layer such that the buffer layer is not exposed from a surface of the silicon carbide raw material. The crucible includes a bottom and a sidewall portion connected to the bottom,
The buffer layer is
a first portion disposed between the bottom and the silicon carbide source material;
a second portion connected to the first portion and disposed between the sidewall portion and the silicon carbide source material,
7. The method for producing a silicon carbide crystal according to claim 6, wherein, in the step of preparing the growth apparatus in which the buffer layer is disposed between the crucible and the silicon carbide raw material, a value obtained by dividing a height of the second portion by a height of the silicon carbide raw material in a direction in which the second portion extends is equal to or greater than 0.5 and equal to or less than 0.85. The crucible includes a bottom and a sidewall portion connected to the bottom,
The buffer layer is
a first portion disposed between the bottom and the silicon carbide source material;
a second portion connected to the first portion and disposed between the sidewall portion and the silicon carbide source material,
7. The method for producing a silicon carbide crystal according to claim 6, wherein, in the step of preparing the growth apparatus in which the buffer layer is disposed between the crucible and the silicon carbide raw material, the buffer layer is disposed such that the buffer layer is not located in a region that is a distance within 5 mm from a surface of the silicon carbide raw material in the direction in which the second portion extends. The crucible includes a source container in which the buffer layer and the silicon carbide source material are disposed, and a lid disposed on the source container;
9. The method for producing silicon carbide crystal according to claim 6, wherein the silicon carbide crystal is repeatedly grown seven or more times using the source material accommodation portion. The method for producing silicon carbide crystals according to any one of claims 6 to 9, wherein the buffer layer contains carbon. The method for producing silicon carbide crystals according to claim 10, wherein the buffer layer is made of a carbon sheet. The method for producing silicon carbide crystals according to any one of claims 6 to 11, wherein in the step of preheating the silicon carbide raw material, the pressure inside the crucible is 0.08 kPa or more and 0.12 kPa or less during the period from 3 hours before the end of preheating to the end of preheating.

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