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WO2025060063A1 - Procédé, appareil, et système de calcul de fonction sur la base de l'intégration d'une mémoire et d'un calcul - Google Patents

Procédé, appareil, et système de calcul de fonction sur la base de l'intégration d'une mémoire et d'un calcul Download PDF

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Publication number
WO2025060063A1
WO2025060063A1 PCT/CN2023/120690 CN2023120690W WO2025060063A1 WO 2025060063 A1 WO2025060063 A1 WO 2025060063A1 CN 2023120690 W CN2023120690 W CN 2023120690W WO 2025060063 A1 WO2025060063 A1 WO 2025060063A1
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Prior art keywords
value
current
power term
word line
function
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English (en)
Chinese (zh)
Inventor
周海洋
呼红阳
李智
周治道
许晓欣
谢元禄
窦春萌
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Priority to PCT/CN2023/120690 priority Critical patent/WO2025060063A1/fr
Publication of WO2025060063A1 publication Critical patent/WO2025060063A1/fr
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing

Definitions

  • the present disclosure relates to the field of artificial intelligence technology, and in particular to a method, device, and system for implementing function computing based on storage and computing integration.
  • the present disclosure provides a method for implementing function computing based on storage and computing integration.
  • a method for realizing function calculation based on storage and calculation integration comprising: for a first power term in a first Taylor expansion in a first function to be calculated, adjusting a first conductance value of a variable resistor on a word line corresponding to the first power term in a semiconductor memory device according to a coefficient value of a first coefficient corresponding to the first power term; inputting a pulse voltage to a word line through a variable resistor in the semiconductor memory device according to the value of the first power term to obtain a first current output by a bit line; performing analog-to-digital conversion on the first current to obtain a first current value corresponding to the first current; and determining a first calculation result of the first function to be calculated based on the first current value.
  • adjusting a first conductance value of a variable resistor on a word line corresponding to a first power term in a semiconductor memory device according to a coefficient value of a first coefficient corresponding to a first power term includes: determining a variable resistor on the word line corresponding to the first power term according to an exponent value of a first power term of a first Taylor expansion; The coefficient value of the first coefficient adjusts a first conductance value of a variable resistor corresponding to a first power term in the semiconductor memory device.
  • a pulse voltage is input to a word line through a variable resistor in a semiconductor memory device according to the value of a first power term to obtain a first current output by the bit line, including: determining a word line corresponding to the first power term from a plurality of word lines according to the exponential value of the first power term of a first Taylor expansion; inputting a pulse voltage corresponding to the coefficient value of the first coefficient to the word line corresponding to the first power term according to the value of the first power term; and for each bit line, summing up the currents on a plurality of word lines associated with the bit line to obtain the first current output by the bit line.
  • a second conductance value of a variable resistor on a word line corresponding to the first power term in a semiconductor memory device is adjusted according to the value of a first power term, including: determining the variable resistor on the word line corresponding to the first power term according to the exponential value of the first power term of a first Taylor expansion; and adjusting the second conductance value of the variable resistor corresponding to the first power term in the semiconductor memory device according to the value of the first power term of the first Taylor expansion.
  • the first function to be calculated includes multiple first Taylor expansions; based on the second current value, determining the second calculation result of the first function to be calculated includes: summing the multiple second current values to obtain the second calculation result.
  • a method for realizing function calculation based on storage and calculation integration also includes: determining each second power term in the Maclaurin expansion of the second function to be calculated based on the second calculation result; for each second power term, adjusting the third conductance value of the variable resistor on the word line corresponding to the second power term in the semiconductor memory device according to the value of the second power term; inputting a pulse voltage to the word line in the semiconductor memory device according to the coefficient value of the second coefficient corresponding to the second power term to obtain a third current output by the bit line; performing analog-to-digital conversion on the third current to obtain a third current value corresponding to the third current; determining the third calculation result based on the third current value and the first calculation result. fruit.
  • a method for realizing function calculation based on storage and calculation integration also includes: determining each third power term in the second Taylor expansion of the third function to be calculated based on a third calculation result; for each third power term, adjusting the fourth conductance value of the variable resistor on the word line corresponding to the third power term in the semiconductor memory device according to the coefficient value of the third coefficient corresponding to the third power term; inputting a pulse voltage to the word line in the semiconductor memory device according to the value of the third power term to obtain a fourth current output by the bit line; performing analog-to-digital conversion on the fourth current to obtain a fourth current value corresponding to the fourth current; and determining a fourth calculation result of the third function to be calculated based on the fourth current value.
  • a first input module used for inputting a pulse voltage to a word line through a variable resistor in a semiconductor memory device according to a value of a first power term, to obtain a first current output by a bit line;
  • a first conversion module used for performing analog-to-digital conversion on the first current to obtain a first current value corresponding to the first current
  • the first determining module is used to determine a first calculation result of a first to-be-calculated function based on the first current value.
  • a third aspect of the present disclosure provides a system for implementing function computing based on storage and computing integration, including:
  • a semiconductor memory device comprises a word line and a bit line, wherein a variable resistor is arranged on the word line; the semiconductor memory device is used to receive a pulse voltage on the bit line, and obtain a first current output by the bit line through the variable resistor on the word line, wherein a first conductance value of the variable resistor is obtained by adjusting a coefficient value of a first coefficient corresponding to a first power term; and a voltage value of the pulse voltage is determined according to a value of the first power term;
  • an analog-to-digital converter configured to receive a first current sent by the semiconductor memory device, perform analog-to-digital conversion on the first current, and obtain a first current value corresponding to the first current;
  • the calculator is used to receive a first current value sent by the analog-to-digital converter, and determine a first calculation result of a first function to be calculated based on the first current value.
  • the fifth aspect of the present disclosure also provides a computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, causes the processor to execute the above-mentioned method for implementing function calculation based on storage and computing integration.
  • the sixth aspect of the present disclosure also provides a computer program product, including a computer program, which, when executed by a processor, implements the above-mentioned method of realizing function calculation based on storage and computing integration.
  • FIG4 schematically shows a flow chart of a method for realizing Softmax function calculation based on storage and computing integration according to an embodiment of the present disclosure
  • FIG5 schematically shows a flow chart of a method for implementing function computing based on storage-computing integration according to another embodiment of the present disclosure
  • FIG6 schematically shows a structural diagram of a system for implementing function computing based on storage-computing integration according to another embodiment of the present disclosure
  • FIG8 schematically shows a block diagram of an electronic device suitable for implementing function computing based on storage-computing integration according to an embodiment of the present disclosure.
  • the user information including but not limited to user personal information, user image information, user device information, such as location information, etc.
  • data including but not limited to data used for analysis, stored data, displayed data, etc.
  • the collection, storage, use, processing, transmission, provision, disclosure and application of the relevant data comply with the relevant laws, regulations and standards of the relevant countries and regions, take necessary confidentiality measures, do not violate public order and good morals, and provide corresponding operation entrances for users to choose to authorize or refuse.
  • the core calculation is the calculation of the natural exponent.
  • the conventional calculation method is to expand the natural exponent into a Taylor expansion, calculate the expansion terms one by one through a digital multiplier, and then accumulate the expansion terms through a digital adder to obtain the result. Since the polynomial coefficients of the Taylor expansion are fixed constants, they should be reused. However, in the von Neumann architecture, these constants cannot be effectively reused in the process of calculation according to the above calculation method, and the use of conventional digital circuits to calculate the natural exponential operation requires huge hardware area overhead.
  • An embodiment of the present disclosure provides a method for realizing function calculation based on storage and calculation integration, including: for a first power term in a first Taylor expansion in a first function to be calculated, adjusting a first conductance value of a variable resistor on a word line corresponding to the first power term in a semiconductor memory device according to a coefficient value of a first coefficient corresponding to the first power term; inputting a pulse voltage to a word line through a variable resistor in the semiconductor memory device according to the value of the first power term to obtain a first current output by a bit line; performing analog-to-digital conversion on the first current to obtain a first current value corresponding to the first current; and determining a first calculation result of the first function to be calculated based on the first current value.
  • FIG1 schematically shows an application scenario diagram of a method, apparatus, device, medium, and program product for implementing function computing based on storage-computing integration according to an embodiment of the present disclosure.
  • the user may use at least one of the first terminal device 101, the second terminal device 102, and the third terminal device 103 to interact with the server 105 through the network 104 to receive or send messages, etc.
  • Various communication client applications may be installed on the first terminal device 101, the second terminal device 102, and the third terminal device 103, such as shopping applications, web browser applications, search applications, instant messaging tools, email clients, social platform software, etc. (only for example).
  • the first terminal device 101, the second terminal device 102, and the third terminal device 103 may be various electronic devices having display screens and supporting web browsing, including but not limited to smart phones, tablet computers, laptop computers, desktop computers, and the like.
  • the method for implementing function computing based on storage and computing integration provided in the embodiment of the present disclosure can generally be executed by the server 105.
  • the device for implementing function computing based on storage and computing integration provided in the embodiment of the present disclosure can generally be set in the server 105.
  • the method for implementing function computing based on storage and computing integration provided in the embodiment of the present disclosure can also be executed by a server or server cluster that is different from the server 105 and can communicate with the first terminal device 101, the second terminal device 102, the third terminal device 103 and/or the server 105.
  • terminal devices, networks and servers in Figure 1 is only illustrative. Any number of terminal devices, networks and servers may be provided according to implementation requirements.
  • FIG2 schematically shows a flow chart of a method for implementing function computing based on storage-computing integration according to an embodiment of the present disclosure.
  • the method 200 for implementing function computing based on storage-computing integration of this embodiment includes operations S210 to S240 .
  • a first conductance value of a variable resistor on a word line corresponding to the first power term in the semiconductor memory device is adjusted according to a coefficient value of a first coefficient corresponding to the first power term.
  • a semiconductor memory device may include N word lines and one or more bit lines, wherein each word line may include a variable resistor.
  • the number of terms of the first Taylor expansion may be determined according to the number of word lines of the semiconductor memory device.
  • the N word lines correspond one-to-one to the N terms from front to back in the first function to be calculated.
  • the first conductance value of the variable resistor is set to the coefficient value of the first coefficient corresponding to the first power term corresponding to the variable resistor.
  • the first coefficient of the first function to be calculated may be the coefficient value of each term in the first function to be calculated, wherein the first coefficient corresponds one-to-one to the first power term.
  • the semiconductor memory device can use a variable resistance memory.
  • RRAM is a non-volatile memory in which electrodes on both sides sandwich metal oxide in the middle, so low power consumption and high-speed rewriting can be achieved.
  • a pulse voltage is applied to the metal oxide film to generate a large resistance difference to store "0" and "1".
  • RRAM can achieve multi-bit storage by adjusting the resistance state, it is conducive to storing multi-bit data using less hardware.
  • the word line of the semiconductor memory device is subjected to variable resistance according to the value of the first power term.
  • a pulse voltage is input to obtain a first current output by the bit line.
  • analog-to-digital conversion is performed on the first current to obtain a first current value corresponding to the first current.
  • a first calculation result of a first to-be-calculated function is determined based on the first current value.
  • FIG3 schematically shows a structural diagram of a semiconductor memory device for implementing function computing based on storage-computation integration according to an embodiment of the present disclosure.
  • the semiconductor memory device for implementing function calculation based on storage-computation integration in this embodiment includes a word line 310 , a bit line 320 , and a variable resistor 330 .
  • a variable resistance memory is used to implement natural exponential operations. Since the polynomial coefficients of the Taylor expansion are constants, the conductance value of the variable resistor in the semiconductor memory device is set according to the coefficient value of the first coefficient corresponding to the first power term, thereby realizing the reuse of fixed constants.
  • the advantage of using in-memory calculations to perform high-parallel matrix-vector multiplication is realized, while avoiding the operation of determining the voltage value of the pulse voltage input on the word line through multiple accesses, thereby reducing the number of times the memory needs to be accessed. At the same time, it also reduces the problem of low computing efficiency caused by the need to read and calculate from the memory space multiple times when using common computer architectures for calculations.
  • the semiconductor storage is adjusted according to the coefficient value of the first coefficient corresponding to the first power term.
  • the first conductance value of the variable resistor on the word line corresponding to the first power term in the storage device includes: determining the variable resistor on the word line corresponding to the first power term according to the exponent value of the first power term of the first Taylor expansion; and adjusting the first conductance value of the variable resistor corresponding to the first power term in the semiconductor storage device according to the coefficient value of the first coefficient.
  • the first function to be calculated can be the first N terms of the Taylor expansion of the function e x , and the first power terms are x 0 , x 1 , x 2 , ..., x N-2 , x N-1 in increasing order of exponent.
  • the corresponding relationship between the variable resistor on the word line and each term in the first Taylor expansion is determined, that is, the term with the power of n corresponds to the (n+1)th word line, and then the conductance value of the variable resistor corresponding to the term is adjusted according to the coefficient value of each term.
  • a pulse voltage is input to a word line through a variable resistor in a semiconductor memory device according to the value of a first power term to obtain a first current output by the bit line, including: determining a word line corresponding to the first power term from a plurality of word lines according to the exponential value of the first power term of a first Taylor expansion; inputting a pulse voltage corresponding to the coefficient value of the first coefficient to the word line corresponding to the first power term according to the value of the first power term; and for each bit line, summing up the currents on a plurality of word lines associated with the bit line to obtain the first current output by the bit line.
  • a pulse voltage of a numerical value corresponding to each power term is input to the word line corresponding to the term to obtain the current output by the word line.
  • the currents on all word lines associated with the bit line are summed on the bit line to obtain the first current of the bit line.
  • a method for realizing function calculation based on storage and calculation integration also includes: for a first power term in a first Taylor expansion in a first function to be calculated, adjusting a second conductance value of a variable resistor on a word line corresponding to the first power term in a semiconductor memory device according to the value of the first power term; inputting a pulse voltage to a word line through a variable resistor in a semiconductor memory device according to the coefficient value of a first coefficient corresponding to the first power term to obtain a second current output by a bit line; performing analog-to-digital conversion on the first current to obtain a second current value corresponding to the first current; and determining a second calculation result of the first function to be calculated based on the second current value.
  • a second conductance value of a variable resistor on a word line corresponding to the first power term in a semiconductor memory device is adjusted according to the value of a first power term, including: determining the variable resistor on the word line corresponding to the first power term according to the exponential value of the first power term of a first Taylor expansion; and adjusting the second conductance value of the variable resistor corresponding to the first power term in the semiconductor memory device according to the value of the first power term of the first Taylor expansion.
  • the first function to be calculated can be the first N terms of the Taylor expansion of the function e x , and the first power term is x 0 , x 1 , x 2 , ..., x N-2 , x N-1 in increasing order of exponent.
  • the first function to be calculated includes multiple first Taylor expansions; based on the second current value, determining the second calculation result of the first function to be calculated includes: summing the multiple second current values to obtain the second calculation result.
  • the pulse voltage of the word line is determined according to the coefficient value of the first coefficient, and therefore the current generated on the word line is the result of this term.
  • the first function to be calculated takes the first N terms of the Taylor expansion of e x
  • the second current value of the corresponding bit line obtained by analog-to-digital conversion is In the case where there are three bit lines in the semiconductor memory device, and x is x 0 , x 1 , and x 2 respectively, the second current values of the three bit lines are summed to obtain Therefore, semiconductor memory devices can be used to calculate The value of , where d is the number of bit lines of the semiconductor memory device.
  • the operation of the Softmax function is as follows:
  • FIG4 schematically shows a flow chart of a method for implementing function computing based on storage-computing integration according to an embodiment of the present disclosure.
  • the method 400 for implementing function computing based on storage-computing integration of this embodiment includes operations S410 to S450 .
  • each second power term in a Maclaurin expansion of a second function to be calculated is determined based on the second calculation result.
  • a semiconductor memory device may include M word lines and one bit line, wherein each word line may include a variable resistor.
  • the number of terms of the second function to be calculated may be determined according to the number of word lines of the semiconductor memory device. Then the M word lines correspond one to one with the M terms from front to back in the second function to be calculated.
  • the third conductance value of the variable resistor is set to the value of the second power term of the term of the second function to be calculated corresponding to the variable resistor.
  • a third calculation result is obtained by subtracting the first calculation result from the third current value, wherein the subtraction can be implemented using a current differential amplifier.
  • a method for realizing Softmax function calculation based on storage and calculation integration can also be provided, which can further include, on the basis of operations S410 to S450 as shown in FIG4 , the following parts: determining each third power term in the second Taylor expansion of the third function to be calculated based on the third calculation result; for each third power term, adjusting the fourth conductance value of the variable resistor on the word line corresponding to the third power term in the semiconductor memory device according to the coefficient value of the third coefficient corresponding to the third power term; inputting a pulse voltage to the word line in the semiconductor memory device according to the value of the third power term to obtain a fourth current output by the bit line; performing analog-to-digital conversion on the fourth current to obtain a fourth current value corresponding to the fourth current; and determining the fourth calculation result of the third function to be calculated based on the fourth current value.
  • FIG5 schematically shows a flow chart of a method for realizing Softmax function calculation based on storage and computing integration according to an embodiment of the present disclosure.
  • the third coefficient of the third function to be calculated may be the coefficient value of each term in the third function to be calculated, wherein the third coefficient corresponds to the third power term one-to-one.
  • the semiconductor memory device may include P word lines and a bit line, wherein each word line may include a variable resistor.
  • the number of terms of the third function to be calculated may be determined according to the number of word lines of the semiconductor memory device. Then the P word lines correspond to the P terms in the third function to be calculated one-to-one.
  • the conductance value of the variable resistor is set to the coefficient value of the third coefficient.
  • the pulse voltage on each word line is determined according to the value of the third power term of the term of the third function to be calculated corresponding to the variable resistor, and after the pulse voltage is input to each word line, a current is generated through the variable resistor on each word line.
  • the currents on multiple word lines associated with the bit line are summed up to obtain a fourth current of the bit line.
  • a fourth calculation result of the third to-be-calculated function is determined based on the fourth current value.
  • the fourth calculation result of the third to-be-calculated function may be numerically equal to the magnitude of the fourth current value.
  • a semiconductor memory device is used to calculate a value with a natural constant as the base and a third calculation result as the exponent.
  • the result of the Softmax function is obtained through the inverse function relationship between the logarithmic function and the power function.
  • the coefficient of the Taylor expansion of the natural exponential is set to the fourth conductance value of the variable resistor, the calculation result can be obtained by only changing the voltage value of the pulse voltage on the word line, thereby realizing the reuse of the constant.
  • the fourth calculation result of the third function to be calculated can be calculated using the system for realizing function calculation based on storage and calculation integration shown in FIG3.
  • the third function to be calculated can take the first P terms of the e b Taylor expansion, where b can be equal to the second calculation result in value. Then the third parameter is b 0 , b 1 , ..., b P-2 , b P-1 in order of exponent from small to large. First, determine the correspondence between the variable resistor on the word line and each term in the Taylor expansion, and then adjust the conductance value of the variable resistor corresponding to the term according to the coefficient value of each term.
  • the pulse voltage input to the word line corresponding to the item is b 3
  • the conductance value of the variable resistor on the word line is set to 1/6
  • the current generated on the word line is 1/6(b 3 ), which is the same as the calculation result of the item.
  • the third current value obtained on the bit line is thus we get the result of softmax( xi ).
  • FIG6 schematically shows a structural diagram of a system for implementing function computing based on storage-computing integration according to another embodiment of the present disclosure.
  • the system for implementing function calculation based on storage-computation integration of this embodiment includes a semiconductor memory device 610 , an analog-to-digital converter 620 , and a calculator 630 .
  • a semiconductor memory device comprises a word line 611 and a bit line 612, wherein a variable resistor 613 is arranged on the word line; the semiconductor memory device is used to receive a pulse voltage on the bit line, and obtain a first current output by the bit line through the variable resistor on the word line, wherein a first conductance value of the variable resistor is obtained by adjusting the value of a first power term; and a voltage value of the pulse voltage is determined according to a coefficient value of a first coefficient corresponding to the first power term;
  • an analog-to-digital converter configured to receive a first current sent by the semiconductor memory device, perform analog-to-digital conversion on the first current, and obtain a first current value corresponding to the first current;
  • the calculator is used to receive a first current value sent by the analog-to-digital converter, and determine a first calculation result of a first function to be calculated based on the first current value.
  • a pulse voltage is input on a word line, and after a current is generated through a resistor on the word line, it converges on a bit line.
  • An analog-to-digital converter may convert a current signal into a digital signal.
  • the calculator may be an accumulation tree.
  • the currents on the four bit lines are respectively converted into analog-to-digital, and the sum is obtained by the calculator to obtain the second calculation result, that is, According to the setting method of the pulse voltage of the word line and the conductance value of the variable resistor in FIG3 , the current on the bit line is converted into analog to digital to obtain the first calculation result, that is, the value of x 2 .
  • the pulse voltage can be set to 1, n, n 2 , and n 3 respectively, and the conductance values of the variable resistors set on the four word lines can be set to 1, 1, and n 3 respectively.
  • the current obtained on the bit line is converted into digital form, and the fourth calculation result representing the magnitude of the current value is the value of en , thereby realizing the calculation of Softmax(x 2 ).
  • the present disclosure also provides a device for realizing function computing based on storage and computing integration.
  • the device will be described in detail below in conjunction with FIG.
  • FIG7 schematically shows a structural block diagram of a device for implementing function computing based on storage and computing integration according to an embodiment of the present disclosure.
  • the device 700 for implementing function computing based on storage and computing integration of this embodiment includes a first adjustment module 710 , a first input module 720 , a first conversion module 730 and a first determination module 740 .
  • the first adjustment module 710 is used to adjust the first conductance value of the variable resistor on the word line corresponding to the first power term in the semiconductor memory device according to the coefficient value of the first coefficient corresponding to the first power term for the first power term in the first Taylor expansion in the first to-be-calculated function.
  • the first adjustment module 710 can be used to perform the operation S210 described above, which will not be repeated here.
  • the first input module 720 is used to input a pulse voltage to the word line through the variable resistor in the semiconductor memory device according to the value of the first power term to obtain the first current output by the bit line.
  • the first input module 720 can be used to perform the operation S220 described above, which will not be repeated here.
  • the first conversion module 730 is used to perform analog-to-digital conversion on the first current to obtain a first current value corresponding to the first current.
  • the first conversion module 730 can be used to perform the operation S230 described above, which will not be described in detail here.
  • the first determination module 740 is used to determine a first calculation result of the first to-be-calculated function based on the first current value. In one embodiment, the first determination module 740 can be used to perform the operation S240 described above, which will not be described in detail herein.
  • the first adjustment module 710 includes a first determining unit and a first adjusting unit.
  • the first determining unit is used to determine the variable resistance on the word line corresponding to the first power term according to the exponent value of the first power term of the first Taylor expansion.
  • the first adjusting unit is used to adjust a first conductance value of a variable resistor corresponding to a first power term in the semiconductor memory device according to a coefficient value of a first coefficient.
  • the first input module 720 includes a second determining unit, an input unit, and a summarizing unit.
  • the second determining unit is used to determine a word line corresponding to the first power term from a plurality of word lines according to the exponential value of the first power term of the first Taylor expansion.
  • the input unit is used to input a pulse voltage corresponding to the coefficient value of the first coefficient to the word line corresponding to the first power term according to the value of the first power term.
  • the summing unit is used for summing up the currents on a plurality of word lines associated with each bit line to obtain a first current output by the bit line.
  • the device 700 for implementing function computing based on storage and computing integration also includes a second adjustment module, a second input module, a second conversion module and a second determination module.
  • the second adjustment module is used to adjust the second conductance value of the variable resistor on the word line corresponding to the first power term in the semiconductor memory device according to the value of the first power term in the first Taylor expansion of the first function to be calculated.
  • the second input module is used to input a pulse voltage to a word line through a variable resistor in the semiconductor memory device according to the coefficient value of the first coefficient corresponding to the first power term to obtain a second current output by the bit line.
  • the second determining module is used to determine a second calculation result of the first to-be-calculated function based on the second current value.
  • the third determining unit is used to determine the variable resistance on the word line corresponding to the first power term according to the exponent value of the first power term of the first Taylor expansion.
  • the second adjusting unit adjusts a second conductance value of a variable resistor corresponding to the first power term in the semiconductor memory device according to the value of the first power term of the first Taylor expansion.
  • the device 700 for implementing function computing based on storage and computing integration also includes a third determination module, a third adjustment module, a third input module, a third conversion module and a fourth determination module.
  • the third determination module is used to determine each second power term in the Maclaurin expansion of the second function to be calculated based on the second calculation result.
  • the third adjustment module is used to adjust the third conductance value of the variable resistor on the word line corresponding to the second power term in the semiconductor memory device according to the value of the second power term for each second power term.
  • the third input module is used to input a pulse voltage to the word line in the semiconductor memory device according to the coefficient value of the second coefficient corresponding to the second power term to obtain a third current output by the bit line.
  • the third conversion module is used to perform analog-to-digital conversion on the third current to obtain a third current value corresponding to the third current.
  • the fourth determination module is used to determine a third calculation result based on the third current value and the first calculation result.
  • the device 700 for implementing function computing based on storage and computing integration further includes a fifth determining module, A fourth regulating module, a fourth input module, a fourth converting module and a sixth determining module.
  • the fifth determination module is used to determine each third power term in the second Taylor expansion of the third function to be calculated based on the third calculation result.
  • the fourth adjustment module is used to adjust, for each third power term, a fourth conductance value of a variable resistor on a word line corresponding to the third power term in the semiconductor memory device according to a coefficient value of a third coefficient corresponding to the third power term.
  • the fourth input module is used to input a pulse voltage to the word line in the semiconductor memory device according to the value of the third power term to obtain a fourth current output by the bit line.
  • the fourth conversion module is used to perform analog-to-digital conversion on the fourth current to obtain a fourth current value corresponding to the fourth current.
  • the sixth determining module is used to determine a fourth calculation result of the third function to be calculated based on the fourth current value.
  • any multiple modules of the first adjustment module 710, the first input module 720, the first conversion module 730 and the first determination module 740 can be combined in one module for implementation, or any one of the modules can be split into multiple modules. Alternatively, at least part of the functions of one or more of these modules can be combined with at least part of the functions of other modules and implemented in one module.
  • At least one of the first adjustment module 710, the first input module 720, the first conversion module 730 and the first determination module 740 can be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on a chip, a system on a substrate, a system on a package, an application specific integrated circuit (ASIC), or can be implemented by hardware or firmware such as any other reasonable way of integrating or packaging the circuit, or by any one of the three implementation methods of software, hardware and firmware or by a suitable combination of any of them.
  • FPGA field programmable gate array
  • PLA programmable logic array
  • ASIC application specific integrated circuit
  • At least one of the first adjustment module 710 , the first input module 720 , the first conversion module 730 and the first determination module 740 may be at least partially implemented as a computer program module, and when the computer program module is executed, a corresponding function may be performed.
  • FIG8 schematically shows a block diagram of an electronic device suitable for implementing a method of function calculation based on storage-computation integration according to an embodiment of the present disclosure.
  • the electronic device 800 includes a processor 801, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 802 or the program loaded from the storage part 808 to the random access memory (RAM) 803.
  • the processor 801 may include, for example, a general-purpose microprocessor (such as a CPU), an instruction set processor and/or a related chipset and/or a special-purpose microprocessor (for example, an application-specific integrated circuit (ASIC)), etc.
  • the processor 801 may also include an onboard memory for caching purposes.
  • the processor 801 may include a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiment of the present disclosure.
  • RAM 803 various programs and data required for the operation of the electronic device 800 are stored.
  • the processor 801, ROM 802 and RAM 803 are connected to each other through a bus 804.
  • the processor 801 performs various operations of the method flow according to the embodiment of the present disclosure by executing the program in ROM 802 and/or RAM 803. It should be noted that the program can also be stored in one or more memories other than ROM 802 and RAM 803.
  • the processor 801 can also perform various operations of the method flow according to the embodiment of the present disclosure by executing the program stored in the one or more memories.
  • the electronic device 800 may further include an input/output (I/O) interface 805.
  • An output (I/O) interface 805 is also connected to the bus 804.
  • the electronic device 800 may further include one or more of the following components connected to the I/O interface 805: an input section 806 including a keyboard, a mouse, etc.; an output section 807 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 808 including a hard disk, etc.; and a communication section 809 including a network interface card such as a LAN card, a modem, etc.
  • the communication section 809 performs communication processing via a network such as the Internet.
  • a drive 810 is also connected to the I/O interface 805 as needed.
  • a removable medium 811 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 810 as needed so that a computer program read therefrom is installed into the storage section 808 as needed.
  • the present disclosure also provides a computer-readable storage medium, which may be included in the device/apparatus/system described in the above embodiments; or may exist independently without being assembled into the device/apparatus/system.
  • the above computer-readable storage medium carries one or more programs, and when the above one or more programs are executed, the method according to the embodiment of the present disclosure is implemented.
  • a computer-readable storage medium may be a non-volatile computer-readable storage medium, for example, may include but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.
  • a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.
  • a computer-readable storage medium may include the ROM 802 and/or RAM 803 described above and/or one or more memories other than ROM 802 and RAM 803.
  • the embodiment of the present disclosure also includes a computer program product, which includes a computer program, and the computer program contains program code for executing the method shown in the flowchart.
  • the program code is used to enable the computer system to implement the method provided by the embodiment of the present disclosure.
  • the computer program may rely on tangible storage media such as optical storage devices, magnetic storage devices, etc.
  • the computer program may also be transmitted and distributed in the form of signals on a network medium, and downloaded and installed through the communication part 809, and/or installed from a removable medium 811.
  • the program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.
  • the computer program can be downloaded and installed from the network through the communication part 809, and/or installed from the removable medium 811.
  • the computer program is executed by the processor 801, the above functions defined in the system of the embodiment of the present disclosure are performed.
  • the system, device, means, module, unit, etc. described above can be implemented by a computer program module.
  • the program code for executing the computer program provided by the embodiments of the present disclosure may be written in any combination of one or more programming languages.
  • these computer programs may be implemented using high-level procedural and/or object-oriented programming languages, and/or assembly/machine languages.
  • Programming languages include, but are not limited to, Java, C++, Python, "C" language, or similar programming languages.
  • the program code may be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device.
  • the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect through the Internet).
  • LAN local area network
  • WAN wide area network
  • an Internet service provider to connect through the Internet
  • each box in the flow chart or block diagram can represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of a code contains one or more executable instructions for realizing the specified logical function.
  • the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved.
  • each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
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Abstract

La présente divulgation est applicable au domaine technique de l'intelligence artificielle, et concerne un procédé, un appareil, et un système de calcul d'une fonction sur la base de l'intégration d'une mémoire et d'un calcul, un dispositif, et un support de stockage. Le procédé comprend les étapes suivantes : pour un premier terme de puissance dans une première expansion de Taylor dans une première fonction à calculer, sur la base d'une valeur de coefficient d'un premier coefficient correspondant au premier terme de puissance, ajustement d'une première valeur de conductance d'une résistance variable sur une ligne de mots dans un dispositif de mémoire à semi-conducteurs qui correspond au premier terme de puissance ; sur la base de la valeur numérique du premier terme de puissance, entrée d'une tension d'impulsion sur la ligne de mots passant à travers la résistance variable dans le dispositif de mémoire à semi-conducteurs, et obtention d'un premier courant délivré par une ligne de bits ; réalisation d'une conversion analogique-numérique sur le premier courant, et obtention d'une première valeur de courant correspondant au premier courant ; et, sur la base de la première valeur de courant, détermination d'un premier résultat de calcul de ladite première fonction.
PCT/CN2023/120690 2023-09-22 2023-09-22 Procédé, appareil, et système de calcul de fonction sur la base de l'intégration d'une mémoire et d'un calcul Pending WO2025060063A1 (fr)

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PCT/CN2023/120690 WO2025060063A1 (fr) 2023-09-22 2023-09-22 Procédé, appareil, et système de calcul de fonction sur la base de l'intégration d'une mémoire et d'un calcul

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080140755A1 (en) * 2006-12-12 2008-06-12 Brian Remy Mixed-signal system for performing taylor series function approximations
CN111095417A (zh) * 2017-09-07 2020-05-01 松下电器产业株式会社 使用非易失性半导体存储元件的神经网络运算电路
CN113094970A (zh) * 2021-03-12 2021-07-09 苏州芯启微电子科技有限公司 一种基于泰勒展开的函数计算加速装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080140755A1 (en) * 2006-12-12 2008-06-12 Brian Remy Mixed-signal system for performing taylor series function approximations
CN111095417A (zh) * 2017-09-07 2020-05-01 松下电器产业株式会社 使用非易失性半导体存储元件的神经网络运算电路
CN113094970A (zh) * 2021-03-12 2021-07-09 苏州芯启微电子科技有限公司 一种基于泰勒展开的函数计算加速装置

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