WO2025047546A1 - Light-emitting device and display apparatus - Google Patents
Light-emitting device and display apparatus Download PDFInfo
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- WO2025047546A1 WO2025047546A1 PCT/JP2024/029710 JP2024029710W WO2025047546A1 WO 2025047546 A1 WO2025047546 A1 WO 2025047546A1 JP 2024029710 W JP2024029710 W JP 2024029710W WO 2025047546 A1 WO2025047546 A1 WO 2025047546A1
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- emitting element
- light
- light emitting
- connection electrode
- driving
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Definitions
- This disclosure relates to a light-emitting device and a display device equipped with self-luminous elements such as light-emitting diode elements.
- Patent Document 1 A display device as described in Patent Document 1 is known.
- the light emitting device includes a first regular light emitting element for constant use, a first drive line for driving the first regular light emitting element, a second regular light emitting element for constant use, a second drive line for driving the second regular light emitting element, the second drive line extending along the first drive line, a spare light emitting element for redundant use, and a third drive line for driving the spare light emitting element, the third drive line being located between the first drive line and the second drive line and extending along the first drive line and the second drive line.
- the third drive line is connected to a spare connection electrode connected to the spare light emitting element in a state where it overlaps with the spare connection electrode in a planar view.
- the spare connection electrode has a first drive line side unevenly distributed portion that is unevenly distributed on the side of the first drive line and a second drive line side unevenly distributed portion that is unevenly distributed on the side of the second drive line.
- the spare light emitting element is connected to the first drive line side unevenly distributed portion when the first regular light emitting element is unavailable, and is connected to the second drive line side unevenly distributed portion when the second regular light emitting element is unavailable.
- the display device includes the above-mentioned light-emitting device, and a light-emitting element group including the first regular light-emitting element, the second regular light-emitting element, and the spare light-emitting element is arranged in a matrix.
- FIG. 1 is a block diagram showing a display device according to an embodiment of the present disclosure.
- 1 is a front view showing a light emitting device according to an embodiment of the present disclosure.
- FIG. 3 is a partially enlarged front view showing a portion III in FIG. 2 .
- 1 is a partially enlarged front view showing a light emitting device in which all regular light emitting elements can be used.
- 11 is a partially enlarged front view showing a light emitting device in which some regular light emitting elements are unusable and spare light emitting elements are mounted;
- FIG. 2 is a circuit diagram showing an example of a pixel circuit.
- FIG. 11 is a circuit diagram showing another example of a pixel circuit.
- FIG. 13 is a circuit diagram showing yet another example of a pixel circuit.
- FIG. 3 is a partially enlarged front view showing an example of part VIII in FIG. 2 .
- FIG. 8 is a partially enlarged front view showing another example of part VIII in FIG. 2 .
- 4 is a flowchart illustrating the operation of the display device of FIG. 1 .
- 1 is a partially enlarged front view showing a light emitting device in which all regular light emitting elements can be used.
- 12 is a timing chart showing an example of a method of inputting a drive signal to the light emitting device of FIG. 11.
- 12 is a timing chart showing another example of a method for inputting a drive signal to the light emitting device of FIG. 11.
- FIG. 1 is a partially enlarged front view showing an example of a light emitting device in which some regular light emitting elements are unusable;
- 15 is a partially enlarged front view showing a state in which a spare light emitting element is mounted on the light emitting device of FIG. 14.
- 16 is a timing chart showing an example of a method of inputting a drive signal to the light emitting device of FIG. 15 .
- 16 is a timing chart showing another example of a method for inputting a drive signal to the light emitting device of FIG. 15 .
- 13 is a partially enlarged front view showing another example of a light emitting device in which some of the regular light emitting elements are unusable.
- FIG. 19 is a partially enlarged front view showing a state in which a spare light emitting element is mounted on the light emitting device of FIG. 18.
- 20 is a timing chart showing an example of a method of inputting a drive signal to the light emitting device of FIG. 19.
- 20 is a timing chart showing another example of a method for inputting a drive signal to the light emitting device of FIG. 19.
- 13 is a partially enlarged front view showing yet another example of a light emitting device in which some of the regular light emitting elements are unusable.
- FIG. 23 is a partially enlarged front view showing a state in which a spare light emitting element is mounted on the light emitting device of FIG. 22.
- 24 is a timing chart showing an example of a method of inputting a drive signal to the light emitting device of FIG. 23.
- 24 is a timing chart showing another example of a method for inputting a drive signal to the light emitting device of FIG. 23.
- 23 is a partially enlarged front view showing another example of a state in which a spare light emitting element is mounted on the light emitting device of FIG. 22.
- LED display devices each of which has multiple Light Emitting Diode (LED) elements arranged on a substrate.
- LED display devices can have point defects such as bright or dark spots due to poor mounting of the LED elements or defects in the LED elements themselves.
- Patent Document 1 describes a display device that provides two LED elements in one pixel and compensates for point defects by selectively driving the normal LED element of the two.
- Conventional display devices have two LED elements per pixel, and at least one transistor per LED element, making it difficult to narrow the pixel pitch and create a high-definition display device.
- the light emitting device and display device may include well-known components such as a circuit board, wiring conductors, and a control IC (LSI) that are not shown.
- LSI control IC
- the figures used in the following description are schematic, and the dimensional ratios and the like in the drawings do not necessarily correspond to the actual ones.
- corresponding parts are given the same reference numerals, and duplicate descriptions will be omitted or simplified.
- FIGS. 1 to 26 are diagrams illustrating the light-emitting device and display device of the present disclosure.
- the display device may perform color display, in which case the emission color of the first genuine light-emitting element 10a and the emission color of the second genuine light-emitting element 10b may be different.
- the emission color of the first genuine light-emitting element 10a may be red
- the emission color of the second genuine light-emitting element 10b adjacent thereto in the + direction of the first direction for example, the right direction in FIG. 3
- the emission color of the first genuine light-emitting element 10a adjacent thereto in the + direction of the first direction may be blue, and this color arrangement may be repeated.
- the display device 1 of this embodiment includes a light-emitting device 2, a driving unit 3, and a memory unit 4.
- the driving unit 3 outputs a driving signal to the light-emitting device 2 based on an image data signal supplied from an image data signal source 5.
- the image data signal source 5 may be realized by an external device that outputs an image data signal.
- the memory unit 4 stores a program executed by the driving unit 3.
- the memory unit 4 may be configured by a storage device such as a RAM (Random Access Memory) or a ROM (Read Only Memory).
- the light emitting device 2 includes a plurality of light emitting element groups 20g, as shown in Figs. 2 and 3.
- the plurality of light emitting element groups 20g are arranged in a matrix of M rows and N columns (M and N are integers of 1 or more).
- Each light emitting element group 20g constitutes two adjacent pixels in the light emitting device 2.
- each light emitting element group 20g includes a first pixel 20a, a second pixel 20b, and a third pixel 20c.
- the first pixel 20a, the second pixel 20b, and the third pixel 20c are arranged in the row direction (left-right direction in Figs. 2 and 3) of the array (also called pixel array) of the plurality of light emitting element groups 20g.
- first pixel 20a, the second pixel 20b, and the third pixel 20c are not distinguished from each other, they may be simply referred to as "pixel 20".
- the row direction of the pixel array may be referred to as the "first direction”.
- the third pixel 20c is located between the first pixel 20a and the second pixel 20b in the first direction.
- the first pixel 20a includes a first regular light-emitting element 10a and a first driving line 8a.
- the first regular light-emitting element 10a may be connected to the first driving line 8a via wiring, a through-hole, etc.
- the second pixel 20b includes a second regular light-emitting element 10b and a second driving line 8b.
- the second regular light-emitting element 10b may be connected to the second driving line 8b via wiring, a through-hole, etc.
- the third pixel 20c includes a third driving line (also called a reserve driving line) 8c.
- the third pixel 20c may include a reserve light-emitting element 10c.
- the reserve light-emitting element 10c may be connected to the third driving line 8c via wiring, a through-hole, etc.
- regular light-emitting elements 10a, 10b when there is no need to distinguish between the first regular light-emitting element 10a and the second regular light-emitting element 10b, they may simply be described as "regular light-emitting elements 10a, 10b".
- light-emitting element 10 when there is no need to distinguish between the first regular light-emitting element 10a, the second regular light-emitting element 10b, and the spare light-emitting element 10c, they may simply be referred to as "light-emitting element 10."
- the regular light emitting elements 10a and 10b are light emitting elements for constant use.
- the spare light emitting element 10c is a light emitting element for redundant use.
- the regular light emitting elements 10a and 10b may become unusable due to defects such as poor mounting or defective products.
- the spare light emitting element 10c is a light emitting element for use in place of the unusable regular light emitting elements 10a and 10b when the regular light emitting elements 10a and 10b are unusable.
- Each light emitting element group 20g may include one or two spare light emitting elements 10c.
- the third pixel 20c does not need to include the spare light emitting element 10c.
- the spare light emitting element 10c may be mounted only when the regular light emitting elements 10a and 10b are unusable.
- the light emitting device 2 may include, for example, about one thousand to one million light emitting elements 10.
- the light emitting elements 10 may be self-emitting elements such as light emitting diodes (LEDs) and organic light emitting diodes (OLEDs).
- the light emitting elements 10 may be micro LED elements.
- a micro LED element is used as the light emitting element 10.
- the micro LED element may have a rectangular shape with a side length of about 1 ⁇ m to about 100 ⁇ m when viewed from a direction perpendicular to its light emitting surface (also called a planar view direction).
- the first power supply voltage (positive power supply voltage) VDD applied to the anode terminal of the micro LED element may be, for example, about 10 V to 15 V
- the second power supply voltage (negative power supply voltage) VSS applied to the cathode terminal of the micro LED element may be, for example, about -3 V to 0 V.
- each light-emitting element group 20g has a first connection electrode 9a connected to the anode terminal of the first regular light-emitting element 10a, a second connection electrode 9b connected to the anode terminal of the second regular light-emitting element 10b, and a third connection electrode (also called a spare connection electrode) 9c connected to the anode terminal of the spare light-emitting element 10c.
- the first connection electrode 9a, the second connection electrode 9b, and the third connection electrode 9c may be aligned in the first direction.
- the third connection electrode 9c may be located between the first connection electrode 9a and the second connection electrode 9b.
- the first connection electrode 9a constitutes a part of the first pixel 20a
- the second connection electrode 9b constitutes a part of the second pixel 20b
- the third connection electrode 9c constitutes a part of the third pixel 20c.
- Each light emitting element group 20g has a cathode electrode 11 connected to the cathode terminal of the first regular light emitting element 10a, the cathode terminal of the second regular light emitting element 10b, and the cathode terminal of the spare light emitting element 10c.
- the cathode electrode 11 may be composed of a plurality of strip electrodes as shown in Figures 4A and 4B.
- the plurality of strip electrodes may have an elongated shape in the first direction.
- the first regular light emitting element 10a and the spare light emitting element 10c may share one strip electrode.
- the second regular light emitting element 10b and the spare light emitting element 10c may share one strip electrode.
- the first drive line 8a, the second drive line 8b, and the third drive line 8c are wirings for inputting drive signals to each light emitting element group 20g.
- the first drive line 8a, the second drive line 8b, and the third drive line 8c are wirings for driving the first regular light emitting element 10a, the second regular light emitting element 10b, and the spare light emitting element 10c, respectively.
- drive lines 8 when there is no need to distinguish between the first drive line 8a, the second drive line 8b, and the third drive line 8c, they may simply be referred to as "drive lines 8".
- the first drive line 8a, the second drive line 8b, and the third drive line 8c of each light emitting element group 20g may be referred to as "drive line group 8g".
- the first drive line 8a overlaps with the first connection electrode 9a in a plan view and is connected to the first connection electrode 9a.
- the first drive line 8a extends in the column direction of the pixel array (the up-down direction in Figs. 4A and 4B).
- the column direction of the pixel array may be referred to as the "second direction.”
- the second drive line 8b overlaps with the second connection electrode 9b in a plan view and is connected to the second connection electrode 9b.
- the second drive line 8b extends along the first drive line 8a. Note that "extending along” may be interpreted as meaning “extending parallel” or “extending approximately parallel”, and the same applies below.
- the third driving line 8c overlaps with the spare connection electrode 9c in a plan view and is connected to the spare connection electrode 9c.
- the third driving line 8c extends along the first driving line 8a and the second driving line 8b.
- the third driving line 8c is located between the first driving line 8a and the second driving line 8b.
- multiple (M) light-emitting element groups 20g aligned in the second direction share the first drive line 8a, the second drive line 8b, and the third drive line 8c.
- the thickness (width and/or thickness) of the third drive line 8c may be the same as or smaller than the thickness of the first drive line 8a and the thickness of the second drive line 8b.
- the size (area) of the auxiliary connection electrode 9c connected to the third drive line 8c is larger than the size of the first connection electrode 9a connected to the first drive line 8a and the size of the second connection electrode 9b connected to the second drive line 8b, the effective average width of the entire third drive line 8c increases, and the resistance of the third drive line 8c tends to decrease.
- the voltage drop in the second direction of the third drive line 8c tends to be smaller than the voltage drop in the second direction of the first drive line 8a and the voltage drop in the second direction of the second drive line 8b.
- the resistance including the spare connection electrode 9c of the third drive line 8c can be made to be approximately the same as the resistance including the first connection electrode 9a of the first drive line 8a and the resistance including the second connection electrode 9b of the second drive line 8b, and the voltage drop in the third drive line 8c can also be made to be approximately the same.
- the thickness of the third drive line 8c may be 0.1 times or more and less than 1 times the thickness of the first drive line 8a and the thickness of the second drive line 8b, but is not limited to this range.
- the resistance including the spare connection electrode 9c of the third drive line 8c may be approximately 0.9 to 1.1 times the resistance including the first connection electrode 9a of the first drive line 8a and the resistance including the second connection electrode 9b of the second drive line 8b, but is not limited to this range.
- the size of the spare connection electrode 9c may be at least twice the size of each of the first connection electrode 9a and the second connection electrode 9b.
- the size of the first drive line side uneven portion 9ca can be equal to or greater than the size of the first connection electrode 9a, and when the first regular light-emitting element 10a is mounted and connected to the first drive line side uneven portion 9ca, mounting and connection are made easier, improving connectivity.
- the size of the second drive line side uneven portion 9cb can be equal to or greater than the size of the second connection electrode 9b, and when the second regular light-emitting element 10b is mounted and connected to the second drive line side uneven portion 9cb, mounting and connection are made easier, improving connectivity.
- the size of the spare connection electrode 9c may be at least twice but not more than about five times the size of each of the first connection electrode 9a and the second connection electrode 9b, but is not limited to this range.
- the spare connection electrode 9c has a first drive line side biased portion 9ca biased toward the first drive line 8a side, and a second drive line side biased portion 9cb biased toward the second drive line 8b side.
- the first drive line side biased portion 9ca and the second drive line side biased portion 9cb are connected to each other via a non-biased portion 9cc that overlaps with the third drive line 8c in the spare connection electrode 9c.
- the first drive line side biased portion 9ca, the second drive line side biased portion 9cb, and the non-biased portion 9cc may be integrally formed.
- the first drive line side biased portion 9ca is a portion located closer to the first drive line 8a side than the non-biased portion 9cc
- the second drive line side biased portion 9cb is a portion located closer to the second drive line 8b side than the non-biased portion 9cc.
- the first connection electrode 9a has a third drive line side biased portion 9ac that is biased toward the third drive line 8c side.
- the anode terminal of the first regular light-emitting element 10a may be connected to the third drive line side biased portion 9ac of the first connection electrode 9a.
- the second connection electrode 9b has a third drive line side biased portion 9bc that is biased toward the third drive line 8c.
- the anode terminal of the second regular light-emitting element 10b may be connected to the third drive line side biased portion 9bc of the second connection electrode 9b.
- FIG. 4B shows a state in which some of the regular light-emitting elements 10a, 10b are unusable in the light-emitting device 2 of FIG. 4A, and a spare light-emitting element 10c is mounted to be used in place of the unusable regular light-emitting elements 10a, 10b.
- FIG. 4B shows a state in which some of the regular light-emitting elements 10a, 10b are unusable in the light-emitting device 2 of FIG. 4A, and a spare light-emitting element 10c is mounted to be used in place of the unusable regular light-emitting elements 10a, 10b.
- the unusable regular light-emitting elements 10a, 10b are shown hatched.
- the light-emitting device 2 may include a spare light-emitting element 10c connected to either one of the first driving line side unevenly distributed portion 9ca and the second driving line side unevenly distributed portion 9cb, or may include two spare light-emitting elements 10c connected to the first driving line side unevenly distributed portion 9ca and the second driving line side unevenly distributed portion 9cb, respectively.
- the two preliminary light emitting elements 10c may share one pixel circuit (see Figures 5 to 7) that includes a scanning signal line 7, a third driving line 8c, a writing thin film transistor Tg, a current driving thin film transistor Td, and a capacitance element C.
- the light emitting device 2 may be configured such that the spare light emitting element 10c, which is used when the regular light emitting element 10a cannot be used, and the spare light emitting element 10c, which is used when the regular light emitting element 10b cannot be used, share a pixel circuit and do not have their own pixel circuit.
- the size of the pixel circuit of each light emitting element group 20g can be reduced, so the pixel pitch can be narrowed and the light emitting device can be made high-definition.
- the light emitting device 2 includes a substrate 6, as shown in FIG. 2.
- the substrate 6 has a first surface (also called a display surface) 6a, a second surface (also called a back surface) 6b opposite the first surface 6a, and a third surface (also called a side surface) 6c connecting the first surface 6a and the second surface 6b.
- a plurality of light emitting element groups 20g are arranged on the display surface 6a of the substrate 6.
- the drive unit 3 and the memory unit 4 may be disposed on the back surface 6b of the substrate 6.
- the substrate 6 may be made of an insulating material, such as a glass material, a resin material, or a ceramic material.
- the light emitting device 2 includes a plurality of scanning signal lines 7.
- the plurality of scanning signal lines 7 are wiring for controlling the timing of writing a drive signal to each light emitting element group 20g via a first drive line 8a, a second drive line 8b, and a third drive line 8c.
- the plurality of scanning signal lines 7 extend in a first direction.
- One of the plurality of scanning signal lines 7 is provided for each row of the pixel array.
- the N light emitting element groups 20g aligned in the first direction share the scanning signal line 7.
- the first driving line 8a, the second driving line 8b, the third driving line 8c, and the scanning signal line 7 are connected to the back wiring located on the back surface 6b of the substrate 6.
- the first driving line 8a, the second driving line 8b, the third driving line 8c, and the scanning signal line 7 may be connected to the back wiring via the side wiring located on the side surface 6c, or may be connected to the back wiring via a through conductor penetrating the substrate 6 from the display surface 6a to the back surface 6b.
- the back wiring may be connected to a driving element located on the back surface 6b.
- the driving element constitutes a part of the driving unit 3.
- the driving element controls the lighting state of each light emitting element group 20g, i.e., the display of the light emitting device 2.
- the driving element may include a control element such as an IC or an LSI, an electronic element such as a capacitor, a resistor, or a coil, and a wiring conductor that connects the control element and the electronic element.
- the driving element may be mounted on the back surface 6b by a means such as a COG (Chip On Glass) method.
- the driving element may be a thin film circuit formed on the back surface 6b by a thin film formation method such as a CVD (Chemical Vapor Deposition) method.
- the thin film circuit may include a thin film transistor (TFT) having a semiconductor layer made of low temperature polycrystalline silicon (LTPS). The driving element does not have to be located on the back surface 6b.
- the driving element may be located on an external circuit board (not shown), such as a flexible circuit board.
- the back surface wiring may be connected to the external circuit board via a connection terminal located on the back surface 6b.
- the external circuit board may be mounted on the substrate 6 by a method such as a COF (Chip On Film) method or a TAB (Tape Automated Bonding) method.
- the light emitting device 2 may be configured such that the size of the third connection electrode 9c is larger than the size of either the first connection electrode 9a or the second connection electrode 9b.
- the "size” may refer to the length in the first direction or the area in a plan view (front view). Since the size of the third connection electrode 9c is larger than the size of the first connection electrode 9a and the second connection electrode 9b, when the first regular light emitting element 10a cannot be used, the preliminary light emitting element 10c can be mounted close to the first regular light emitting element 10a, and when the second regular light emitting element 10b cannot be used, the preliminary light emitting element 10c can be mounted close to the second regular light emitting element 10b.
- the preliminary light emitting element 10c is turned on instead of the regular light emitting elements 10a and 10b.
- the preliminary light emitting element 10c is easily mounted, it is possible to reduce the risk of damaging the regular light emitting elements 10a and 10b that can be used when mounting the preliminary light emitting element 10c.
- the light-emitting device 2 may include a plurality of dummy connection electrodes 9d located on the display surface 6a of the substrate 6, as shown in Figures 4A and 4B.
- Each of the plurality of dummy connection electrodes 9d is located between the first drive line group 8g and the second drive line group 8g adjacent thereto in the first direction.
- the dummy connection electrode 9d is located between a connection electrode group consisting of the first connection electrode 9a, the second connection electrode 9b, and the third connection electrode 9c, and another connection electrode group adjacent thereto in the first direction.
- connection electrodes i.e., the first connection electrode 9a, the second connection electrode 9b, the third connection electrode 9c, and the dummy connection electrode 9d located over substantially the entire area of the display surface 6a, thereby reducing the bias in the arrangement of the connection electrodes on the display surface 6a.
- connection electrodes i.e., the first connection electrode 9a, the second connection electrode 9b, the third connection electrode 9c, and the dummy connection electrode 9d
- the bending (deformation) of the substrate 6 when mounting the regular light-emitting elements 10a, 10b and the preliminary light-emitting element 10c on the substrate 6 (the display surface 6a) can be suppressed, so that the regular light-emitting elements 10a, 10b and the preliminary light-emitting element 10c can be mounted accurately and firmly.
- heat generated from the light-emitting element 10 can be effectively dissipated to the outside via the connection electrodes.
- the length of the dummy connection electrode 9d may be the same as the length of the spare connection electrode 9c.
- the distance between the first regular light emitting element 10a and the second regular light emitting element 10b can be kept constant, and as a result, high display quality without unevenness can be maintained.
- the size of the dummy connection electrode 9d may be the same as the size of the spare connection electrode 9c. In this case, high display quality without unevenness can be maintained, and the gap between the connection electrodes on the display surface 6a can be reduced, preventing deterioration of display quality such as dark areas being visible between the connection electrode groups.
- the dummy connection electrode 9d may be electrically connected to at least one of the adjacent first connection electrode 9a and second connection electrode 9b by a connection line or the like.
- a connection failure occurs in the first regular light-emitting element 10a mounted and connected to the first connection electrode 9a
- a spare light-emitting element 10c may be mounted and connected to the dummy connection electrode 9d in place of the first regular light-emitting element 10a.
- the dummy connection electrode 9d can function as another spare connection electrode.
- the dummy connection electrode 9d is connected only to the first connection electrode 9a adjacent to it.
- the dummy connection electrode 9d is connected to both the adjacent first connection electrode 9a and second connection electrode 9b by a connection line, and when a spare light-emitting element 10c in place of the first regular light-emitting element 10a is mounted and connected to the dummy connection electrode 9d, the connection line connecting the dummy connection electrode 9d and the second connection electrode 9b may be cut by laser light or the like.
- a spare light-emitting element 10c may be mounted and connected to the dummy connection electrode 9d in place of the second regular light-emitting element 10b.
- the connection line connecting the dummy connection electrode 9d and the first connection electrode 9a may be cut by laser light or the like.
- the first connection electrode 9a, the second connection electrode 9b, the third connection electrode 9c, and the cathode electrode 11 are each electrically connected to a wiring conductor located on the surface or inside of the substrate 6 via a contact 12 such as a through hole (see Figures 4A and 4B).
- the first connection electrode 9a has an extension portion 9ab that extends to the opposite side of the third drive line side uneven portion 9ac with respect to the first drive line 8a. This allows for a good connection between the first connection electrode 9a and the first drive line 8a, improving the operational reliability of the light emitting device 2.
- the second connection electrode 9b has an extension portion 9ba that extends to the opposite side of the third drive line side uneven portion 9bc with respect to the second drive line 8b. This allows the second connection electrode 9b and the second drive line 8b to be well connected, improving the operational reliability of the light emitting device 2.
- the drive signal that should be input to the first regular light-emitting element 10a may be input to the preliminary light-emitting element 10c.
- the preliminary light-emitting element 10c can be made to emit light with the luminance that the first regular light-emitting element 10a should emit, and a decrease in the display quality of the light-emitting device 2 can be suppressed.
- the preliminary light-emitting element 10c is mounted shifted toward the second regular light-emitting element 10b from the first regular light-emitting element 10a, so if the first regular light-emitting element 10a is caused to emit light at the luminance that it should emit, the display image of the light-emitting device 2 may have luminance unevenness, color unevenness, etc. Therefore, the signal strength (electric potential) of the drive signal input to the preliminary light-emitting element 10c may be equal to or less than the signal strength (electric potential) of the drive signal that should be input to the first regular light-emitting element 10a.
- the signal strength of the drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the signal strength of the drive signal that should be input to the first regular light-emitting element 10a, but is not limited to this range. Note that “to” means “up to”, and the same applies below.
- the drive signal that should be input to the second regular light-emitting element 10b may be input to the preliminary light-emitting element 10c.
- the preliminary light-emitting element 10c can be made to emit light with the luminance that the second regular light-emitting element 10b should emit, and a decrease in the display quality of the light-emitting device 2 can be suppressed.
- the preliminary light-emitting element 10c is mounted shifted toward the first regular light-emitting element 10a from the second regular light-emitting element 10b, so if the second regular light-emitting element 10b is caused to emit light at the brightness that it should originally emit, uneven brightness, color, etc. may occur in the display image of the light-emitting device 2. Therefore, the signal strength (electric potential) of the drive signal input to the preliminary light-emitting element 10c may be equal to or less than the signal strength (electric potential) of the drive signal that should originally be input to the second regular light-emitting element 10b.
- the signal strength of the drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the signal strength of the drive signal that should originally be input to the second regular light-emitting element 10b, but is not limited to this range.
- the length of the input period of the first drive signal input to the preliminary light-emitting element 10c may be equal to or shorter than the length of the input period of the first drive signal that should be input to the first regular light-emitting element 10a. In this case, it is possible to suppress a decrease in display quality caused by emitting light from the preliminary light-emitting element 10c mounted at a position different from the position at which the first regular light-emitting element 10a is mounted.
- the length of the input period of the first drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the length of the input period of the first drive signal that should originally be input to the first regular light-emitting element 10a, but is not limited to this range.
- the length of the input period of the second drive signal input to the preliminary light-emitting element 10c may be equal to or shorter than the length of the input period of the second drive signal that should be input to the second regular light-emitting element 10b. In this case, it is possible to suppress a decrease in display quality caused by emitting light from the preliminary light-emitting element 10c mounted at a position different from the position at which the second regular light-emitting element 10b is mounted.
- the length of the input period of the second drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the length of the input period of the second drive signal that should originally be input to the second regular light-emitting element 10b, but is not limited to this range.
- the light-emitting element group 20g includes a first pixel 20a, a second pixel 20b, and a third pixel 20c.
- the first pixel 20a, the second pixel 20b, and the third pixel 20c have substantially the same circuit configuration, so below, the circuit configuration of the pixel circuit of one pixel 20 will be described.
- the pixel 20 includes a drive line 8, a scanning signal line 7, a light-emitting element 10, a thin film transistor (TFT) Tg (hereinafter referred to as "TFT(Tg)”), a thin film transistor Td (hereinafter referred to as "TFT(Td)”), and a capacitance element C.
- TFT thin film transistor
- Td thin film transistor
- the TFT (Tg) is a TFT for writing a drive signal SIG to a pixel node Vg located on a connection line connecting the drain electrode of the TFT (Tg) and the gate electrode of the TFT (Td).
- the source electrode of the TFT (Tg) is connected to the drive line 8
- the gate electrode of the TFT (Tg) is connected to the scanning signal line 7
- the drain electrode of the TFT (Tg) is connected to the gate electrode of the TFT (Td).
- the scanning signal line 7 is connected to the drive unit 3, and a scanning signal line control signal GATE for switching the TFT (Tg) to a conductive state or a non-conductive state is input to the scanning signal line 7.
- the TFT (Td) is a TFT for current driving the light emitting element 10 from the potential difference between the first power supply voltage VDD and the second power supply voltage VSS according to the level (voltage) of the drive signal SIG.
- the first power supply voltage VDD is applied to the source electrode of the TFT (Td).
- the drain electrode of the TFT (Td) is connected to the anode terminal of the light-emitting element 10.
- the second power supply voltage VSS is applied to the cathode terminal of the light-emitting element 10.
- the capacitive element C is located on the connection line connecting the gate electrode of the TFT (Td) and the source electrode of the TFT (Td), and holds the voltage of the drive signal SIG written to the pixel node Vg for the period until the next rewrite (the period of one frame).
- FIG. 5 shows a case where the TFT (Tg) and the TFT (Td) are configured as p-channel TFTs, but this is not limited thereto.
- the TFT (Tg) and the TFT (Td) may be configured as n-channel TFTs as shown in FIG. 6.
- One of the TFT (Tg) and the TFT (Td) may be an n-channel TFT and the other a p-channel TFT.
- the pixel 20 may include a thin film transistor Ts (hereinafter referred to as "TFT(Ts)").
- TFT(Ts) thin film transistor
- the source electrode of the TFT(Ts) is connected to the drain electrode of the TFT(Td)
- the drain electrode of the TFT(Ts) is connected to the anode terminal of the light-emitting element 10
- the gate electrode of the TFT(Ts) is connected to a light-emitting control signal line 13.
- the light-emitting control signal line 13 is connected to the driving unit 3.
- the driving unit 3 can control the light-emitting element 10 by pulse width modulation (PWM) by inputting a light-emitting control signal EMI to the gate electrode of the TFT(Ts) via the light-emitting control signal line 13. This enables gradation control of the light-emitting element 10.
- PWM pulse width modulation
- the drive signal SIG is a signal generated by the drive unit 3 based on the image data signal supplied from the image data signal source 5, and is input to the light emitting element group 20g via the drive line 8.
- the drive signal SIG is a signal generated by the drive unit 3 based on the image data signal supplied from the image data signal source 5, and is input to the light emitting element group 20g via the drive line 8.
- the drive signal input to the first drive line 8a will be described as SIG_P(n-1)
- the drive signal input to the second drive line 8b will be described as "SIG_P(n)
- the drive signal input to the third drive line 8c will be described as "SIG_S(n-1).”
- the drive signal SIG_P(n-1) when there is no need to distinguish between the drive signal SIG_P(n-1), the drive signal SIG_P(n), and the drive signal SIG_S(n-1), they will simply be described as "drive signal SIG.”
- the light emitting device 2 includes a data line driving circuit 120 and a driving control unit 17.
- the data line driving circuit 120 and the driving control unit 17 may be part of the driving unit 3.
- the data line driving circuit 120 outputs driving signals SIG_P(n-1), SIG_P(n) and SIG_S(n-1) based on the usability information of the light emitting element 10 and the image data signal supplied from the image data signal source 5.
- the usability information of the light emitting element 10 is information on whether the regular light emitting elements 10a and 10b are usable or not, and whether the spare light emitting element 10c is usable or not (whether the spare light emitting element 10c is implemented or not).
- the usability information of the light emitting element 10 includes the addresses (position information) of the regular light emitting elements 10a and 10b and the spare light emitting element 10c.
- the usability information of the light emitting element 10 may be stored in the memory unit 4.
- the drive control unit 17 controls the input of the drive signal SIG to the drive line 8 based on the availability information of the light emitting element 10.
- FIG. 8 shows the configuration of the drive control unit 17 that drives one frame (also called one horizontal scanning period) in two time series using a selector method (also called a time division method), but the drive method of the drive control unit 17 is not limited to the selector method.
- the drive control unit 17 inputs the drive signals SIG_P(n-1) and SIG_P(n), which are lighting signals, to the first drive line 8a and the second drive line 8b, respectively, and inputs the drive signal SIG_S(n-1), which is a non-lighting signal (black display signal), to the third drive line 8c.
- the drive control unit 17 inputs the drive signals SIG_P(n-1) and SIG_S(n-1), which are turn-on signals, to the first drive line 8a and the third drive line 8c, respectively, and inputs the non-lighting signal SIG_P(n) to the second drive line 8b.
- the drive control unit 17 inputs the drive signals SIG_P(n) and SIG_S(n-1), which are turn-on signals, to the second drive line 8b and the third drive line 8c, respectively, and inputs the drive signal SIG_P(n-1), which is a non-light-on signal, to the first drive line 8a.
- the drive control unit 17 includes a selector circuit 22, a first switch TFT (Tsa), a second switch TFT (Tsb), a third switch TFT (Tsc), a fourth switch TFT (Tsd), and connection lines 22a to 22h, 18a to 18h, 120a, and 120b.
- the selector circuit 22 has a first selection signal (SEL1) output section, an inverted first selection signal (XSEL1) output section, a second selection signal (SEL2) output section, an inverted second selection signal (XSEL2) output section, a third selection signal (SEL3) output section, an inverted third selection signal (XSEL3) output section, a fourth selection signal (SEL4) output section, and an inverted fourth selection signal (XSEL4) output section.
- the first switch TFT (Tsa) is a transfer gate circuit composed of an n-channel TFT (Ts1) and a p-channel TFT (Ts2).
- the source electrodes of the TFTs (Ts1) and (Ts2) are commonly connected, and the drain electrodes of the TFTs (Ts1) and (Ts2) are commonly connected.
- the gate electrode of the TFT (Ts1) is connected to the first selection signal (SEL1) output section via connection lines 22a and 17a, and the gate electrode of the TFT (Ts2) is connected to the inverted first selection signal (XSEL1) output section via connection lines 22b and 17b.
- the second switch TFT (Tsb) is a transfer gate circuit composed of an n-channel TFT (Ts3) and a p-channel TFT (Ts4).
- the source electrodes of the TFTs (Ts3) and (Ts4) are commonly connected, and the drain electrodes of the TFTs (Ts3) and (Ts4) are commonly connected.
- the gate electrode of the TFT (Ts3) is connected to the second selection signal (SEL3) output section via connection lines 22c and 17c, and the gate electrode of the TFT (Ts4) is connected to the inverted second selection signal (XSEL2) output section via connection lines 22d and 17d.
- the third switch TFT (Tsc) is a transfer gate circuit composed of an n-channel TFT (Ts5) and a p-channel TFT (Ts6).
- the source electrodes of the TFTs (Ts5) and (Ts6) are commonly connected, and the drain electrodes of the TFTs (Ts5) and (Ts6) are commonly connected.
- the gate electrode of the TFT (Ts5) is connected to the third selection signal (SEL3) output section via connection lines 22e and 17e, and the gate electrode of the TFT (Ts6) is connected to the inverted third selection signal (XSEL3) output section via connection lines 22f and 17f.
- the fourth switch TFT (Tsd) is a transfer gate circuit composed of an n-channel TFT (Ts7) and a p-channel TFT (Ts8).
- the source electrodes of the TFTs (Ts7) and (Ts8) are commonly connected, and the drain electrodes of the TFTs (Ts7) and (Ts8) are commonly connected.
- the gate electrode of the TFT (Ts7) is connected to the fourth selection signal (SEL4) output section via connection lines 22g and 17g, and the gate electrode of the TFT (Ts8) is connected to the inverted fourth selection signal (XSEL4) output section via connection lines 22h and 17h.
- the selector circuit 22 When the selector circuit 22 outputs an H signal (high signal) from the first selection signal (SEL1) output section and an L signal (low signal) from the inverted first selection signal (XSEL1) output section, the H signal output from the first selection signal (SEL1) output section is input to the gate electrode of the TFT (Ts1) via the connection lines 22a and 17a, and the L signal output from the inverted first selection signal (XSEL1) output section is input to the gate electrode of the TFT (Ts2) via the connection lines 22b and 17b.
- the first switch TFT (Tsa) is in a conductive state (ON state).
- the selector circuit 22 When the selector circuit 22 outputs an L signal from the first selection signal (SEL1) output section and an H signal from the inverted first selection signal (XSEL1) output section, the first switch TFT (Tsa) is in a non-conductive state (OFF state).
- the selector circuit 22 can switch each of the second switch TFT (Tsb), the third switch TFT (Tsc), and the fourth switch TFT (Tsd) to the ON state or the OFF state.
- the selector circuit 22 outputs an H signal from the second selection signal (SEL2) output section and an L signal from the inverted second selection signal (XSEL2) output section
- the second switch TFT (Tsb) is in the ON state.
- the selector circuit 22 outputs an L signal from the second selection signal (SEL2) output section and an H signal from the inverted second selection signal (XSEL2) output section
- the second switch TFT (Tsb) is in the OFF state.
- the third switch TFT (Tsc) When the selector circuit 22 outputs an H signal from the third selection signal (SEL3) output section and an L signal from the inverted third selection signal (XSEL3) output section, the third switch TFT (Tsc) is in the ON state. When the selector circuit 22 outputs an L signal from the third selection signal (SEL3) output section and an H signal from the inverted third selection signal (XSEL3) output section, the third switch TFT (Tsc) is in the OFF state. When the selector circuit 22 outputs an H signal from the fourth selection signal (SEL4) output section and an L signal from the inverted fourth selection signal (XSEL4) output section, the fourth switch TFT (Tsd) is in the ON state. When the selector circuit 22 outputs an L signal from the fourth selection signal (SEL4) output section and an H signal from the inverted fourth selection signal (XSEL4) output section, the fourth switch TFT (Tsd) is in the OFF state.
- the drive signal SIG_P (n-1) is input to the first switch TFT (Tsa) via the connection line 120a, and the drive signal SIG_P (n-1) is transmitted to the first drive line 8a.
- the drive signal SIG_S (n-1) is input to the third switch TFT (Tsc) via the connection line 120a, and the drive signal SIG_S (n-1) is transmitted to the third drive line 8c.
- the light emitting device 2 does not need to include a drive control unit 17. As shown in FIG. 9, the light emitting device 2 may be configured such that the data line drive circuit 120 directly outputs the drive signal SIG_P(n-1), the drive signal SIG_P(n), and the drive signal SIG_S(n-1) to the first drive line 8a, the second drive line 8b, and the third drive line 8c, respectively.
- the light-emitting device 2 includes a gate driver and a source driver.
- the gate driver and the source driver may be located on the periphery of the display surface 6a of the substrate 6, or on the rear surface 6b of the substrate 6.
- the gate driver and the source driver may be located on an external circuit board.
- the gate driver and the source driver may be part of the drive unit 3.
- the gate driver selects one or more of the multiple (e.g., tens to thousands) scanning signal lines 7 in line sequence, sets the selected scanning signal lines 7 to the selected potential VGH (VGL), and sets the unselected scanning signal lines 7 to the unselected potential VGL (VGH).
- the selected potential is VGL if the TFT (Tg) is a p-channel TFT, and is VGH if the TFT (Tg) is an n-channel TFT.
- the scanning signal line 7 is set to the selected potential VGH (VGL)
- the gate electrode of the write TFT (TFT (Tg) shown in Figures 5 to 7) of the pixel 20 connected to the scanning signal line 7 is set to the selected potential VGH (VGL).
- the write TFT becomes conductive, and the pixel node Vg is controlled to a potential equal to the potential of the drive signal SIG transmitted through the drive line 8.
- the gate driver applies the non-selection potential VGL (VGH) to the scanning signal line 7
- the gate electrode of the writing TFT (TFT (Tg) shown in Figures 5 to 7) of the pixel 20 connected to the scanning signal line 7 is set to the non-selection potential VGL (VGH).
- VGH non-selection potential
- the source driver Based on the image data signal input from the image data signal source 5 (see FIG. 1), the source driver sets the potential of SIG_P(n-1) input to the first drive line 8a, the potential of the drive signal SIG_P(n) input to the second drive line 8b, and the potential of the drive signal SIG_S(n-1) input to the third drive line 8c to a data potential corresponding to the row (also called the selected row) of pixels 20 connected to the scanning signal line 7 selected by the gate driver. In this way, a data potential corresponding to the image data signal of the selected row can be written to the multiple pixels 20 in the selected row.
- the light-emitting element 10 can be illuminated with a brightness corresponding to the image data signal.
- all genuine light emitting elements 10a, 10b are controlled to be lit, and each genuine light emitting element 10a, 10b is checked by optical measurement to see if it has a brightness equal to or higher than a predetermined brightness for dark spot checking. If it has a brightness equal to or higher than the predetermined brightness, it is judged as usable (OK), and if it has a brightness less than the predetermined brightness, it is judged as unusable (NG).
- each genuine light emitting element 10a, 10b is controlled to be turned off, and each genuine light emitting element 10a, 10b is checked by optical measurement to see if it has a brightness equal to or greater than a predetermined brightness for bright spot confirmation. If it is less than the predetermined brightness, it is judged as usable (OK), and if it is equal to or greater than the predetermined brightness, it is judged as unusable (NG).
- a pixel 20 for which the first regular light-emitting element 10a is OK in both the dark spot confirmation and the bright spot confirmation, and the second regular light-emitting element 10b is OK in both the dark spot confirmation and the bright spot confirmation, is judged to be an OK pixel, and the position information (address) of the OK pixel is written to the memory unit 4 by the operator using the input device.
- a pixel 20 that is NG in the dark spot confirmation or the bright spot confirmation is judged to be an NG pixel, and the information (address) of the NG pixel is written to the memory unit 4 by the operator using the input device.
- a spare light-emitting element 10c is implemented for use in place of the regular light-emitting elements 10a and 10b for the pixel 20 judged to be an NG pixel.
- the image data signal input to the light-emitting element 10 is associated with the address of the light-emitting element 10 and input to the memory unit 4.
- the address identifies each of the multiple regular light-emitting elements 10a, 10b arranged in a matrix of M rows and N' columns by row number m and column number n.
- the regular light-emitting elements 10a, 10b having the address (m, n) are described as "light-emitting element 10(m, n, p)".
- the spare light-emitting element 10c that is mounted adjacent to the light-emitting element 10(m, n, p) and used instead of the light-emitting element 10(m, n, p) is described as the light-emitting element 10(m, n, s).
- the pixel including the light-emitting element 10(m, n, p) is described as the "pixel 20(m, n, p)"
- the pixel including the light-emitting element 10(m, n, s) is described as the "pixel 20(m, n, s)".
- the address (m, n, p) may include information on whether the light-emitting element 10 (m, n, p) is usable (usability information).
- n it is determined whether n is an odd number. If n is an odd number [Yes], proceed to step S6, and if n is not an odd number [No], proceed to step S7. In other words, it is determined whether the light-emitting element 10 (m, n, p) is the light-emitting element 10 connected to the first drive line 8a, and if the light-emitting element 10 (m, n, p) is the light-emitting element 10 connected to the first drive line 8a, proceed to [S6], and if the light-emitting element 10 (m, n, p) is not the light-emitting element 10 connected to the first drive line 8a (i.e., the light-emitting element 10 connected to the second drive line 8b), proceed to [S7].
- a turn-on signal is input to pixel 20 (m, n, p) via second drive line 8b
- a turn-off signal is input to pixel 20 (m, n, s) via third drive line 8c.
- This turns on light-emitting element 10 (m, n, p) and turns off light-emitting element 10 (m, n, s).
- the input of a black signal to third drive line 8c may be omitted.
- a non-lighting signal is input to pixel 20(m,n,p) via first drive line 8a, and a lighting signal is input to pixel 20(m,n,s) via third drive line 8c.
- [S10] it is determined whether m is the maximum value (i.e., the maximum value M of the row number). If m is the maximum value [Yes], proceed to [S12], and if m is not the maximum value [No], proceed to the next row in [S11] (i.e., increase the value of m by 1) and return to [S3].
- n is the maximum value (i.e., the maximum value of the column number N'). If n is the maximum value [Yes], the flow chart ends, and if n is not the maximum value [No], in [S13], the process moves to the next column (i.e., the value of n is increased by 1) and the process returns to [S3].
- the usability of the regular light-emitting elements 10a and 10b may be determined based on whether the emission luminance and emission wavelength are within the desired range when a reference current or reference voltage is input to the regular light-emitting elements 10a and 10b.
- the reference current may be, for example, the maximum rated current of the regular light-emitting elements 10a and 10b, or the average current in the rated current range of the regular light-emitting elements 10a and 10b.
- the reference voltage may be, for example, the maximum rated voltage of the regular light-emitting elements 10a and 10b, or the average voltage in the rated voltage range of the regular light-emitting elements 10a and 10b. The same applies to the determination of the usability of the spare light-emitting element 10c.
- the usability of the regular light-emitting elements 10a and 10b may be determined based on the operating characteristics of the pixel circuit that drives the regular light-emitting elements 10a and 10b. For example, the usability of the regular light-emitting elements 10a and 10b may be determined based on whether the drain voltage range (minimum drain voltage to maximum drain voltage) of the TFT (Td) is within a desired range with respect to the operating voltage range (minimum operating voltage to maximum operating voltage) of the driving signal SIG_P.
- Figure 11 is a partially enlarged front view showing the light emitting device 2 in which all regular light emitting elements 10a, 10b can be used.
- Figure 12 is a timing chart showing an example of a method of inputting the drive signal SIG to the light emitting device 2 of Figure 11
- Figure 13 is a timing chart showing another example of a method of inputting the drive signal SIG to the light emitting device 2 of Figure 10.
- the period during which a non-lighting signal (black signal) is input to the drive line 8 is indicated by hatching. The same applies to the timing charts described later (see Figures 16, 17, 20, 21, 24, and 25).
- the driving unit 3 drives one horizontal scanning period in a time division manner.
- the driving unit 3 inputs a driving signal SIG_P(n-1) to the first driving line 8a to light up the pixel 20(m-1, n-1, p), and inputs a driving signal SIG_P(n) to light up the pixel 20(m-1, n, p) to the second driving line 8b.
- one horizontal scanning period 1H(m-1) refers to a period during which the gate driver selects the (m-1) row of the pixel array, and the same applies to one horizontal scanning period 1H(m) described later.
- the driving unit 3 inputs a driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) to the first driving line 8a, and inputs a driving signal SIG_P(n) that turns on pixel 20(m, n, p) to the second driving line 8b.
- a driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) to the first driving line 8a
- a driving signal SIG_P(n) that turns on pixel 20(m, n, p) to the second driving line 8b.
- the driving signal that turns off pixel 20(m, n-1, p) may be the same as the driving signal that turns on pixel 20(m, n-1, p).
- the driving unit 3 When the driving unit 3 does not drive one horizontal scanning period in a time division manner, the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in Figure 17.
- the driving signal input to pixel 20(m,n-1,s) via the first driving line 8a may be the same signal as the driving signal that should originally be input to pixel 20(m,n-1,p), or may be a signal with a lower signal strength (electric potential) than the driving signal that should originally be input to pixel 20(m,n-1,p).
- the drive signal SIG_P(n-1) input to pixel 20(m, n-1, p) via first drive line 8a may be a drive signal that turns off pixel 20(m, n-1, p), or, if pixel 20(m, n-1, p) is a dark spot, may be the same signal as the drive signal (lighting signal) that should originally be input to pixel 20(m, n-1, p).
- the spare light-emitting elements 10c can be turned on in place of the unusable regular light-emitting elements 10a, 10b.
- FIG. 18 is a partially enlarged front view showing another example of a light emitting device 2 in which some of the regular light emitting elements 10a, 10b are unusable
- FIG. 19 is a partially enlarged front view showing the state in which a spare light emitting element 10c is mounted on the light emitting device 2 of FIG. 18.
- FIG. 20 is a timing chart showing an example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 19, and
- FIG. 21 is a timing chart showing another example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 19.
- light-emitting elements 10(m-1,n,p) and light-emitting elements 10(m,n-1,p) are disabled, and as shown in FIG. 19, light-emitting elements 10(m-1,n,s) and light-emitting elements 10(m,n-1,s) are mounted.
- Light-emitting element 10(m-1,n,s) is connected to second drive line side unevenly distributed portion 9cb, and light-emitting element 10(m,n-1,s) is connected to first drive line side unevenly distributed portion 9ca.
- the driving unit 3 inputs a driving signal SIG_P(n-1) that turns on the pixel 20(m-1, n-1, p) to the first driving line 8a during the first half of one horizontal scanning period 1H(m-1), and inputs a driving signal SIG_P(n) that turns off the pixel 20(m-1, n, p) to the second driving line 8b.
- the driving signal input to the pixel 20(m-1, n, p) via the second driving line 8b may be the same as the driving signal (lighting signal) that should originally be input to the pixel 20(m-1, n, p).
- the driving unit 3 inputs a driving signal SIG_S(n) that turns on the pixel 20(m-1, n, s) to the third driving line 8c during the second half of one horizontal scanning period 1H(m-1).
- the drive signal SIG_S(n) input to pixel 20(m-1, n, s) may be the same signal as the drive signal that should originally be input to pixel 20(m-1, n, p), or may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20(m, n-1, p).
- the driving unit 3 inputs a driving signal SIG_P(n-1) that turns off the pixel 20(m, n-1, p) to the first driving line 8a and a driving signal SIG_P(n) that turns on the pixel 20(m, n, p) to the second driving line 8b during the first half of one horizontal scanning period 1H(m).
- the driving signal SIG_P(n-1) input to the pixel 20(m, n-1, p) via the first driving line 8a may be the same signal as the driving signal (lighting signal) that should be input to the pixel 20(m, n-1, p).
- the driving unit 3 inputs a driving signal SIG_S(n-1) that turns on the pixel 20(m, n-1, s) to the third driving line 8c.
- the drive signal input to pixel 20 (m, n-1, s) may be the same as the drive signal that should originally be input to pixel 20 (m, n-1, p), or may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20 (m, n-1, p).
- the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in Figure 21.
- the driving signal SIG_S(n) input to pixel 20(m-1,n,s) via the third driving line 8c may be the same signal as the driving signal that should originally be input to pixel 20(m-1,n,p), or may be a signal with a lower signal strength (electric potential) than the driving signal that should originally be input to pixel 20(m-1,n,p).
- the drive signal SIG_P(n) input to pixel 20(m-1,n,p) via second drive line 8b may be a drive signal that turns off pixel 20(m-1,n,p), or, if pixel 20(m-1,n,p) is a dark spot, may be the same signal as the drive signal (lighting signal) that should originally be input to pixel 20(m-1,n,p).
- the drive signal SIG_P(n-1) input to pixel 20(m, n-1, p) may be a drive signal that turns off pixel 20(m, n-1, p), or if pixel 20(m, n-1, p) is a dark spot, it may be the same signal as the drive signal (lighting signal) that should originally be input to pixel 20(m, n-1, p).
- the drive signal SIG_S(n-1) input to pixel 20(m, n-1, s) via third drive line 8c may be the same signal as the drive signal that should originally be input to pixel 20(m, n-1, p), or it may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20(m, n-1, p).
- the drive signal SIG_P(n) input to pixel 20(m,n,p) via second drive line 8b is a drive signal SIG_P(n) that turns on pixel 20(m,n,p).
- FIG. 22 is a partially enlarged view showing yet another example of a light emitting device 2 in which some of the regular light emitting elements 10a, 10b are unusable
- FIG. 23 is a partially enlarged view showing the state in which a spare light emitting element 10c is mounted on the light emitting device 2 of FIG. 22
- FIG. 24 is a timing chart showing an example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 23, and
- FIG. 25 is a timing chart showing another example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 23.
- light-emitting elements 10(m,n-1,p) and light-emitting elements 10(m,n,p) are disabled, and as shown in FIG. 23, light-emitting elements 10(m,n-1,s) and light-emitting elements 10(m,n,s) are mounted.
- Light-emitting element 10(m,n-1,s) is connected to the first drive line side unevenly distributed portion 9ca, and light-emitting element 10(m,n,s) is connected to the second drive line side unevenly distributed portion 9cb.
- the drive unit 3 inputs a drive signal SIG_P(n-1) that turns on pixel 20(m-1, n-1, p) to the first drive line 8a, and inputs a drive signal SIG_P(n) that turns on pixel 20(m-1, n, p) to the second drive line 8b.
- the drive unit 3 inputs a drive signal SIG_S(n-1) that turns off pixel 20(m-1, n-1, s) to the third drive line 8c.
- the driving unit 3 inputs a driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) to the first driving line 8a, and inputs a driving signal SIG_P(n) that turns off pixel 20(m, n, p) to the second driving line 8b. If pixel 20(m, n-1, p) is a dark spot, the driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) may be the same signal as the driving signal that turns on pixel 20(m, n-1, p).
- the driving signal SIG_P(n) that turns off pixel 20(m, n, p) may be a driving signal that turns on pixel 20(m, n, p).
- the driving unit 3 inputs a driving signal SIG_S(n-1) for turning on the pixel 20(m, n-1, s) to the third driving line 8c.
- the driving signal SIG_S(n-1) input to the pixel 20(m, n-1, s) via the third driving line 8c may be the same as the driving signal that should be input to the pixel 20(m, n-1, p).
- the light-emitting device 2 is configured such that the pixel 20(m, n-1, s) and the pixel 20(m, n, s) share the third driving line 8c, and therefore the same driving signal SIG_S(n-1) is input to both the pixel 20(m, n-1, s) and the pixel 20(m, n, s).
- a drive signal that should be input to pixel 20 (m, n-1, p) is input to both pixel 20 (m, n-1, s) and pixel 20 (m, n, s)
- luminance unevenness, color unevenness, etc. may occur in the display image of the light-emitting device 2.
- the drive unit 3 may calculate a correction drive signal based on the drive signal that should be input to pixel 20 (m, n-1, p) and the drive signal that should be input to pixel 20 (m, n, p), and input the correction drive signal to pixel 20 (m, n-1, s) and pixel 20 (m, n, s).
- the potential of the correction drive signal may be an average potential of the drive signal that should be input to pixel 20 (m, n-1, p) and the drive signal that should be input to pixel 20 (m, n, p), or may be another potential.
- the driving unit 3 When the driving unit 3 does not drive one horizontal scanning period 1H in a time division manner, the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in Figure 25.
- the driving signal SIG_P(n-1) input to pixel 20(m, n-1, p) via the first driving line 8a may be a driving signal that turns off pixel 20(m, n-1, p), or, if pixel 20(m, n-1, p) is a dark spot, may be the same signal as the driving signal (lighting signal) that should originally be input to pixel 20(m, n-1, p).
- the driving signal SIG_P(n) input to the pixel 20(m,n,p) via the second driving line 8b may be a driving signal that turns off the pixel 20(m,n,p), or may be the same signal as the driving signal (lighting signal) that should be input to the pixel 20(m,n,p) when the pixel 20(m,n,p) is a dark spot.
- the driving signal SIG_S(n-1) input to the pixel 20(m,n-1,s) and the pixel 20(m,n,s) may be the same signal as the driving signal that should be input to the pixel 20(m,n-1,p), or may be the above-mentioned correction driving signal.
- FIG. 26 is a partially enlarged view showing another example of the state in which a spare light-emitting element 10c is mounted on the light-emitting device 2 of FIG. 22.
- the light-emitting device 2 may be configured as shown in FIG. 26 in such a way that only the light-emitting element 10(m, n-1, s) is mounted and the light-emitting element 10(m, n, s) is not mounted.
- a drive signal SIG can also be input to the light-emitting device 2 of FIG. 26, as described using FIGS. 24 and 25.
- This disclosure makes it possible to provide a high-definition display device with reduced point defects.
- the light-emitting device 2 may have a configuration in which each pixel 20 has multiple light-emitting elements 10.
- the multiple light-emitting elements 10 may have the same emission wavelength, or may have different emission wavelengths. When the emission wavelengths of the multiple light-emitting elements 10 are the same, the occurrence of NG pixels can be suppressed.
- a light-emitting element 10 that emits red light, a light-emitting element 10 that emits green light, and a light-emitting element 10 that emits blue light can be provided in each pixel 20, thereby making it possible to provide a light-emitting device 2 capable of displaying color gradations.
- the light emitting device disclosed herein can be implemented in the following configurations (1) to (16).
- the first driving line is connected to a first connection electrode connected to the first regular light emitting element in a state where the first driving line overlaps with the first connection electrode in a plan view;
- the second driving line is connected to a second connection electrode connected to the second regular light emitting element in a state where the second driving line overlaps with the second connection electrode in a plan view;
- the first connection electrode and the second connection electrode each have a third drive line side unevenly distributed portion that is unevenly distributed toward the third drive line,
- a light-emitting device according to any one of (2) to (4) above, in which the resistance of the spare connection electrode is smaller than the resistance of each of the first connection electrode and the second connection electrode.
- a plurality of drive line groups each including the first drive line, the second drive line, and the third drive line are arranged in a row, The light emitting device according to any one of (2) to (7) above, wherein a dummy connection electrode is provided between a first driving line group and a second driving line group adjacent to the first driving line group.
- connection electrode is electrically connected to at least one of the first connection electrode and the second connection electrode adjacent thereto.
- the first connection electrode has an extension portion that extends to a side opposite to the third drive line side unevenly distributed portion of the first connection electrode with respect to the first drive line,
- the light-emitting device according to any one of (2) to (10) above, wherein the second connection electrode has an extension portion that extends on the opposite side of the second drive line from the third drive line side uneven distribution portion of the second connection electrode with respect to the second drive line.
- a signal strength of the first driving signal input to the preliminary light-emitting element is equal to or less than a signal strength of the first driving signal to be input to the first regular light-emitting element,
- a length of an input period of the first driving signal input to the preliminary light-emitting element is equal to or shorter than a length of an input period of the first driving signal to be input to the first regular light-emitting element;
- a light emitting device according to any one of (1) to (14) above, a light emitting element group including the first regular light emitting element, the second regular light emitting element, and the auxiliary light emitting element, the light emitting element group being arranged in a matrix.
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Abstract
Description
本開示は、発光ダイオード素子等の自発光素子を備えた発光装置及び表示装置に関する。 This disclosure relates to a light-emitting device and a display device equipped with self-luminous elements such as light-emitting diode elements.
従来、特許文献1に記載された表示装置が知られている。 A display device as described in Patent Document 1 is known.
本開示に係る発光装置は、常時使用するための第1正規発光素子、及び、前記第1正規発光素子を駆動する第1駆動線と、常時使用するための第2正規発光素子、及び、前記第2正規発光素子を駆動する第2駆動線であって、前記第1駆動線に沿って延びている第2駆動線と、冗長的に使用するための予備発光素子、及び、前記予備発光素子を駆動する第3駆動線であって、前記第1駆動線と前記第2駆動線との間に位置しているとともに、前記第1駆動線及び前記第2駆動線に沿って延びている第3駆動線と、を備える。前記第3駆動線は、前記予備発光素子に接続される予備接続電極に、前記予備接続電極と平面視で重なった状態で接続されている。前記予備接続電極は、前記第1駆動線の側に偏在する第1駆動線側偏在部と、前記第2駆動線の側に偏在する第2駆動線側偏在部と、を有する。前記予備発光素子は、前記第1正規発光素子が使用不能な場合に前記第1駆動線側偏在部に接続され、前記第2正規発光素子が使用不能な場合に前記第2駆動線側偏在部に接続される。 The light emitting device according to the present disclosure includes a first regular light emitting element for constant use, a first drive line for driving the first regular light emitting element, a second regular light emitting element for constant use, a second drive line for driving the second regular light emitting element, the second drive line extending along the first drive line, a spare light emitting element for redundant use, and a third drive line for driving the spare light emitting element, the third drive line being located between the first drive line and the second drive line and extending along the first drive line and the second drive line. The third drive line is connected to a spare connection electrode connected to the spare light emitting element in a state where it overlaps with the spare connection electrode in a planar view. The spare connection electrode has a first drive line side unevenly distributed portion that is unevenly distributed on the side of the first drive line and a second drive line side unevenly distributed portion that is unevenly distributed on the side of the second drive line. The spare light emitting element is connected to the first drive line side unevenly distributed portion when the first regular light emitting element is unavailable, and is connected to the second drive line side unevenly distributed portion when the second regular light emitting element is unavailable.
本開示に係る表示装置は、上記の発光装置を備え、前記第1正規発光素子と前記第2正規発光素子と前記予備発光素子とを含む発光素子グループが、マトリックス状に配列されている。 The display device according to the present disclosure includes the above-mentioned light-emitting device, and a light-emitting element group including the first regular light-emitting element, the second regular light-emitting element, and the spare light-emitting element is arranged in a matrix.
本開示の目的、特色、および利点は、下記の詳細な説明と図面とからより明確になるであろう。
複数の発光ダイオード(Light Emitting Diode:LED)素子を基板上に配列してなるLED表示装置が種々提案されている。LED表示装置は、LED素子の実装不良、LED素子自体の不良等によって、輝点又は滅点等の点欠陥が発生することがある。特許文献1は、1画素内に2個のLED素子を設け、2個のLED素子のうち正常なLED素子を選択的に駆動することによって、点欠陥を補う表示装置を記載している。 Various LED display devices have been proposed, each of which has multiple Light Emitting Diode (LED) elements arranged on a substrate. LED display devices can have point defects such as bright or dark spots due to poor mounting of the LED elements or defects in the LED elements themselves. Patent Document 1 describes a display device that provides two LED elements in one pixel and compensates for point defects by selectively driving the normal LED element of the two.
従来の表示装置は、画素毎に2個のLED素子を設け、LED素子毎に少なくとも1個のトランジスタを設ける構成であるため、画素ピッチを狭くして、高精細な表示装置とすることが困難であった。 Conventional display devices have two LED elements per pixel, and at least one transistor per LED element, making it difficult to narrow the pixel pitch and create a high-definition display device.
以下、添付図面を参照して、本開示の発光装置及び表示装置の実施形態について説明する。本開示の実施形態に係る発光装置及び表示装置は、図示されていない回路基板、配線導体、制御IC(LSI)等の周知の構成を備えていてもよい。以下の説明で用いられる図は模式的なものであり、図面上の寸法比率等は現実のものとは必ずしも一致していない。また、各図において、対応する部分には同一の符号を付しており、重複する説明は省略又は簡略化する。 Below, embodiments of the light emitting device and display device of the present disclosure will be described with reference to the attached drawings. The light emitting device and display device according to the embodiments of the present disclosure may include well-known components such as a circuit board, wiring conductors, and a control IC (LSI) that are not shown. The figures used in the following description are schematic, and the dimensional ratios and the like in the drawings do not necessarily correspond to the actual ones. In addition, in each figure, corresponding parts are given the same reference numerals, and duplicate descriptions will be omitted or simplified.
図1~図26は、本開示の発光装置及び表示装置を説明する図である。本実施形態では、説明の便宜上、単色表示を行う場合について説明する。なお、表示装置は、カラー表示を行うものであってもよく、その場合、第1正規発光素子10aの発光色と第2正規発光素子10bの発光色が異なっていてもよい。例えば、第1正規発光素子10aの発光色が赤色であり、第1方向の+方向(例えば、図3における右方向)においてそれに隣接する第2正規発光素子10bの発光色が緑色であり、第1方向の+方向においてそれに隣接する第1正規発光素子10aの発光色が青色であり、この色配置を繰り返す構成であってもよい。 FIGS. 1 to 26 are diagrams illustrating the light-emitting device and display device of the present disclosure. In this embodiment, for convenience of explanation, a case where a monochromatic display is performed will be described. Note that the display device may perform color display, in which case the emission color of the first genuine light-emitting element 10a and the emission color of the second genuine light-emitting element 10b may be different. For example, the emission color of the first genuine light-emitting element 10a may be red, the emission color of the second genuine light-emitting element 10b adjacent thereto in the + direction of the first direction (for example, the right direction in FIG. 3) may be green, and the emission color of the first genuine light-emitting element 10a adjacent thereto in the + direction of the first direction may be blue, and this color arrangement may be repeated.
本実施形態の表示装置1は、図1に示すように、発光装置2と、駆動部3と、記憶部4とを備える。駆動部3は、画像データ信号源5から供給される画像データ信号に基づいて、発光装置2に駆動信号を出力する。画像データ信号源5は、画像データ信号を出力する外部装置によって実現されてよい。記憶部4には、駆動部3によって実行されるプログラムが格納される。記憶部4は、RAM(Random Access Memory)、ROM(Read Only Memory)等の記憶装置によって構成されてよい。 As shown in FIG. 1, the display device 1 of this embodiment includes a light-emitting device 2, a driving unit 3, and a memory unit 4. The driving unit 3 outputs a driving signal to the light-emitting device 2 based on an image data signal supplied from an image data signal source 5. The image data signal source 5 may be realized by an external device that outputs an image data signal. The memory unit 4 stores a program executed by the driving unit 3. The memory unit 4 may be configured by a storage device such as a RAM (Random Access Memory) or a ROM (Read Only Memory).
発光装置2は、図2,3に示すように、複数の発光素子グループ20gを含む。複数の発光素子グループ20gは、M行N列(M,Nは1以上の整数)のマトリックス状に配列されている。各発光素子グループ20gは、発光装置2における隣接2画素を構成する。各発光素子グループ20gは、図3に示すように、第1画素20a、第2画素20b及び第3画素20cを含む。第1画素20a、第2画素20b及び第3画素20cは、複数の発光素子グループ20gの配列(画素配列ともいう)の行方向(図2,3における左右方向)に並んでいる。以下、第1画素20aと、第2画素20bと、第3画素20cとを区別しない場合、単に、「画素20」と記載することがある。また、画素配列の行方向を、「第1方向」と記載することがある。第3画素20cは、第1方向における第1画素20aと第2画素20bとの間に位置している。 The light emitting device 2 includes a plurality of light emitting element groups 20g, as shown in Figs. 2 and 3. The plurality of light emitting element groups 20g are arranged in a matrix of M rows and N columns (M and N are integers of 1 or more). Each light emitting element group 20g constitutes two adjacent pixels in the light emitting device 2. As shown in Fig. 3, each light emitting element group 20g includes a first pixel 20a, a second pixel 20b, and a third pixel 20c. The first pixel 20a, the second pixel 20b, and the third pixel 20c are arranged in the row direction (left-right direction in Figs. 2 and 3) of the array (also called pixel array) of the plurality of light emitting element groups 20g. Hereinafter, when the first pixel 20a, the second pixel 20b, and the third pixel 20c are not distinguished from each other, they may be simply referred to as "pixel 20". The row direction of the pixel array may be referred to as the "first direction". The third pixel 20c is located between the first pixel 20a and the second pixel 20b in the first direction.
第1画素20aは、第1正規発光素子10aと、第1駆動線8aとを含む。第1正規発光素子10aは、配線及びスルーホール等を介して第1駆動線8aに接続されてよい。第2画素20bは、第2正規発光素子10bと、第2駆動線8bとを含む。第2正規発光素子10bは、配線及びスルーホール等を介して第2駆動線8bに接続されてよい。第3画素20cは、第3駆動線(予備駆動線ともいう)8cを含む。第3画素20cは、予備発光素子10cを含みうる。予備発光素子10cは、配線及びスルーホール等を介して第3駆動線8cに接続されてよい。以下、第1正規発光素子10aと、第2正規発光素子10bとを区別しない場合、単に、「正規発光素子10a,10b」と記載することがある。また、第1正規発光素子10aと、第2正規発光素子10bと、予備発光素子10cとを区別しない場合、単に、「発光素子10」と記載することがある。 The first pixel 20a includes a first regular light-emitting element 10a and a first driving line 8a. The first regular light-emitting element 10a may be connected to the first driving line 8a via wiring, a through-hole, etc. The second pixel 20b includes a second regular light-emitting element 10b and a second driving line 8b. The second regular light-emitting element 10b may be connected to the second driving line 8b via wiring, a through-hole, etc. The third pixel 20c includes a third driving line (also called a reserve driving line) 8c. The third pixel 20c may include a reserve light-emitting element 10c. The reserve light-emitting element 10c may be connected to the third driving line 8c via wiring, a through-hole, etc. Hereinafter, when there is no need to distinguish between the first regular light-emitting element 10a and the second regular light-emitting element 10b, they may simply be described as "regular light-emitting elements 10a, 10b". In addition, when there is no need to distinguish between the first regular light-emitting element 10a, the second regular light-emitting element 10b, and the spare light-emitting element 10c, they may simply be referred to as "light-emitting element 10."
正規発光素子10a,10bは、M行N’列(N’=2×N)のマトリックス状に配列されている。正規発光素子10a,10bは、常時使用するための発光素子である。予備発光素子10cは、冗長的に使用するための発光素子である。正規発光素子10a,10bは、実装不良、欠陥品等の不具合により使用不能となることがある。予備発光素子10cは、正規発光素子10a,10bが使用不能な場合に、使用不能な正規発光素子10a,10bの代わりに使用するための発光素子である。各発光素子グループ20gは、1つ又は2つの予備発光素子10cを含みうる。なお、正規発光素子10a,10bが使用可能な場合、第3画素20cは、予備発光素子10cを含まなくてよい。言い換えると、予備発光素子10cは、正規発光素子10a,10bが使用不能な場合にのみ実装されてよい。 The regular light emitting elements 10a and 10b are arranged in a matrix of M rows and N' columns (N' = 2 x N). The regular light emitting elements 10a and 10b are light emitting elements for constant use. The spare light emitting element 10c is a light emitting element for redundant use. The regular light emitting elements 10a and 10b may become unusable due to defects such as poor mounting or defective products. The spare light emitting element 10c is a light emitting element for use in place of the unusable regular light emitting elements 10a and 10b when the regular light emitting elements 10a and 10b are unusable. Each light emitting element group 20g may include one or two spare light emitting elements 10c. Note that when the regular light emitting elements 10a and 10b are usable, the third pixel 20c does not need to include the spare light emitting element 10c. In other words, the spare light emitting element 10c may be mounted only when the regular light emitting elements 10a and 10b are unusable.
発光装置2は、例えば千個~百万個程度の発光素子10を含んでよい。発光素子10は、例えば発光ダイオード(Light Emitting Diode:LED)素子、有機発光ダイオード(Organic Light Emitting Diode:OLED)素子等の自発光素子であってよい。発光素子10は、マイクロLED素子であってもよい。本実施形態では、発光素子10として、マイクロLED素子が用いられる。マイクロLED素子は、その光放射面に直交する方向(平面視方向ともいう)から見たときに、一辺の長さが1μm程度以上100μm程度以下である矩形形状を有してよい。マイクロLED素子のアノード端子に印加する第1電源電圧(正電源電圧)VDDは、例えば10V~15V程度であってよく、マイクロLED素子のカソード端子に印加する第2電源電圧(負電源電圧)VSSは、例えば-3V~0V程度であってよい。 The light emitting device 2 may include, for example, about one thousand to one million light emitting elements 10. The light emitting elements 10 may be self-emitting elements such as light emitting diodes (LEDs) and organic light emitting diodes (OLEDs). The light emitting elements 10 may be micro LED elements. In this embodiment, a micro LED element is used as the light emitting element 10. The micro LED element may have a rectangular shape with a side length of about 1 μm to about 100 μm when viewed from a direction perpendicular to its light emitting surface (also called a planar view direction). The first power supply voltage (positive power supply voltage) VDD applied to the anode terminal of the micro LED element may be, for example, about 10 V to 15 V, and the second power supply voltage (negative power supply voltage) VSS applied to the cathode terminal of the micro LED element may be, for example, about -3 V to 0 V.
各発光素子グループ20gは、図4A,4Bに示すように、第1正規発光素子10aのアノード端子に接続される第1接続電極9a、第2正規発光素子10bのアノード端子に接続される第2接続電極9b、及び予備発光素子10cのアノード端子に接続される第3接続電極(予備接続電極ともいう)9cを有する。第1接続電極9a、第2接続電極9b及び第3接続電極9cは、第1方向に並んでよい。第3接続電極9cは、第1接続電極9aと第2接続電極9bとの間に位置してよい。第1接続電極9aは、第1画素20aの一部を構成し、第2接続電極9bは、第2画素20bの一部を構成し、第3接続電極9cは、第3画素20cの一部を構成する。 As shown in Figures 4A and 4B, each light-emitting element group 20g has a first connection electrode 9a connected to the anode terminal of the first regular light-emitting element 10a, a second connection electrode 9b connected to the anode terminal of the second regular light-emitting element 10b, and a third connection electrode (also called a spare connection electrode) 9c connected to the anode terminal of the spare light-emitting element 10c. The first connection electrode 9a, the second connection electrode 9b, and the third connection electrode 9c may be aligned in the first direction. The third connection electrode 9c may be located between the first connection electrode 9a and the second connection electrode 9b. The first connection electrode 9a constitutes a part of the first pixel 20a, the second connection electrode 9b constitutes a part of the second pixel 20b, and the third connection electrode 9c constitutes a part of the third pixel 20c.
各発光素子グループ20gは、第1正規発光素子10aのカソード端子と、第2正規発光素子10bのカソード端子と、予備発光素子10cのカソード端子とに接続されるカソード電極11を有している。カソード電極11は、図4A,4Bに示すように、複数の帯状電極で構成されてよい。複数の帯状電極は、第1方向に細長い形状を有してよい。第1正規発光素子10a及び予備発光素子10cは、1つの帯状電極を共用してよい。第2正規発光素子10b及び予備発光素子10cは、1つの帯状電極を共用してよい。 Each light emitting element group 20g has a cathode electrode 11 connected to the cathode terminal of the first regular light emitting element 10a, the cathode terminal of the second regular light emitting element 10b, and the cathode terminal of the spare light emitting element 10c. The cathode electrode 11 may be composed of a plurality of strip electrodes as shown in Figures 4A and 4B. The plurality of strip electrodes may have an elongated shape in the first direction. The first regular light emitting element 10a and the spare light emitting element 10c may share one strip electrode. The second regular light emitting element 10b and the spare light emitting element 10c may share one strip electrode.
第1駆動線8a、第2駆動線8b及び第3駆動線8cは、各発光素子グループ20gに駆動信号を入力するための配線である。第1駆動線8a、第2駆動線8b及び第3駆動線8cはそれぞれ、第1正規発光素子10a、第2正規発光素子10b及び予備発光素子10cを駆動するための配線である。以下、第1駆動線8aと、第2駆動線8bと、第3駆動線8cとを区別しない場合、単に、「駆動線8」と記載することがある。また、各発光素子グループ20gの第1駆動線8a、第2駆動線8b及び第3駆動線8cを、「駆動線グループ8g」と記載することがある。 The first drive line 8a, the second drive line 8b, and the third drive line 8c are wirings for inputting drive signals to each light emitting element group 20g. The first drive line 8a, the second drive line 8b, and the third drive line 8c are wirings for driving the first regular light emitting element 10a, the second regular light emitting element 10b, and the spare light emitting element 10c, respectively. Hereinafter, when there is no need to distinguish between the first drive line 8a, the second drive line 8b, and the third drive line 8c, they may simply be referred to as "drive lines 8". In addition, the first drive line 8a, the second drive line 8b, and the third drive line 8c of each light emitting element group 20g may be referred to as "drive line group 8g".
第1駆動線8aは、図4A,4Bに示すように、第1接続電極9aと平面視で重なり、第1接続電極9aと接続されている。第1駆動線8aは、画素配列の列方向(図4A,4Bにおける上下方向)に延びている。以下、画素配列の列方向を、「第2方向」と記載することがある。 As shown in Figs. 4A and 4B, the first drive line 8a overlaps with the first connection electrode 9a in a plan view and is connected to the first connection electrode 9a. The first drive line 8a extends in the column direction of the pixel array (the up-down direction in Figs. 4A and 4B). Hereinafter, the column direction of the pixel array may be referred to as the "second direction."
第2駆動線8bは、図4A,4Bに示すように、第2接続電極9bと平面視で重なり、第2接続電極9bと接続されている。第2駆動線8bは、第1駆動線8aに沿って延びている。なお、「沿って延びている」は、「平行に延びている」、「略平行に延びている」という意味に解してよく、以下同様とする。 As shown in Figures 4A and 4B, the second drive line 8b overlaps with the second connection electrode 9b in a plan view and is connected to the second connection electrode 9b. The second drive line 8b extends along the first drive line 8a. Note that "extending along" may be interpreted as meaning "extending parallel" or "extending approximately parallel", and the same applies below.
第3駆動線8cは、図4A,4Bに示すように、予備接続電極9cと平面視で重なり、予備接続電極9cと接続されている。第3駆動線8cは、第1駆動線8a及び第2駆動線8bに沿って延びている。第3駆動線8cは、第1駆動線8aと第2駆動線8bとの間に位置している。 As shown in Figures 4A and 4B, the third driving line 8c overlaps with the spare connection electrode 9c in a plan view and is connected to the spare connection electrode 9c. The third driving line 8c extends along the first driving line 8a and the second driving line 8b. The third driving line 8c is located between the first driving line 8a and the second driving line 8b.
図3,4A,4Bに示すように、第2方向に並ぶ複数(M個)の発光素子グループ20gは、第1駆動線8a、第2駆動線8b及び第3駆動線8cを共用する。 As shown in Figures 3, 4A, and 4B, multiple (M) light-emitting element groups 20g aligned in the second direction share the first drive line 8a, the second drive line 8b, and the third drive line 8c.
第3駆動線8cの太さ(幅及び/又は厚さ)は、第1駆動線8aの太さ及び第2駆動線8bの太さのそれぞれと同じであってもよく、細くてもよい。図4A,4Bに示すように、第3駆動線8cに接続される予備接続電極9cの大きさ(面積)が、第1駆動線8aに接続される第1接続電極9aの大きさ及び第2駆動線8bに接続される第2接続電極9bの大きさのそれぞれよりも大きい場合、第3駆動線8c全体の実質的な平均幅が増加し、第3駆動線8cの抵抗が低下しやすくなる。そうすると、第3駆動線8cの第2方向における電圧降下が、第1駆動線8aの第2方向における電圧降下及び第2駆動線8bの第2方向における電圧降下のそれぞれよりも小さくなりやすい。第3駆動線8cの太さを、第1駆動線8aの太さ及び第2駆動線8bの太さのそれぞれよりも細くすることによって、第3駆動線8cの予備接続電極9cを含む抵抗を、第1駆動線8aの第1接続電極9aを含む抵抗及び第2駆動線8bの第2接続電極9bを含む抵抗のそれぞれと同程度とし、第3駆動線8cにおける電圧降下も同程度とすることができる。第3駆動線8cの太さは、第1駆動線8aの太さ及び第2駆動線8bの太さのそれぞれの0.1倍以上1倍未満であってもよいが、この範囲に限らない。第3駆動線8cの予備接続電極9cを含む抵抗は、第1駆動線8aの第1接続電極9aを含む抵抗及び第2駆動線8bの第2接続電極9bを含む抵抗のそれぞれの0.9倍~1.1倍程度であってもよいが、この範囲に限らない。 The thickness (width and/or thickness) of the third drive line 8c may be the same as or smaller than the thickness of the first drive line 8a and the thickness of the second drive line 8b. As shown in Figures 4A and 4B, when the size (area) of the auxiliary connection electrode 9c connected to the third drive line 8c is larger than the size of the first connection electrode 9a connected to the first drive line 8a and the size of the second connection electrode 9b connected to the second drive line 8b, the effective average width of the entire third drive line 8c increases, and the resistance of the third drive line 8c tends to decrease. In this case, the voltage drop in the second direction of the third drive line 8c tends to be smaller than the voltage drop in the second direction of the first drive line 8a and the voltage drop in the second direction of the second drive line 8b. By making the thickness of the third drive line 8c thinner than the thickness of the first drive line 8a and the thickness of the second drive line 8b, the resistance including the spare connection electrode 9c of the third drive line 8c can be made to be approximately the same as the resistance including the first connection electrode 9a of the first drive line 8a and the resistance including the second connection electrode 9b of the second drive line 8b, and the voltage drop in the third drive line 8c can also be made to be approximately the same. The thickness of the third drive line 8c may be 0.1 times or more and less than 1 times the thickness of the first drive line 8a and the thickness of the second drive line 8b, but is not limited to this range. The resistance including the spare connection electrode 9c of the third drive line 8c may be approximately 0.9 to 1.1 times the resistance including the first connection electrode 9a of the first drive line 8a and the resistance including the second connection electrode 9b of the second drive line 8b, but is not limited to this range.
予備接続電極9cの大きさが、第1接続電極9a及び第2接続電極9bのそれぞれの大きさの2倍以上であってもよい。その場合、第1駆動線側偏在部9caの大きさを第1接続電極9aの大きさと同等以上とすることができ、第1駆動線側偏在部9caに第1正規発光素子10aを搭載し接続する場合に、搭載及び接続がしやすくなり、接続性が向上する。また、第2駆動線側偏在部9cbの大きさを第2接続電極9bの大きさと同等以上とすることができ、第2駆動線側偏在部9cbに第2正規発光素子10bを搭載し接続する場合に、搭載及び接続がしやすくなり、接続性が向上する。予備接続電極9cの大きさは、第1接続電極9a及び第2接続電極9bのそれぞれの大きさの2倍以上5倍程度以下であってもよいが、この範囲に限らない。 The size of the spare connection electrode 9c may be at least twice the size of each of the first connection electrode 9a and the second connection electrode 9b. In this case, the size of the first drive line side uneven portion 9ca can be equal to or greater than the size of the first connection electrode 9a, and when the first regular light-emitting element 10a is mounted and connected to the first drive line side uneven portion 9ca, mounting and connection are made easier, improving connectivity. In addition, the size of the second drive line side uneven portion 9cb can be equal to or greater than the size of the second connection electrode 9b, and when the second regular light-emitting element 10b is mounted and connected to the second drive line side uneven portion 9cb, mounting and connection are made easier, improving connectivity. The size of the spare connection electrode 9c may be at least twice but not more than about five times the size of each of the first connection electrode 9a and the second connection electrode 9b, but is not limited to this range.
予備接続電極9cは、図4A,4Bに示すように、第1駆動線8aの側に偏在する第1駆動線側偏在部9ca、及び、第2駆動線8bの側に偏在する第2駆動線側偏在部9cbを有する。第1駆動線側偏在部9caと第2駆動線側偏在部9cbとは、予備接続電極9cにおける第3駆動線8cと重なる非偏在部9ccを介して、互いに接続されている。第1駆動線側偏在部9caと第2駆動線側偏在部9cbと非偏在部9ccは、一体的に形成されていてよい。第1駆動線側偏在部9caは、非偏在部9ccよりも第1駆動線8a側に位置する部位であり、第2駆動線側偏在部9cbは、非偏在部9ccよりも第2駆動線8b側に位置する部位である。 As shown in Figs. 4A and 4B, the spare connection electrode 9c has a first drive line side biased portion 9ca biased toward the first drive line 8a side, and a second drive line side biased portion 9cb biased toward the second drive line 8b side. The first drive line side biased portion 9ca and the second drive line side biased portion 9cb are connected to each other via a non-biased portion 9cc that overlaps with the third drive line 8c in the spare connection electrode 9c. The first drive line side biased portion 9ca, the second drive line side biased portion 9cb, and the non-biased portion 9cc may be integrally formed. The first drive line side biased portion 9ca is a portion located closer to the first drive line 8a side than the non-biased portion 9cc, and the second drive line side biased portion 9cb is a portion located closer to the second drive line 8b side than the non-biased portion 9cc.
第1接続電極9aは、図4A,4Bに示すように、第3駆動線8cの側に偏在する第3駆動線側偏在部9acを有する。第1正規発光素子10aのアノード端子は、第1接続電極9aにおける第3駆動線側偏在部9acに接続されてよい。 As shown in Figures 4A and 4B, the first connection electrode 9a has a third drive line side biased portion 9ac that is biased toward the third drive line 8c side. The anode terminal of the first regular light-emitting element 10a may be connected to the third drive line side biased portion 9ac of the first connection electrode 9a.
第2接続電極9bは、図4A,4Bに示すように、第3駆動線8cの側に偏在する第3駆動線側偏在部9bcを有する。第2正規発光素子10bのアノード端子は、第2接続電極9bにおける第3駆動線側偏在部9bcに接続されてよい。 As shown in Figures 4A and 4B, the second connection electrode 9b has a third drive line side biased portion 9bc that is biased toward the third drive line 8c. The anode terminal of the second regular light-emitting element 10b may be connected to the third drive line side biased portion 9bc of the second connection electrode 9b.
予備発光素子10cは、図4Bに示すように、第1正規発光素子10aが使用不能な場合、第1駆動線側偏在部9caに接続され、第2正規発光素子10bが使用不能な場合、第2駆動線側偏在部9cbに接続される。図4Bは、図4Aの発光装置2において一部の正規発光素子10a,10bが使用不能であり、使用不能な正規発光素子10a、10bの代わりに使用される予備発光素子10cが実装された状態を示している。図4Bでは、使用不能な正規発光素子10a,10bを、ハッチングを付して示している。第1正規発光素子10a及び第2正規発光素子10bの両方が使用不能な場合、発光装置2は、第1駆動線側偏在部9ca及び第2駆動線側偏在部9cbのうちのいずれか一方に接続された予備発光素子10cを含んでよいし、第1駆動線側偏在部9ca及び第2駆動線側偏在部9cbにそれぞれ接続された2つの予備発光素子10cを含んでもよい。2つの予備発光素子10cは、走査信号線7と、第3駆動線8cと、書き込み用の薄膜トランジスタTgと、電流駆動用の薄膜トランジスタTdと、容量素子Cとを含んで構成される1つの画素回路(図5~7参照)を共用してよい。 As shown in FIG. 4B, when the first regular light-emitting element 10a is unusable, the spare light-emitting element 10c is connected to the first driving line side unevenly distributed portion 9ca, and when the second regular light-emitting element 10b is unusable, it is connected to the second driving line side unevenly distributed portion 9cb. FIG. 4B shows a state in which some of the regular light-emitting elements 10a, 10b are unusable in the light-emitting device 2 of FIG. 4A, and a spare light-emitting element 10c is mounted to be used in place of the unusable regular light-emitting elements 10a, 10b. In FIG. 4B, the unusable regular light-emitting elements 10a, 10b are shown hatched. When both the first regular light-emitting element 10a and the second regular light-emitting element 10b are unusable, the light-emitting device 2 may include a spare light-emitting element 10c connected to either one of the first driving line side unevenly distributed portion 9ca and the second driving line side unevenly distributed portion 9cb, or may include two spare light-emitting elements 10c connected to the first driving line side unevenly distributed portion 9ca and the second driving line side unevenly distributed portion 9cb, respectively. The two preliminary light emitting elements 10c may share one pixel circuit (see Figures 5 to 7) that includes a scanning signal line 7, a third driving line 8c, a writing thin film transistor Tg, a current driving thin film transistor Td, and a capacitance element C.
発光装置2は、正規発光素子10aが使用不能な場合に使用される予備発光素子10c、及び、正規発光素子10bが使用不能な場合に使用される予備発光素子10cが、画素回路を共用し、固有の画素回路を有さない構成であってもよい。この場合、各発光素子グループ20gの画素回路の規模を小さくできるため、画素ピッチを狭くすることができ、発光装置を高精細化することができる。 The light emitting device 2 may be configured such that the spare light emitting element 10c, which is used when the regular light emitting element 10a cannot be used, and the spare light emitting element 10c, which is used when the regular light emitting element 10b cannot be used, share a pixel circuit and do not have their own pixel circuit. In this case, the size of the pixel circuit of each light emitting element group 20g can be reduced, so the pixel pitch can be narrowed and the light emitting device can be made high-definition.
発光装置2は、図2に示すように、基板6を含む。基板6は、第1面(表示面ともいう)6a、第1面6aとは反対側の第2面(裏面ともいう)6b、及び、第1面6aと第2面6bとを接続する第3面(側面ともいう)6cを有している。複数の発光素子グループ20gは、基板6の表示面6a上に配列されている。駆動部3及び記憶部4は、基板6の裏面6b上に配置されていてよい。基板6は、例えばガラス材料、樹脂材料、セラミック材料等の絶縁材料で構成されてよい。 The light emitting device 2 includes a substrate 6, as shown in FIG. 2. The substrate 6 has a first surface (also called a display surface) 6a, a second surface (also called a back surface) 6b opposite the first surface 6a, and a third surface (also called a side surface) 6c connecting the first surface 6a and the second surface 6b. A plurality of light emitting element groups 20g are arranged on the display surface 6a of the substrate 6. The drive unit 3 and the memory unit 4 may be disposed on the back surface 6b of the substrate 6. The substrate 6 may be made of an insulating material, such as a glass material, a resin material, or a ceramic material.
発光装置2は、複数の走査信号線7を含む。複数の走査信号線7は、各発光素子グループ20gに第1駆動線8a、第2駆動線8b及び第3駆動線8cを介して駆動信号を書き込むタイミングを制御するための配線である。複数の走査信号線7は、第1方向に延びている。複数の走査信号線7は、画素配列の行毎に1本ずつ設けられている。第1方向に並ぶN個の発光素子グループ20gは、走査信号線7を共用する。 The light emitting device 2 includes a plurality of scanning signal lines 7. The plurality of scanning signal lines 7 are wiring for controlling the timing of writing a drive signal to each light emitting element group 20g via a first drive line 8a, a second drive line 8b, and a third drive line 8c. The plurality of scanning signal lines 7 extend in a first direction. One of the plurality of scanning signal lines 7 is provided for each row of the pixel array. The N light emitting element groups 20g aligned in the first direction share the scanning signal line 7.
第1駆動線8a、第2駆動線8b、第3駆動線8c及び走査信号線7は、基板6の裏面6b上に位置する裏面配線に接続されている。第1駆動線8a、第2駆動線8b、第3駆動線8c及び走査信号線7は、側面6c上に位置する側面配線を介して、裏面配線に接続されていてよいし、基板6を表示面6aから裏面6bにかけて貫通する貫通導体を介して、裏面配線に接続されていてもよい。裏面配線は、裏面6b上に位置する駆動素子に接続されてよい。駆動素子は、駆動部3の一部を構成する。駆動素子は、各発光素子グループ20gの点灯状態、即ち、発光装置2の表示を制御する。駆動素子は、IC、LSI等の制御素子、コンデンサ、抵抗、コイル等の電子素子、及び制御素子と電子素子とを接続する配線導体等を含んでよい。駆動素子は、例えば、裏面6bにCOG(Chip On Glass)方式等の手段によって実装されてよい。駆動素子は、例えばCVD(Chemical Vapor Deposition)法等の薄膜形成法によって裏面6b上に形成された薄膜回路であってもよい。薄膜回路は、低温多結晶シリコン(Low Temperature Poly Silicon:LTPS)から成る半導体層を有する薄膜トランジスタ(Thin Film Transistor:TFT)を含んでよい。駆動素子は、裏面6b上に位置しなくてもよい。駆動素子は、例えばフレキシブル回路基板等の外部回路基板(図示せず)上に位置してよい。この場合、裏面配線は、裏面6b上に位置する接続端子を介して、外部回路基板と接続されていてよい。外部回路基板は、COF(Chip On Film)方式、TAB(Tape Automated Bonding)方式等の手段によって基板6に実装されてよい。 The first driving line 8a, the second driving line 8b, the third driving line 8c, and the scanning signal line 7 are connected to the back wiring located on the back surface 6b of the substrate 6. The first driving line 8a, the second driving line 8b, the third driving line 8c, and the scanning signal line 7 may be connected to the back wiring via the side wiring located on the side surface 6c, or may be connected to the back wiring via a through conductor penetrating the substrate 6 from the display surface 6a to the back surface 6b. The back wiring may be connected to a driving element located on the back surface 6b. The driving element constitutes a part of the driving unit 3. The driving element controls the lighting state of each light emitting element group 20g, i.e., the display of the light emitting device 2. The driving element may include a control element such as an IC or an LSI, an electronic element such as a capacitor, a resistor, or a coil, and a wiring conductor that connects the control element and the electronic element. The driving element may be mounted on the back surface 6b by a means such as a COG (Chip On Glass) method. The driving element may be a thin film circuit formed on the back surface 6b by a thin film formation method such as a CVD (Chemical Vapor Deposition) method. The thin film circuit may include a thin film transistor (TFT) having a semiconductor layer made of low temperature polycrystalline silicon (LTPS). The driving element does not have to be located on the back surface 6b. The driving element may be located on an external circuit board (not shown), such as a flexible circuit board. In this case, the back surface wiring may be connected to the external circuit board via a connection terminal located on the back surface 6b. The external circuit board may be mounted on the substrate 6 by a method such as a COF (Chip On Film) method or a TAB (Tape Automated Bonding) method.
発光装置2は、図4A,4Bに示すように、第3接続電極9cの大きさが、第1接続電極9a及び第2接続電極9bのいずれの大きさよりも大きい構成であってよい。なお、「大きさ」とは、第1方向における長さであってよく、平面視(正面視)における面積であってもよい。第3接続電極9cの大きさが、第1接続電極9a及び第2接続電極9bの大きさよりも大きいことで、第1正規発光素子10aが使用不能な場合には、予備発光素子10cを第1正規発光素子10aに近接させて実装することができ、第2正規発光素子10bが使用不能な場合には、予備発光素子10cを第2正規発光素子10bに近接させて実装することができる。その結果、正規発光素子10a,10bの代わりに予備発光素子10cを点灯させた際の表示品位の低下(例えば輝度むら、色むら等)を低減することができる。また、予備発光素子10cの実装が容易になるため、予備発光素子10cを実装する際に使用可能な正規発光素子10a,10bを破損させる虞を低減することができる。 As shown in Figs. 4A and 4B, the light emitting device 2 may be configured such that the size of the third connection electrode 9c is larger than the size of either the first connection electrode 9a or the second connection electrode 9b. The "size" may refer to the length in the first direction or the area in a plan view (front view). Since the size of the third connection electrode 9c is larger than the size of the first connection electrode 9a and the second connection electrode 9b, when the first regular light emitting element 10a cannot be used, the preliminary light emitting element 10c can be mounted close to the first regular light emitting element 10a, and when the second regular light emitting element 10b cannot be used, the preliminary light emitting element 10c can be mounted close to the second regular light emitting element 10b. As a result, it is possible to reduce the deterioration of the display quality (e.g., uneven brightness, uneven color, etc.) when the preliminary light emitting element 10c is turned on instead of the regular light emitting elements 10a and 10b. In addition, since the preliminary light emitting element 10c is easily mounted, it is possible to reduce the risk of damaging the regular light emitting elements 10a and 10b that can be used when mounting the preliminary light emitting element 10c.
発光装置2は、図4A,4Bに示すように、基板6の表示面6a上に位置する複数のダミー接続電極9dを含む構成であってもよい。複数のダミー接続電極9dはそれぞれ、第1の駆動線グループ8gと、第1方向に隣接する第2の駆動線グループ8gとの間に位置している。換言すると、ダミー接続電極9dは、第1接続電極9aと第2接続電極9bと第3接続電極9cから成る或る接続電極グループと、それに第1方向において隣接する他の接続電極グループと、の間に位置している。発光装置2は、複数のダミー接続電極9dを含むことによって、表示面6a上の略全域に接続電極(即ち、第1接続電極9a、第2接続電極9b、第3接続電極9c及びダミー接続電極9d)が位置することになり、表示面6a上における接続電極の配置の偏りを低減することができる。その結果、接続電極グループ間に暗線が見えること等の表示品質が劣化することを抑えることができる。また、発光装置2の製造工程において、正規発光素子10a,10b及び予備発光素子10cを基板6(の表示面6a)上に実装する際の基板6の撓み(変形)を抑制できるため、正規発光素子10a,10b及び予備発光素子10cを正確且つ強固に実装することが可能となる。また、発光装置2の動作中に、発光素子10から発生する熱を、接続電極を介して、外部に効果的に放熱することができる。 The light-emitting device 2 may include a plurality of dummy connection electrodes 9d located on the display surface 6a of the substrate 6, as shown in Figures 4A and 4B. Each of the plurality of dummy connection electrodes 9d is located between the first drive line group 8g and the second drive line group 8g adjacent thereto in the first direction. In other words, the dummy connection electrode 9d is located between a connection electrode group consisting of the first connection electrode 9a, the second connection electrode 9b, and the third connection electrode 9c, and another connection electrode group adjacent thereto in the first direction. By including a plurality of dummy connection electrodes 9d, the light-emitting device 2 has connection electrodes (i.e., the first connection electrode 9a, the second connection electrode 9b, the third connection electrode 9c, and the dummy connection electrode 9d) located over substantially the entire area of the display surface 6a, thereby reducing the bias in the arrangement of the connection electrodes on the display surface 6a. As a result, it is possible to suppress deterioration of display quality, such as the appearance of dark lines between the connection electrode groups. In addition, in the manufacturing process of the light-emitting device 2, the bending (deformation) of the substrate 6 when mounting the regular light-emitting elements 10a, 10b and the preliminary light-emitting element 10c on the substrate 6 (the display surface 6a) can be suppressed, so that the regular light-emitting elements 10a, 10b and the preliminary light-emitting element 10c can be mounted accurately and firmly. In addition, during the operation of the light-emitting device 2, heat generated from the light-emitting element 10 can be effectively dissipated to the outside via the connection electrodes.
第1の駆動線グループ8g及び第2の駆動線グループ8gが並ぶ方向(第1方向:行方向)において、ダミー接続電極9dの長さが予備接続電極9cの長さと同じであってもよい。この場合、第1方向(行方向)において、予備発光素子10cがない場合、第1正規発光素子10aと第2正規発光素子10bとの間隔を一定に保つことができ、その結果表示にムラがない高い表示品位を維持することができる。さらには、ダミー接続電極9dの大きさが予備接続電極9cの大きさと同じであってもよい。この場合、表示にムラがない高い表示品位を維持することができるとともに、表示面6a上における接続電極間の隙間が小さくなり、接続電極グループ間に暗部が見えること等の表示品質が劣化することを抑えることもできる。 In the direction in which the first drive line group 8g and the second drive line group 8g are arranged (first direction: row direction), the length of the dummy connection electrode 9d may be the same as the length of the spare connection electrode 9c. In this case, if there is no spare light emitting element 10c in the first direction (row direction), the distance between the first regular light emitting element 10a and the second regular light emitting element 10b can be kept constant, and as a result, high display quality without unevenness can be maintained. Furthermore, the size of the dummy connection electrode 9d may be the same as the size of the spare connection electrode 9c. In this case, high display quality without unevenness can be maintained, and the gap between the connection electrodes on the display surface 6a can be reduced, preventing deterioration of display quality such as dark areas being visible between the connection electrode groups.
ダミー接続電極9dは、それに隣接する第1接続電極9a及び第2接続電極9bの少なくとも一方に、接続線等によって電気的に接続されている構成であってもよい。この場合、第1接続電極9aに搭載及び接続された第1正規発光素子10aに接続不良が発生した場合、ダミー接続電極9dに第1正規発光素子10aに代わる予備発光素子10cを搭載し接続してもよい。すなわち、ダミー接続電極9dを、他の予備接続電極として機能させることができる。この場合、ダミー接続電極9dは、それに隣接する第1接続電極9aにのみ接続されるようにする。例えば、ダミー接続電極9dは、それに隣接する第1接続電極9a及び第2接続電極9bの両方に接続線によって接続されており、ダミー接続電極9dに第1正規発光素子10aに代わる予備発光素子10cを搭載し接続する場合、ダミー接続電極9dと第2接続電極9bを接続する接続線をレーザ光等によって切断してもよい。また、第2接続電極9bに搭載及び接続された第2正規発光素子10bに接続不良が発生した場合、ダミー接続電極9dに第2正規発光素子10bに代わる予備発光素子10cを搭載し接続してもよい。この場合、ダミー接続電極9dと第1接続電極9aを接続する接続線をレーザ光等によって切断してもよい。 The dummy connection electrode 9d may be electrically connected to at least one of the adjacent first connection electrode 9a and second connection electrode 9b by a connection line or the like. In this case, if a connection failure occurs in the first regular light-emitting element 10a mounted and connected to the first connection electrode 9a, a spare light-emitting element 10c may be mounted and connected to the dummy connection electrode 9d in place of the first regular light-emitting element 10a. In other words, the dummy connection electrode 9d can function as another spare connection electrode. In this case, the dummy connection electrode 9d is connected only to the first connection electrode 9a adjacent to it. For example, the dummy connection electrode 9d is connected to both the adjacent first connection electrode 9a and second connection electrode 9b by a connection line, and when a spare light-emitting element 10c in place of the first regular light-emitting element 10a is mounted and connected to the dummy connection electrode 9d, the connection line connecting the dummy connection electrode 9d and the second connection electrode 9b may be cut by laser light or the like. In addition, if a connection failure occurs in the second regular light-emitting element 10b mounted and connected to the second connection electrode 9b, a spare light-emitting element 10c may be mounted and connected to the dummy connection electrode 9d in place of the second regular light-emitting element 10b. In this case, the connection line connecting the dummy connection electrode 9d and the first connection electrode 9a may be cut by laser light or the like.
第1接続電極9a、第2接続電極9b、第3接続電極9c及びカソード電極11はそれぞれ、スルーホール等のコンタクト12(図4A,4B参照)を介して、基板6の表面又は内部に位置する配線導体に電気的に接続されている。 The first connection electrode 9a, the second connection electrode 9b, the third connection electrode 9c, and the cathode electrode 11 are each electrically connected to a wiring conductor located on the surface or inside of the substrate 6 via a contact 12 such as a through hole (see Figures 4A and 4B).
第1接続電極9aは、図4A,4Bに示すように、第1駆動線8aに対して、第3駆動線側偏在部9acとは反対側に延在する延在部9abを有している。これにより、第1接続電極9aと第1駆動線8aとを良好に接続することができ、発光装置2の動作信頼性を向上させることができる。 As shown in Figures 4A and 4B, the first connection electrode 9a has an extension portion 9ab that extends to the opposite side of the third drive line side uneven portion 9ac with respect to the first drive line 8a. This allows for a good connection between the first connection electrode 9a and the first drive line 8a, improving the operational reliability of the light emitting device 2.
第2接続電極9bは、図4A,4Bに示すように、第2駆動線8bに対して、第3駆動線側偏在部9bcとは反対側に延在する延在部9baを有している。これにより、第2接続電極9bと第2駆動線8bとを良好に接続することができ、発光装置2の動作信頼性を向上させることができる。 As shown in Figures 4A and 4B, the second connection electrode 9b has an extension portion 9ba that extends to the opposite side of the third drive line side uneven portion 9bc with respect to the second drive line 8b. This allows the second connection electrode 9b and the second drive line 8b to be well connected, improving the operational reliability of the light emitting device 2.
第1正規発光素子10aが使用不能であり、予備発光素子10cが第1駆動線側偏在部9caに接続されている場合、第1正規発光素子10aに本来入力されるべき駆動信号が予備発光素子10cに入力されてよい。この場合、第1正規発光素子10aが本来発光すべき輝度で予備発光素子10cを発光させることができ、発光装置2の表示品位の低下を抑制できる。 When the first regular light-emitting element 10a is disabled and the preliminary light-emitting element 10c is connected to the first drive line side unevenly distributed portion 9ca, the drive signal that should be input to the first regular light-emitting element 10a may be input to the preliminary light-emitting element 10c. In this case, the preliminary light-emitting element 10c can be made to emit light with the luminance that the first regular light-emitting element 10a should emit, and a decrease in the display quality of the light-emitting device 2 can be suppressed.
予備発光素子10cは、第1正規発光素子10aよりも第2正規発光素子10bの側にずれて実装されるため、第1正規発光素子10aが本来発光すべき輝度で発光させた場合、発光装置2の表示画像に輝度むら、色むら等が生じることがある。従って、予備発光素子10cに入力する駆動信号の信号強度(電位)を、第1正規発光素子10aに本来入力されるべき駆動信号の信号強度(電位)以下または未満としてもよい。この場合、第1正規発光素子10aが搭載される位置と異なる位置に搭載される予備発光素子10cを発光させることによる表示品位の低下を抑制できる。予備発光素子10cに入力する駆動信号の信号強度は、第1正規発光素子10aに本来入力されるべき駆動信号の信号強度の50%~100%であってよいが、この範囲に限らない。なお、「~」は「乃至」を意味し、以下同様とする。 The preliminary light-emitting element 10c is mounted shifted toward the second regular light-emitting element 10b from the first regular light-emitting element 10a, so if the first regular light-emitting element 10a is caused to emit light at the luminance that it should emit, the display image of the light-emitting device 2 may have luminance unevenness, color unevenness, etc. Therefore, the signal strength (electric potential) of the drive signal input to the preliminary light-emitting element 10c may be equal to or less than the signal strength (electric potential) of the drive signal that should be input to the first regular light-emitting element 10a. In this case, it is possible to suppress a decrease in display quality caused by emitting light from the preliminary light-emitting element 10c mounted at a position different from the position where the first regular light-emitting element 10a is mounted. The signal strength of the drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the signal strength of the drive signal that should be input to the first regular light-emitting element 10a, but is not limited to this range. Note that "to" means "up to", and the same applies below.
第2正規発光素子10bが使用不能であり、予備発光素子10cが第2駆動線側偏在部9cbに接続されている場合、第2正規発光素子10bに本来入力されるべき駆動信号が予備発光素子10cに入力されてよい。この場合、第2正規発光素子10bが本来発光すべき輝度で予備発光素子10cを発光させることができ、発光装置2の表示品位の低下を抑制できる。 When the second regular light-emitting element 10b is unavailable and the preliminary light-emitting element 10c is connected to the second drive line side unevenly distributed portion 9cb, the drive signal that should be input to the second regular light-emitting element 10b may be input to the preliminary light-emitting element 10c. In this case, the preliminary light-emitting element 10c can be made to emit light with the luminance that the second regular light-emitting element 10b should emit, and a decrease in the display quality of the light-emitting device 2 can be suppressed.
予備発光素子10cは、第2正規発光素子10bよりも第1正規発光素子10aの側にずれて実装されるため、第2正規発光素子10bが本来発光すべき輝度で発光させた場合、発光装置2の表示画像に輝度むら、色むら等が生じることがある。従って、予備発光素子10cに入力する駆動信号の信号強度(電位)を、第2正規発光素子10bに本来入力されるべき駆動信号の信号強度(電位)以下または未満としてもよい。この場合、第2正規発光素子10bが搭載される位置と異なる位置に搭載される予備発光素子10cを発光させることによる表示品位の低下を抑制できる。予備発光素子10cに入力する駆動信号の信号強度は、第2正規発光素子10bに本来入力されるべき駆動信号の信号強度の50%~100%であってよいが、この範囲に限らない。 The preliminary light-emitting element 10c is mounted shifted toward the first regular light-emitting element 10a from the second regular light-emitting element 10b, so if the second regular light-emitting element 10b is caused to emit light at the brightness that it should originally emit, uneven brightness, color, etc. may occur in the display image of the light-emitting device 2. Therefore, the signal strength (electric potential) of the drive signal input to the preliminary light-emitting element 10c may be equal to or less than the signal strength (electric potential) of the drive signal that should originally be input to the second regular light-emitting element 10b. In this case, it is possible to suppress a decrease in display quality caused by emitting light from the preliminary light-emitting element 10c mounted at a position different from the position where the second regular light-emitting element 10b is mounted. The signal strength of the drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the signal strength of the drive signal that should originally be input to the second regular light-emitting element 10b, but is not limited to this range.
予備発光素子10cに入力される第1駆動信号の入力期間の長さが、第1正規発光素子10aに入力されるべき第1駆動信号の入力期間の長さ以下であってもよい。この場合、第1正規発光素子10aが搭載される位置と異なる位置に搭載される予備発光素子10cを発光させることによる表示品位の低下を抑制できる。予備発光素子10cに入力される第1駆動信号の入力期間の長さは、第1正規発光素子10aに本来入力されるべき第1駆動信号の入力期間の長さの50%~100%であってよいが、この範囲に限らない。 The length of the input period of the first drive signal input to the preliminary light-emitting element 10c may be equal to or shorter than the length of the input period of the first drive signal that should be input to the first regular light-emitting element 10a. In this case, it is possible to suppress a decrease in display quality caused by emitting light from the preliminary light-emitting element 10c mounted at a position different from the position at which the first regular light-emitting element 10a is mounted. The length of the input period of the first drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the length of the input period of the first drive signal that should originally be input to the first regular light-emitting element 10a, but is not limited to this range.
予備発光素子10cに入力される第2駆動信号の入力期間の長さが、第2正規発光素子10bに入力されるべき第2駆動信号の入力期間の長さ以下であってもよい。この場合、第2正規発光素子10bが搭載される位置と異なる位置に搭載される予備発光素子10cを発光させることによる表示品位の低下を抑制できる。予備発光素子10cに入力される第2駆動信号の入力期間の長さは、第2正規発光素子10bに本来入力されるべき第2駆動信号の入力期間の長さの50%~100%であってよいが、この範囲に限らない。 The length of the input period of the second drive signal input to the preliminary light-emitting element 10c may be equal to or shorter than the length of the input period of the second drive signal that should be input to the second regular light-emitting element 10b. In this case, it is possible to suppress a decrease in display quality caused by emitting light from the preliminary light-emitting element 10c mounted at a position different from the position at which the second regular light-emitting element 10b is mounted. The length of the input period of the second drive signal input to the preliminary light-emitting element 10c may be 50% to 100% of the length of the input period of the second drive signal that should originally be input to the second regular light-emitting element 10b, but is not limited to this range.
次に、発光素子グループ20gの画素回路の回路構成について説明する。発光素子グループ20gは、第1画素20a、第2画素20b及び第3画素20cを含む。第1画素20a、第2画素20b及び第3画素20cは、実質的に同じ回路構成であるため、以下では、1つの画素20の画素回路の回路構成について説明する。 Next, the circuit configuration of the pixel circuit of the light-emitting element group 20g will be described. The light-emitting element group 20g includes a first pixel 20a, a second pixel 20b, and a third pixel 20c. The first pixel 20a, the second pixel 20b, and the third pixel 20c have substantially the same circuit configuration, so below, the circuit configuration of the pixel circuit of one pixel 20 will be described.
画素20は、図5に示すように、駆動線8、走査信号線7、発光素子10、薄膜トランジスタ(Thin Film Transistor:TFT)Tg(以下、「TFT(Tg)」と記載する)、薄膜トランジスタTd(以下、「TFT(Td)」と記載する)、及び容量素子Cを含む。 As shown in FIG. 5, the pixel 20 includes a drive line 8, a scanning signal line 7, a light-emitting element 10, a thin film transistor (TFT) Tg (hereinafter referred to as "TFT(Tg)"), a thin film transistor Td (hereinafter referred to as "TFT(Td)"), and a capacitance element C.
TFT(Tg)は、TFT(Tg)のドレイン電極とTFT(Td)のゲート電極とを接続する接続線上に位置する画素ノードVgに駆動信号SIGを書き込むためのTFTである。TFT(Tg)のソース電極は、駆動線8に接続され、TFT(Tg)のゲート電極は、走査信号線7に接続され、TFT(Tg)のドレイン電極は、TFT(Td)のゲート電極に接続されている。走査信号線7は、駆動部3に接続されており、走査信号線7には、TFT(Tg)を導通状態又は非導通状態に切り替えるための走査信号線制御信号GATEが入力される。TFT(Td)は、駆動信号SIGのレベル(電圧)に応じて、第1電源電圧VDDと第2電源電圧VSSとの電位差から発光素子10を電流駆動するためのTFTである。TFT(Td)のソース電極には、第1電源電圧VDDが印加されている。TFT(Td)のドレイン電極は、発光素子10のアノード端子に接続されている。発光素子10のカソード端子には、第2電源電圧VSSが印加されている。容量素子Cは、TFT(Td)のゲート電極とTFT(Td)のソース電極とを接続する接続線上に位置し、画素ノードVgに書き込まれた駆動信号SIGの電圧を次の書き換えまでの期間(1フレームの期間)保持する。 The TFT (Tg) is a TFT for writing a drive signal SIG to a pixel node Vg located on a connection line connecting the drain electrode of the TFT (Tg) and the gate electrode of the TFT (Td). The source electrode of the TFT (Tg) is connected to the drive line 8, the gate electrode of the TFT (Tg) is connected to the scanning signal line 7, and the drain electrode of the TFT (Tg) is connected to the gate electrode of the TFT (Td). The scanning signal line 7 is connected to the drive unit 3, and a scanning signal line control signal GATE for switching the TFT (Tg) to a conductive state or a non-conductive state is input to the scanning signal line 7. The TFT (Td) is a TFT for current driving the light emitting element 10 from the potential difference between the first power supply voltage VDD and the second power supply voltage VSS according to the level (voltage) of the drive signal SIG. The first power supply voltage VDD is applied to the source electrode of the TFT (Td). The drain electrode of the TFT (Td) is connected to the anode terminal of the light-emitting element 10. The second power supply voltage VSS is applied to the cathode terminal of the light-emitting element 10. The capacitive element C is located on the connection line connecting the gate electrode of the TFT (Td) and the source electrode of the TFT (Td), and holds the voltage of the drive signal SIG written to the pixel node Vg for the period until the next rewrite (the period of one frame).
図5は、TFT(Tg)及びTFT(Td)がpチャネル型TFTで構成される場合を示しているが、これに限られない。TFT(Tg)及びTFT(Td)は、図6に示すように、nチャネル型TFTで構成されてもよい。TFT(Tg)及びTFT(Td)は、一方がnチャネル型TFTであり、他方がpチャネル型TFTであってもよい。 FIG. 5 shows a case where the TFT (Tg) and the TFT (Td) are configured as p-channel TFTs, but this is not limited thereto. The TFT (Tg) and the TFT (Td) may be configured as n-channel TFTs as shown in FIG. 6. One of the TFT (Tg) and the TFT (Td) may be an n-channel TFT and the other a p-channel TFT.
画素20は、図7に示すように、薄膜トランジスタTs(以下、「TFT(Ts)」と記載する)を含んでよい。TFT(Ts)のソース電極は、TFT(Td)のドレイン電極に接続され、TFT(Ts)のドレイン電極は、発光素子10のアノード端子に接続され、TFT(Ts)のゲート電極は、発光制御信号線13に接続される。発光制御信号線13は、駆動部3に接続されている。駆動部3は、発光制御信号線13を介して、発光制御信号EMIをTFT(Ts)のゲート電極に入力することにより、発光素子10をパルス幅変調(Pulse Width Modulation:PWM)制御することができる。これにより、発光素子10の階調制御が可能となる。 As shown in FIG. 7, the pixel 20 may include a thin film transistor Ts (hereinafter referred to as "TFT(Ts)"). The source electrode of the TFT(Ts) is connected to the drain electrode of the TFT(Td), the drain electrode of the TFT(Ts) is connected to the anode terminal of the light-emitting element 10, and the gate electrode of the TFT(Ts) is connected to a light-emitting control signal line 13. The light-emitting control signal line 13 is connected to the driving unit 3. The driving unit 3 can control the light-emitting element 10 by pulse width modulation (PWM) by inputting a light-emitting control signal EMI to the gate electrode of the TFT(Ts) via the light-emitting control signal line 13. This enables gradation control of the light-emitting element 10.
次に、駆動信号SIGの発光素子グループ20gへの入力について説明する。駆動信号SIGは、画像データ信号源5から供給される画像データ信号に基づいて、駆動部3によって生成される信号であり、駆動線8を介して、発光素子グループ20gに入力される。以下、図8に示すように、第1駆動線8aに入力される駆動信号をSIG_P(n-1)と記載し、第2駆動線8bに入力される駆動信号を「SIG_P(n)」と記載し、第3駆動線8cに入力される駆動信号を「SIG_S(n-1)」と記載する。また、駆動信号SIG_P(n-1)と、駆動信号をSIG_P(n)と、駆動信号をSIG_S(n-1)とを区別しない場合、単に、「駆動信号SIG」と記載する。 Next, the input of the drive signal SIG to the light emitting element group 20g will be described. The drive signal SIG is a signal generated by the drive unit 3 based on the image data signal supplied from the image data signal source 5, and is input to the light emitting element group 20g via the drive line 8. Hereinafter, as shown in FIG. 8, the drive signal input to the first drive line 8a will be described as SIG_P(n-1), the drive signal input to the second drive line 8b will be described as "SIG_P(n)," and the drive signal input to the third drive line 8c will be described as "SIG_S(n-1)." Furthermore, when there is no need to distinguish between the drive signal SIG_P(n-1), the drive signal SIG_P(n), and the drive signal SIG_S(n-1), they will simply be described as "drive signal SIG."
図8は、図2のVIII部の部分拡大正面図である。発光装置2は、図8に示すように、データ線駆動回路120と、駆動制御部17とを含む。データ線駆動回路120及び駆動制御部17は、駆動部3の一部であってよい。データ線駆動回路120は、発光素子10の使用可否情報と、画像データ信号源5から供給される画像データ信号とに基づいて、駆動信号SIG_P(n-1)、駆動信号SIG_P(n)及び駆動信号SIG_S(n-1)を出力する。発光素子10の使用可否情報は、正規発光素子10a,10bが使用可能であるか否か、及び、予備発光素子10cが使用可能であるか否か(予備発光素子10cが実装されているか否か)に関する情報である。発光素子10の使用可否情報は、正規発光素子10a,10b及び予備発光素子10cのアドレス(位置情報)を含む。発光素子10の使用可否情報は、記憶部4に記憶されていてよい。駆動制御部17は、発光素子10の使用可否情報に基づいて、駆動信号SIGの駆動線8への入力を制御する。図8は、セレクタ方式(時分割方式ともいう)により1フレーム(1水平走査期間ともいう)を時系列で2分割駆動する駆動制御部17の構成を示しているが、駆動制御部17の駆動方式は、セレクタ方式に限られない。 8 is a partially enlarged front view of part VIII in FIG. 2. As shown in FIG. 8, the light emitting device 2 includes a data line driving circuit 120 and a driving control unit 17. The data line driving circuit 120 and the driving control unit 17 may be part of the driving unit 3. The data line driving circuit 120 outputs driving signals SIG_P(n-1), SIG_P(n) and SIG_S(n-1) based on the usability information of the light emitting element 10 and the image data signal supplied from the image data signal source 5. The usability information of the light emitting element 10 is information on whether the regular light emitting elements 10a and 10b are usable or not, and whether the spare light emitting element 10c is usable or not (whether the spare light emitting element 10c is implemented or not). The usability information of the light emitting element 10 includes the addresses (position information) of the regular light emitting elements 10a and 10b and the spare light emitting element 10c. The usability information of the light emitting element 10 may be stored in the memory unit 4. The drive control unit 17 controls the input of the drive signal SIG to the drive line 8 based on the availability information of the light emitting element 10. FIG. 8 shows the configuration of the drive control unit 17 that drives one frame (also called one horizontal scanning period) in two time series using a selector method (also called a time division method), but the drive method of the drive control unit 17 is not limited to the selector method.
駆動制御部17は、第1正規発光素子10a及び第2正規発光素子10bの両方が使用可能な発光素子グループ20gに対しては、第1駆動線8a及び第2駆動線8bに点灯信号である駆動信号SIG_P(n-1)及び駆動信号SIG_P(n)をそれぞれ入力し、第3駆動線8cに非点灯信号(黒表示信号)である駆動信号SIG_S(n-1)を入力する。 For the light emitting element group 20g in which both the first regular light emitting element 10a and the second regular light emitting element 10b are available, the drive control unit 17 inputs the drive signals SIG_P(n-1) and SIG_P(n), which are lighting signals, to the first drive line 8a and the second drive line 8b, respectively, and inputs the drive signal SIG_S(n-1), which is a non-lighting signal (black display signal), to the third drive line 8c.
駆動制御部17は、第1正規発光素子10aが使用可能であり、第2正規発光素子10bが使用不能である発光素子グループ20gに対しては、第1駆動線8a及び第3駆動線8cに点灯信号である駆動信号SIG_P(n-1)及びSIG_S(n-1)をそれぞれ入力し、第2駆動線8bに非点灯信号であるSIG_P(n)を入力する。 For the light emitting element group 20g in which the first regular light emitting element 10a is available and the second regular light emitting element 10b is unavailable, the drive control unit 17 inputs the drive signals SIG_P(n-1) and SIG_S(n-1), which are turn-on signals, to the first drive line 8a and the third drive line 8c, respectively, and inputs the non-lighting signal SIG_P(n) to the second drive line 8b.
駆動制御部17は、第1正規発光素子10aが使用不能であり、第2正規発光素子10bが使用可能である発光素子グループに対しては、第2駆動線8b及び第3駆動線8cに点灯信号である駆動信号SIG_P(n)及び駆動信号SIG_S(n-1)をそれぞれ入力し、第1駆動線8aに非点灯信号である駆動信号SIG_P(n-1)を入力する。 For a light-emitting element group in which the first regular light-emitting element 10a is unavailable and the second regular light-emitting element 10b is available, the drive control unit 17 inputs the drive signals SIG_P(n) and SIG_S(n-1), which are turn-on signals, to the second drive line 8b and the third drive line 8c, respectively, and inputs the drive signal SIG_P(n-1), which is a non-light-on signal, to the first drive line 8a.
駆動制御部17は、図8に示すように、セレクタ回路22と、第1スイッチTFT(Tsa)と、第2スイッチTFT(Tsb)と、第3スイッチTFT(Tsc)と、第4スイッチTFT(Tsd)と、接続線22a~22h,18a~18h,120a,120bとを含む。 As shown in FIG. 8, the drive control unit 17 includes a selector circuit 22, a first switch TFT (Tsa), a second switch TFT (Tsb), a third switch TFT (Tsc), a fourth switch TFT (Tsd), and connection lines 22a to 22h, 18a to 18h, 120a, and 120b.
セレクタ回路22は、第1選択信号(SEL1)出力部、反転第1選択信号(XSEL1)出力部、第2選択信号(SEL2)出力部、反転第2選択信号(XSEL2)出力部、第3選択信号(SEL3)出力部、反転第3選択信号(XSEL3)出力部、第4選択信号(SEL4)出力部、及び反転第4選択信号(XSEL4)出力部を有する。 The selector circuit 22 has a first selection signal (SEL1) output section, an inverted first selection signal (XSEL1) output section, a second selection signal (SEL2) output section, an inverted second selection signal (XSEL2) output section, a third selection signal (SEL3) output section, an inverted third selection signal (XSEL3) output section, a fourth selection signal (SEL4) output section, and an inverted fourth selection signal (XSEL4) output section.
第1スイッチTFT(Tsa)は、nチャネル型TFT(Ts1)とpチャネル型TFT(Ts2)とで構成されたトランスファー・ゲート回路である。TFT(Ts1)及びTFT(Ts2)は、ソース電極同士が共通接続され、ドレイン電極同士が共通接続されている。TFT(Ts1)のゲート電極は、接続線22a,17aを介して、第1選択信号(SEL1)出力部に接続され、TFT(Ts2)のゲート電極は、接続線22b,17bを介して、反転第1選択信号(XSEL1)出力部に接続されている。 The first switch TFT (Tsa) is a transfer gate circuit composed of an n-channel TFT (Ts1) and a p-channel TFT (Ts2). The source electrodes of the TFTs (Ts1) and (Ts2) are commonly connected, and the drain electrodes of the TFTs (Ts1) and (Ts2) are commonly connected. The gate electrode of the TFT (Ts1) is connected to the first selection signal (SEL1) output section via connection lines 22a and 17a, and the gate electrode of the TFT (Ts2) is connected to the inverted first selection signal (XSEL1) output section via connection lines 22b and 17b.
第2スイッチTFT(Tsb)は、nチャネル型TFT(Ts3)とpチャネル型TFT(Ts4)とで構成されたトランスファー・ゲート回路である。TFT(Ts3)及びTFT(Ts4)は、ソース電極同士が共通接続され、ドレイン電極同士が共通接続されている。TFT(Ts3)のゲート電極は、接続線22c,17cを介して、第2選択信号(SEL3)出力部に接続され、TFT(Ts4)のゲート電極は、接続線22d,17dを介して、反転第2選択信号(XSEL2)出力部に接続されている。 The second switch TFT (Tsb) is a transfer gate circuit composed of an n-channel TFT (Ts3) and a p-channel TFT (Ts4). The source electrodes of the TFTs (Ts3) and (Ts4) are commonly connected, and the drain electrodes of the TFTs (Ts3) and (Ts4) are commonly connected. The gate electrode of the TFT (Ts3) is connected to the second selection signal (SEL3) output section via connection lines 22c and 17c, and the gate electrode of the TFT (Ts4) is connected to the inverted second selection signal (XSEL2) output section via connection lines 22d and 17d.
第3スイッチTFT(Tsc)は、nチャネル型TFT(Ts5)及びpチャネル型TFT(Ts6)で構成されたトランスファー・ゲート回路である。TFT(Ts5)及びTFT(Ts6)は、ソース電極同士が共通接続され、ドレイン電極同士が共通接続されている。TFT(Ts5)のゲート電極は、接続線22e,17eを介して、第3選択信号(SEL3)出力部に接続され、TFT(Ts6)のゲート電極は、接続線22f,17fを介して、反転第3選択信号(XSEL3)出力部に接続されている。 The third switch TFT (Tsc) is a transfer gate circuit composed of an n-channel TFT (Ts5) and a p-channel TFT (Ts6). The source electrodes of the TFTs (Ts5) and (Ts6) are commonly connected, and the drain electrodes of the TFTs (Ts5) and (Ts6) are commonly connected. The gate electrode of the TFT (Ts5) is connected to the third selection signal (SEL3) output section via connection lines 22e and 17e, and the gate electrode of the TFT (Ts6) is connected to the inverted third selection signal (XSEL3) output section via connection lines 22f and 17f.
第4スイッチTFT(Tsd)は、nチャネル型TFT(Ts7)及びpチャネル型TFT(Ts8)で構成されたトランスファー・ゲート回路である。TFT(Ts7)及びTFT(Ts8)は、ソース電極同士が共通接続され、ドレイン電極同士が共通接続されている。TFT(Ts7)のゲート電極は、接続線22g,17gを介して、第4選択信号(SEL4)出力部に接続され、TFT(Ts8)のゲート電極は、接続線22h,17hを介して、反転第4選択信号(XSEL4)出力部に接続されている。 The fourth switch TFT (Tsd) is a transfer gate circuit composed of an n-channel TFT (Ts7) and a p-channel TFT (Ts8). The source electrodes of the TFTs (Ts7) and (Ts8) are commonly connected, and the drain electrodes of the TFTs (Ts7) and (Ts8) are commonly connected. The gate electrode of the TFT (Ts7) is connected to the fourth selection signal (SEL4) output section via connection lines 22g and 17g, and the gate electrode of the TFT (Ts8) is connected to the inverted fourth selection signal (XSEL4) output section via connection lines 22h and 17h.
セレクタ回路22が、第1選択信号(SEL1)出力部からH信号(ハイ信号)を出力し、反転第1選択信号(XSEL1)出力部からL信号(ロー信号)を出力すると、第1選択信号(SEL1)出力部から出力されたH信号は、接続線22a,17aを介して、TFT(Ts1)のゲート電極に入力され、反転第1選択信号(XSEL1)出力部から出力されたL信号は、接続線22b,17bを介して、TFT(Ts2)のゲート電極に入力される。これにより、第1スイッチTFT(Tsa)は、導通状態(ON状態)となる。セレクタ回路22が、第1選択信号(SEL1)出力部からL信号を出力し、反転第1選択信号(XSEL1)出力部からH信号を出力すると、第1スイッチTFT(Tsa)は、非導通状態(OFF状態)となる。 When the selector circuit 22 outputs an H signal (high signal) from the first selection signal (SEL1) output section and an L signal (low signal) from the inverted first selection signal (XSEL1) output section, the H signal output from the first selection signal (SEL1) output section is input to the gate electrode of the TFT (Ts1) via the connection lines 22a and 17a, and the L signal output from the inverted first selection signal (XSEL1) output section is input to the gate electrode of the TFT (Ts2) via the connection lines 22b and 17b. As a result, the first switch TFT (Tsa) is in a conductive state (ON state). When the selector circuit 22 outputs an L signal from the first selection signal (SEL1) output section and an H signal from the inverted first selection signal (XSEL1) output section, the first switch TFT (Tsa) is in a non-conductive state (OFF state).
同様にして、セレクタ回路22は、第2スイッチTFT(Tsb)、第3スイッチTFT(Tsc)及び第4スイッチTFT(Tsd)のそれぞれをON状態又はOFF状態に切り替えることができる。セレクタ回路22が、第2選択信号(SEL2)出力部からH信号を出力し、反転第2選択信号(XSEL2)出力部からL信号を出力すると、第2スイッチTFT(Tsb)は、ON状態となる。セレクタ回路22が、第2選択信号(SEL2)出力部からL信号を出力し、反転第2選択信号(XSEL2)出力部からH信号を出力すると、第2スイッチTFT(Tsb)は、OFF状態となる。セレクタ回路22が、第3選択信号(SEL3)出力部からH信号を出力し、反転第3選択信号(XSEL3)出力部からL信号を出力すると、第3スイッチTFT(Tsc)は、ON状態となる。セレクタ回路22が、第3選択信号(SEL3)出力部からL信号を出力し、反転第3選択信号(XSEL3)出力部からH信号を出力すると、第3スイッチTFT(Tsc)は、OFF状態となる。セレクタ回路22が、第4選択信号(SEL4)出力部からH信号を出力し、反転第4選択信号(XSEL4)出力部からL信号を出力すると、第4スイッチTFT(Tsd)は、ON状態となる。セレクタ回路22が、第4選択信号(SEL4)出力部からL信号を出力し、反転第4選択信号(XSEL4)出力部からH信号を出力すると、第4スイッチTFT(Tsd)は、OFF状態となる。 In the same manner, the selector circuit 22 can switch each of the second switch TFT (Tsb), the third switch TFT (Tsc), and the fourth switch TFT (Tsd) to the ON state or the OFF state. When the selector circuit 22 outputs an H signal from the second selection signal (SEL2) output section and an L signal from the inverted second selection signal (XSEL2) output section, the second switch TFT (Tsb) is in the ON state. When the selector circuit 22 outputs an L signal from the second selection signal (SEL2) output section and an H signal from the inverted second selection signal (XSEL2) output section, the second switch TFT (Tsb) is in the OFF state. When the selector circuit 22 outputs an H signal from the third selection signal (SEL3) output section and an L signal from the inverted third selection signal (XSEL3) output section, the third switch TFT (Tsc) is in the ON state. When the selector circuit 22 outputs an L signal from the third selection signal (SEL3) output section and an H signal from the inverted third selection signal (XSEL3) output section, the third switch TFT (Tsc) is in the OFF state. When the selector circuit 22 outputs an H signal from the fourth selection signal (SEL4) output section and an L signal from the inverted fourth selection signal (XSEL4) output section, the fourth switch TFT (Tsd) is in the ON state. When the selector circuit 22 outputs an L signal from the fourth selection signal (SEL4) output section and an H signal from the inverted fourth selection signal (XSEL4) output section, the fourth switch TFT (Tsd) is in the OFF state.
第1スイッチTFT(Tsa)がON状態であり、第3スイッチTFT(Tsc)がOFF状態であるときに、駆動信号SIG_P(n-1)が接続線120aを介して第1スイッチTFT(Tsa)に入力されると、第1駆動線8aに駆動信号SIG_P(n-1)が伝達される。第1スイッチTFT(Tsa)がOFF状態であり、第3スイッチTFT(Tsc)がON状態であるときに、駆動信号SIG_S(n-1)が接続線120aを介して第3スイッチTFT(Tsc)に入力されると、第3駆動線8cに駆動信号SIG_S(n-1)が伝達される。 When the first switch TFT (Tsa) is ON and the third switch TFT (Tsc) is OFF, the drive signal SIG_P (n-1) is input to the first switch TFT (Tsa) via the connection line 120a, and the drive signal SIG_P (n-1) is transmitted to the first drive line 8a. When the first switch TFT (Tsa) is OFF and the third switch TFT (Tsc) is ON, the drive signal SIG_S (n-1) is input to the third switch TFT (Tsc) via the connection line 120a, and the drive signal SIG_S (n-1) is transmitted to the third drive line 8c.
第2スイッチTFT(Tsb)がON状態であり、第4スイッチTFT(Tsd)がOFF状態であるときに、駆動信号SIG_P(n)が接続線120bを介して第2スイッチTFT(Tsb)に入力されると、第2駆動線8bに第2駆動信号SIG_P(n)が伝達される。第2スイッチTFT(Tsb)がOFF状態であり、第4スイッチTFT(Tsc)がON状態であるときに、駆動信号SIG_S(n-1)が接続線120bを介して第3スイッチTFT(Tsd)に入力されると、第3駆動線8cに駆動信号SIG_S(n-1)が伝達される。 When the second switch TFT (Tsb) is in the ON state and the fourth switch TFT (Tsd) is in the OFF state, if the drive signal SIG_P (n) is input to the second switch TFT (Tsb) via the connection line 120b, the second drive signal SIG_P (n) is transmitted to the second drive line 8b. When the second switch TFT (Tsb) is in the OFF state and the fourth switch TFT (Tsc) is in the ON state, if the drive signal SIG_S (n-1) is input to the third switch TFT (Tsd) via the connection line 120b, the drive signal SIG_S (n-1) is transmitted to the third drive line 8c.
発光装置2は、駆動制御部17を含まなくてよい。発光装置2は、図9に示すように、データ線駆動回路120が、駆動信号SIG_P(n-1)、駆動信号SIG_P(n)及び駆動信号SIG_S(n-1)のそれぞれを、第1駆動線8a、第2駆動線8b及び第3駆動線8cに直接に出力するように構成されてもよい。 The light emitting device 2 does not need to include a drive control unit 17. As shown in FIG. 9, the light emitting device 2 may be configured such that the data line drive circuit 120 directly outputs the drive signal SIG_P(n-1), the drive signal SIG_P(n), and the drive signal SIG_S(n-1) to the first drive line 8a, the second drive line 8b, and the third drive line 8c, respectively.
発光装置2は、ゲートドライバ及びソースドライバを含む。ゲートドライバ及びソースドライバは、基板6の表示面6aの周縁部上に位置してよいし、基板6の裏面6b上に位置してもよい。ゲートドライバ及びソースドライバは、外部回路基板上に位置してもよい。ゲートドライバ及びソースドライバは、駆動部3の一部であってよい。 The light-emitting device 2 includes a gate driver and a source driver. The gate driver and the source driver may be located on the periphery of the display surface 6a of the substrate 6, or on the rear surface 6b of the substrate 6. The gate driver and the source driver may be located on an external circuit board. The gate driver and the source driver may be part of the drive unit 3.
ゲートドライバは、複数(例えば数十本~数千本程度)の走査信号線7から線順次に1本又は複数本ずつ選択し、選択した走査信号線7を選択時電位VGH(VGL)に設定し、選択しなかった走査信号線7を非選択時電位VGL(VGH)に設定する。選択時電位は、TFT(Tg)がpチャネル型TFTであればVGLであり、TFT(Tg)がnチャネル型TFTであればVGHである。走査信号線7が選択時電位VGH(VGL)に設定されると、当該走査信号線7に接続されている画素20の書き込み用TFT(図5~7に示すTFT(Tg))のゲート電極が選択時電位VGH(VGL)に設定される。その結果、書き込み用TFTは、導通状態となり、画素ノードVgは、駆動線8を伝送される駆動信号SIGの電位と等電位に制御される。ゲートドライバによって走査信号線7に非選択時電位VGL(VGH)が印加されると、当該走査信号線7に接続されている画素20の書き込み用TFT(図5~7に示すTFT(Tg))ゲート電極が非選択時電位VGL(VGH)に設定される。その結果、書き込み用TFTは、非導通状態となる。 The gate driver selects one or more of the multiple (e.g., tens to thousands) scanning signal lines 7 in line sequence, sets the selected scanning signal lines 7 to the selected potential VGH (VGL), and sets the unselected scanning signal lines 7 to the unselected potential VGL (VGH). The selected potential is VGL if the TFT (Tg) is a p-channel TFT, and is VGH if the TFT (Tg) is an n-channel TFT. When the scanning signal line 7 is set to the selected potential VGH (VGL), the gate electrode of the write TFT (TFT (Tg) shown in Figures 5 to 7) of the pixel 20 connected to the scanning signal line 7 is set to the selected potential VGH (VGL). As a result, the write TFT becomes conductive, and the pixel node Vg is controlled to a potential equal to the potential of the drive signal SIG transmitted through the drive line 8. When the gate driver applies the non-selection potential VGL (VGH) to the scanning signal line 7, the gate electrode of the writing TFT (TFT (Tg) shown in Figures 5 to 7) of the pixel 20 connected to the scanning signal line 7 is set to the non-selection potential VGL (VGH). As a result, the writing TFT becomes non-conductive.
ソースドライバは、画像データ信号源5(図1参照)から入力される画像データ信号に基づいて、第1駆動線8aに入力されるSIG_P(n-1)の電位、第2駆動線8bに入力される駆動信号SIG_P(n)の電位、及び第3駆動線8cに入力される駆動信号SIG_S(n-1)の電位を、ゲートドライバによって選択されている走査信号線7に接続されている画素20の行(選択行ともいう)に応じたデータ電位に設定する。このようにして、選択行の複数の画素20に選択行の画像データ信号に応じたデータ電位を書き込むことができる。従って、複数の走査信号線7から線順次に1本又は複数本ずつ選択し、選択行の複数の画素20に選択行の画像データ信号に応じたデータ電位を書き込むことで、画像データ信号に応じた輝度で発光素子10を点灯させることができる。 Based on the image data signal input from the image data signal source 5 (see FIG. 1), the source driver sets the potential of SIG_P(n-1) input to the first drive line 8a, the potential of the drive signal SIG_P(n) input to the second drive line 8b, and the potential of the drive signal SIG_S(n-1) input to the third drive line 8c to a data potential corresponding to the row (also called the selected row) of pixels 20 connected to the scanning signal line 7 selected by the gate driver. In this way, a data potential corresponding to the image data signal of the selected row can be written to the multiple pixels 20 in the selected row. Therefore, by selecting one or more of the multiple scanning signal lines 7 in line sequence and writing a data potential corresponding to the image data signal of the selected row to the multiple pixels 20 in the selected row, the light-emitting element 10 can be illuminated with a brightness corresponding to the image data signal.
図10は、表示装置1の動作を説明するフローチャートである。本フローチャートは、駆動部3によって実行される。先ず、発光装置2には、正規発光素子10a,10bのみが実装されており、予備発光素子10cは実装されていないとする。発光装置2は、出荷前に点灯検査が行われ、正規発光素子10a,10bが使用不能である画素20が特定される。点灯検査は、滅点確認及び輝点確認が行われる。 FIG. 10 is a flowchart explaining the operation of the display device 1. This flowchart is executed by the drive unit 3. First, it is assumed that only regular light-emitting elements 10a and 10b are mounted on the light-emitting device 2, and the spare light-emitting element 10c is not mounted. The light-emitting device 2 is subjected to a lighting inspection before shipping, and pixels 20 in which the regular light-emitting elements 10a and 10b are unusable are identified. The lighting inspection includes checking for dark spots and bright spots.
滅点確認では、全ての正規発光素子10a,10bを点灯させるよう制御した上で、各正規発光素子10a,10bについて、滅点確認用の所定の輝度以上であるか否かを光学測定によって確認する。そして、所定の輝度以上であれば使用可能(OK)と判定し、所定の輝度未満であれば使用不能(NG)と判定する。 In dark spot checking, all genuine light emitting elements 10a, 10b are controlled to be lit, and each genuine light emitting element 10a, 10b is checked by optical measurement to see if it has a brightness equal to or higher than a predetermined brightness for dark spot checking. If it has a brightness equal to or higher than the predetermined brightness, it is judged as usable (OK), and if it has a brightness less than the predetermined brightness, it is judged as unusable (NG).
輝点確認では、全ての正規発光素子10a,10bを非点灯とするよう制御した上で、各正規発光素子10a,10bについて、輝点確認用の所定の輝度以上であるか否かを光学測定によって確認し、所定の輝度未満であれば使用可能(OK)と判定し、所定の輝度以上であれば使用不能(NG)と判定する。 In bright spot confirmation, all genuine light emitting elements 10a, 10b are controlled to be turned off, and each genuine light emitting element 10a, 10b is checked by optical measurement to see if it has a brightness equal to or greater than a predetermined brightness for bright spot confirmation. If it is less than the predetermined brightness, it is judged as usable (OK), and if it is equal to or greater than the predetermined brightness, it is judged as unusable (NG).
第1正規発光素子10aが滅点確認及び輝点確認の両方でOKであり、且つ第2正規発光素子10bが滅点確認及び輝点確認の両方でOKである画素20をOK画素と判定し、OK画素の位置情報(アドレス)を記憶部4に作業者が入力装置を用いて書き込む。滅点確認又は輝点確認でNGである画素20をNG画素と判定し、NG画素の情報(アドレス)を記憶部4に作業者が入力装置を用いて書き込む。NG画素と判定された画素20に対し、正規発光素子10a,10bの代わりに使用される予備発光素子10cを実装する。 A pixel 20 for which the first regular light-emitting element 10a is OK in both the dark spot confirmation and the bright spot confirmation, and the second regular light-emitting element 10b is OK in both the dark spot confirmation and the bright spot confirmation, is judged to be an OK pixel, and the position information (address) of the OK pixel is written to the memory unit 4 by the operator using the input device. A pixel 20 that is NG in the dark spot confirmation or the bright spot confirmation is judged to be an NG pixel, and the information (address) of the NG pixel is written to the memory unit 4 by the operator using the input device. A spare light-emitting element 10c is implemented for use in place of the regular light-emitting elements 10a and 10b for the pixel 20 judged to be an NG pixel.
〔S1〕において、発光素子10に入力される画像データ信号が、発光素子10のアドレスに対応付けられて、記憶部4に入力される。アドレスは、M行N’列のマトリックス状に配列された複数の正規発光素子10a,10bのそれぞれを、行番号m及び列番号nによって特定する。以下、アドレス(m,n)を有する正規発光素子10a,10bを、「発光素子10(m,n,p)」と記載する。また、発光素子10(m,n,p)が使用不能である場合に、発光素子10(m,n,p)に隣接して実装され、発光素子10(m,n,p)の代わりに使用される予備発光素子10cを、発光素子10(m,n,s)と記載する。さらに、発光素子10(m,n,p)を含む画素を、「画素20(m,n,p)」と記載し、発光素子10(m,n,s)を含む画素を、「画素20(m,n,s)」と記載する。なお、「p」は、正規発光素子10a,10bであることを示しており、「s」は、予備発光素子10cであることを示している。アドレス(m,n,p)は、発光素子10(m,n,p)が使用可能であるか否かの情報(使用可否情報)を含んでよい。 In [S1], the image data signal input to the light-emitting element 10 is associated with the address of the light-emitting element 10 and input to the memory unit 4. The address identifies each of the multiple regular light-emitting elements 10a, 10b arranged in a matrix of M rows and N' columns by row number m and column number n. Hereinafter, the regular light-emitting elements 10a, 10b having the address (m, n) are described as "light-emitting element 10(m, n, p)". In addition, when the light-emitting element 10(m, n, p) is unusable, the spare light-emitting element 10c that is mounted adjacent to the light-emitting element 10(m, n, p) and used instead of the light-emitting element 10(m, n, p) is described as the light-emitting element 10(m, n, s). Furthermore, the pixel including the light-emitting element 10(m, n, p) is described as the "pixel 20(m, n, p)", and the pixel including the light-emitting element 10(m, n, s) is described as the "pixel 20(m, n, s)". Note that "p" indicates that it is the regular light-emitting element 10a or 10b, and "s" indicates that it is the spare light-emitting element 10c. The address (m, n, p) may include information on whether the light-emitting element 10 (m, n, p) is usable (usability information).
〔S2〕において、記憶部4に記憶されているM×N’個の発光素子10(m,n,p)の使用可否情報を参照する。 In [S2], the usability information of the M×N' light-emitting elements 10 (m, n, p) stored in the memory unit 4 is referenced.
〔S3〕において、使用可否情報に基づいて、発光素子10(m,n,p)が使用可能であるか否かを判定する。発光素子10(m,n,p)は、発光素子10(1,1,p)であってよい。発光素子10(m,n,p)が使用可能である[Yes]場合、〔S4〕に進み、発光素子10(m,n,p)が使用可能でない[No]場合、〔S5〕に進む。 In [S3], it is determined whether or not the light-emitting element 10 (m, n, p) is usable based on the usability information. The light-emitting element 10 (m, n, p) may be the light-emitting element 10 (1, 1, p). If the light-emitting element 10 (m, n, p) is usable [Yes], proceed to [S4], and if the light-emitting element 10 (m, n, p) is not usable [No], proceed to [S5].
〔S4〕において、nが奇数であるか否かを判定する。nが奇数である[Yes]場合、ステップS6に進み、nが奇数でない[No]場合、ステップS7に進む。言い換えると、発光素子10(m,n,p)が第1駆動線8aと接続された発光素子10であるか否かを判定し、発光素子10(m,n,p)が第1駆動線8aと接続された発光素子10である場合、〔S6〕に進み、発光素子10(m,n,p)が第1駆動線8aと接続された発光素子10でない(即ち、第2駆動線8bと接続された発光素子10である)場合、〔S7〕に進む。 In [S4], it is determined whether n is an odd number. If n is an odd number [Yes], proceed to step S6, and if n is not an odd number [No], proceed to step S7. In other words, it is determined whether the light-emitting element 10 (m, n, p) is the light-emitting element 10 connected to the first drive line 8a, and if the light-emitting element 10 (m, n, p) is the light-emitting element 10 connected to the first drive line 8a, proceed to [S6], and if the light-emitting element 10 (m, n, p) is not the light-emitting element 10 connected to the first drive line 8a (i.e., the light-emitting element 10 connected to the second drive line 8b), proceed to [S7].
〔S6〕において、画素20(m,n,p)に、第1駆動線8aを介して、点灯信号(画像信号)を入力し、画素20(m,n,s)に、第3駆動線8cを介して、非点灯信号(黒信号)を入力する。これにより、発光素子10(m,n,p)を点灯させるとともに、発光素子10(m,n,s)を非点灯とすることができる。なお、第3駆動線8cへの非点灯信号の入力は省略してもよい。 In [S6], a light-on signal (image signal) is input to pixel 20 (m, n, p) via first drive line 8a, and a non-light-on signal (black signal) is input to pixel 20 (m, n, s) via third drive line 8c. This causes light-emitting element 10 (m, n, p) to light up, while light-emitting element 10 (m, n, s) to be non-lighted. Note that input of the non-light-on signal to third drive line 8c may be omitted.
〔S7〕において、画素20(m,n,p)に、第2駆動線8bを介して、点灯信号を入力し、画素20(m,n,s)に、第3駆動線8cを介して、非点灯信号を入力する。これにより、発光素子10(m,n,p)を点灯させるとともに、発光素子10(m,n,s)を非点灯とすることができる。なお、第3駆動線8cへの黒信号の入力は省略してもよい。 In [S7], a turn-on signal is input to pixel 20 (m, n, p) via second drive line 8b, and a turn-off signal is input to pixel 20 (m, n, s) via third drive line 8c. This turns on light-emitting element 10 (m, n, p) and turns off light-emitting element 10 (m, n, s). Note that the input of a black signal to third drive line 8c may be omitted.
〔S5〕において、nが奇数であるか否かを判定する。nが奇数である[Yes]場合、〔S8〕に進み、nが奇数でない[No]場合、〔S9〕に進む。言い換えると、発光素子10(m,n,p)が第1駆動線8aと接続された発光素子10であるか否かを判定し、発光素子10(m,n,p)が第1駆動線8aと接続された発光素子10である場合、〔S8〕に進み、発光素子10(m,n,p)が第1駆動線8aと接続された発光素子10でない(即ち、第2駆動線8bと接続された発光素子10である)場合、〔S9〕に進む。 In [S5], it is determined whether n is an odd number. If n is an odd number [Yes], proceed to [S8], and if n is not an odd number [No], proceed to [S9]. In other words, it is determined whether the light-emitting element 10 (m, n, p) is the light-emitting element 10 connected to the first drive line 8a, and if the light-emitting element 10 (m, n, p) is the light-emitting element 10 connected to the first drive line 8a, proceed to [S8], and if the light-emitting element 10 (m, n, p) is not the light-emitting element 10 connected to the first drive line 8a (i.e., the light-emitting element 10 connected to the second drive line 8b), proceed to [S9].
〔S8〕において、画素20(m,n,p)に、第1駆動線8aを介して、非点灯信号を入力し、画素20(m,n,s)に、第3駆動線8cを介して、点灯信号を入力する。これにより、発光素子10(m,n,p)を非点灯とするとともに、発光素子10(m,n,s)を点灯させることができる。なお、画素20(m,n,p)が滅点である場合、画素20(m,n,p)への非点灯信号の入力は省略してもよい。 In [S8], a non-lighting signal is input to pixel 20(m,n,p) via first drive line 8a, and a lighting signal is input to pixel 20(m,n,s) via third drive line 8c. This makes it possible to turn off light-emitting element 10(m,n,p) and turn on light-emitting element 10(m,n,s). Note that if pixel 20(m,n,p) is a dark spot, the input of the non-lighting signal to pixel 20(m,n,p) may be omitted.
〔S9〕において、画素20(m,n,p)に、第2駆動線8bを介して、非点灯信号を入力し、画素20(m,n,s)に、第3駆動線8cを介して、点灯信号を入力する。これにより、発光素子10(m,n,p)を非点灯とするとともに、発光素子10(m,n,s)を点灯させることができる。なお、なお、画素20(m,n,p)が滅点である場合、画素20(m,n,p)への非点灯信号の入力は省略してもよい。 In [S9], a non-lighting signal is input to pixel 20(m,n,p) via second drive line 8b, and a lighting signal is input to pixel 20(m,n,s) via third drive line 8c. This makes it possible to turn off light-emitting element 10(m,n,p) and turn on light-emitting element 10(m,n,s). Note that if pixel 20(m,n,p) is a dark spot, the input of the non-lighting signal to pixel 20(m,n,p) may be omitted.
〔S10〕において、mが最大値(即ち、行番号の最大値M)であるか否かを判定する。mが最大値である[Yes]場合、〔S12〕に進み、mが最大値でない[No]場合、〔S11〕において、次の行に移行し(即ち、mの値を1だけ増加させて)、〔S3〕に戻る。 In [S10], it is determined whether m is the maximum value (i.e., the maximum value M of the row number). If m is the maximum value [Yes], proceed to [S12], and if m is not the maximum value [No], proceed to the next row in [S11] (i.e., increase the value of m by 1) and return to [S3].
〔S12〕において、nが最大値(即ち、列番号の最大値N’)であるか否かを判定する。nが最大値である[Yes]場合、フローチャートを終了し、nが最大値でない[No]場合、〔S13〕において、次の列に移行し(即ち、nの値を1だけ増加させて)、〔S3〕に戻る。 In [S12], it is determined whether n is the maximum value (i.e., the maximum value of the column number N'). If n is the maximum value [Yes], the flow chart ends, and if n is not the maximum value [No], in [S13], the process moves to the next column (i.e., the value of n is increased by 1) and the process returns to [S3].
上記のようにして、駆動部3は、発光装置2の表示を制御することができる。 In this manner, the driving unit 3 can control the display of the light-emitting device 2.
点灯検査において、正規発光素子10a,10bの使用可否は、正規発光素子10a,10bに基準電流又は基準電圧を入力した場合に、所望の範囲内の発光輝度及び発光波長となっているか否かによって判定してもよい。基準電流は、例えば、正規発光素子10a,10bの最大定格電流であってよく、正規発光素子10a,10bの定格電流範囲の平均電流であってもよい。基準電圧は、例えば、正規発光素子10a,10bの最大定格電圧であってよく、正規発光素子10a,10bの定格電圧範囲の平均電圧であってもよい。予備発光素子10cの使用可否の判定についても同様である。 In the lighting test, the usability of the regular light-emitting elements 10a and 10b may be determined based on whether the emission luminance and emission wavelength are within the desired range when a reference current or reference voltage is input to the regular light-emitting elements 10a and 10b. The reference current may be, for example, the maximum rated current of the regular light-emitting elements 10a and 10b, or the average current in the rated current range of the regular light-emitting elements 10a and 10b. The reference voltage may be, for example, the maximum rated voltage of the regular light-emitting elements 10a and 10b, or the average voltage in the rated voltage range of the regular light-emitting elements 10a and 10b. The same applies to the determination of the usability of the spare light-emitting element 10c.
正規発光素子10a,10bの使用可否は、正規発光素子10a,10bを駆動する画素回路の動作特性に基づいて判定してもよい。例えば、駆動信号SIG_Pの動作電圧範囲(最小動作電圧~最大動作電圧)に対し、TFT(Td)のドレイン電圧範囲(最小ドレイン電圧~最大ドレイン電圧)が所望の範囲内であるか否かによって、正規発光素子10a,10bの使用可否を判定してもよい。あるいは、TFT(Td)の最小ドレイン電圧が所望の範囲内であり、且つTFT(Td)の最大ドレイン電圧が所望の範囲内であるか否かによって、正規発光素子10a,10bの使用可否を判定してもよい。あるいは、駆動信号SIG_Pの変化に対するTFT(Td)のドレイン電圧の変化を示す曲線が、所望の曲線、又は所望の曲線に近い曲線になっているか否かによって、正規発光素子10a,10bの使用可否を判定してもよい。 The usability of the regular light-emitting elements 10a and 10b may be determined based on the operating characteristics of the pixel circuit that drives the regular light-emitting elements 10a and 10b. For example, the usability of the regular light-emitting elements 10a and 10b may be determined based on whether the drain voltage range (minimum drain voltage to maximum drain voltage) of the TFT (Td) is within a desired range with respect to the operating voltage range (minimum operating voltage to maximum operating voltage) of the driving signal SIG_P. Alternatively, the usability of the regular light-emitting elements 10a and 10b may be determined based on whether the minimum drain voltage of the TFT (Td) is within a desired range and whether the maximum drain voltage of the TFT (Td) is within a desired range. Alternatively, the usability of the regular light-emitting elements 10a and 10b may be determined based on whether the curve showing the change in the drain voltage of the TFT (Td) relative to the change in the driving signal SIG_P is a desired curve or a curve close to the desired curve.
次に、発光装置2への駆動信号SIGの入力方法について説明する。図11は、全ての正規発光素子10a,10bが使用可能である発光装置2を示す部分拡大正面図である。図12は、図11の発光装置2への駆動信号SIGの入力方法の一例を示すタイミングチャートであり、図13は、図10の発光装置2への駆動信号SIGの入力方法の他の例を示すタイミングチャートである。図12,13のタイミングチャートでは、駆動線8に非点灯信号(黒信号)を入力する期間を、ハッチングを付して示している。後述するタイミングチャート(図16,17,20,21,24,25参照)についても同様である。 Next, a method of inputting the drive signal SIG to the light emitting device 2 will be described. Figure 11 is a partially enlarged front view showing the light emitting device 2 in which all regular light emitting elements 10a, 10b can be used. Figure 12 is a timing chart showing an example of a method of inputting the drive signal SIG to the light emitting device 2 of Figure 11, and Figure 13 is a timing chart showing another example of a method of inputting the drive signal SIG to the light emitting device 2 of Figure 10. In the timing charts of Figures 12 and 13, the period during which a non-lighting signal (black signal) is input to the drive line 8 is indicated by hatching. The same applies to the timing charts described later (see Figures 16, 17, 20, 21, 24, and 25).
図11は、全ての正規発光素子10a,10bが使用可能である場合を示している。正規発光素子10a,10bに付した符号「OK」は、当該正規発光素子10a,10bが使用可能であること、即ち、当該正規発光素子10a,10bを含む画素20がOK画素であることを示している。 FIG. 11 shows a case where all regular light-emitting elements 10a, 10b are usable. The symbol "OK" attached to the regular light-emitting elements 10a, 10b indicates that the regular light-emitting elements 10a, 10b are usable, that is, the pixel 20 including the regular light-emitting elements 10a, 10b is an OK pixel.
先ず、駆動部3が1水平走査期間を時分割方式で駆動する場合について説明する。駆動部3は、図12に示すように、1水平走査期間1H(m-1)の前半に、画素20(m-1,n-1,p)を点灯させる駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m-1,n,p)を点灯させる駆動信号SIG_P(n)を第2駆動線8bにそれぞれ入力する。ここで、1水平走査期間1H(m-1)とは、ゲートドライバにより画素配列の(m-1)行が選択されている期間を示し、後述する1水平走査期間1H(m)についても同様である。また、1水平走査期間1H(m-1)と、1水平走査期間1H(m)とを区別しない場合、単に、「1水平走査期間1H」と記載することがある。駆動部3は、1水平走査期間1H(m-1)の後半に、画素20(m-1,n-1,s)を非点灯とする駆動信号SIG_S(n-1)を第3駆動線8cに入力する。画素20(m-1,n-1,s)及び画素20(m-1,n,s)は第3駆動線8cを共用しているため、画素20(m,n,s)に対する駆動信号の入力は行われない。 First, a case where the driving unit 3 drives one horizontal scanning period in a time division manner will be described. As shown in FIG. 12, in the first half of one horizontal scanning period 1H(m-1), the driving unit 3 inputs a driving signal SIG_P(n-1) to the first driving line 8a to light up the pixel 20(m-1, n-1, p), and inputs a driving signal SIG_P(n) to light up the pixel 20(m-1, n, p) to the second driving line 8b. Here, one horizontal scanning period 1H(m-1) refers to a period during which the gate driver selects the (m-1) row of the pixel array, and the same applies to one horizontal scanning period 1H(m) described later. In addition, when one horizontal scanning period 1H(m-1) and one horizontal scanning period 1H(m) are not distinguished from each other, they may simply be referred to as "one horizontal scanning period 1H". In the second half of one horizontal scanning period 1H(m-1), the driving unit 3 inputs a driving signal SIG_S(n-1) to the third driving line 8c to turn off the light of the pixel 20(m-1, n-1, s). Because the pixel 20(m-1, n-1, s) and the pixel 20(m-1, n, s) share the third driving line 8c, no driving signal is input to the pixel 20(m, n, s).
駆動部3は、図12に示すように、1水平走査期間1H(m)の前半に、画素20(m,n-1,p)を点灯させる駆動信号SIG_P(n-1)及び画素20(m,n,p)を点灯させる駆動信号SIG_P(n)を、第1駆動線8a及び第2駆動線8bにそれぞれ入力する。駆動部3は、1水平走査期間1H(m)の後半に、画素20(m,n-1,s)を非点灯とする駆動信号SIG_S(n-1)を第3駆動線8cに入力する。画素20(m,n,s)に対する駆動信号の入力は行われない。 As shown in FIG. 12, in the first half of one horizontal scanning period 1H(m), the drive unit 3 inputs a drive signal SIG_P(n-1) that turns on pixel 20(m, n-1, p) and a drive signal SIG_P(n) that turns on pixel 20(m, n, p) to the first drive line 8a and the second drive line 8b, respectively. In the second half of one horizontal scanning period 1H(m), the drive unit 3 inputs a drive signal SIG_S(n-1) that turns off pixel 20(m, n-1, s) to the third drive line 8c. No drive signal is input to pixel 20(m, n, s).
駆動部3が1水平走査期間1Hを時分割方式で駆動しない場合、駆動部3は、図13に示すように、1水平走査期間1Hを分割せずに、駆動信号SIGを第1駆動線8a、第2駆動線8b及び第3駆動線8cに別個に入力する。 When the driving unit 3 does not drive one horizontal scanning period 1H in a time division manner, the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in FIG. 13.
図14は、一部の正規発光素子10a,10bが使用不能である発光装置2の一例を示す部分拡大図であり、図15は、図14の発光装置2に予備発光素子10cを実装した状態を示す部分拡大図である。図16は、図15の発光装置2への駆動信号SIGの入力方法の一例を示すタイミングチャートであり、図17は、図15の発光装置2への駆動信号SIGの入力方法の他の例を示すタイミングチャートである。 FIG. 14 is a partially enlarged view showing an example of a light emitting device 2 in which some of the regular light emitting elements 10a, 10b are unusable, and FIG. 15 is a partially enlarged view showing the state in which a spare light emitting element 10c is mounted on the light emitting device 2 of FIG. 14. FIG. 16 is a timing chart showing an example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 15, and FIG. 17 is a timing chart showing another example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 15.
本例では、図14に示すように、発光素子10(m,n-1,p)が使用不能であり、図15に示すように、発光素子10(m,n-1,s)が実装されている。発光素子10(m,n-1,s)は、第1駆動線側偏在部9caに接続されている。 In this example, as shown in FIG. 14, the light-emitting element 10 (m, n-1, p) is disabled, and as shown in FIG. 15, the light-emitting element 10 (m, n-1, s) is mounted. The light-emitting element 10 (m, n-1, s) is connected to the first drive line side unevenly distributed portion 9ca.
駆動部3は、図16に示すように、1水平走査期間1H(m-1)の前半に、画素20(m-1,n-1,p)を点灯させる駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m-1,n,p)を点灯させる駆動信号SIG_P(n)を第2駆動線8bに入力する。駆動部3は、1水平走査期間1H(m-1)の後半に、画素20(m-1,n-1,s)を非点灯とする駆動信号SIG_S(n-1)を第3駆動線8cに入力する。画素20(m-1,n-1,s)及び画素20(m-1,n,s)は第3駆動線8cを共用しているため、画素20(m-1,n,s)に対する駆動信号の入力は行われない。 As shown in FIG. 16, in the first half of one horizontal scanning period 1H(m-1), the driving unit 3 inputs a driving signal SIG_P(n-1) to the first driving line 8a to turn on the pixel 20(m-1, n-1, p), and inputs a driving signal SIG_P(n) to turn on the pixel 20(m-1, n, p) to the second driving line 8b. In the second half of one horizontal scanning period 1H(m-1), the driving unit 3 inputs a driving signal SIG_S(n-1) to turn off the pixel 20(m-1, n-1, s) to the third driving line 8c. Because the pixel 20(m-1, n-1, s) and the pixel 20(m-1, n, s) share the third driving line 8c, no driving signal is input to the pixel 20(m-1, n, s).
駆動部3は、図16に示すように、1水平走査期間1H(m)の前半に、画素20(m,n-1,p)を非点灯とする駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m,n,p)を点灯させる駆動信号SIG_P(n)を第2駆動線8bに入力する。なお、画素20(m,n-1,p)が滅点である場合、画素20(m,n-1,p)を非点灯とする駆動信号は、画素20(m,n-1,p)を点灯させる駆動信号と同じ信号であってよい。駆動部3は、1水平走査期間1H(m)の後半に、画素20(m,n-1,s)を点灯させる駆動信号SIG_S(n-1)を第3駆動線8cに入力する。画素20(m,n-1,s)及び画素20(m,n,s)は第3駆動線8cを共用しているため、画素20(m,n,s)に対する駆動信号の入力は行われない。第3駆動線8cを介して画素20(m,n-1,s)に入力される駆動信号は、画素20(m,n-1,p)に本来入力されるべき駆動信号と同じ信号であってよく、画素20(m,n-1,p)に本来入力されるべき駆動信号より信号強度(電位)が低い信号であってもよい。 As shown in FIG. 16, in the first half of one horizontal scanning period 1H(m), the driving unit 3 inputs a driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) to the first driving line 8a, and inputs a driving signal SIG_P(n) that turns on pixel 20(m, n, p) to the second driving line 8b. Note that if pixel 20(m, n-1, p) is a dark spot, the driving signal that turns off pixel 20(m, n-1, p) may be the same as the driving signal that turns on pixel 20(m, n-1, p). In the second half of one horizontal scanning period 1H(m), the driving unit 3 inputs a driving signal SIG_S(n-1) that turns on pixel 20(m, n-1, s) to the third driving line 8c. Since pixel 20(m,n-1,s) and pixel 20(m,n,s) share the third drive line 8c, no drive signal is input to pixel 20(m,n,s). The drive signal input to pixel 20(m,n-1,s) via the third drive line 8c may be the same signal as the drive signal that should originally be input to pixel 20(m,n-1,p), or may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20(m,n-1,p).
駆動部3が1水平走査期間を時分割方式で駆動しない場合、駆動部3は、図17に示すように、1水平走査期間1Hを分割せずに、駆動信号SIGを第1駆動線8a、第2駆動線8b及び第3駆動線8cに別個に入力する。1水平走査期間1H(m)において、第1駆動線8aを介して画素20(m,n-1,s)に入力される駆動信号は、画素20(m,n-1,p)に本来入力されるべき駆動信号と同じ信号であってよく、画素20(m,n-1,p)に本来入力されるべき駆動信号より信号強度(電位)が低い信号であってもよい。また、1水平走査期間1H(m)において、第1駆動線8aを介して画素20(m,n-1,p)に入力される駆動信号SIG_P(n-1)は、画素20(m,n-1,p)を非点灯とする駆動信号であってよく、画素20(m,n-1,p)が滅点である場合には、画素20(m,n-1,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。 When the driving unit 3 does not drive one horizontal scanning period in a time division manner, the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in Figure 17. In one horizontal scanning period 1H(m), the driving signal input to pixel 20(m,n-1,s) via the first driving line 8a may be the same signal as the driving signal that should originally be input to pixel 20(m,n-1,p), or may be a signal with a lower signal strength (electric potential) than the driving signal that should originally be input to pixel 20(m,n-1,p). Furthermore, in one horizontal scanning period 1H(m), the drive signal SIG_P(n-1) input to pixel 20(m, n-1, p) via first drive line 8a may be a drive signal that turns off pixel 20(m, n-1, p), or, if pixel 20(m, n-1, p) is a dark spot, may be the same signal as the drive signal (lighting signal) that should originally be input to pixel 20(m, n-1, p).
上記のようにして、一部の正規発光素子10a,10bが使用不能である場合に、使用不能な正規発光素子10a,10bの代わりに予備発光素子10cを点灯させることができる。 In this manner, when some of the regular light-emitting elements 10a, 10b are unusable, the spare light-emitting elements 10c can be turned on in place of the unusable regular light-emitting elements 10a, 10b.
図18は、一部の正規発光素子10a,10bが使用不能である発光装置2の他の例を示す部分拡大正面図であり、図19は、図18の発光装置2に予備発光素子10cを実装した状態を示す部分拡大正面図である。図20は、図19の発光装置2への駆動信号SIGの入力方法の一例を示すタイミングチャートであり、図21は、図19の発光装置2への駆動信号SIGの入力方法の他の例を示すタイミングチャートである。 FIG. 18 is a partially enlarged front view showing another example of a light emitting device 2 in which some of the regular light emitting elements 10a, 10b are unusable, and FIG. 19 is a partially enlarged front view showing the state in which a spare light emitting element 10c is mounted on the light emitting device 2 of FIG. 18. FIG. 20 is a timing chart showing an example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 19, and FIG. 21 is a timing chart showing another example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 19.
本例では、図18に示すように、発光素子10(m-1,n,p)及び発光素子10(m,n-1,p)が使用不能であり、図19に示すように、発光素子10(m-1,n,s)及び発光素子10(m,n-1,s)が実装されている。発光素子10(m-1,n,s)は、第2駆動線側偏在部9cbに接続されており、発光素子10(m,n-1,s)は、第1駆動線側偏在部9caに接続されている。 In this example, as shown in FIG. 18, light-emitting elements 10(m-1,n,p) and light-emitting elements 10(m,n-1,p) are disabled, and as shown in FIG. 19, light-emitting elements 10(m-1,n,s) and light-emitting elements 10(m,n-1,s) are mounted. Light-emitting element 10(m-1,n,s) is connected to second drive line side unevenly distributed portion 9cb, and light-emitting element 10(m,n-1,s) is connected to first drive line side unevenly distributed portion 9ca.
駆動部3は、図20に示すように、1水平走査期間1H(m-1)の前半に、画素20(m-1,n-1,p)を点灯させる駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m-1,n,p)を非点灯とする駆動信号SIG_P(n)を第2駆動線8bに入力する。なお、画素20(m-1,n,p)が滅点である場合、第2駆動線8bを介して画素20(m-1,n,p)に入力される駆動信号は、画素20(m-1,n,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。駆動部3は、1水平走査期間1H(m-1)の後半に、画素20(m-1,n,s)を点灯させる駆動信号SIG_S(n)を第3駆動線8cに入力する。画素20(m-1,n,s)に入力される駆動信号SIG_S(n)は、画素20(m-1,n,p)に本来入力されるべき駆動信号と同じ信号であってよく、画素20(m,n-1,p)に本来入力されるべき駆動信号より信号強度(電位)が低い信号であってもよい。 As shown in FIG. 20, the driving unit 3 inputs a driving signal SIG_P(n-1) that turns on the pixel 20(m-1, n-1, p) to the first driving line 8a during the first half of one horizontal scanning period 1H(m-1), and inputs a driving signal SIG_P(n) that turns off the pixel 20(m-1, n, p) to the second driving line 8b. Note that if the pixel 20(m-1, n, p) is a dark spot, the driving signal input to the pixel 20(m-1, n, p) via the second driving line 8b may be the same as the driving signal (lighting signal) that should originally be input to the pixel 20(m-1, n, p). The driving unit 3 inputs a driving signal SIG_S(n) that turns on the pixel 20(m-1, n, s) to the third driving line 8c during the second half of one horizontal scanning period 1H(m-1). The drive signal SIG_S(n) input to pixel 20(m-1, n, s) may be the same signal as the drive signal that should originally be input to pixel 20(m-1, n, p), or may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20(m, n-1, p).
駆動部3は、図20に示すように、1水平走査期間1H(m)の前半に、画素20(m,n-1,p)を非点灯とする駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m,n,p)を点灯させる駆動信号SIG_P(n)を第2駆動線8bに入力する。なお、画素20(m,n-1,p)が滅点である場合、第1駆動線8aを介して画素20(m,n-1,p)に入力される駆動信号SIG_P(n-1)は、画素20(m,n-1,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。駆動部3は、1水平走査期間1H(m)の後半に、画素20(m,n-1,s)を点灯させる駆動信号SIG_S(n-1)を第3駆動線8cに入力する。画素20(m,n-1,s)に入力される駆動信号は、画素20(m,n-1,p)に本来入力されるべき駆動信号と同じ信号であってよく、画素20(m,n-1,p)に本来入力されるべき駆動信号より信号強度(電位)が低い信号であってもよい。 As shown in FIG. 20, the driving unit 3 inputs a driving signal SIG_P(n-1) that turns off the pixel 20(m, n-1, p) to the first driving line 8a and a driving signal SIG_P(n) that turns on the pixel 20(m, n, p) to the second driving line 8b during the first half of one horizontal scanning period 1H(m). Note that when the pixel 20(m, n-1, p) is a dark spot, the driving signal SIG_P(n-1) input to the pixel 20(m, n-1, p) via the first driving line 8a may be the same signal as the driving signal (lighting signal) that should be input to the pixel 20(m, n-1, p). During the second half of one horizontal scanning period 1H(m), the driving unit 3 inputs a driving signal SIG_S(n-1) that turns on the pixel 20(m, n-1, s) to the third driving line 8c. The drive signal input to pixel 20 (m, n-1, s) may be the same as the drive signal that should originally be input to pixel 20 (m, n-1, p), or may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20 (m, n-1, p).
発光装置2が1水平走査期間1Hを時分割方式で駆動しない場合、駆動部3は、図21に示すように、1水平走査期間1Hを分割せずに、駆動信号SIGを第1駆動線8a、第2駆動線8b及び第3駆動線8cに別個に入力する。1水平走査期間1H(m-1)において、第3駆動線8cを介して画素20(m-1,n,s)に入力される駆動信号SIG_S(n)は、画素20(m-1,n,p)に本来入力されるべき駆動信号と同じ信号であってよく、画素20(m-1,n,p)に本来入力されるべき駆動信号より信号強度(電位)が低い信号であってもよい。また、1水平走査期間1H(m-1)において、第2駆動線8bを介して画素20(m-1,n,p)に入力される駆動信号SIG_P(n)は、画素20(m-1,n,p)を非点灯とする駆動信号であってよく、画素20(m-1,n,p)が滅点である場合には、画素20(m-1,n,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。 When the light emitting device 2 does not drive one horizontal scanning period 1H in a time division manner, the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in Figure 21. In one horizontal scanning period 1H(m-1), the driving signal SIG_S(n) input to pixel 20(m-1,n,s) via the third driving line 8c may be the same signal as the driving signal that should originally be input to pixel 20(m-1,n,p), or may be a signal with a lower signal strength (electric potential) than the driving signal that should originally be input to pixel 20(m-1,n,p). Furthermore, in one horizontal scanning period 1H(m-1), the drive signal SIG_P(n) input to pixel 20(m-1,n,p) via second drive line 8b may be a drive signal that turns off pixel 20(m-1,n,p), or, if pixel 20(m-1,n,p) is a dark spot, may be the same signal as the drive signal (lighting signal) that should originally be input to pixel 20(m-1,n,p).
1水平走査期間1H(m)において、画素20(m,n-1,p)に入力される駆動信号SIG_P(n-1)は、画素20(m,n-1,p)を非点灯とする駆動信号であってよく、画素20(m,n-1,p)が滅点である場合には、画素20(m,n-1,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。第3駆動線8cを介して画素20(m,n-1,s)に入力される駆動信号SIG_S(n-1)は、画素20(m,n-1,p)に本来入力されるべき駆動信号と同じ信号であってよく、画素20(m,n-1,p)に本来入力されるべき駆動信号より信号強度(電位)が低い信号であってもよい。また、第2駆動線8bを介して画素20(m,n,p)に入力される駆動信号SIG_P(n)は、画素20(m,n,p)を点灯させる駆動信号SIG_P(n)である。 In one horizontal scanning period 1H(m), the drive signal SIG_P(n-1) input to pixel 20(m, n-1, p) may be a drive signal that turns off pixel 20(m, n-1, p), or if pixel 20(m, n-1, p) is a dark spot, it may be the same signal as the drive signal (lighting signal) that should originally be input to pixel 20(m, n-1, p). The drive signal SIG_S(n-1) input to pixel 20(m, n-1, s) via third drive line 8c may be the same signal as the drive signal that should originally be input to pixel 20(m, n-1, p), or it may be a signal with a lower signal strength (electric potential) than the drive signal that should originally be input to pixel 20(m, n-1, p). In addition, the drive signal SIG_P(n) input to pixel 20(m,n,p) via second drive line 8b is a drive signal SIG_P(n) that turns on pixel 20(m,n,p).
図22は、一部の正規発光素子10a,10bが使用不能である発光装置2のさらに他の例を示す部分拡大図であり、図23は、図22の発光装置2に予備発光素子10cを実装した状態を示す部分拡大図である。図24は、図23の発光装置2への駆動信号SIGの入力方法の一例を示すタイミングチャートであり、図25は、図23の発光装置2への駆動信号SIGの入力方法の他の例を示すタイミングチャートである。 FIG. 22 is a partially enlarged view showing yet another example of a light emitting device 2 in which some of the regular light emitting elements 10a, 10b are unusable, and FIG. 23 is a partially enlarged view showing the state in which a spare light emitting element 10c is mounted on the light emitting device 2 of FIG. 22. FIG. 24 is a timing chart showing an example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 23, and FIG. 25 is a timing chart showing another example of a method of inputting a drive signal SIG to the light emitting device 2 of FIG. 23.
本例では、図22に示すように、発光素子10(m,n-1,p)及び発光素子10(m,n,p)が使用不能であり、図23に示すように、発光素子10(m,n-1,s)及び発光素子10(m,n,s)が実装されている。発光素子10(m,n-1,s)は、第1駆動線側偏在部9caに接続されており、発光素子10(m,n,s)は、第2駆動線側偏在部9cbに接続されている。 In this example, as shown in FIG. 22, light-emitting elements 10(m,n-1,p) and light-emitting elements 10(m,n,p) are disabled, and as shown in FIG. 23, light-emitting elements 10(m,n-1,s) and light-emitting elements 10(m,n,s) are mounted. Light-emitting element 10(m,n-1,s) is connected to the first drive line side unevenly distributed portion 9ca, and light-emitting element 10(m,n,s) is connected to the second drive line side unevenly distributed portion 9cb.
駆動部3は、図24に示すように、1水平走査期間1H(m-1)の前半に、画素20(m-1,n-1,p)を点灯させる駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m-1,n,p)を点灯させる駆動信号SIG_P(n)を第2駆動線8bに入力する。駆動部3は、1水平走査期間1H(m-1)の後半に、画素20(m-1,n-1,s)を非点灯とする駆動信号SIG_S(n-1)を第3駆動線8cに入力する。 As shown in FIG. 24, in the first half of one horizontal scanning period 1H(m-1), the drive unit 3 inputs a drive signal SIG_P(n-1) that turns on pixel 20(m-1, n-1, p) to the first drive line 8a, and inputs a drive signal SIG_P(n) that turns on pixel 20(m-1, n, p) to the second drive line 8b. In the second half of one horizontal scanning period 1H(m-1), the drive unit 3 inputs a drive signal SIG_S(n-1) that turns off pixel 20(m-1, n-1, s) to the third drive line 8c.
駆動部3は、図24に示すように、1水平走査期間1H(m)の前半に、画素20(m,n-1,p)を非点灯とする駆動信号SIG_P(n-1)を第1駆動線8aに入力し、画素20(m,n,p)を非点灯とする駆動信号SIG_P(n)を第2駆動線8bに入力する。画素20(m,n-1,p)が滅点である場合、画素20(m,n-1,p)を非点灯とする駆動信号SIG_P(n-1)は、画素20(m,n-1,p)を点灯させる駆動信号と同じ信号であってもよい。画素20(m,n,p)が滅点である場合、画素20(m,n,p)を非点灯とする駆動信号SIG_P(n)は、画素20(m,n,p)を点灯させる駆動信号であってもよい。駆動部3は、1水平走査期間1H(m)の後半に、画素20(m,n-1,s)を点灯させる駆動信号SIG_S(n-1)を第3駆動線8cに入力する。第3駆動線8cを介して画素20(m,n-1,s)に入力される駆動信号SIG_S(n-1)は、画素20(m,n-1,p)に本来入力されるべき駆動信号と同じ信号であってよい。なお、発光装置2は、画素20(m,n-1,s)及び画素20(m,n,s)が第3駆動線8cを共用する構成であるため、画素20(m,n-1,s)及び画素20(m,n,s)の両方に同じ駆動信号SIG_S(n-1)が入力される。画素20(m,n-1,s)及び画素20(m,n,s)の両方に画素20(m,n-1,p)に本来入力されるべき駆動信号が入力されると、発光装置2の表示画像に輝度むら、色むら等が生じることがある。駆動部3は、画素20(m,n-1,p)に本来入力されるべき駆動信号と、画素20(m,n,p)に本来入力されるべき駆動信号とに基づいて補正駆動信号を算出し、補正駆動信号を画素20(m,n-1,s)及び画素20(m,n,s)に入力してよい。補正駆動信号の電位は、画素20(m,n-1,p)に本来入力されるべき駆動信号の電位と、画素20(m,n,p)に本来入力されるべき駆動信号の電位とを平均した電位であってよく、その他の電位であってもよい。 As shown in FIG. 24, in the first half of one horizontal scanning period 1H(m), the driving unit 3 inputs a driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) to the first driving line 8a, and inputs a driving signal SIG_P(n) that turns off pixel 20(m, n, p) to the second driving line 8b. If pixel 20(m, n-1, p) is a dark spot, the driving signal SIG_P(n-1) that turns off pixel 20(m, n-1, p) may be the same signal as the driving signal that turns on pixel 20(m, n-1, p). If pixel 20(m, n, p) is a dark spot, the driving signal SIG_P(n) that turns off pixel 20(m, n, p) may be a driving signal that turns on pixel 20(m, n, p). In the second half of one horizontal scanning period 1H(m), the driving unit 3 inputs a driving signal SIG_S(n-1) for turning on the pixel 20(m, n-1, s) to the third driving line 8c. The driving signal SIG_S(n-1) input to the pixel 20(m, n-1, s) via the third driving line 8c may be the same as the driving signal that should be input to the pixel 20(m, n-1, p). Note that the light-emitting device 2 is configured such that the pixel 20(m, n-1, s) and the pixel 20(m, n, s) share the third driving line 8c, and therefore the same driving signal SIG_S(n-1) is input to both the pixel 20(m, n-1, s) and the pixel 20(m, n, s). When a drive signal that should be input to pixel 20 (m, n-1, p) is input to both pixel 20 (m, n-1, s) and pixel 20 (m, n, s), luminance unevenness, color unevenness, etc. may occur in the display image of the light-emitting device 2. The drive unit 3 may calculate a correction drive signal based on the drive signal that should be input to pixel 20 (m, n-1, p) and the drive signal that should be input to pixel 20 (m, n, p), and input the correction drive signal to pixel 20 (m, n-1, s) and pixel 20 (m, n, s). The potential of the correction drive signal may be an average potential of the drive signal that should be input to pixel 20 (m, n-1, p) and the drive signal that should be input to pixel 20 (m, n, p), or may be another potential.
駆動部3が1水平走査期間1Hを時分割方式で駆動しない場合、駆動部3は、図25に示すように、1水平走査期間1Hを分割せずに、駆動信号SIGを第1駆動線8a、第2駆動線8b及び第3駆動線8cに別個に入力する。1水平走査期間1H(m)において、第1駆動線8aを介して画素20(m,n-1,p)に入力される駆動信号SIG_P(n-1)は、画素20(m,n-1,p)を非点灯とする駆動信号であってよく、画素20(m,n-1,p)が滅点である場合には、画素20(m,n-1,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。1水平走査期間1H(m)において、第2駆動線8bを介して画素20(m,n,p)に入力される駆動信号SIG_P(n)は、画素20(m,n,p)を非点灯とする駆動信号であってよく、画素20(m,n,p)が滅点である場合には、画素20(m,n,p)に本来入力されるべき駆動信号(点灯信号)と同じ信号であってもよい。1水平走査期間1H(m)において、画素20(m,n-1,s)及び画素20(m,n,s)に入力される駆動信号SIG_S(n-1)は、画素20(m,n-1,p)に本来入力されるべき駆動信号と同じ信号であってよく、上記の補正駆動信号であってもよい。 When the driving unit 3 does not drive one horizontal scanning period 1H in a time division manner, the driving unit 3 does not divide one horizontal scanning period 1H, and inputs the driving signal SIG separately to the first driving line 8a, the second driving line 8b, and the third driving line 8c, as shown in Figure 25. In one horizontal scanning period 1H(m), the driving signal SIG_P(n-1) input to pixel 20(m, n-1, p) via the first driving line 8a may be a driving signal that turns off pixel 20(m, n-1, p), or, if pixel 20(m, n-1, p) is a dark spot, may be the same signal as the driving signal (lighting signal) that should originally be input to pixel 20(m, n-1, p). In one horizontal scanning period 1H(m), the driving signal SIG_P(n) input to the pixel 20(m,n,p) via the second driving line 8b may be a driving signal that turns off the pixel 20(m,n,p), or may be the same signal as the driving signal (lighting signal) that should be input to the pixel 20(m,n,p) when the pixel 20(m,n,p) is a dark spot. In one horizontal scanning period 1H(m), the driving signal SIG_S(n-1) input to the pixel 20(m,n-1,s) and the pixel 20(m,n,s) may be the same signal as the driving signal that should be input to the pixel 20(m,n-1,p), or may be the above-mentioned correction driving signal.
図26は、図22の発光装置2に予備発光素子10cを実装した状態の他の例を示す部分拡大図である。発光素子10(m,n-1,p)及び発光素子10(m,n,p)が使用不能である場合、発光装置2は、図26に示すように、発光素子10(m,n-1,s)のみが実装され、発光素子10(m,n,s)が実装されない構成であってもよい。図26の発光装置2に対しても、図24,25を用いて説明したように、駆動信号SIGを入力することができる。 FIG. 26 is a partially enlarged view showing another example of the state in which a spare light-emitting element 10c is mounted on the light-emitting device 2 of FIG. 22. When the light-emitting element 10(m, n-1, p) and the light-emitting element 10(m, n, p) are unusable, the light-emitting device 2 may be configured as shown in FIG. 26 in such a way that only the light-emitting element 10(m, n-1, s) is mounted and the light-emitting element 10(m, n, s) is not mounted. A drive signal SIG can also be input to the light-emitting device 2 of FIG. 26, as described using FIGS. 24 and 25.
本開示によれば、点欠陥が低減された高精細な表示装置を提供することができる。 This disclosure makes it possible to provide a high-definition display device with reduced point defects.
以上、本開示の実施形態について詳細に説明したが、本開示は上述の実施の形態に限定されるものではなく、本開示の要旨を逸脱しない範囲内において、種々の変更、改良等が可能である。例えば、発光装置2は、各画素20が複数の発光素子10を有する構成であってもよい。複数の発光素子10は、発光波長が互いに同一であってよく、発光波長が互いに異なっていてもよい。複数の発光素子10の発光波長が互いに同一である場合、NG画素の発生を抑制することができる。また、複数の発光素子10の発光波長が互いに異なる場合、例えば、各画素20に赤色光を発光する発光素子10と、緑色光を発光する発光素子10と、青色光を発光する発光素子10とを設けることによって、カラーの階調表示が可能な発光装置2とすることができる。 The above describes the embodiments of the present disclosure in detail, but the present disclosure is not limited to the above-mentioned embodiments, and various modifications, improvements, etc. are possible within the scope of the gist of the present disclosure. For example, the light-emitting device 2 may have a configuration in which each pixel 20 has multiple light-emitting elements 10. The multiple light-emitting elements 10 may have the same emission wavelength, or may have different emission wavelengths. When the emission wavelengths of the multiple light-emitting elements 10 are the same, the occurrence of NG pixels can be suppressed. In addition, when the emission wavelengths of the multiple light-emitting elements 10 are different from each other, for example, a light-emitting element 10 that emits red light, a light-emitting element 10 that emits green light, and a light-emitting element 10 that emits blue light can be provided in each pixel 20, thereby making it possible to provide a light-emitting device 2 capable of displaying color gradations.
本開示の係る発光装置は、以下の構成(1)~(16)で実施可能である。 The light emitting device disclosed herein can be implemented in the following configurations (1) to (16).
(1)常時使用するための第1正規発光素子、及び、前記第1正規発光素子を駆動する第1駆動線と、
常時使用するための第2正規発光素子、及び、前記第2正規発光素子を駆動する第2駆動線であって、前記第1駆動線に沿って延びている第2駆動線と、
冗長的に使用するための予備発光素子、及び、前記予備発光素子を駆動する第3駆動線であって、前記第1駆動線と前記第2駆動線との間に位置しているとともに、前記第1駆動線及び前記第2駆動線に沿って延びている第3駆動線と、を備え、
前記第3駆動線は、前記予備発光素子に接続される予備接続電極に、前記予備接続電極と平面視で重なった状態で接続されており、
前記予備接続電極は、前記第1駆動線の側に偏在する第1駆動線側偏在部と、前記第2駆動線の側に偏在する第2駆動線側偏在部と、を有し、
前記予備発光素子は、前記第1正規発光素子が使用不能な場合に前記第1駆動線側偏在部に接続され、前記第2正規発光素子が使用不能な場合に前記第2駆動線側偏在部に接続される、発光装置。
(1) a first regular light emitting element for constant use, and a first driving line for driving the first regular light emitting element;
a second regular light emitting element for constant use; and a second driving line for driving the second regular light emitting element, the second driving line extending along the first driving line;
a spare light emitting element for redundant use; and a third driving line for driving the spare light emitting element, the third driving line being located between the first driving line and the second driving line and extending along the first driving line and the second driving line;
the third driving line is connected to a spare connection electrode connected to the spare light emitting element in a state where the third driving line overlaps with the spare connection electrode in a plan view;
the spare connection electrode has a first drive line side unevenly distributed portion that is unevenly distributed toward the first drive line side and a second drive line side unevenly distributed portion that is unevenly distributed toward the second drive line side,
A light emitting device, wherein the auxiliary light emitting element is connected to the first driving line side unevenly distributed portion when the first regular light emitting element is unavailable, and is connected to the second driving line side unevenly distributed portion when the second regular light emitting element is unavailable.
(2)前記第1駆動線は、前記第1正規発光素子に接続される第1接続電極に、前記第1接続電極と平面視で重なった状態で接続されており、
前記第2駆動線は、前記第2正規発光素子に接続される第2接続電極に、前記第2接続電極と平面視で重なった状態で接続されており、
前記第1接続電極及び前記第2接続電極はそれぞれ、前記第3駆動線の側に偏在する第3駆動線側偏在部を有し、
前記第1正規発光素子は、前記第1接続電極の前記第3駆動線側偏在部に接続され、前記第2正規発光素子は、前記第2接続電極の前記第3駆動線側偏在部に接続される、上記(1)に記載の発光装置。
(2) the first driving line is connected to a first connection electrode connected to the first regular light emitting element in a state where the first driving line overlaps with the first connection electrode in a plan view;
the second driving line is connected to a second connection electrode connected to the second regular light emitting element in a state where the second driving line overlaps with the second connection electrode in a plan view;
the first connection electrode and the second connection electrode each have a third drive line side unevenly distributed portion that is unevenly distributed toward the third drive line,
The light-emitting device described in (1) above, wherein the first regular light-emitting element is connected to the third driving line side eccentric portion of the first connection electrode, and the second regular light-emitting element is connected to the third driving line side eccentric portion of the second connection electrode.
(3)前記予備接続電極の大きさが、前記第1接続電極及び前記第2接続電極のいずれの大きさよりも大きい、上記(2)に記載の発光装置。 (3) The light-emitting device described in (2) above, in which the size of the spare connection electrode is larger than the size of both the first connection electrode and the second connection electrode.
(4)前記予備接続電極の大きさが、前記第1接続電極及び前記第2接続電極のそれぞれの大きさの2倍以上である、上記(3)に記載の発光装置。 (4) The light-emitting device described in (3) above, in which the size of the spare connection electrode is at least twice the size of each of the first connection electrode and the second connection electrode.
(5)前記予備接続電極の抵抗が、前記第1接続電極及び前記第2接続電極のそれぞれの抵抗よりも小さい、上記(2)~(4)のいずれかに記載の発光装置。 (5) A light-emitting device according to any one of (2) to (4) above, in which the resistance of the spare connection electrode is smaller than the resistance of each of the first connection electrode and the second connection electrode.
(6)前記第3駆動線の幅が、前記第1駆動線及び前記第2駆動線のそれぞれの幅よりも細い、上記(4)または(5)に記載の発光装置。 (6) The light emitting device according to (4) or (5) above, wherein the width of the third driving line is narrower than the width of each of the first driving line and the second driving line.
(7)前記第3駆動線の前記予備接続電極を含む抵抗が、前記第1駆動線の前記第1接続電極を含む抵抗及び前記第2駆動線の前記第2接続電極を含む抵抗のそれぞれと同等である、上記(6)に記載の発光装置。 (7) The light-emitting device described in (6) above, in which the resistance including the spare connection electrode of the third driving line is equivalent to each of the resistance including the first connection electrode of the first driving line and the resistance including the second connection electrode of the second driving line.
(8)前記第1駆動線と前記第2駆動線と前記第3駆動線から成る駆動線グループが、複数並んでおり、
第1の駆動線グループと、前記第1の駆動線グループに隣接する第2の駆動線グループとの間に、ダミー接続電極がある、上記(2)~(7)のいずれかに記載の発光装置。
(8) A plurality of drive line groups each including the first drive line, the second drive line, and the third drive line are arranged in a row,
The light emitting device according to any one of (2) to (7) above, wherein a dummy connection electrode is provided between a first driving line group and a second driving line group adjacent to the first driving line group.
(9)前記駆動線グループが並ぶ方向において、前記ダミー接続電極の長さが前記予備接続電極の長さと同じである、上記(8)に記載の発光装置。 (9) The light-emitting device described in (8) above, in which the length of the dummy connection electrode is the same as the length of the spare connection electrode in the direction in which the drive line groups are arranged.
(10)前記ダミー接続電極は、それに隣接する前記第1接続電極及び前記第2接続電極の少なくとも一方に電気的に接続されている、上記(8)または(9)に記載の発光装置。 (10) The light-emitting device according to (8) or (9) above, wherein the dummy connection electrode is electrically connected to at least one of the first connection electrode and the second connection electrode adjacent thereto.
(11)前記第1接続電極は、前記第1駆動線に対して、前記第1接続電極の前記第3駆動線側偏在部とは反対側に延在する延在部を有し、
前記第2接続電極は、前記第2駆動線に対して、前記第2接続電極の前記第3駆動線側偏在部とは反対側に延在する延在部を有する、上記(2)~(10)のいずれかに記載の発光装置。
(11) The first connection electrode has an extension portion that extends to a side opposite to the third drive line side unevenly distributed portion of the first connection electrode with respect to the first drive line,
The light-emitting device according to any one of (2) to (10) above, wherein the second connection electrode has an extension portion that extends on the opposite side of the second drive line from the third drive line side uneven distribution portion of the second connection electrode with respect to the second drive line.
(12)前記予備発光素子が前記第1駆動線側偏在部に接続されている場合、前記第1正規発光素子に入力されるべき第1駆動信号が前記予備発光素子に入力され、
前記予備発光素子が前記第2駆動線側偏在部に接続されている場合、前記第2正規発光素子に入力されるべき第2駆動信号が前記予備発光素子に入力される、上記(1)~(11)のいずれかに記載の発光装置。
(12) When the preliminary light emitting element is connected to the first driving line side unevenly distributed portion, a first driving signal to be input to the first regular light emitting element is input to the preliminary light emitting element,
A light-emitting device described in any one of (1) to (11) above, wherein when the preliminary light-emitting element is connected to the second driving line side uneven distribution portion, a second driving signal that should be input to the second regular light-emitting element is input to the preliminary light-emitting element.
(13)前記予備発光素子に入力される前記第1駆動信号の信号強度が、前記第1正規発光素子に入力されるべき前記第1駆動信号の信号強度以下であり、
前記予備発光素子に入力される前記第2駆動信号の信号強度が、前記第2正規発光素子に入力されるべき前記第2駆動信号の信号強度以下である、上記(12)に記載の発光装置。
(13) A signal strength of the first driving signal input to the preliminary light-emitting element is equal to or less than a signal strength of the first driving signal to be input to the first regular light-emitting element,
The light emitting device according to (12) above, wherein the signal strength of the second drive signal input to the auxiliary light emitting element is equal to or less than the signal strength of the second drive signal to be input to the second regular light emitting element.
(14)前記予備発光素子に入力される前記第1駆動信号の入力期間の長さが、前記第1正規発光素子に入力されるべき前記第1駆動信号の入力期間の長さ以下であり、
前記予備発光素子に入力される前記第2駆動信号の入力期間の長さが、前記第2正規発光素子に入力されるべき前記第2駆動信号の入力期間の長さ以下である、上記(12)または(13)に記載の発光装置。
(14) A length of an input period of the first driving signal input to the preliminary light-emitting element is equal to or shorter than a length of an input period of the first driving signal to be input to the first regular light-emitting element;
The light emitting device according to claim 12 or 13, wherein the length of the input period of the second drive signal input to the preliminary light emitting element is equal to or less than the length of the input period of the second drive signal to be input to the second regular light emitting element.
(15)上記(1)~(14)のいずれかに記載の発光装置を備え、
前記第1正規発光素子と前記第2正規発光素子と前記予備発光素子とを含む発光素子グループが、マトリックス状に配列されている、表示装置。
(15) A light emitting device according to any one of (1) to (14) above,
a light emitting element group including the first regular light emitting element, the second regular light emitting element, and the auxiliary light emitting element, the light emitting element group being arranged in a matrix.
(16)前記第1正規発光素子の発光色と前記第2正規発光素子の発光色が異なっている、上記(15)に記載の表示装置。 (16) The display device described in (15) above, in which the emission color of the first regular light-emitting element is different from the emission color of the second regular light-emitting element.
1 表示装置
2 発光装置
3 駆動部
4 記憶部
5 画像データ信号源
6 基板
6a 第1面(表示面)
6b 第2面(裏面)
6c 第3面(側面)
7 走査信号線
8 駆動線
8a 第1駆動線
8b 第2駆動線
8c 第3駆動線
8g 駆動線グループ
9a 第1接続電極
9ab 延在部
9ac 第3駆動線側偏在部
9b 第2接続電極
9ba 延在部
9bc 第3駆動線側偏在部
9c 第3接続電極(予備接続電極)
9ca 第1駆動線側偏在部
9cb 第2駆動線側偏在部
9cc 非偏在部
9d ダミー接続電極
10 発光素子
10a 第1正規発光素子
10b 第2正規発光素子
10c 予備発光素子
11 カソード電極
12 コンタクト
13 発光制御信号線
17 駆動制御部
17a,17b,17c,17d,17e,17f,17g,17h 接続線
20 画素
20a 第1画素
20b 第2画素
20c 第3画素
20g 発光素子グループ
22 セレクタ回路
22a,22b,22c,22d,22e,22f,22g,22h 接続線
120 データ線駆動回路
120a,120b 接続線
REFERENCE SIGNS LIST 1 Display device 2 Light emitting device 3 Drive section 4 Storage section 5 Image data signal source 6 Substrate 6a First surface (display surface)
6b 2nd surface (back side)
6c Third surface (side)
7 Scanning signal line 8 Drive line 8a First drive line 8b Second drive line 8c Third drive line 8g Drive line group 9a First connection electrode 9ab Extension portion 9ac Third drive line side unevenly distributed portion 9b Second connection electrode 9ba Extension portion 9bc Third drive line side unevenly distributed portion 9c Third connection electrode (auxiliary connection electrode)
9ca First drive line side unevenly distributed portion 9cb Second drive line side unevenly distributed portion 9cc Non-unevenly distributed portion 9d Dummy connection electrode 10 Light emitting element 10a First regular light emitting element 10b Second regular light emitting element 10c Preliminary light emitting element 11 Cathode electrode 12 Contact 13 Light emission control signal line 17 Drive control unit 17a, 17b, 17c, 17d, 17e, 17f, 17g, 17h Connection line 20 Pixel 20a First pixel 20b Second pixel 20c Third pixel 20g Light emitting element group 22 Selector circuit 22a, 22b, 22c, 22d, 22e, 22f, 22g, 22h Connection line 120 Data line drive circuit 120a, 120b Connection line
Claims (16)
常時使用するための第2正規発光素子、及び、前記第2正規発光素子を駆動する第2駆動線であって、前記第1駆動線に沿って延びている第2駆動線と、
冗長的に使用するための予備発光素子、及び、前記予備発光素子を駆動する第3駆動線であって、前記第1駆動線と前記第2駆動線との間に位置しているとともに、前記第1駆動線及び前記第2駆動線に沿って延びている第3駆動線と、を備え、
前記第3駆動線は、前記予備発光素子に接続される予備接続電極に、前記予備接続電極と平面視で重なった状態で接続されており、
前記予備接続電極は、前記第1駆動線の側に偏在する第1駆動線側偏在部と、前記第2駆動線の側に偏在する第2駆動線側偏在部と、を有し、
前記予備発光素子は、前記第1正規発光素子が使用不能な場合に前記第1駆動線側偏在部に接続され、前記第2正規発光素子が使用不能な場合に前記第2駆動線側偏在部に接続される、発光装置。 a first regular light emitting element for constant use, and a first driving line for driving the first regular light emitting element;
a second regular light emitting element for constant use; and a second driving line for driving the second regular light emitting element, the second driving line extending along the first driving line;
a spare light emitting element for redundant use; and a third driving line for driving the spare light emitting element, the third driving line being located between the first driving line and the second driving line and extending along the first driving line and the second driving line;
the third driving line is connected to a spare connection electrode connected to the spare light emitting element in a state where the third driving line overlaps with the spare connection electrode in a plan view;
the spare connection electrode has a first drive line side unevenly distributed portion that is unevenly distributed toward the first drive line side and a second drive line side unevenly distributed portion that is unevenly distributed toward the second drive line side,
A light emitting device, wherein the auxiliary light emitting element is connected to the first driving line side unevenly distributed portion when the first regular light emitting element is unavailable, and is connected to the second driving line side unevenly distributed portion when the second regular light emitting element is unavailable.
前記第2駆動線は、前記第2正規発光素子に接続される第2接続電極に、前記第2接続電極と平面視で重なった状態で接続されており、
前記第1接続電極及び前記第2接続電極はそれぞれ、前記第3駆動線の側に偏在する第3駆動線側偏在部を有し、
前記第1正規発光素子は、前記第1接続電極の前記第3駆動線側偏在部に接続され、前記第2正規発光素子は、前記第2接続電極の前記第3駆動線側偏在部に接続される、請求項1に記載の発光装置。 the first driving line is connected to a first connection electrode connected to the first regular light emitting element in a state where the first driving line overlaps with the first connection electrode in a plan view;
the second driving line is connected to a second connection electrode connected to the second regular light emitting element in a state where the second driving line overlaps with the second connection electrode in a plan view;
the first connection electrode and the second connection electrode each have a third drive line side unevenly distributed portion that is unevenly distributed toward the third drive line,
2. The light emitting device according to claim 1, wherein the first regular light emitting element is connected to the third driving line side unevenly distributed portion of the first connection electrode, and the second regular light emitting element is connected to the third driving line side unevenly distributed portion of the second connection electrode.
第1の駆動線グループと、前記第1の駆動線グループに隣接する第2の駆動線グループとの間に、ダミー接続電極がある、請求項2~7のいずれか1項に記載の発光装置。 a plurality of drive line groups each including the first drive line, the second drive line, and the third drive line are arranged side by side;
8. The light emitting device according to claim 2, wherein a dummy connection electrode is provided between a first drive line group and a second drive line group adjacent to the first drive line group.
前記第2接続電極は、前記第2駆動線に対して、前記第2接続電極の前記第3駆動線側偏在部とは反対側に延在する延在部を有する、請求項2~10のいずれか1項に記載の発光装置。 the first connection electrode has an extension portion that extends to a side opposite to the third drive line side unevenly distributed portion of the first connection electrode with respect to the first drive line,
The light emitting device according to any one of claims 2 to 10, wherein the second connection electrode has an extension portion that extends on the opposite side of the second drive line from the third drive line side uneven distribution portion of the second connection electrode with respect to the second drive line.
前記予備発光素子が前記第2駆動線側偏在部に接続されている場合、前記第2正規発光素子に入力されるべき第2駆動信号が前記予備発光素子に入力される、請求項1~11のいずれか1項に記載の発光装置。 When the preliminary light emitting element is connected to the first driving line side unevenly distributed portion, a first driving signal to be input to the first regular light emitting element is input to the preliminary light emitting element;
A light-emitting device according to any one of claims 1 to 11, wherein when the preliminary light-emitting element is connected to the second driving line side uneven distribution portion, a second driving signal to be input to the second regular light-emitting element is input to the preliminary light-emitting element.
前記予備発光素子に入力される前記第2駆動信号の信号強度が、前記第2正規発光素子に入力されるべき前記第2駆動信号の信号強度以下である、請求項12に記載の発光装置。 The signal strength of the first driving signal input to the preliminary light-emitting element is equal to or less than the signal strength of the first driving signal to be input to the first regular light-emitting element,
The light emitting device according to claim 12 , wherein a signal strength of the second driving signal input to the auxiliary light emitting element is equal to or lower than a signal strength of the second driving signal to be input to the second regular light emitting element.
前記予備発光素子に入力される前記第2駆動信号の入力期間の長さが、前記第2正規発光素子に入力されるべき前記第2駆動信号の入力期間の長さ以下である、請求項12または13に記載の発光装置。 The length of the input period of the first driving signal input to the preliminary light-emitting element is equal to or shorter than the length of the input period of the first driving signal to be input to the first regular light-emitting element;
14. The light emitting device according to claim 12, wherein a length of an input period of the second driving signal input to the preliminary light emitting element is equal to or shorter than a length of an input period of the second driving signal to be input to the second regular light emitting element.
前記第1正規発光素子と前記第2正規発光素子と前記予備発光素子とを含む発光素子グループが、マトリックス状に配列されている、表示装置。 A light emitting device according to any one of claims 1 to 14,
a light emitting element group including the first regular light emitting element, the second regular light emitting element, and the auxiliary light emitting element, the light emitting element group being arranged in a matrix.
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