WO2024209800A1 - Photodetection element and electronic device - Google Patents
Photodetection element and electronic device Download PDFInfo
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- WO2024209800A1 WO2024209800A1 PCT/JP2024/004991 JP2024004991W WO2024209800A1 WO 2024209800 A1 WO2024209800 A1 WO 2024209800A1 JP 2024004991 W JP2024004991 W JP 2024004991W WO 2024209800 A1 WO2024209800 A1 WO 2024209800A1
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- event signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/47—Image sensors with pixel address output; Event-driven image sensors; Selection of pixels to be read out based on image data
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/779—Circuitry for scanning or addressing the pixel array
Definitions
- This disclosure relates to a photodetector element and an electronic device.
- a photodetector has been developed that can detect an event signal in real time when the amount of light from a pixel exceeds a threshold. This type of photodetector that detects event signals is called an Event Vision Sensor (EVS).
- EVS Event Vision Sensor
- a detection cycle is repeatedly executed, which consists of a detection period for detecting an event signal, a read period for reading out the recorded event signal, and a reset period for resetting the threshold for detecting the event signal. It is desirable to shorten this detection cycle so that the photodetection element can operate at high speed.
- This technology was developed in consideration of these issues, and provides a photodetector element and electronic device that can shorten the detection period of an event signal.
- the photodetector element of one aspect of the present disclosure includes a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold, a first recording unit that is connected to the output terminal of the comparison unit and records the event signal and outputs the event signal, and a second recording unit that is connected to the first recording unit and records the event signal from the first recording unit and outputs the event signal.
- the first recording unit records the next event signal from the comparison unit.
- the light detection element further includes a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit, a control unit provided between the output terminal of the first recording unit and the first switching element, which controls the first switching element based on an event signal output from the first recording unit, and a first readout wiring connected to the output terminal of the second recording unit, and when the first switching element is in a conductive state, the second recording unit outputs an event signal to the first readout wiring.
- the light detection element further includes a third recording unit connected to the output terminal of the comparison unit and recording the event signal, and a fourth recording unit connected to the third recording unit and recording the event signal from the third recording unit.
- the third recording unit records the next event signal from the comparison unit.
- the light detection element further includes a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit, a control unit provided between the output terminals of the first and third recording units and the first switching element, and controlling the first switching element based on the event signals output from the first and third recording units, a first readout wiring connected to the output terminal of the second recording unit, and a second readout wiring connected to the output terminal of the fourth recording unit, and when the first switching element is in a conductive state, the event signal recorded in the second recording unit is read out to the first readout wiring, and the event signal recorded in the fourth recording unit is read out to the second readout wiring.
- the comparison unit compares the amount of change with a first threshold during a first period and outputs a first event signal, and compares the amount of change with a second threshold different from the first threshold during a second period following the first period and outputs a second event signal, the first recording unit records the first event signal during the first period, the third recording unit records the second event signal during the second period, and when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, and the fourth recording unit records the second event signal from the third recording unit and outputs the second event signal to the second readout wiring.
- the control unit resets the voltages of the input terminal and output terminal of the comparison unit to a voltage between the first threshold value and the second threshold value by turning on the first switching element.
- the control unit controls the first switching element based on the event signals recorded in the first and third recording units.
- the light detection element further includes an inverter connected to one of the output terminals of the first and second recording units, and a first logic gate that outputs the logical product of the other output signal of the first and second recording units and the output signal of the inverter to the first readout wiring.
- the light detection element further includes an inverter connected to one of the output terminals of the first and second recording units, a first logic gate that outputs a logical product of the other output signal of the first and second recording units and the output signal of the inverter to a first readout wiring, an inverter connected to one of the output terminals of the third and fourth recording units, and a second logic gate that outputs a logical product of the other output signal of the third and fourth recording units and the output signal of the inverter to a second readout wiring.
- the light detection element further includes a third logic gate that outputs the logical product of the output signals of the first and second recording units to the control unit, and the control unit controls the first switching element based on the output signal of the third logic gate.
- the light detection element further includes a third logic gate that outputs the logical product of the output signals of the first and second recording units to the control unit, and a fourth logic gate that outputs the logical product of the output signals of the third and fourth recording units to the control unit, and the control unit controls the first switching element based on the output signals of the third and fourth logic gates.
- the comparison unit compares the amount of change with a first threshold during a first period and outputs a first event signal, and compares the amount of change with a second threshold different from the first threshold during a second period following the first period and outputs a second event signal, the first recording unit alternately records the first event signal and the second event signal, and when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, or records the second event signal from the first recording unit and outputs the second event signal to the first readout wiring.
- the light detection element further includes a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit, a control unit provided between the output terminals of the first and third recording units and the first switching element, which controls the first switching element based on the event signals output from the first and third recording units, a first switch circuit connected to the output terminals of the second and fourth recording units, and a first readout wiring connected to the output terminal of the first switch circuit, and the first switch circuit selectively connects the output terminal of either the second or fourth recording unit to the first readout wiring.
- the light detection element further includes a plurality of light receiving sections, a plurality of comparison sections provided corresponding to the plurality of light receiving sections, a first recording section, a plurality of second recording sections provided corresponding to the plurality of first recording sections, a buffer provided between the plurality of comparison sections and the plurality of first recording sections, a second switch circuit provided between an input terminal of the buffer and the plurality of comparison sections, which connects a selective comparison section selected from the plurality of comparison sections to an input terminal of the buffer, and a third switch circuit provided between an output terminal of the buffer and the plurality of first recording sections, which connects a selective first recording section selected from the plurality of first recording sections to an output terminal of the buffer.
- the photodetector element of another aspect of the present disclosure includes a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that compares the amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal, and first and second recording units connected in parallel to the output terminal of the comparison unit, and when one of the first and second recording units is recording an event signal, the other of the first and second recording units outputs the event signal.
- the light detection element further includes a second switching element connected between the output terminal of the comparison unit and the first recording unit, a third switching element connected between the output terminal of the comparison unit and the second recording unit, a fourth switching element connected between the first recording unit and the first readout wiring, a fifth switching element connected between the second recording unit and the first readout wiring, a sixth switching element connected between the first recording unit and the control unit, and a seventh switching element connected between the second recording unit and the control unit, and when the first recording unit records an event signal and the second recording unit outputs an event signal, the second, fifth, and sixth switching elements are in a conductive state and the third, fourth, and seventh switching elements are in a non-conductive state, and when the second recording unit records an event signal and the first recording unit outputs an event signal, the third, fourth, and seventh switching elements are in a conductive state and the second, fifth, and sixth switching elements are in a non-conductive state.
- the photodetector element includes a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold, a first recording unit that is connected to the output terminal of the comparison unit and records the event signal and outputs the event signal, and a second recording unit that is connected to the first recording unit and records the event signal from the first recording unit and outputs the event signal.
- An electronic device has a light-receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that compares the amount of change in the electrical signal generated by the light-receiving unit with a threshold value to output an event signal, and first and second recording units connected in parallel to the output terminal of the comparison unit, and has a light detection element in which, when one of the first and second recording units is recording an event signal, the other of the first and second recording units outputs the event signal.
- FIG. 2 is a block diagram showing a configuration example of a light detection element according to the first embodiment.
- 1 is a diagram showing an example of a layered structure of a solid-state imaging element according to a first embodiment.
- FIG. 1 is a plan view of a light-receiving chip.
- FIG. 2 is an example of a plan view of a pixel array portion.
- FIG. 2 is a plan view of an example of a detection chip.
- FIG. 4 is a plan view of a detection unit.
- FIG. 2 is a block diagram showing an example of the configuration of an event detection circuit.
- FIG. 4 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit.
- FIG. 5 is a timing chart showing an example of the operation of the photodetector according to the first embodiment.
- FIG. 11 is a timing chart showing an example of the operation of the photodetector element according to the second embodiment.
- FIG. 13 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit according to a third embodiment.
- FIG. 11 is a timing chart showing an example of the operation of the photodetector element according to the third embodiment.
- FIG. 11 is a timing chart showing an example of the operation of the photodetector element according to the third embodiment.
- FIG. 13 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit according to a fourth embodiment.
- FIG. 13 is a timing chart showing an example of the operation of the photodetector according to the fourth embodiment.
- FIG. 13 is a timing chart showing an example of the operation of the photodetector according to the fourth embodiment.
- FIG. 13 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit according to a fifth embodiment.
- FIG. 13 is a timing chart showing an example of the operation of the photodetector element according to the fifth embodiment.
- FIG. 13 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit according to a sixth embodiment.
- FIG. 13 is a timing chart showing an example of the operation of the photodetector according to the sixth embodiment.
- FIG. 13 is a timing chart showing an example of the operation of the photodetector according to the sixth embodiment.
- FIG. 23 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit according to a seventh embodiment.
- FIG. 23 is a circuit diagram showing an example of the configuration of an event detection circuit, a recording area, and a control unit according to the eighth embodiment.
- FIG. 23 is a timing chart showing an example of the operation of the photodetector according to the eighth embodiment.
- FIG. 1 is a block diagram showing an example of a schematic configuration of a vehicle control system.
- FIG. 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit.
- First Embodiment 1 is a block diagram showing an example of a configuration of a light detection element 1 according to the first embodiment.
- the light detection element 1 is, for example, an EVS or a DVS (Dynamic Vision Sensor).
- the light detection element 1 includes an imaging lens 10, a solid-state imaging element 20, a recording area 30, and a control unit 40.
- Assumed examples of the light detection element 1 include electronic devices such as a camera mounted on an industrial robot, an in-vehicle camera, and a surveillance camera.
- the imaging lens 10 collects the incident light and guides it to the solid-state imaging element 20.
- the solid-state imaging element 20 photoelectrically converts the incident light to generate a voltage signal according to the amount of light received, and detects the change in the amount of light received as an event signal based on the amount of change in the voltage signal.
- the detected event signal is output to the recording area 30.
- the recording area 30 records the event signal from the solid-state imaging element 20.
- the recording area 30 may be, for example, a latch circuit, a DRAM (Dynamic Random Access Memory), a flash memory, or other semiconductor memory.
- DRAM Dynamic Random Access Memory
- flash memory or other semiconductor memory.
- the internal structure of the recording area 30 will be described in more detail later.
- the control unit 40 is configured with a microcomputer equipped with, for example, a CPU (Central Processing Unit), ROM (Read Only Memory), RAM, etc., and the CPU controls the operation of the light detection element 1 by executing processing according to a program.
- the control unit 40 controls the solid-state imaging element 20 to perform the above-mentioned event signal detection operation, controls the recording area 30 to record the event signal, and executes processing to read the event signal from the recording area 30.
- FIG. 2 is a diagram showing an example of a stacked structure of the solid-state imaging element 20 according to the first embodiment.
- the solid-state imaging element 20 includes a detection chip 202 and a light-receiving chip 201 stacked on the detection chip 202.
- the light-receiving chip 201 and the detection chip 202 are electrically connected through a connection such as a via. Note that in addition to vias, they can also be connected by Cu-Cu bonding or bumps.
- FIG. 3 is an example of a plan view of the light-receiving chip 201.
- the light-receiving chip 201 is provided with a pixel array section 220 and via arrangement sections 211, 212, and 213. Vias that are connected to the detection chip 202 are arranged in the via arrangement sections 211, 212, and 213.
- FIG. 4 is an example of a plan view of the pixel array section 220.
- a plurality of light receiving sections 221 are arranged in a two-dimensional lattice.
- the light receiving sections 221 are, for example, photodiodes.
- the light receiving sections 221 perform photoelectric conversion of incident light to generate a photocurrent.
- Each of the light receiving sections 221 is assigned a pixel address consisting of a row address and a column address.
- FIG. 5 is an example of a plan view of the detection chip 202.
- the detection chip 202 is provided with via arrangement sections 231, 232, and 233, a signal processing circuit 240, a row driving circuit 251, a column driving circuit 252, and a detection section 260. Vias that are connected to the light receiving chip 201 are arranged in the via arrangement sections 231, 232, and 233.
- the row drive circuit 251 selects a row address of the pixel array section 220 and outputs a photocurrent corresponding to the row address to the detection section 260.
- the column drive circuit 252 selects a column address of the pixel array section 220 and outputs a photocurrent corresponding to the column address to the detection section 260.
- the detection unit 260 detects an event signal by quantizing a voltage signal obtained by logarithmically converting the input photocurrent, and outputs the detected event signal to the signal processing circuit 240.
- An event indicates that the amount of change in the voltage signal obtained by logarithmically converting the photocurrent has exceeded or fallen below a predetermined threshold.
- the event signal is activated (e.g., raised) when an event occurs.
- the event signal is a signal that has been quantized (binarized) by the quantizer 330.
- the signal processing circuit 240 performs a predetermined signal processing on the event signal output from the detection unit 260, and outputs the signal to the recording area 30.
- FIG. 6 is an example of a plan view of the detection unit 260.
- a plurality of event detection circuits 300 are arranged in a two-dimensional grid.
- a pixel address is assigned to each event detection circuit 300, and each event detection circuit 300 is connected to a light receiving unit 221 with the same address.
- the event detection circuit 300 quantizes a voltage signal corresponding to the photocurrent from the corresponding light receiving unit 221, and outputs the quantized voltage signal as an event signal.
- FIG. 7 is a block diagram showing an example of the configuration of the event detection circuit 300.
- the event detection circuit 300 includes a logarithmic conversion circuit 310, a buffer 320, and a quantizer 330.
- the logarithmic conversion circuit 310 converts the photocurrent from the corresponding light receiving unit 221 into a logarithmically converted voltage signal.
- the logarithmic conversion circuit 310 supplies the converted voltage signal to the buffer 320.
- Buffer 320 corrects the voltage signal from logarithmic conversion circuit 310. Buffer 320 outputs the corrected voltage signal to quantizer 330.
- the quantizer 330 compares the amount of change in the input voltage signal with a predetermined threshold (comparison reference voltage) and detects an event signal indicating that the threshold has been exceeded or fallen below.
- the quantizer 330 quantizes the voltage signal after the drop into a digital signal and outputs it to the recording area 30 as an event signal.
- the control unit 40 controls the operation of the quantizer 330 and controls the reading of the detection signal recorded in the recording area 30.
- FIG. 8 is a circuit diagram showing an example of the configuration of the event detection circuit 300, the recording area 30, and the control unit 40.
- the logarithmic conversion circuit 310 includes N-type transistors 311 and 313 and a P-type transistor 312.
- MOS Metal-Oxide-Semiconductor
- the source of N-type transistor 311 is connected to the cathode of light receiving section 221, and the drain is connected to the power supply line.
- P-type transistor 312 and N-type transistor 313 are connected in series between the power supply line and ground.
- the connection point of P-type transistor 312 and N-type transistor 313 is connected to the gate of N-type transistor 311 and the input terminal of buffer 320.
- a predetermined bias voltage Vbias1 is applied to the gate of P-type transistor 312.
- N-type transistors 311 and 313 are connected to the power supply, and this type of circuit is called a source follower. These two source followers connected in a loop convert the photocurrent from the light receiving section 221 into a logarithmic voltage signal.
- P-type transistor 312 supplies a constant current to N-type transistor 313.
- the logarithmic conversion circuit 310 described above converts the light intensity received by the light receiving unit 221 into a logarithmic converted voltage signal.
- the ground of the light receiving chip 201 and the ground of the detection chip 202 are separated from each other to prevent interference.
- the light receiving chip 201 is provided with the light receiving unit 221 and the N-type transistors 311 and 313 of the event detection circuit 300, while the detection chip 202 is provided with the event detection circuit 300 other than the N-type transistors 311 and 313.
- Quantizer 330 includes capacitor 331, switching elements 332, 333, 334, and 335, and comparator 336. Each switching element is turned on in response to an operation control signal from control unit 40.
- Switching elements 332, 333, 334, and 335 are, for example, MOS transistors.
- One end of the capacitor 331 is connected to the output terminal of the buffer 320, and the other end is connected to the inverting input terminal of the comparator 336. Therefore, the voltage representing the amount of change in the voltage signal from the buffer 320 becomes the voltage signal input to the comparator 336. In other words, a voltage signal corresponding to the amount of change in luminance detected by photoelectric conversion is input to the inverting input terminal of the comparator 336.
- a comparison reference voltage (Von, Vreset, or Voff) is input to the non-inverting input terminal of the comparator 336 as a threshold voltage.
- Switching element 332 is connected between the output terminal and the inverting input terminal of comparator 336. Switching element 332 is turned on/off in response to an operation control signal from control unit 40. Control unit 40 performs a reset operation by turning on switching element 332 and switching element 334 based on an event signal from recording area 30.
- Switching elements 333, 334, and 335 conduct the three paths connected to the non-inverting input terminal of comparator 336 in response to operation control signals Son, Srs, and Soff from control unit 40. Either of switching elements 333, 334, and 335 corresponding to each operation control signal is made conductive by operation control signals (ON control signal Son, reset control signal Srs, OFF control signal Soff) from control unit 40. As a result, a comparison reference voltage (Von, Vreset, or Voff) corresponding to the operation control signal is selectively input to the non-inverting input terminal of comparator 336.
- operation control signals ON control signal Son, reset control signal Srs, OFF control signal Soff
- Comparator 336 compares the voltage signal input to the inverting input terminal with the comparison reference voltage input to the non-inverting input terminal, and outputs an event signal according to the detection result.
- the event signal is output from comparator 336 and recorded in recording area 30.
- the control unit 40 controls the operation of the event detection circuit 300 in a time-division manner using the ON control signal Son, the reset control signal Srs, and the OFF control signal Soff.
- the control unit 40 turns on the switching element 333 using the ON control signal Son. This causes the positive comparison reference voltage Von to be input to the non-inverting input terminal of the comparator 336.
- the comparator 336 compares the amount of change in the input voltage signal with the comparison reference voltage Von, and outputs an ON event signal when the voltage signal exceeds the comparison reference voltage Von as a threshold value.
- the ON event signal output from the comparator 336 is recorded in the recording area 30.
- the control unit 40 also executes a process to read the recorded on-event signal from the recording area 30.
- the control unit 40 turns on the switching element 335 using the OFF control signal Soff. This causes the negative comparison reference voltage Voff to be input to the non-inverting input terminal of the comparator 336.
- the comparator 336 compares the amount of change in the input voltage signal with the comparison reference voltage Voff, and outputs an off event signal when the voltage signal falls below the comparison reference voltage Voff, which serves as a threshold value.
- the off event signal output from the comparator 336 is recorded in the recording area 30.
- the control unit 40 also executes a process to read the recorded off-event signal from the recording area 30.
- the control unit 40 turns on the switching elements 332 and 334 using the reset control signal Srs. This resets the comparison reference voltage that has fluctuated in the event detection circuit 300 due to the ON control signal Son and the OFF control signal Soff to Vreset.
- the recording area 30 includes recording units 31a, 32a, 31b, and 32b.
- Each of the recording units 31a, 32a, 31b, and 32b is, for example, a latch circuit that records (holds) an event signal from the comparator 336 and outputs the recorded event signal.
- the recording units 31a, 32a, 31b, and 32b may be a latch circuit or a semiconductor memory such as an SRAM, a DRAM, or a flash memory.
- the recording unit 31a is connected between the output terminal of the comparator 336 and the recording unit 32a.
- the recording unit 31a receives the on-event signal Eon output from the comparator 336 and records the on-event signal Eon.
- the recording unit 31a also outputs the on-event signal Eon that it holds to the recording unit 32a.
- the recording unit 32a is connected between the output terminal of the recording unit 31a and the readout wiring VSLa.
- the recording unit 32a receives the on-event signal Eon output from the recording unit 31a and records the on-event signal Eon.
- the recording unit 32a also outputs the on-event signal Eon that it holds to the readout wiring VSLa.
- the multiple recording units 31a, 32a are connected in series between the output terminal of the comparator 336 and the readout wiring VSLa.
- the recording units 31a, 32a are provided to read out the on-event signal Eon to the readout wiring VSLa.
- the recording unit 31b is connected between the output terminal of the comparator 336 and the recording unit 32b.
- the recording unit 31b receives the off-event signal Eoff output from the comparator 336 and records the off-event signal Eoff.
- the recording unit 31b also outputs the held off-event signal Eoff to the recording unit 32b.
- the recording unit 32b is connected between the output terminal of the recording unit 31b and the readout wiring VSLb.
- the recording unit 32b receives the off-event signal Eoff output from the recording unit 31b and records the off-event signal Eoff.
- the recording unit 32b also outputs the held off-event signal Eoff to the readout wiring VSLb.
- the multiple recording units 31b, 32b are connected in series between the output terminal of the comparator 336 and the readout wiring VSLb.
- the recording units 31b, 32b are provided to read out the off-event signal Eoff to the readout wiring VSLb.
- the control unit 40 is connected between the output terminals of the recording units 31a and 31b and the switching element 332.
- the control unit 40 receives the event signals Eon and Eoff stored and output in the recording units 31a and 31b, and controls the switching element 332 to turn on and off according to the logic of the event signals Eon and Eoff.
- the control unit 40 also reads out the event signals Eon and Eoff from the recording units 32a and 32b to the read wiring VSLa and VSLb.
- the readout wirings VSLa and VSLb are connected to the output terminals of the recording units 32a and 32b, respectively.
- the readout wirings VSLa and VSLb transmit the event signals Eon and Eoff read out from the recording units 32a and 32b, respectively, to the signal processing circuit 240 in FIG. 5.
- FIG. 9 is a timing diagram showing an example of the operation of the photodetector 1 according to the first embodiment.
- an event signal detection operation and a reset operation are performed.
- the control unit 40 performs a detection operation of an on-event signal Eon with a comparison reference voltage of Von, and a detection operation of an off-event signal Eoff with a comparison reference voltage of Voff.
- the control unit 40 turns on the switching elements 332 and 334 to return the comparison reference voltage to Vreset and equalize the potentials of the inverting input terminal and output terminal of the comparator 336.
- an operation for detecting the on-event signal Eon is performed.
- the control unit 40 turns on the switching element 333 in FIG. 8 and inputs the comparison reference voltage Von as a threshold value to the non-inverting input terminal of the comparator 336.
- the comparator 336 compares the voltage signal input to the inverting input terminal with the comparison reference voltage Von.
- the comparator 336 raises (activates) the on-event signal Eon to a high-level voltage. If the voltage signal does not exceed the comparison reference voltage Von, the comparator 336 maintains (does not activate) the on-event signal Eon at a low-level voltage. This on-event signal Eon is recorded in the recording unit 31a. The on-event signal recorded at this time is referred to as Eon_1.
- an operation to detect the off-event signal Eoff is performed.
- the control unit 40 turns on the switching element 335 in FIG. 8 and inputs the comparison reference voltage Voff as a threshold value to the non-inverting input terminal of the comparator 336.
- the comparator 336 compares the voltage signal input to the inverting input terminal with the comparison reference voltage Voff.
- the comparator 336 raises (activates) the off-event signal Eoff to a high-level voltage. If the voltage signal is not below the comparison reference voltage Voff, the comparator 336 maintains (does not activate) the off-event signal Eoff at a low-level voltage. This off-event signal Eoff is recorded in the recording unit 31b. The off-event signal recorded at this time is designated as Eoff_1.
- a reset operation is performed.
- the control unit 40 turns on the switching elements 332 and 334 in FIG. 8 or maintains them off based on the logic of the on-event signal Eon_1 and the off-event signal Eoff_1 recorded in the recording units 31a and 31b. For example, when either the on-event signal Eon_1 or the off-event signal Eoff_1 is activated and rises to a high-level voltage, the control unit 40 turns on the switching elements 332 and 334 of that pixel.
- the comparison reference voltage Vreset is input to the non-inverting input terminal of the comparator 336, and the inverting input terminal and output terminal of the comparator 336 are short-circuited via the switching element 332.
- the inverting input terminal and output terminal of the comparator 336 are reset to the comparison reference voltage Vreset.
- the comparison reference voltage Vreset is a voltage between the comparison reference voltage Von and the comparison reference voltage Voff, and is preferably an intermediate voltage between them.
- the control unit 40 maintains the switching elements 332 and 334 of that pixel in the off state.
- the on-event signal Eon_1 recorded in the recording unit 31a is transferred to the recording unit 32a and recorded in the recording unit 32a.
- the recording unit 32a records the on-event signal Eon_1 from the recording unit 31a.
- the off-event signal Eoff_1 recorded in the recording unit 31b is transferred to the recording unit 32b and recorded in the recording unit 32b.
- the recording unit 32b records the off-event signal Eoff_1 from the recording unit 31b.
- the recording unit 32a starts outputting the on-event signal Eon_1 to the readout wiring VSLa.
- the recording unit 32b starts outputting the off-event signal Eoff_1 to the readout wiring VSLb. That is, during the reset operation, the on-event signal Eon_1 is temporarily transferred from the recording unit 31a to the recording unit 32a, and is sequentially read out from the recording unit 32a to the readout wiring VSLa.
- the off-event signal Eoff_1 is temporarily transferred from the recording unit 31b to the recording unit 32b, and is sequentially read out from the recording unit 32b to the readout wiring VSLb.
- the on-event signal Eon_1 and the off-event signal Eoff_1 are read out, for example, in the order of row addresses ADD0 to ADDn (n is a positive integer).
- the read-out on-event signal Eon_1 and off-event signal Eoff_1 are transmitted to the signal processing circuit 240 via the read-out wiring VSLa and VSLb.
- the control unit 40 increases the comparison reference voltage Von by a predetermined value for the next frame. If the voltage signal does not exceed the comparison reference voltage Von, the control unit 40 does not change the comparison reference voltage Von. If the voltage signal is below the comparison reference voltage Voff, during the reset period, the control unit 40 decreases the comparison reference voltage Voff by a predetermined value for the next frame. If the voltage signal is not below the comparison reference voltage Voff, the control unit 40 does not change the comparison reference voltage Voff.
- the next frame begins. From t4 to t5, the detection operation of the on-event signal Eon is performed in the same manner as from t1 to t2, and from t5 to t6, the detection operation of the off-event signal Eoff is performed in the same manner as from t2 to t3.
- the recording unit 31a records the on-event signal Eon_2, and the recording unit 31b records the off-event signal Eoff_2.
- the on-event signal Eon_1 and the off-event signal Eoff_1 are being read out from the recording units 32a and 32b to the readout wirings VSLa and VSLb, respectively.
- the on-event signal Eon_1 is recorded and held in the recording unit 32a
- the off-event signal Eoff_1 is recorded and held in the recording unit 32b. Therefore, even if the recording unit 31a is updated with the on-event signal Eon_2 and the recording unit 31b is updated with the off-event signal Eoff_2, there is no problem with the read operation of the on-event signal Eon_1 and the off-event signal Eoff_1.
- the photodetector element 1 not only has recording units 31a and 31b, but also has recording units 32a and 32b provided after recording units 31a and 31b in correspondence with recording units 31a and 31b, respectively. Therefore, the event signals Eon_1 and Eoff_1 recorded in recording units 31a and 31b can be transferred in advance to recording units 32a and 32b, and the reset operation and the next frame can be performed while reading out the event signals Eon_1 and Eoff_1 from recording units 32a and 32b. This allows the reset operation to be performed even while the event signals Eon_1 and Eoff_1 are being read, and the next event signals Eon_2 and Eoff_2 can be recorded in the recording units 31a and 31b, respectively.
- the reset operation is performed in the same manner as the operation from t3 to t4.
- the event signals Eon_2 and Eoff_2 are read out from the recording units 32a and 32b to the read lines VSLa and VSLb, respectively.
- the photodetector element 1 is provided with a plurality of 31a, 32a for recording the on-event signal Eon, and a plurality of 31b, 32b for recording the off-event signal Eoff.
- This allows the event signals Eon, Eoff recorded in the recording units 31a, 31b to be transferred in advance to the recording units 32a, 32b, and the reset operation and the next frame can be executed while the event signals Eon, Eoff are read from the recording units 32a, 32b.
- This allows the event signals Eon, Eoff to be read even during the reset operation.
- the next event signal can be recorded in the recording units 31a, 31b.
- the frame can be shortened, and the detection period of the event signal can be shortened.
- Second Embodiment 10 is a timing chart showing an example of the operation of the photodetector 1 according to the second embodiment.
- the configuration of the photodetector 1 according to the second embodiment may be the same as that of the first embodiment.
- the second embodiment differs from the first embodiment in that the transfer operations of the event signals Eon and Eoff from the recording units 31a and 31b to the recording units 32a and 32b are started from the next frame.
- the operation from t1 to t3 is the same as the operation from t1 to t3 in FIG. 9. This executes the detection operation of the on-event signal Eon and the off-event signal Eoff.
- the on-event signal Eon_1 is recorded in the recording unit 31a.
- the off-event signal Eoff_1 is recorded in the recording unit 31b.
- the reset operation from t3 to t4 is the same as the reset operation from t3 to t4 in FIG. 9.
- the on-event signal Eon_1 recorded in recording unit 31a has not yet been transferred to recording unit 32a.
- the off-event signal Eoff_1 recorded in recording unit 31b has not yet been transferred to recording unit 32b. Therefore, during the reset operation, the read operation of the on-event signal Eon_1 and the off-event signal Eoff_1 has not yet started.
- the next frame is executed from t4 to t7.
- the on-event signal Eon_1 recorded in the recording unit 31a is transferred to the recording unit 32a
- the off-event signal Eoff_1 recorded in the recording unit 31b is transferred to the recording unit 32b.
- the recording unit 32a also starts outputting the on-event signal Eon_1 to the readout wiring VSLa.
- the recording unit 32b starts outputting the off-event signal Eoff_1 to the readout wiring VSLb. That is, in the next frame, the on-event signal Eon_1 is temporarily transferred from the recording unit 31a to the recording unit 32a, and is sequentially read out from the recording unit 32a to the readout wiring VSLa. In the next frame, the off-event signal Eoff_1 is temporarily transferred from the recording unit 31b to the recording unit 32b, and is sequentially read out from the recording unit 32b to the readout wiring VSLb.
- the recording unit 31a records the on-event signal Eon_2, and the recording unit 31b records the off-event signal Eoff_2.
- the on-event signal Eon_1 and the off-event signal Eoff_1 are being read out from the recording units 32a and 32b to the readout wirings VSLa and VSLb, respectively.
- the on-event signal Eon_1 is recorded and held in the recording unit 32a
- the off-event signal Eoff_1 is recorded and held in the recording unit 32b. Therefore, even if the recording unit 31a is updated with the on-event signal Eon_2 and the recording unit 31b is updated with the off-event signal Eoff_2, there is no problem with the read operation of the on-event signal Eon_1 and the off-event signal Eoff_1.
- the read operation of the event signals Eon_1 and Eoff_1 must be completed before the detection operation of the next frame starts. This is because the read operation of the event signals Eon_2 and Eoff_2 starts during the detection operation of the next frame.
- the detection operation is performed in the same manner as the operation from t4 to t6.
- the event signals Eon_2 and Eoff_2 are read out from the recording units 32a and 32b to the read lines VSLa and VSLb, respectively.
- the event signals Eon and Eoff recorded in the recording units 31a and 31b can be transferred to the recording units 32a and 32b in advance, and the next frame can be executed while the event signals Eon and Eoff are read from the recording units 32a and 32b. This makes it possible to shorten the frame and the detection period of the event signal.
- Third Embodiment 11 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the third embodiment.
- the recording area 30 of the third embodiment includes inverters INV1a and INVb, and logic gates G1a and G1b.
- the inverter INV1a is connected between the output terminal of the recording unit 32a and the logic gate G1a.
- the inverter INV1a outputs an inverted signal of the output signal of the recording unit 32a to the logic gate G1a.
- the two input terminals of the logic gate G1a are connected to the output terminal of the inverter INV1a and the output terminal of the recording unit 31a, respectively.
- the output terminal of the logic gate G1a is connected to the read wiring VSLa.
- the logic gate G1a outputs the logical product of the output signal of the recording unit 31a and the output signal of the inverter INV1a to the read wiring VSL1a.
- Inverter INV1b is connected between the output terminal of recording unit 32b and logic gate G1b. Inverter INV1b outputs an inverted signal of the output signal of recording unit 32b to logic gate G1b.
- the two input terminals of the logic gate G1b are connected to the output terminal of the inverter INV1b and the output terminal of the recording unit 31b, respectively.
- the output terminal of the logic gate G1b is connected to the read wiring VSLb.
- the logic gate G1b outputs the logical product of the output signal of the recording unit 31b and the output signal of the inverter INV1b to the read wiring VSL1b.
- the other configurations of the third embodiment may be similar to the corresponding configurations of the first embodiment.
- the inverters INV1a and INV1b are connected to the output terminals of the recording units 32a and 32b.
- the inverters INV1a and INV1b may be connected to the output terminals of the recording units 31a and 31b, respectively, instead of the output terminals of the recording units 32a and 32b.
- the logic gate G1a outputs the logical product of the inverted signal of the output signal of the recording unit 31a and the output signal of the recording unit 32a to the read wiring VSL1a.
- the logic gate G1b outputs the logical product of the inverted signal of the output signal of the recording unit 31b and the output signal of the recording unit 32b to the read wiring VSL1b.
- FIGS. 12 and 13 are timing diagrams showing an example of the operation of the photodetector 1 according to the third embodiment.
- the detection operation, reset operation, and read operation of the photodetector 1 according to the third embodiment may be basically the same as the respective operations shown in FIG. 10. However, in the third embodiment, the detection operation, reset operation, and read operation are each performed within one frame, and the read operation does not overlap with the detection operation or reset operation.
- the read signals read out to the read lines VSLa and VSLb are the output signals of the logic gates G1a and G1b, respectively. Therefore, the read signal read out to the read line VSLa is the result of a logical operation between the output signals of the recording units 1a and 2a, and the read signal read out to the read line VSLb is the result of a logical operation between the output signals of the recording units 1b and 2b.
- the output voltage of the logarithmic conversion circuit 310 may change gradually and significantly over multiple frames f1 to f6.
- multiple event signals may be detected for one event.
- Such multiple event signals detected for one event are called tail events.
- the light detection element 1 according to the third embodiment has logic gates G1a and G1b in the recording area 30.
- the recording units 31a, 32a, 31b, and 32b record a logic "0," and when the on-event signal or off-event signal rises, the recording units 31a, 32a, 31b, and 32b record a logic "1.”
- the output of the light receiving unit 221 rises and the output of the logarithmic conversion circuit 310 gradually increases.
- the comparison reference voltage Von is updated to a higher threshold voltage than the comparison reference voltage in frame f1.
- the on-event signal "1" of recording unit 31a is transferred to recording unit 32a, which records "1".
- the output (on-event signal) of comparator 336 rises, and recording unit 31a records "1" as shown in FIG. 13. Therefore, both recording units 31a and 32a output "1", and logic gate G1a outputs "0".
- Frames f3 to f6 repeat the same operation as frame f2. Therefore, in frames f3 to f6, logic gate G1a outputs "0." At this time, the comparison reference voltage Von is updated to a threshold voltage higher than the comparison reference voltage in the previous frame.
- the comparison reference voltage Von no longer exceeds the comparison reference voltage. Therefore, as shown in FIG. 13, the recording unit 32a records "0". Therefore, the recording units 31a and 32a output "0" and “1", respectively, and the logic gate G1a outputs "0". Thereafter, as long as the signal voltage does not exceed the comparison reference voltage Von, the logic gate G1a outputs "0".
- logic gate G1a outputs "1", “0”, “0”, “0”, “0”, “0”, “0”, “0”, “0”, “0”... respectively.
- the photodetector element 1 can detect an event as a single event signal even if the event includes a tail event that spans multiple frames, as long as the voltage signal continuously exceeds the updated comparison reference voltage Von.
- the comparison reference voltage Voff is updated to a threshold voltage lower than the comparison reference voltage in the previous frame.
- the off event signal "1" of recording unit 31b is transferred to recording unit 32b, which records "1".
- the output (off event signal) of comparator 336 rises, and recording unit 31b records "1". Therefore, recording units 31b and 32b both output "1", and logic gate G1b outputs "0".
- the logic gate G1b In the subsequent frames, as long as the voltage signal continues to fall below the updated comparison reference voltage Voff, the logic gate G1b outputs "0." At this time, the comparison reference voltage Voff has been updated to a threshold voltage lower than the comparison reference voltage in the previous frame.
- the recording unit 32b When the signal voltage does not fall below the comparison reference voltage Voff, the recording unit 32b records "0". Therefore, the recording units 31a and 32a output "0" and "1", respectively, and the logic gate G1a outputs "0". Thereafter, as long as the signal voltage does not fall below the comparison reference voltage Voff, the logic gate G1b outputs "0".
- a single event includes a tail event that spans multiple frames, it can be detected as a single event signal.
- Fourth Embodiment 14 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the fourth embodiment.
- the recording area 30 of the fourth embodiment includes logic gates G2a and G2b.
- logic gate G2a The two input terminals of logic gate G2a are connected to the output terminal of recording unit 31a and the output terminal of recording unit 32a, respectively.
- the output terminal of logic gate G2a is connected to read wiring VSLa.
- Logic gate G2a outputs the logical product of the output signal of recording unit 31a and the output signal of recording unit 32a to read wiring VSL1a and control unit 40.
- logic gate G2b The two input terminals of logic gate G2b are connected to the output terminal of recording unit 31b and the output terminal of recording unit 32b, respectively.
- the output terminal of logic gate G2b is connected to read wiring VSLb.
- Logic gate G2b outputs the logical product of the output signal of recording unit 31b and the output signal of recording unit 32b to read wiring VSL1b and control unit 40.
- the output terminals of the logic gates G2a and G2b are connected to the control unit 40.
- the control unit 40 controls the switching element 332 based on the output signals of the logic gates G2a and G2b.
- the control unit 40 executes a reset operation when the on-event signal rises two consecutive times.
- the control unit 40 executes a reset operation when the off-event signal rises two consecutive times.
- the other configurations of the fourth embodiment may be similar to the corresponding configurations of the first embodiment.
- FIGS. 15 and 16 are timing diagrams showing an example of the operation of the photodetector 1 according to the fourth embodiment.
- the detection operation, reset operation, and read operation of the photodetector 1 according to the fourth embodiment may basically be the same as the respective operations shown in FIG. 10. However, in the fourth embodiment, the detection operation, reset operation, and read operation are each performed within one frame, and the read operation does not overlap with the detection operation or reset operation.
- the signal output to the control unit 40 is the output signal of logic gates G2a and G2b. Therefore, the control unit 40 executes a reset operation using the logical product of the output signals of recording unit 1a and recording unit 2a or the logical product of the output signals of recording unit 1b and recording unit 2b as a reset signal. In other words, when events occur consecutively, the control unit 40 executes a reset operation.
- the recording units 31a, 32a, 31b, and 32b record a logic "0," and when the on-event signal or off-event signal rises consecutively, the recording units 31a, 32a, 31b, and 32b record a logic "1.”
- the comparison reference voltage Von is higher than the output voltage V310 by the threshold voltage when there is no event.
- the output voltage V310 may momentarily exceed the comparison reference voltage Von.
- the recording unit 31a since the output voltage V310 exceeds the comparison reference voltage Von, the recording unit 31a records "1".
- the output voltage V310 does not exceed the comparison reference voltage Von. Therefore, although the "1" of the recording unit 31a is transferred to the recording unit 32a, a "0" is recorded in the recording unit 31a. Since both recording units 31a and 32a are not "1", the logic gate G2a maintains "0". In this case, the control unit 40 does not execute a reset operation during the reset period. In this way, even if the output voltage V310 exceeds the comparison reference voltage Von in only one frame, the control unit 40 does not execute a reset operation during the reset period.
- the photodetector element 1 includes logic gates G2a and G2b, which output the logical product of the output signals of the recording units 31a and 32a, or the logical product of the output signals of the recording units 31b and 32b.
- the logic gates G2a and G2b raise their output signals, and the control unit 40 can perform a reset operation.
- the photodetector element 1 is able to suppress erroneous determination of noise as an event and reliably detect events.
- the recording area 30 of the fifth embodiment includes two recording units 31a and 32a connected in series between the output terminal of the comparator 336 and the readout wiring VSLa. However, the recording units 31b and 32b and the readout wiring VSLb are omitted.
- the recording units 31a and 32a alternately record the on-event signal Eon and the off-event signal Eoff.
- the recording units 31a and 32a also alternately read out the on-event signal Eon and the off-event signal Eoff via the readout wiring VSLa. Therefore, the readout operation for each pixel is performed twice for each frame.
- FIG. 18 is a timing diagram showing an example of the operation of the photodetector 1 according to the fifth embodiment.
- the detection operation and reset operation are basically the same as those in the first embodiment.
- the recording units 31a and 32a alternately detect the on-event signal Eon and the off-event signal Eoff.
- the control unit 40 turns on the switching element 333.
- the event detection circuit 300 detects the on-event signal Eon using the comparison reference voltage Von, and the recording unit 31a records the on-event signal Eon.
- the on-event signal Eon of the recording unit 31a is transferred to the recording unit 32a.
- the on-event signal Eon of the recording unit 32a is read out to the read wiring VSLa.
- the control unit 40 turns on the switching element 335.
- the event detection circuit 300 detects the off event signal Eoff using the comparison reference voltage Voff, and the recording units 31a and 32a record the off event signal Eoff.
- the off event signal Eoff of the recording unit 31a is transferred to the recording unit 32a.
- the off event signal Eoff of the recording unit 32a is read out to the read wiring VSLa.
- the recording units 31a and 32a alternately record and alternately read out the on-event signal Eon and the off-event signal Eoff. That is, during the reset operation or the detection operation of the next frame, the recording unit 32a alternately records the event signal Eon or Eoff from the recording unit 31a, and alternately outputs this event signal Eon or Eoff to the readout wiring VSLa.
- the recording units 31b, 32b and the readout wiring VSLb are omitted, so that the circuit scale and layout area of the light detection element 1 are reduced. Furthermore, according to the fifth embodiment, the readout operation of the event signal Eon or Eoff can be executed in a redundant manner in the reset operation and the detection operation. Therefore, the fifth embodiment can obtain the same effect as the first embodiment.
- Sixth Embodiment 19 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the sixth embodiment.
- the recording area 30 of the sixth embodiment includes a multiplexer MUX1 connected between the output terminals of the recording units 32a and 32b and a readout wiring VSLa.
- the readout wiring VSLa is connected to the output terminal of the multiplexer MUX1.
- the readout wiring VSLb is omitted.
- the multiplexer MUX1 is composed of switching elements such as MOS transistors, and is configured to selectively connect one of the output terminals of the recording units 32a and 32b to the readout wiring VSLa.
- the control unit 40 controls the switching elements of the multiplexer MUX1.
- the multiplexer MUX1 alternately reads out the event signals Eon and Eoff recorded in the recording units 32a and 32b to the readout wiring VSLa. Therefore, the readout operation for each pixel is performed twice for each address per frame.
- FIG. 20 is a timing diagram showing an example of the operation of the photodetector 1 according to the sixth embodiment.
- the detection operation and reset operation are basically the same as those in the first embodiment.
- the multiplexer MUX1 alternately reads out the on-event signal Eon of the recording unit 32a and the off-event signal Eoff of the recording unit 32b to the readout wiring VSLa.
- the event detection circuit 300 executes the detection operation and the reset operation in the same manner as in the first embodiment.
- the recording units 31a and 31b record the detected event signals Eon_1 and Eoff_1, respectively, and transfer the event signals Eon_1 and Eoff_1 to the recording units 32a and 32b, respectively, at the start of the reset operation.
- the multiplexer MUX1 connects the output terminal of the recording unit 32a to the readout wiring VSLa, and reads out the on-event signal Eon_1 of the recording unit 32a to the readout wiring VSLa.
- the multiplexer MUX1 connects the output terminal of the recording unit 32b to the readout wiring VSLa, and reads out the off-event signal Eoff_1 of the recording unit 32b to the readout wiring VSLa.
- the read operation of the on-event signal Eon_1 is executed overlapping with the reset operation of frame f1, and the read operation of the off-event signal Eoff_1 is executed overlapping with the detection operation of frame f2.
- the recording units 31a and 31b record the detected on-event signals Eon_2 and Eoff_2, respectively, and transfer the on-event signals Eon_2 and Eoff_2 to the recording units 32a and 32b, respectively, at the start of the reset operation.
- the multiplexer MUX1 connects the output terminal of the recording unit 32a to the readout wiring VSLa, and reads out the on-event signal Eon_2 of the recording unit 32a to the readout wiring VSLa.
- the multiplexer MUX1 connects the output terminal of the recording unit 32b to the readout wiring VSLa, and reads out the off-event signal Eoff_2 of the recording unit 32b to the readout wiring VSLa.
- the read operation of the on-event signal Eon_2 is executed overlapping with the reset operation of frame f2, and the read operation of the off-event signal Eoff_2 is executed overlapping with the detection operation of frame f3.
- control unit 40 controls the multiplexer MUX1 to alternately read out the on-event signal Eon and the off-event signal Eoff.
- the sixth embodiment although a multiplexer MUX1 is added to each pixel, the readout wiring VSLb is omitted, so that the circuit scale and layout area of the photodetection element 1 can be reduced. Also, according to the sixth embodiment, the readout operation of the event signal Eon or Eoff can be executed in a redundant manner in the reset operation and the detection operation. Therefore, the sixth embodiment can obtain the same effect as the first embodiment.
- Seventh Embodiment 21 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the seventh embodiment.
- a buffer BUF1 and multiplexers MUX2 and MUX3 are provided in common between a plurality of event detection circuits 300 and a plurality of recording areas 30 of the seventh embodiment.
- the buffer BUF1 is provided between the output terminals of the comparators 336 of the multiple event detection circuits 300 and the multiple recording areas 30, and transfers the on-event signal Eon or the off-event signal Eoff from the event detection circuits 300 to the recording areas 30.
- the multiplexer MUX2 is provided between the input terminal of the buffer BUF1 and the output terminals of the multiple comparators 336, and connects the output terminal of a selection comparator 336 arbitrarily selected from the multiple comparators 336 to the input terminal of the buffer BUF1.
- the multiplexer MUX3 is provided between the output terminal of the buffer BUF1 and the input terminals of the multiple recording areas 30, and connects the input terminal of a selected recording area 30 arbitrarily selected from the multiple recording areas 30 to the output terminal of the buffer BUF1.
- each event detection circuit 300 and each recording area 30 may be the same as that of the first embodiment.
- the control unit 40 may be provided in common to multiple event detection circuits 300 and multiple recording areas 30, similar to the buffer BUF1.
- the control unit 40 controls the multiplexers MUX2, MUX3 and the buffer BUF1.
- the configuration of the recording area 30 may be any of the configurations in the first to sixth embodiments.
- the multiplexer MUX2 connects the selection comparator 336 to the buffer BUF1 and transfers the on-event signal Eon or the off-event signal Eoff from the selection comparator 336 to the buffer BUF1.
- Buffer BUF1 amplifies the on-event signal Eon or off-event signal Eoff from selection comparator 336 and transfers it to multiplexer MUX3.
- the multiplexer MUX3 connects the selected recording area 30 to the buffer BUF1 and transfers the on-event signal Eon or the off-event signal Eoff from the selection comparator 336 to the selected recording area 30. This allows the recording units 31a and 32a of the selected recording area 30 to record the on-event signal Eon, or the recording units 31b and 32b of the selected recording area 30 to record the off-event signal Eoff.
- the buffer BUF1 is required. If a buffer BUF1 is provided between each of a plurality of event detection circuits 300 and a plurality of recording areas 30, the circuit scale of the light detection element 1 will become large.
- one buffer BUF1 is provided in common for multiple event detection circuits 300 and multiple recording areas 30. This makes it possible to suppress an increase in the circuit size of the light detection element 1. Note that in FIG. 22, one buffer BUF1 is provided in common for two event detection circuits 300 and two recording areas 30. However, one buffer BUF1 may be provided in common for three or more event detection circuits 300 and three or more recording areas 30.
- Eighth embodiment 22 is a circuit diagram showing an example of the configuration of the event detection circuit 300, the recording area 30, and the control unit 40 according to the eighth embodiment.
- the recording units 31a and 32a are connected in parallel to the output terminal of the comparator 336.
- the recording units 31b and 32b are connected in parallel to the output terminal of the comparator 336.
- the recording units 31a and 32a When one of the recording units 31a and 32a is recording an on-event signal Eon, the other of the recording units 31a and 32a outputs the immediately preceding on-event signal Eon to the readout wiring VSLa.
- the recording units 31b and 32b When one of the recording units 31b and 32b is recording an off-event signal Eoff, the other of the recording units 31b and 32b outputs the immediately preceding off-event signal Eoff to the readout wiring VSLb.
- the recording units 31a and 32a are used by alternately switching between the recording operation and the readout operation of the on-event signal Eon over time.
- the recording units 31b and 32b are used by alternately switching between the recording operation and the readout operation of the off-event signal Eoff over time.
- the recording units 31a and 32a alternately record and output consecutive different on-event signals Eon.
- the recording units 31b and 32b alternately record and output consecutive different off-event signals Eoff.
- the recording area 30 is equipped with switching elements 301a to 306a and 301b to 306b.
- MOS transistors are used for the switching elements 301a to 306a and 301b to 306b.
- Switching element 301a is connected between the output terminal of comparator 336 and the input terminal of recording unit 31a.
- Switching element 302a is connected between the output terminal of comparator 336 and the input terminal of recording unit 32a.
- the switching element 303a is connected between the output terminal of the recording unit 31a and the readout wiring VSLa.
- the switching element 304a is connected between the output terminal of the recording unit 31a and the control unit 40.
- the switching element 305a is connected between the output terminal of the recording unit 32a and the readout wiring VSLa.
- the switching element 306a is connected between the output terminal of the recording unit 32a and the control unit 40.
- Switching element 301b is connected between the output terminal of comparator 336 and the input terminal of recording unit 31b.
- Switching element 302b is connected between the output terminal of comparator 336 and the input terminal of recording unit 32b.
- Switching element 303b is connected between the output terminal of recording unit 31b and the readout wiring VSLb.
- Switching element 304b is connected between the output terminal of recording unit 31b and the control unit 40.
- Switching element 305b is connected between the output terminal of recording unit 32b and the readout wiring VSLb.
- Switching element 306b is connected between the output terminal of recording unit 32b and the control unit 40.
- recording unit 31a records on-event signal Eon
- recording unit 32a outputs the immediately preceding on-event signal Eon to readout wiring VSLa.
- control unit 40 determines whether or not to perform a reset operation depending on the on-event signal Eon recorded in recording unit 31a.
- recording unit 32a records on-event signal Eon
- recording unit 31a outputs the immediately preceding on-event signal Eon to read wiring VSLa.
- control unit 40 determines whether or not to perform a reset operation depending on the on-event signal Eon recorded in recording unit 32a.
- recording unit 31b records off-event signal Eoff
- recording unit 32b reads out the immediately preceding off-event signal Eoff and outputs it to read wiring VSLb. Also, control unit 40 determines whether or not to perform a reset operation depending on the off-event signal Eoff recorded in recording unit 31b.
- recording unit 32b When switching elements 302b, 303b, and 306b are on and switching elements 301b, 304b, and 305b are off, recording unit 32b records off-event signal Eoff, and recording unit 31b reads out the immediately preceding off-event signal Eoff and outputs it to read wiring VSLb. Also, control unit 40 determines whether or not to perform a reset operation depending on the off-event signal Eoff recorded in recording unit 32b.
- FIG. 23 is a timing diagram showing an example of the operation of the photodetector 1 according to the eighth embodiment.
- the detection operation and reset operation are basically the same as those in the first embodiment.
- the switching elements 301a to 306a alternately switch the operation of the recording unit 31a and the operation of the recording unit 32a between the recording operation of the on-event signal Eon and the read operation of the on-event signal Eon.
- the switching elements 301b to 306b alternately switch the operation of the recording unit 31b and the operation of the recording unit 32b between the recording operation of the off-event signal Eoff and the read operation of the off-event signal Eoff.
- Signal ⁇ 1 is a control signal for switching elements 301a, 304a, and 305a, and switching elements 301b, 304b, and 305b.
- Signal ⁇ 2 is a control signal for switching elements 302a, 303a, and 306a, and switching elements 302b, 303b, and 306b.
- signal ⁇ 1 is activated and signal ⁇ 2 is in an inactive state. Therefore, switching elements 301a, 304a, and 305a are turned on, and switching elements 302a, 303a, and 306a are turned off.
- recording unit 31a to record on-event signal Eon_2.
- Recording unit 32a outputs on-event signal Eon_1, which was recorded immediately before on-event signal Eon_2, to read wiring VSLa.
- control unit 40 performs or does not perform a reset operation depending on on-event signal Eon_2 recorded in recording unit 31a.
- switching elements 301b, 304b, and 305b are turned on, and switching elements 302b, 303b, and 306b are turned off.
- recording unit 31b records off-event signal Eoff_2.
- Recording unit 32b reads out off-event signal Eoff_1 recorded immediately before off-event signal Eoff_2 and outputs it to read wiring VSLb.
- control unit 40 performs or does not perform a reset operation according to off-event signal Eoff_2 recorded in recording unit 31b.
- signal ⁇ 2 is activated and signal ⁇ 1 is inactive. Therefore, switching elements 301a, 304a, and 305a are turned off, and switching elements 302a, 303a, and 306a are turned on.
- Recording unit 32a records on-event signal Eon_3.
- control unit 40 performs or does not perform a reset operation depending on on-event signal Eon_3 recorded in recording unit 32a.
- switching elements 301b, 304b, and 305b are turned off, and switching elements 302b, 303b, and 306b are turned on.
- Recording unit 32b records off-event signal Eoff_3.
- control unit 40 performs or does not perform a reset operation depending on off-event signal Eoff_3 recorded in recording unit 32b.
- switching elements 301b, 304b, and 305b are turned on, and switching elements 302b, 303b, and 306b are turned off.
- recording unit 31b records off-event signal Eoff_4.
- Recording unit 32b outputs off-event signal Eoff_3 to read wiring VSLb.
- control unit 40 performs or does not perform a reset operation according to off-event signal Eoff_4 recorded in recording unit 31b.
- the recording units 31a and 32a according to the eighth embodiment are connected in parallel between the comparator 336 and the readout wiring VSLa.
- the recording units 31b and 32b are connected in parallel between the comparator 336 and the readout wiring VSLb.
- switching elements 301a to 306a and 301b to 306b are provided.
- the recording units 31a and 32a alternately record the on-event signal Eon, and alternately read out the recorded on-event signal Eon to the readout wiring VSLa.
- the recording units 31b and 32b alternately record the off-event signal Eoff, and alternately read out the recorded off-event signal Eoff to the readout wiring VSLb.
- the eighth embodiment may be similar to those of the first embodiment.
- the read operation of the event signal Eon or Eoff can be executed in a redundant manner during the reset operation and the detection operation. Therefore, the eighth embodiment can also achieve the same effects as the first embodiment.
- the technology according to the present disclosure can be applied to various electronic devices.
- the technology according to the present disclosure may be realized as a device mounted on any type of moving object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, or the like.
- FIG. 24 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology disclosed herein can be applied.
- the vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001.
- the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside vehicle information detection unit 12030, an inside vehicle information detection unit 12040, and an integrated control unit 12050.
- Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio/video output unit 12052, and an in-vehicle network I/F (Interface) 12053.
- the drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs.
- the drive system control unit 12010 functions as a control device for a drive force generating device for generating the drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force for the vehicle.
- the body system control unit 12020 controls the operation of various devices installed in the vehicle body according to various programs.
- the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, tail lamps, brake lamps, turn signals, and fog lamps.
- radio waves or signals from various switches transmitted from a portable device that replaces a key can be input to the body system control unit 12020.
- the body system control unit 12020 accepts the input of these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.
- the outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000.
- the image capturing unit 12031 is connected to the outside-vehicle information detection unit 12030.
- the outside-vehicle information detection unit 12030 causes the image capturing unit 12031 to capture images outside the vehicle, and receives the captured images.
- the outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, or characters on the road surface, based on the received images.
- the imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received.
- the imaging unit 12031 can output the electrical signal as an image, or as distance measurement information.
- the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared light.
- the in-vehicle information detection unit 12040 detects information inside the vehicle.
- a driver state detection unit 12041 that detects the state of the driver is connected.
- the driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's degree of fatigue or concentration based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.
- the microcomputer 12051 can calculate control target values for the driving force generating device, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040, and output control commands to the drive system control unit 12010.
- the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an Advanced Driver Assistance System (ADAS), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.
- ADAS Advanced Driver Assistance System
- the microcomputer 12051 can also perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.
- the microcomputer 12051 can also output control commands to the body system control unit 12030 based on information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching high beams to low beams.
- the audio/image output unit 12052 transmits at least one output signal of audio and image to an output device capable of visually or audibly notifying the occupants of the vehicle or the outside of the vehicle of information.
- an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices.
- the display unit 12062 may include, for example, at least one of an on-board display and a head-up display.
- FIG. 25 shows an example of the installation position of the imaging unit 12031.
- the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.
- the imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at the front nose, side mirrors, rear bumper, back door, and upper part of the windshield inside the vehicle cabin of the vehicle 12100.
- the imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100.
- the imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100.
- the imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100.
- the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin is mainly used to detect leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.
- FIG. 25 shows an example of the imaging ranges of the imaging units 12101 to 12104.
- Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose
- imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively
- imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door.
- an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.
- At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information.
- at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple imaging elements, or an imaging element having pixels for phase difference detection.
- the microcomputer 12051 can obtain the distance to each solid object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, and can extract as a preceding vehicle, in particular, the closest solid object on the path of the vehicle 12100 that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km/h or faster). Furthermore, the microcomputer 12051 can set the inter-vehicle distance that should be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on the driver's operation.
- automatic braking control including follow-up stop control
- automatic acceleration control including follow-up start control
- the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects, such as two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, based on the distance information obtained from the imaging units 12101 to 12104, and can use the data to automatically avoid obstacles.
- the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see.
- the microcomputer 12051 determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or exceeds a set value and there is a possibility of a collision, it can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by forcibly decelerating or steering to avoid a collision via the drive system control unit 12010.
- At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays.
- the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured image of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian.
- the audio/image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian.
- the audio/image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.
- the above describes an example of a vehicle control system to which the technology disclosed herein can be applied.
- the technology disclosed herein can be applied to, for example, the imaging unit 12031, etc., of the configurations described above.
- This technology can be configured as follows:
- a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal
- a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold
- a first recording unit connected to an output terminal of the comparison unit, for recording the event signal, and outputting the event signal
- a second recording unit connected to the first recording unit, for recording the event signal from the first recording unit, and for outputting the event signal.
- a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit; a control unit provided between an output terminal of the first recording unit and the first switching element, the control unit controlling the first switching element based on the event signal output from the first recording unit; a first read wiring connected to an output terminal of the second recording unit;
- the light detection element according to any one of (1) to (3), further comprising: a fourth recording unit connected to the third recording unit and configured to record the event signal from the third recording unit.
- a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit; a control unit provided between output terminals of the first and third recording units and the first switching element, the control unit controlling the first switching element based on the event signals output from the first and third recording units; a first read wiring connected to an output terminal of the second recording unit; A second readout wiring connected to an output terminal of the fourth recording unit, A photodetector element according to (4) or (5), wherein, when the first switching element is in a conductive state, the event signal recorded in the second recording section is read out to the first readout wiring, and the event signal recorded in the fourth recording section is read out to the second readout wiring.
- the comparison unit compares the amount of change with a first threshold during a first period to output a first event signal, and compares the amount of change with a second threshold different from the first threshold during a second period following the first period to output a second event signal;
- the first recording unit records the first event signal during the first period;
- the third recording unit records the second event signal during the second period;
- (11) an inverter connected to one output terminal of the first and second recording units; a first logic gate that outputs a logical product of the other output signal of the first and second recording units and an output signal of the inverter to the first read wiring; an inverter connected to one output terminal of the third and fourth recording units;
- the light detection element according to (6) further comprising a second logic gate that outputs a logical product of the other output signal of the third and fourth recording units and an output signal of the inverter to the second read wiring.
- (13) a third logic gate that outputs a logical product of the output signals of the first and second recording units to the control unit; a fourth logic gate that outputs a logical product of the output signals of the third and fourth recording units to the control unit;
- the comparison unit compares the amount of change with a first threshold during a first period to output a first event signal, and compares the amount of change with a second threshold during a second period following the first period, the second threshold being different from the first threshold, to output a second event signal;
- the first recording unit alternately records the first event signal and the second event signal;
- a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit; a control unit provided between output terminals of the first and third recording units and the first switching element, the control unit controlling the first switching element based on the event signals output from the first and third recording units; a first switch circuit connected to the output terminals of the second and fourth recording units; a first read wiring connected to an output terminal of the first switch circuit;
- the photodetector element according to any one of (4), (5), (12), or (13), wherein the first switch circuit selectively connects an output terminal of either the second or fourth recording unit to the first read wiring.
- the light detection element described in any one of (1) to (16) further comprising: a third switch circuit provided between an output terminal of the buffer and the plurality of first recording units, the third switch circuit connecting a selected first recording unit selected from the plurality of first recording units to the output terminal of the buffer.
- a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal
- a comparison unit that compares an amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal
- a first and a second recording unit connected in parallel to an output terminal of the comparison unit
- a photodetector element wherein when one of the first and second recording sections is recording the event signal, the other of the first and second recording sections outputs the event signal.
- a second switching element connected between an output terminal of the comparison unit and the first recording unit; a third switching element connected between an output terminal of the comparison unit and the second recording unit; and a fourth switching element connected between the first recording unit and the first read wiring.
- a fifth switching element connected between the second recording unit and the first read wiring; a sixth switching element connected between the first recording unit and the control unit; a seventh switching element connected between the second recording unit and the control unit, when the first recording unit records the event signal and the second recording unit outputs the event signal, the second, fifth and sixth switching elements are in a conductive state and the third, fourth and seventh switching elements are in a non-conductive state;
- the second recording unit records the event signal and the first recording unit outputs the event signal
- the third, fourth, and seventh switching elements are in a conductive state
- the second, fifth, and sixth switching elements are in a non-conductive state.
- a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal
- a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold
- a first recording unit connected to an output terminal of the comparison unit, for recording the event signal, and outputting the event signal
- a second recording unit connected to the first recording unit, for recording the event signal from the first recording unit, and for outputting the event signal.
- a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal
- a comparison unit that compares an amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal
- a first and a second recording unit connected in parallel to an output terminal of the comparison unit
- An electronic device having a photodetector, wherein, when one of the first and second recording units is recording the event signal, the other of the first and second recording units outputs the event signal.
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Abstract
Description
本開示は、光検出素子および電子機器に関する。 This disclosure relates to a photodetector element and an electronic device.
画素の光量が閾値を超えたときにイベント信号をリアルタイムに検出する光検出素子が開発されている。このようなイベント信号を検出する光検出素子は、EVS(Event Vision Sensor)と呼ばれる。 A photodetector has been developed that can detect an event signal in real time when the amount of light from a pixel exceeds a threshold. This type of photodetector that detects event signals is called an Event Vision Sensor (EVS).
このような光検出素子では、イベント信号を検出する検出期間、記録されたイベント信号を読み出す読み出し期間、イベント信号の検出のための閾値をリセットするリセット期間などを一周期とする検出周期が繰り返し実行されている。この検出周期を短縮して光検出素子が高速動作可能とすることが望まれている。 In such photodetection elements, a detection cycle is repeatedly executed, which consists of a detection period for detecting an event signal, a read period for reading out the recorded event signal, and a reset period for resetting the threshold for detecting the event signal. It is desirable to shorten this detection cycle so that the photodetection element can operate at high speed.
本技術はこのような課題を鑑みてなされたものであり、イベント信号の検出周期を短縮することができる光検出素子および電子機器を提供する。 This technology was developed in consideration of these issues, and provides a photodetector element and electronic device that can shorten the detection period of an event signal.
本開示の一側面の光検出素子は、入射光を光電変換して電気信号を生成する受光部と、電気信号の変化量が閾値を超えたとき、あるいは、下回ったときにイベント信号を出力する比較部と、比較部の出力端子に接続されイベント信号を記録し、該イベント信号を出力する第1記録部と、第1記録部に接続され第1記録部からのイベント信号を記録し、該イベント信号を出力する第2記録部と、を備える。 The photodetector element of one aspect of the present disclosure includes a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold, a first recording unit that is connected to the output terminal of the comparison unit and records the event signal and outputs the event signal, and a second recording unit that is connected to the first recording unit and records the event signal from the first recording unit and outputs the event signal.
第2記録部に記録されたイベント信号を読み出している読出し期間中に、第1記録部は、比較部から次のイベント信号を記録する。 During the read period in which the event signal recorded in the second recording unit is being read, the first recording unit records the next event signal from the comparison unit.
光検出素子は、比較部の入力端子と比較部の出力端子との間に接続された第1スイッチング素子と、第1記録部の出力端子と第1スイッチング素子との間に設けられ、第1記録部から出力されているイベント信号に基づいて第1スイッチング素子を制御する制御部と、第2記録部の出力端子に接続された第1読出し配線と、をさらに備え、第1スイッチング素子が導通状態であるときに、第2記録部はイベント信号を第1読出し配線に出力する。 The light detection element further includes a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit, a control unit provided between the output terminal of the first recording unit and the first switching element, which controls the first switching element based on an event signal output from the first recording unit, and a first readout wiring connected to the output terminal of the second recording unit, and when the first switching element is in a conductive state, the second recording unit outputs an event signal to the first readout wiring.
光検出素子は、比較部の出力端子に接続されイベント信号を記録する第3記録部と、第3記録部に接続され第3記録部からのイベント信号を記録する第4記録部と、をさらに備える。 The light detection element further includes a third recording unit connected to the output terminal of the comparison unit and recording the event signal, and a fourth recording unit connected to the third recording unit and recording the event signal from the third recording unit.
第4記録部に記録されたイベント信号を読み出している読出し期間中に、第3記録部は、比較部から次のイベント信号を記録する。 During the read period in which the event signal recorded in the fourth recording unit is being read, the third recording unit records the next event signal from the comparison unit.
光検出素子は、比較部の入力端子と比較部出力端子との間に接続された第1スイッチング素子と、第1および第3記録部の出力端子と第1スイッチング素子との間に設けられ、第1および第3記録部から出力されているイベント信号に基づいて第1スイッチング素子を制御する制御部と、第2記録部の出力端子に接続された第1読出し配線と、第4記録部の出力端子に接続された第2読出し配線と、をさらに備え、第1スイッチング素子が導通状態であるときに、第2記録部に記録されたイベント信号が第1読出し配線に読み出され、かつ、第4記録部に記録されたイベント信号が第2読出し配線に読み出される。 The light detection element further includes a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit, a control unit provided between the output terminals of the first and third recording units and the first switching element, and controlling the first switching element based on the event signals output from the first and third recording units, a first readout wiring connected to the output terminal of the second recording unit, and a second readout wiring connected to the output terminal of the fourth recording unit, and when the first switching element is in a conductive state, the event signal recorded in the second recording unit is read out to the first readout wiring, and the event signal recorded in the fourth recording unit is read out to the second readout wiring.
比較部は、第1期間において変化量を第1閾値と比較して第1イベント信号を出力し、第1期間に続く第2期間において変化量を第1閾値とは異なる第2閾値と比較して第2イベント信号を出力し、第1記録部は、第1期間において第1イベント信号を記録し、第3記録部は、第2期間において第2イベント信号を記録し、第1スイッチング素子が導通状態であるときに、第2記録部は、第1記録部からの第1イベント信号を記録し、かつ、該第1イベント信号を第1読出し配線に出力し、第4記録部は、第3記録部からの第2イベント信号を記録し、かつ、該第2イベント信号を第2読出し配線に出力する。 The comparison unit compares the amount of change with a first threshold during a first period and outputs a first event signal, and compares the amount of change with a second threshold different from the first threshold during a second period following the first period and outputs a second event signal, the first recording unit records the first event signal during the first period, the third recording unit records the second event signal during the second period, and when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, and the fourth recording unit records the second event signal from the third recording unit and outputs the second event signal to the second readout wiring.
制御部は、第1スイッチング素子を導通状態にすることによって、比較部の入力端子および出力端子の電圧を第1閾値と第2閾値との間の電圧にリセットする。 The control unit resets the voltages of the input terminal and output terminal of the comparison unit to a voltage between the first threshold value and the second threshold value by turning on the first switching element.
制御部は、第1および第3記録部のそれぞれに記録されたイベント信号に基づいて第1スイッチング素子を制御する。 The control unit controls the first switching element based on the event signals recorded in the first and third recording units.
光検出素子は、第1および第2記録部の一方の出力端子に接続されたインバータと、第1および第2記録部の他方の出力信号とインバータの出力信号との論理積を第1読出し配線に出力する第1論理ゲートとをさらに備える。 The light detection element further includes an inverter connected to one of the output terminals of the first and second recording units, and a first logic gate that outputs the logical product of the other output signal of the first and second recording units and the output signal of the inverter to the first readout wiring.
光検出素子は、第1および第2記録部の一方の出力端子に接続されたインバータと、第1および第2記録部の他方の出力信号とインバータの出力信号との論理積を第1読出し配線に出力する第1論理ゲートと、第3および第4記録部の一方の出力端子に接続されたインバータと、第3および第4記録部の他方の出力信号とインバータの出力信号との論理積を第2読出し配線に出力する第2論理ゲートとをさらに備える。 The light detection element further includes an inverter connected to one of the output terminals of the first and second recording units, a first logic gate that outputs a logical product of the other output signal of the first and second recording units and the output signal of the inverter to a first readout wiring, an inverter connected to one of the output terminals of the third and fourth recording units, and a second logic gate that outputs a logical product of the other output signal of the third and fourth recording units and the output signal of the inverter to a second readout wiring.
光検出素子は、第1および第2記録部の出力信号の論理積を制御部に出力する第3論理ゲートをさらに備え、制御部は、第3論理ゲートの出力信号に基づいて第1スイッチング素子を制御する。 The light detection element further includes a third logic gate that outputs the logical product of the output signals of the first and second recording units to the control unit, and the control unit controls the first switching element based on the output signal of the third logic gate.
光検出素子は、第1および第2記録部の出力信号の論理積を制御部に出力する第3論理ゲートと、第3および第4記録部の出力信号の論理積を制御部に出力する第4論理ゲートと、をさらに備え、制御部は、第3および第4論理ゲートの出力信号に基づいて第1スイッチング素子を制御する。 The light detection element further includes a third logic gate that outputs the logical product of the output signals of the first and second recording units to the control unit, and a fourth logic gate that outputs the logical product of the output signals of the third and fourth recording units to the control unit, and the control unit controls the first switching element based on the output signals of the third and fourth logic gates.
比較部は、第1期間において変化量を第1閾値と比較して第1イベント信号を出力し、第1期間に続く第2期間において変化量を第1閾値とは異なる第2閾値と比較して第2イベント信号を出力し、第1記録部は、第1イベント信号と第2イベント信号を交互に記録し、第1スイッチング素子が導通状態であるときに、第2記録部は、第1記録部からの第1イベント信号を記録し、かつ、該第1イベント信号を第1読出し配線に出力し、あるいは、第1記録部からの第2イベント信号を記録し、かつ、該第2イベント信号を第1読出し配線に出力する。 The comparison unit compares the amount of change with a first threshold during a first period and outputs a first event signal, and compares the amount of change with a second threshold different from the first threshold during a second period following the first period and outputs a second event signal, the first recording unit alternately records the first event signal and the second event signal, and when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, or records the second event signal from the first recording unit and outputs the second event signal to the first readout wiring.
光検出素子は、比較部の入力端子と比較部の出力端子との間に接続された第1スイッチング素子と、第1および第3記録部の出力端子と第1スイッチング素子との間に設けられ、第1および第3記録部から出力されているイベント信号に基づいて第1スイッチング素子を制御する制御部と、第2および第4記録部の出力端子に接続された第1スイッチ回路と、第1スイッチ回路の出力端子に接続された第1読出し配線と、をさらに備え、第1スイッチ回路は、第2および第4記録部のいずれか一方の出力端子を選択的に第1読出し配線に接続する。 The light detection element further includes a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit, a control unit provided between the output terminals of the first and third recording units and the first switching element, which controls the first switching element based on the event signals output from the first and third recording units, a first switch circuit connected to the output terminals of the second and fourth recording units, and a first readout wiring connected to the output terminal of the first switch circuit, and the first switch circuit selectively connects the output terminal of either the second or fourth recording unit to the first readout wiring.
光検出素子は、複数の受光部と、複数の受光部に対応して設けられた複数の比較部と、の第1記録部と、複数の第1記録部に対応して設けられた複数の第2記録部と、複数の比較部と複数の第1記録部との間に設けられたバッファと、バッファの入力端子と複数の比較部との間に設けられ、複数の比較部から選択された選択比較部をバッファの入力端子に接続する第2スイッチ回路と、バッファの出力端子と複数の第1記録部との間に設けられ、複数の第1記録部から選択された選択第1記録部をバッファの出力端子に接続する第3スイッチ回路と、をさらに備える。 The light detection element further includes a plurality of light receiving sections, a plurality of comparison sections provided corresponding to the plurality of light receiving sections, a first recording section, a plurality of second recording sections provided corresponding to the plurality of first recording sections, a buffer provided between the plurality of comparison sections and the plurality of first recording sections, a second switch circuit provided between an input terminal of the buffer and the plurality of comparison sections, which connects a selective comparison section selected from the plurality of comparison sections to an input terminal of the buffer, and a third switch circuit provided between an output terminal of the buffer and the plurality of first recording sections, which connects a selective first recording section selected from the plurality of first recording sections to an output terminal of the buffer.
本開示の他の側面の光検出素子は、入射光を光電変換して電気信号を生成する受光部と、受光部が生成する電気信号の変化量と閾値とを比較してイベント信号を出力する比較部と、比較部の出力端子に並列に接続された第1および第2記録部とを備え、第1および第2記録部の一方がイベント信号を記録しているときに、第1および第2記録部の他方がイベント信号を出力する。 The photodetector element of another aspect of the present disclosure includes a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that compares the amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal, and first and second recording units connected in parallel to the output terminal of the comparison unit, and when one of the first and second recording units is recording an event signal, the other of the first and second recording units outputs the event signal.
光検出素子は、比較部の出力端子と第1記録部との間に接続された第2スイッチング素子と、比較部の出力端子と第2記録部との間に接続された第3スイッチング素子と、第1記録部と第1読出し配線との間に接続された第4スイッチング素子と、第2記録部と第1読出し配線との間に接続された第5スイッチング素子と、第1記録部と制御部との間に接続された第6スイッチング素子と、第2記録部と制御部との間に接続された第7スイッチング素子とをさらに備え、第1記録部がイベント信号を記録し、第2記録部がイベント信号を出力しているときに、第2、第5および第6スイッチング素子が導通状態であり、第3、第4および第7スイッチング素子は非導通状態であり、第2記録部がイベント信号を記録し、第1記録部がイベント信号を出力しているときに、第3、第4および第7スイッチング素子が導通状態であり、第2、第5および第6スイッチング素子は非導通状態である。 The light detection element further includes a second switching element connected between the output terminal of the comparison unit and the first recording unit, a third switching element connected between the output terminal of the comparison unit and the second recording unit, a fourth switching element connected between the first recording unit and the first readout wiring, a fifth switching element connected between the second recording unit and the first readout wiring, a sixth switching element connected between the first recording unit and the control unit, and a seventh switching element connected between the second recording unit and the control unit, and when the first recording unit records an event signal and the second recording unit outputs an event signal, the second, fifth, and sixth switching elements are in a conductive state and the third, fourth, and seventh switching elements are in a non-conductive state, and when the second recording unit records an event signal and the first recording unit outputs an event signal, the third, fourth, and seventh switching elements are in a conductive state and the second, fifth, and sixth switching elements are in a non-conductive state.
本開示の一側面の電子機器は、光検出素子は、入射光を光電変換して電気信号を生成する受光部と、電気信号の変化量が閾値を超えたとき、あるいは、下回ったときにイベント信号を出力する比較部と、比較部の出力端子に接続されイベント信号を記録し、該イベント信号を出力する第1記録部と、第1記録部に接続され第1記録部からのイベント信号を記録し、該イベント信号を出力する第2記録部と、を備える光検出素子を有する。 In one aspect of the electronic device disclosed herein, the photodetector element includes a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold, a first recording unit that is connected to the output terminal of the comparison unit and records the event signal and outputs the event signal, and a second recording unit that is connected to the first recording unit and records the event signal from the first recording unit and outputs the event signal.
本開示の他の側面の電子機器は、入射光を光電変換して電気信号を生成する受光部と、受光部が生成する電気信号の変化量と閾値とを比較してイベント信号を出力する比較部と、比較部の出力端子に並列に接続された第1および第2記録部とを備え、第1および第2記録部の一方がイベント信号を記録しているときに、第1および第2記録部の他方がイベント信号を出力する、光検出素子を有する。 An electronic device according to another aspect of the present disclosure has a light-receiving unit that performs photoelectric conversion on incident light to generate an electrical signal, a comparison unit that compares the amount of change in the electrical signal generated by the light-receiving unit with a threshold value to output an event signal, and first and second recording units connected in parallel to the output terminal of the comparison unit, and has a light detection element in which, when one of the first and second recording units is recording an event signal, the other of the first and second recording units outputs the event signal.
以下、本技術を適用した具体的な実施の形態について、図面を参照しながら詳細に説明する。図面は模式的または概念的なものであり、各部分の比率などは、必ずしも現実のものと同一とは限らない。明細書と図面において、既出の図面に関して前述したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。 Below, specific embodiments to which this technology is applied will be described in detail with reference to the drawings. The drawings are schematic or conceptual, and the proportions of each part are not necessarily the same as those in reality. In the specification and drawings, elements similar to those described above with reference to the previous drawings will be given the same reference numerals, and detailed descriptions will be omitted as appropriate.
(第1実施形態)
図1は、第1実施形態に係る光検出素子1の一構成例を示すブロック図である。光検出素子1は、例えば、EVSまたはDVS(Dynamic Vision Sensor)である。光検出素子1は、撮像レンズ10、固体撮像素子20、記録領域30および制御部40を備える。光検出素子1としては、例えば、産業用ロボットに搭載されるカメラや、車載カメラ、監視カメラなどの電子機器が想定される。
First Embodiment
1 is a block diagram showing an example of a configuration of a light detection element 1 according to the first embodiment. The light detection element 1 is, for example, an EVS or a DVS (Dynamic Vision Sensor). The light detection element 1 includes an imaging lens 10, a solid-state imaging element 20, a recording area 30, and a control unit 40. Assumed examples of the light detection element 1 include electronic devices such as a camera mounted on an industrial robot, an in-vehicle camera, and a surveillance camera.
撮像レンズ10は、入射光を集光して固体撮像素子20に導く。固体撮像素子20は、入射光を光電変換して受光量に応じた電圧信号を生成すると共に、電圧信号の変化量に基づいて受光量の変化をイベント信号として検出する。検出されたイベント信号は記録領域30に出力される。 The imaging lens 10 collects the incident light and guides it to the solid-state imaging element 20. The solid-state imaging element 20 photoelectrically converts the incident light to generate a voltage signal according to the amount of light received, and detects the change in the amount of light received as an event signal based on the amount of change in the voltage signal. The detected event signal is output to the recording area 30.
記録領域30は、固体撮像素子20からのイベント信号を記録する。記録領域30は、例えば、ラッチ回路、DRAM(Dynamic Random Access Memory)、フラッシュメモリ等の半導体メモリでよい。記録領域30の内部構成については後でより詳細に説明する。 The recording area 30 records the event signal from the solid-state imaging element 20. The recording area 30 may be, for example, a latch circuit, a DRAM (Dynamic Random Access Memory), a flash memory, or other semiconductor memory. The internal structure of the recording area 30 will be described in more detail later.
制御部40は、例えばCPU(Central Processing Unit)やROM(Read Only Memory)、RAM等を備えたマイクロコンピュータを有して構成され、CPUがプログラムに従った処理を実行することで光検出素子1の動作を制御する。特に、制御部40は、固体撮像素子20を制御して上記したイベント信号の検出動作を実行させたり、記録領域30を制御してイベント信号を記録させたり、記録領域30からイベント信号を読み出す処理を実行する。 The control unit 40 is configured with a microcomputer equipped with, for example, a CPU (Central Processing Unit), ROM (Read Only Memory), RAM, etc., and the CPU controls the operation of the light detection element 1 by executing processing according to a program. In particular, the control unit 40 controls the solid-state imaging element 20 to perform the above-mentioned event signal detection operation, controls the recording area 30 to record the event signal, and executes processing to read the event signal from the recording area 30.
図2は、第1実施形態に係る固体撮像素子20の積層構造の一例を示す図である。固体撮像素子20は、検出チップ202と、検出チップ202に積層された受光チップ201とを備える。このような積層構造における受光チップ201と検出チップ202は、ビアなどの接続部を介して電気的に接続される。なお、ビアの他、Cu-Cu接合やバンプにより接続することもできる。 FIG. 2 is a diagram showing an example of a stacked structure of the solid-state imaging element 20 according to the first embodiment. The solid-state imaging element 20 includes a detection chip 202 and a light-receiving chip 201 stacked on the detection chip 202. In this stacked structure, the light-receiving chip 201 and the detection chip 202 are electrically connected through a connection such as a via. Note that in addition to vias, they can also be connected by Cu-Cu bonding or bumps.
図3は、受光チップ201の平面図の一例である。受光チップ201には、画素アレイ部220と、ビア配置部211、212および213が設けられている。ビア配置部211、212および213には、検出チップ202と接続されるビアが配置される。 FIG. 3 is an example of a plan view of the light-receiving chip 201. The light-receiving chip 201 is provided with a pixel array section 220 and via arrangement sections 211, 212, and 213. Vias that are connected to the detection chip 202 are arranged in the via arrangement sections 211, 212, and 213.
図4は、画素アレイ部220の平面図の一例である。画素アレイ部220には、二次元格子状に複数の受光部221が配列される。受光部221は、例えばフォトダイオードである。受光部221は、入射光を光電変換して光電流を生成する。受光部221のそれぞれには、行アドレスおよび列アドレスからなる画素アドレスが割り当てられる。 FIG. 4 is an example of a plan view of the pixel array section 220. In the pixel array section 220, a plurality of light receiving sections 221 are arranged in a two-dimensional lattice. The light receiving sections 221 are, for example, photodiodes. The light receiving sections 221 perform photoelectric conversion of incident light to generate a photocurrent. Each of the light receiving sections 221 is assigned a pixel address consisting of a row address and a column address.
図5は、検出チップ202の平面図の一例である。検出チップ202には、ビア配置部231、232および233と、信号処理回路240と、行駆動回路251と、列駆動回路252と、検出部260とが設けられている。ビア配置部231、232および233には、受光チップ201と接続されるビアが配置されている。 FIG. 5 is an example of a plan view of the detection chip 202. The detection chip 202 is provided with via arrangement sections 231, 232, and 233, a signal processing circuit 240, a row driving circuit 251, a column driving circuit 252, and a detection section 260. Vias that are connected to the light receiving chip 201 are arranged in the via arrangement sections 231, 232, and 233.
行駆動回路251は、画素アレイ部220の行アドレスを選択して、その行アドレスに対応する光電流を検出部260に出力させる。列駆動回路252は、画素アレイ部220の列アドレスを選択して、その列アドレスに対応する光電流を検出部260に出力させる。 The row drive circuit 251 selects a row address of the pixel array section 220 and outputs a photocurrent corresponding to the row address to the detection section 260. The column drive circuit 252 selects a column address of the pixel array section 220 and outputs a photocurrent corresponding to the column address to the detection section 260.
検出部260は、入力された光電流を対数変換した電圧信号を量子化することでイベント信号を検出し、検出したイベント信号を信号処理回路240に出力する。イベントは、光電流を対数変換した電圧信号の変化量が、所定の閾値を超えたこと、あるいは、下回ったことを示す。イベント信号は、イベントが発生したときに活性化される(例えば、立ち上げられる)。イベント信号は、量子化器330によって量子化(二値化)された信号である。信号処理回路240は、検出部260から出力されたイベント信号に対して所定の信号処理を施し、記録領域30に出力する。 The detection unit 260 detects an event signal by quantizing a voltage signal obtained by logarithmically converting the input photocurrent, and outputs the detected event signal to the signal processing circuit 240. An event indicates that the amount of change in the voltage signal obtained by logarithmically converting the photocurrent has exceeded or fallen below a predetermined threshold. The event signal is activated (e.g., raised) when an event occurs. The event signal is a signal that has been quantized (binarized) by the quantizer 330. The signal processing circuit 240 performs a predetermined signal processing on the event signal output from the detection unit 260, and outputs the signal to the recording area 30.
図6は、検出部260の平面図の一例である。検出部260には、二次元格子状に複数のイベント検出回路300が配列される。各イベント検出回路300には画素アドレスが割り当てられ、同一アドレスの受光部221と接続されている。イベント検出回路300は、対応する受光部221からの光電流に応じた電圧信号を量子化してイベント信号として出力するものである。 FIG. 6 is an example of a plan view of the detection unit 260. In the detection unit 260, a plurality of event detection circuits 300 are arranged in a two-dimensional grid. A pixel address is assigned to each event detection circuit 300, and each event detection circuit 300 is connected to a light receiving unit 221 with the same address. The event detection circuit 300 quantizes a voltage signal corresponding to the photocurrent from the corresponding light receiving unit 221, and outputs the quantized voltage signal as an event signal.
図7は、イベント検出回路300の構成の一例を示すブロック図である。イベント検出回路300は、対数変換回路310、バッファ320、量子化器330を有している。 FIG. 7 is a block diagram showing an example of the configuration of the event detection circuit 300. The event detection circuit 300 includes a logarithmic conversion circuit 310, a buffer 320, and a quantizer 330.
対数変換回路310は、対応する受光部221からの光電流を対数変換された電圧信号に変換するものである。対数変換回路310は、変換した電圧信号をバッファ320に供給する。 The logarithmic conversion circuit 310 converts the photocurrent from the corresponding light receiving unit 221 into a logarithmically converted voltage signal. The logarithmic conversion circuit 310 supplies the converted voltage signal to the buffer 320.
バッファ320は、対数変換回路310からの電圧信号を補正する。バッファ320は、補正後の電圧信号を量子化器330に出力する。 Buffer 320 corrects the voltage signal from logarithmic conversion circuit 310. Buffer 320 outputs the corrected voltage signal to quantizer 330.
量子化器330は、入力された電圧信号の変化量を所定の閾値(比較基準電圧)と比較し、当該閾値を超えたこと、あるいは、下回ったことを示すイベント信号を検出する。量子化器330は、低下後の電圧信号をデジタル信号に量子化してイベント信号として記録領域30に出力する。 The quantizer 330 compares the amount of change in the input voltage signal with a predetermined threshold (comparison reference voltage) and detects an event signal indicating that the threshold has been exceeded or fallen below. The quantizer 330 quantizes the voltage signal after the drop into a digital signal and outputs it to the recording area 30 as an event signal.
制御部40は、量子化器330に対して動作制御を行い、記録領域30に対して記録された検出信号の読み出しの制御を行う。 The control unit 40 controls the operation of the quantizer 330 and controls the reading of the detection signal recorded in the recording area 30.
図8は、イベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。対数変換回路310は、N型トランジスタ311,313とP型トランジスタ312とを備える。これらのトランジスタとして、例えば、MOS(Metal-Oxide-Semiconductor)トランジスタが用いられる。 FIG. 8 is a circuit diagram showing an example of the configuration of the event detection circuit 300, the recording area 30, and the control unit 40. The logarithmic conversion circuit 310 includes N-type transistors 311 and 313 and a P-type transistor 312. For example, MOS (Metal-Oxide-Semiconductor) transistors are used as these transistors.
N型トランジスタ311のソースは受光部221のカソードに接続され、ドレインは電源ラインに接続される。P型トランジスタ312とN型トランジスタ313は、電源ラインとグランドとの間において、直列に接続される。また、P型トランジスタ312およびN型トランジスタ313の接続点は、N型トランジスタ311のゲートとバッファ320の入力端子とに接続される。また、P型トランジスタ312のゲートには、所定のバイアス電圧Vbias1が印加される。 The source of N-type transistor 311 is connected to the cathode of light receiving section 221, and the drain is connected to the power supply line. P-type transistor 312 and N-type transistor 313 are connected in series between the power supply line and ground. The connection point of P-type transistor 312 and N-type transistor 313 is connected to the gate of N-type transistor 311 and the input terminal of buffer 320. A predetermined bias voltage Vbias1 is applied to the gate of P-type transistor 312.
N型トランジスタ311および313のドレインは電源側に接続されており、このような回路はソースフォロワと呼ばれる。これらのループ状に接続された2つのソースフォロワにより、受光部221からの光電流は対数変換された電圧信号に変換される。また、P型トランジスタ312は、一定の電流をN型トランジスタ313に供給する。 The drains of N-type transistors 311 and 313 are connected to the power supply, and this type of circuit is called a source follower. These two source followers connected in a loop convert the photocurrent from the light receiving section 221 into a logarithmic voltage signal. In addition, P-type transistor 312 supplies a constant current to N-type transistor 313.
上記した対数変換回路310により、受光部221が受け取る光強度が、対数変換された電圧信号に変換される。 The logarithmic conversion circuit 310 described above converts the light intensity received by the light receiving unit 221 into a logarithmic converted voltage signal.
なお、受光チップ201のグランドと検出チップ202のグランドとは、干渉対策のために互いに分離されている。また、受光チップ201には受光部221及びイベント検出回路300のN型トランジスタ311、313が配置され、検出チップ202にはN型トランジスタ311、313以外のイベント検出回路300が配置されている。 The ground of the light receiving chip 201 and the ground of the detection chip 202 are separated from each other to prevent interference. The light receiving chip 201 is provided with the light receiving unit 221 and the N-type transistors 311 and 313 of the event detection circuit 300, while the detection chip 202 is provided with the event detection circuit 300 other than the N-type transistors 311 and 313.
量子化器330は、コンデンサ331と、スイッチング素子332、333、334および335と、コンパレータ336とを備える。各スイッチング素子は、制御部40の動作制御信号に応じて導通される。スイッチング素子332、333、334および335には、例えばMOSトランジスタが用いられる。 Quantizer 330 includes capacitor 331, switching elements 332, 333, 334, and 335, and comparator 336. Each switching element is turned on in response to an operation control signal from control unit 40. Switching elements 332, 333, 334, and 335 are, for example, MOS transistors.
コンデンサ331の一端は、バッファ320の出力端子に接続され、他端は、コンパレータ336の反転入力端子に接続されている。従ってバッファ320からの電圧信号についての変化量としての電圧がコンパレータ336に入力される電圧信号となる。つまり光電変換により検知される輝度の変化量に相当する電圧信号が、コンパレータ336の反転入力端子に入力される。コンパレータ336の非反転入力端子には、比較基準電圧(Von、VresetまたはVoff)が閾値電圧として入力される。 One end of the capacitor 331 is connected to the output terminal of the buffer 320, and the other end is connected to the inverting input terminal of the comparator 336. Therefore, the voltage representing the amount of change in the voltage signal from the buffer 320 becomes the voltage signal input to the comparator 336. In other words, a voltage signal corresponding to the amount of change in luminance detected by photoelectric conversion is input to the inverting input terminal of the comparator 336. A comparison reference voltage (Von, Vreset, or Voff) is input to the non-inverting input terminal of the comparator 336 as a threshold voltage.
スイッチング素子332は、コンパレータ336の出力端子と反転入力端子との間に接続されている。スイッチング素子332は、制御部40からの動作制御信号に応じて導通状態(オン)/非導通状態(オフ)する。制御部40は、記録領域30からのイベント信号に基づいてスイッチング素子332とスイッチング素子334を導通することでリセット動作を実行する。 Switching element 332 is connected between the output terminal and the inverting input terminal of comparator 336. Switching element 332 is turned on/off in response to an operation control signal from control unit 40. Control unit 40 performs a reset operation by turning on switching element 332 and switching element 334 based on an event signal from recording area 30.
スイッチング素子333、334および335は、コンパレータ336の非反転入力端子に接続されている3つの各経路を制御部40からの動作制御信号Son、SrsおよびSoffに応じて導通する。制御部40による動作制御信号(ON制御信号Son、リセット制御信号Srs、OFF制御信号Soff)により、各動作制御信号に対応するスイッチング素子333、334、335の何れかが導通される。これにより、動作制御信号に応じた比較基準電圧(Von、VresetまたはVoff)が、コンパレータ336の非反転入力端子に選択的に入力される。 Switching elements 333, 334, and 335 conduct the three paths connected to the non-inverting input terminal of comparator 336 in response to operation control signals Son, Srs, and Soff from control unit 40. Either of switching elements 333, 334, and 335 corresponding to each operation control signal is made conductive by operation control signals (ON control signal Son, reset control signal Srs, OFF control signal Soff) from control unit 40. As a result, a comparison reference voltage (Von, Vreset, or Voff) corresponding to the operation control signal is selectively input to the non-inverting input terminal of comparator 336.
コンパレータ336では、反転入力端子に入力された電圧信号と、非反転入力端子に入力された比較基準電圧とを比較して、検出結果に応じてイベント信号を出力する。イベント信号はコンパレータ336から出力され、記録領域30に記録される。 Comparator 336 compares the voltage signal input to the inverting input terminal with the comparison reference voltage input to the non-inverting input terminal, and outputs an event signal according to the detection result. The event signal is output from comparator 336 and recorded in recording area 30.
制御部40は、ON制御信号Son、リセット制御信号Srs、OFF制御信号Soffにより、イベント検出回路300の動作制御を時分割で行う。制御部40は、ON制御信号Sonによりスイッチング素子333を導通させる。これにより、コンパレータ336の非反転入力端子にプラス側の比較基準電圧Vonが入力される。コンパレータ336では、入力された電圧信号の変化量と比較基準電圧Vonとを比較し、当該電圧信号が閾値としての比較基準電圧Vonを上回ることでオンイベント信号を出力する。コンパレータ336から出力されたオンイベント信号は記録領域30に記録される。 The control unit 40 controls the operation of the event detection circuit 300 in a time-division manner using the ON control signal Son, the reset control signal Srs, and the OFF control signal Soff. The control unit 40 turns on the switching element 333 using the ON control signal Son. This causes the positive comparison reference voltage Von to be input to the non-inverting input terminal of the comparator 336. The comparator 336 compares the amount of change in the input voltage signal with the comparison reference voltage Von, and outputs an ON event signal when the voltage signal exceeds the comparison reference voltage Von as a threshold value. The ON event signal output from the comparator 336 is recorded in the recording area 30.
また制御部40は、記録されたオンイベント信号を記録領域30から読み出す処理を実行する。 The control unit 40 also executes a process to read the recorded on-event signal from the recording area 30.
制御部40は、OFF制御信号Soffによりスイッチング素子335を導通させる。これにより、コンパレータ336の非反転入力端子にマイナス側の比較基準電圧Voffが入力される。コンパレータ336では、入力された電圧信号の変化量と比較基準電圧Voffとを比較し、当該電圧信号が閾値としての比較基準電圧Voffを下回ることでオフイベント信号を出力する。コンパレータ336から出力されたオフイベント信号は記録領域30に記録される。 The control unit 40 turns on the switching element 335 using the OFF control signal Soff. This causes the negative comparison reference voltage Voff to be input to the non-inverting input terminal of the comparator 336. The comparator 336 compares the amount of change in the input voltage signal with the comparison reference voltage Voff, and outputs an off event signal when the voltage signal falls below the comparison reference voltage Voff, which serves as a threshold value. The off event signal output from the comparator 336 is recorded in the recording area 30.
また制御部40は、記録されたオフイベント信号を記録領域30から読み出す処理を実行する。 The control unit 40 also executes a process to read the recorded off-event signal from the recording area 30.
制御部40は、リセット制御信号Srsによりスイッチング素子332、334を導通させる。これにより、イベント検出回路300においてON制御信号SonやOFF制御信号Soffにより変動した比較基準電圧がVresetにリセットされる。 The control unit 40 turns on the switching elements 332 and 334 using the reset control signal Srs. This resets the comparison reference voltage that has fluctuated in the event detection circuit 300 due to the ON control signal Son and the OFF control signal Soff to Vreset.
記録領域30は、記録部31a、32a、31bおよび32bを備える。記録部31a、32a、31bおよび32bは、それぞれ、例えば、コンパレータ336からのイベント信号を記録(保持)し、その記録されたイベント信号を出力するラッチ回路である。記録部31a、32a、31bおよび32bは、ラッチ回路、SRAM、DRAM、フラッシュメモリ等の半導体メモリでよい。 The recording area 30 includes recording units 31a, 32a, 31b, and 32b. Each of the recording units 31a, 32a, 31b, and 32b is, for example, a latch circuit that records (holds) an event signal from the comparator 336 and outputs the recorded event signal. The recording units 31a, 32a, 31b, and 32b may be a latch circuit or a semiconductor memory such as an SRAM, a DRAM, or a flash memory.
記録部31aは、コンパレータ336の出力端子と記録部32aとの間に接続されている。記録部31aは、コンパレータ336から出力されたオンイベント信号Eonを受け取り、オンイベント信号Eonを記録する。また、記録部31aは、保持しているオンイベント信号Eonを記録部32aへ出力する。 The recording unit 31a is connected between the output terminal of the comparator 336 and the recording unit 32a. The recording unit 31a receives the on-event signal Eon output from the comparator 336 and records the on-event signal Eon. The recording unit 31a also outputs the on-event signal Eon that it holds to the recording unit 32a.
記録部32aは、記録部31aの出力端子と読出し配線VSLaとの間に接続されている。記録部32aは、記録部31aから出力されたオンイベント信号Eonを受け取り、オンイベント信号Eonを記録する。また、記録部32aは、保持しているオンイベント信号Eonを読出し配線VSLaへ出力する。 The recording unit 32a is connected between the output terminal of the recording unit 31a and the readout wiring VSLa. The recording unit 32a receives the on-event signal Eon output from the recording unit 31a and records the on-event signal Eon. The recording unit 32a also outputs the on-event signal Eon that it holds to the readout wiring VSLa.
このように、複数の記録部31a、32aが、コンパレータ336の出力端子と読出し配線VSLaとの間に直列に接続されている。記録部31a、32aは、オンイベント信号Eonを読出し配線VSLaへ読み出すために設けられている。 In this way, the multiple recording units 31a, 32a are connected in series between the output terminal of the comparator 336 and the readout wiring VSLa. The recording units 31a, 32a are provided to read out the on-event signal Eon to the readout wiring VSLa.
記録部31bは、コンパレータ336の出力端子と記録部32bとの間に接続されている。記録部31bは、コンパレータ336から出力されたオフイベント信号Eoffを受け取り、オフイベント信号Eoffを記録する。また、記録部31bは、保持しているオフイベント信号Eoffを記録部32bへ出力する。 The recording unit 31b is connected between the output terminal of the comparator 336 and the recording unit 32b. The recording unit 31b receives the off-event signal Eoff output from the comparator 336 and records the off-event signal Eoff. The recording unit 31b also outputs the held off-event signal Eoff to the recording unit 32b.
記録部32bは、記録部31bの出力端子と読出し配線VSLbとの間に接続されている。記録部32bは、記録部31bから出力されたオフイベント信号Eoffを受け取り、オフイベント信号Eoffを記録する。また、記録部32bは、保持しているオフイベント信号Eoffを読出し配線VSLbへ出力する。 The recording unit 32b is connected between the output terminal of the recording unit 31b and the readout wiring VSLb. The recording unit 32b receives the off-event signal Eoff output from the recording unit 31b and records the off-event signal Eoff. The recording unit 32b also outputs the held off-event signal Eoff to the readout wiring VSLb.
このように、複数の記録部31b、32bが、コンパレータ336の出力端子と読出し配線VSLbとの間に直列に接続されている。記録部31b、32bは、オフイベント信号Eoffを読出し配線VSLbへ読み出すために設けられている。 In this way, the multiple recording units 31b, 32b are connected in series between the output terminal of the comparator 336 and the readout wiring VSLb. The recording units 31b, 32b are provided to read out the off-event signal Eoff to the readout wiring VSLb.
制御部40は、記録部31a、31bのそれぞれの出力端子とスイッチング素子332との間に接続されている。制御部40は、記録部31a、31bに保持され出力されているイベント信号Eon、Eoffを受けて、イベント信号Eon、Eoffの論理に応じてスイッチング素子332をオン/オフ制御する。また、制御部40は、記録部32a、32bから読出し配線VSLa、VSLbへイベント信号Eon、Eoffを読み出す。 The control unit 40 is connected between the output terminals of the recording units 31a and 31b and the switching element 332. The control unit 40 receives the event signals Eon and Eoff stored and output in the recording units 31a and 31b, and controls the switching element 332 to turn on and off according to the logic of the event signals Eon and Eoff. The control unit 40 also reads out the event signals Eon and Eoff from the recording units 32a and 32b to the read wiring VSLa and VSLb.
読出し配線VSLa、VSLbは、それぞれ記録部32a、32bの出力端子に接続されている。読出し配線VSLa、VSLbは、それぞれ記録部32a、32bから読み出されたイベント信号Eon、Eoffを図5の信号処理回路240へ伝達する。 The readout wirings VSLa and VSLb are connected to the output terminals of the recording units 32a and 32b, respectively. The readout wirings VSLa and VSLb transmit the event signals Eon and Eoff read out from the recording units 32a and 32b, respectively, to the signal processing circuit 240 in FIG. 5.
次に、本実施形態による光検出素子1の動作について説明する。 Next, the operation of the photodetector element 1 according to this embodiment will be described.
図9は、第1実施形態による光検出素子1の動作例を示すタイミング図である。 FIG. 9 is a timing diagram showing an example of the operation of the photodetector 1 according to the first embodiment.
1フレームにおいて、イベント信号の検出動作およびリセット動作が実行される。イベント信号の検出動作では、制御部40は、比較基準電圧をVonとしてオンイベント信号Eonの検出動作と、比較基準電圧をVoffとしてオフイベント信号Eoffの検出動作とを実行する。リセット動作では、制御部40は、スイッチング素子332、334をオンにして、比較基準電圧をVresetに戻し、かつ、コンパレータ336の反転入力端子と出力端子の電位を等しくする。 In one frame, an event signal detection operation and a reset operation are performed. In the event signal detection operation, the control unit 40 performs a detection operation of an on-event signal Eon with a comparison reference voltage of Von, and a detection operation of an off-event signal Eoff with a comparison reference voltage of Voff. In the reset operation, the control unit 40 turns on the switching elements 332 and 334 to return the comparison reference voltage to Vreset and equalize the potentials of the inverting input terminal and output terminal of the comparator 336.
まず、t1~t2において、オンイベント信号Eonの検出動作が実行される。オンイベント信号Eonの検出動作では、制御部40は、図8のスイッチング素子333をオンにして、閾値として比較基準電圧Vonをコンパレータ336の非反転入力端子へ入力する。コンパレータ336は、反転入力端子に入力された電圧信号と比較基準電圧Vonとを比較する。 First, from t1 to t2, an operation for detecting the on-event signal Eon is performed. In the operation for detecting the on-event signal Eon, the control unit 40 turns on the switching element 333 in FIG. 8 and inputs the comparison reference voltage Von as a threshold value to the non-inverting input terminal of the comparator 336. The comparator 336 compares the voltage signal input to the inverting input terminal with the comparison reference voltage Von.
電圧信号が比較基準電圧Vonを超えている場合、コンパレータ336は、オンイベント信号Eonを高レベル電圧に立ち上げる(活性化する)。電圧信号が比較基準電圧Vonを超えていない場合、コンパレータ336は、オンイベント信号Eonを低レベル電圧に維持する(活性化しない)。このオンイベント信号Eonは、記録部31aに記録される。このとき記録されたオンイベント信号をEon_1とする。 If the voltage signal exceeds the comparison reference voltage Von, the comparator 336 raises (activates) the on-event signal Eon to a high-level voltage. If the voltage signal does not exceed the comparison reference voltage Von, the comparator 336 maintains (does not activate) the on-event signal Eon at a low-level voltage. This on-event signal Eon is recorded in the recording unit 31a. The on-event signal recorded at this time is referred to as Eon_1.
次に、t2~t3において、オフイベント信号Eoffの検出動作が実行される。オフイベント信号Eoffの検出動作では、制御部40は、図8のスイッチング素子335をオンにして、閾値として比較基準電圧Voffをコンパレータ336の非反転入力端子へ入力する。コンパレータ336は、反転入力端子に入力された電圧信号と比較基準電圧Voffとを比較する。 Next, from t2 to t3, an operation to detect the off-event signal Eoff is performed. In the operation to detect the off-event signal Eoff, the control unit 40 turns on the switching element 335 in FIG. 8 and inputs the comparison reference voltage Voff as a threshold value to the non-inverting input terminal of the comparator 336. The comparator 336 compares the voltage signal input to the inverting input terminal with the comparison reference voltage Voff.
電圧信号が比較基準電圧Voffを下回っている場合、コンパレータ336は、オフイベント信号Eoffを高レベル電圧に立ち上げる(活性化する)。電圧信号が比較基準電圧Voffを下回っていない場合、コンパレータ336は、オフイベント信号Eoffを低レベル電圧に維持する(活性化しない)。このオフイベント信号Eoffは、記録部31bに記録される。このとき記録されたオフイベント信号をEoff_1とする。 If the voltage signal is below the comparison reference voltage Voff, the comparator 336 raises (activates) the off-event signal Eoff to a high-level voltage. If the voltage signal is not below the comparison reference voltage Voff, the comparator 336 maintains (does not activate) the off-event signal Eoff at a low-level voltage. This off-event signal Eoff is recorded in the recording unit 31b. The off-event signal recorded at this time is designated as Eoff_1.
次に、t3~t4において、リセット動作が実行される。リセット動作では、制御部40は、記録部31a、31bに記録されているオンイベント信号Eon_1およびオフイベント信号Eoff_1の論理に基づいて、図8のスイッチング素子332、334をオンにするか、あるいは、オフに維持する。例えば、オンイベント信号Eon_1またはオフイベント信号Eoff_1のいずれかが活性化され高レベル電圧に立ち上がっている場合に、制御部40は、その画素のスイッチング素子332、334をオンにする。これにより、比較基準電圧Vresetがコンパレータ336の非反転入力端子へ入力され、コンパレータ336の反転入力端子と出力端子とがスイッチング素子332を介して短絡する。これにより、コンパレータ336の反転入力端子および出力端子が比較基準電圧Vresetにリセットされる。比較基準電圧Vresetは、比較基準電圧Vonと比較基準電圧Voffとの間の電圧であり、好ましくはそれらの中間電圧である。一方、例えば、オンイベント信号Eon_1およびオフイベント信号Eoff_1のいずれかも活性化されておらず低レベル電圧である場合、制御部40は、その画素のスイッチング素子332、334をオフ状態に維持する。これは、その画素において、イベントが発生しておらず(即ち、受光量の変化が小さく)、受光部221からの信号電圧は、比較基準電圧Vonを超えておらずかつ比較基準電圧Voffを下回っていないため、リセット動作が不要だからである。 Next, at t3 to t4, a reset operation is performed. In the reset operation, the control unit 40 turns on the switching elements 332 and 334 in FIG. 8 or maintains them off based on the logic of the on-event signal Eon_1 and the off-event signal Eoff_1 recorded in the recording units 31a and 31b. For example, when either the on-event signal Eon_1 or the off-event signal Eoff_1 is activated and rises to a high-level voltage, the control unit 40 turns on the switching elements 332 and 334 of that pixel. As a result, the comparison reference voltage Vreset is input to the non-inverting input terminal of the comparator 336, and the inverting input terminal and output terminal of the comparator 336 are short-circuited via the switching element 332. As a result, the inverting input terminal and output terminal of the comparator 336 are reset to the comparison reference voltage Vreset. The comparison reference voltage Vreset is a voltage between the comparison reference voltage Von and the comparison reference voltage Voff, and is preferably an intermediate voltage between them. On the other hand, for example, when neither the on-event signal Eon_1 nor the off-event signal Eoff_1 is activated and is at a low-level voltage, the control unit 40 maintains the switching elements 332 and 334 of that pixel in the off state. This is because no event has occurred in that pixel (i.e., the change in the amount of received light is small), and the signal voltage from the light receiving unit 221 does not exceed the comparison reference voltage Von and does not fall below the comparison reference voltage Voff, so no reset operation is required.
また、t3~t4のリセット動作の期間において、記録部31aに記録されたオンイベント信号Eon_1は、記録部32aに転送され、記録部32aに記録される。記録部32aは、記録部31aからのオンイベント信号Eon_1を記録する。 In addition, during the reset operation period from t3 to t4, the on-event signal Eon_1 recorded in the recording unit 31a is transferred to the recording unit 32a and recorded in the recording unit 32a. The recording unit 32a records the on-event signal Eon_1 from the recording unit 31a.
一方、t3~t4のリセット動作の期間において、記録部31bに記録されたオフイベント信号Eoff_1は、記録部32bに転送され、記録部32bに記録される。記録部32bは、記録部31bからのオフイベント信号Eoff_1を記録する。 On the other hand, during the reset operation period from t3 to t4, the off-event signal Eoff_1 recorded in the recording unit 31b is transferred to the recording unit 32b and recorded in the recording unit 32b. The recording unit 32b records the off-event signal Eoff_1 from the recording unit 31b.
さらに、リセット動作の期間において、記録部32aは、オンイベント信号Eon_1を読出し配線VSLaへ出力開始する。記録部32bは、オフイベント信号Eoff_1を読出し配線VSLbへ出力開始する。即ち、オンイベント信号Eon_1は、リセット動作期間において、記録部31aから記録部32aへ一旦転送され、記録部32aから読出し配線VSLaへ順次読み出される。オフイベント信号Eoff_1は、リセット動作の期間において、記録部31bから記録部32bへ一旦転送され、記録部32bから読出し配線VSLbへ順次読み出される。オンイベント信号Eon_1およびオフイベント信号Eoff_1は、例えば、行アドレスADD0~ADDn(nは正整数)の順に読み出される。読み出されたオンイベント信号Eon_1およびオフイベント信号Eoff_1は、読出し配線VSLa、VSLbを介して信号処理回路240へ送信される。 Furthermore, during the reset operation, the recording unit 32a starts outputting the on-event signal Eon_1 to the readout wiring VSLa. The recording unit 32b starts outputting the off-event signal Eoff_1 to the readout wiring VSLb. That is, during the reset operation, the on-event signal Eon_1 is temporarily transferred from the recording unit 31a to the recording unit 32a, and is sequentially read out from the recording unit 32a to the readout wiring VSLa. During the reset operation, the off-event signal Eoff_1 is temporarily transferred from the recording unit 31b to the recording unit 32b, and is sequentially read out from the recording unit 32b to the readout wiring VSLb. The on-event signal Eon_1 and the off-event signal Eoff_1 are read out, for example, in the order of row addresses ADD0 to ADDn (n is a positive integer). The read-out on-event signal Eon_1 and off-event signal Eoff_1 are transmitted to the signal processing circuit 240 via the read-out wiring VSLa and VSLb.
なお、電圧信号が比較基準電圧Vonを超えている場合、リセット期間において、制御部40は、次のフレームのために比較基準電圧Vonを所定値だけ上昇させる。電圧信号が比較基準電圧Vonを超えていない場合、制御部40は、比較基準電圧Vonを変更しない。電圧信号が比較基準電圧Voffを下回っている場合、リセット期間において、制御部40は、次のフレームのために比較基準電圧Voffを所定値だけ低下させる。電圧信号が比較基準電圧Voffを下回っていない場合、制御部40は、比較基準電圧Voffを変更しない。 If the voltage signal exceeds the comparison reference voltage Von, during the reset period, the control unit 40 increases the comparison reference voltage Von by a predetermined value for the next frame. If the voltage signal does not exceed the comparison reference voltage Von, the control unit 40 does not change the comparison reference voltage Von. If the voltage signal is below the comparison reference voltage Voff, during the reset period, the control unit 40 decreases the comparison reference voltage Voff by a predetermined value for the next frame. If the voltage signal is not below the comparison reference voltage Voff, the control unit 40 does not change the comparison reference voltage Voff.
t4において、次のフレームが開始される。t4~t5において、オンイベント信号Eonの検出動作がt1~t2の動作と同様に実行され、t5~t6において、オフイベント信号Eoffの検出動作がt2~t3の動作と同様に実行される。これにより、記録部31aは、オンイベント信号Eon_2を記録し、記録部31bは、オフイベント信号Eoff_2を記録する。このとき、オンイベント信号Eon_1およびオフイベント信号Eoff_1は、記録部32a、32bから読出し配線VSLa、VSLbへそれぞれ読み出されている最中である。しかし、オンイベント信号Eon_1は、記録部32aに記録され保持されており、オフイベント信号Eoff_1は、記録部32bに記録され保持されている。従って、記録部31aがオンイベント信号Eon_2で更新され、記録部31bがオフイベント信号Eoff_2で更新されても、オンイベント信号Eon_1およびオフイベント信号Eoff_1の読出し動作に差し支えない。 At t4, the next frame begins. From t4 to t5, the detection operation of the on-event signal Eon is performed in the same manner as from t1 to t2, and from t5 to t6, the detection operation of the off-event signal Eoff is performed in the same manner as from t2 to t3. As a result, the recording unit 31a records the on-event signal Eon_2, and the recording unit 31b records the off-event signal Eoff_2. At this time, the on-event signal Eon_1 and the off-event signal Eoff_1 are being read out from the recording units 32a and 32b to the readout wirings VSLa and VSLb, respectively. However, the on-event signal Eon_1 is recorded and held in the recording unit 32a, and the off-event signal Eoff_1 is recorded and held in the recording unit 32b. Therefore, even if the recording unit 31a is updated with the on-event signal Eon_2 and the recording unit 31b is updated with the off-event signal Eoff_2, there is no problem with the read operation of the on-event signal Eon_1 and the off-event signal Eoff_1.
このように、記録部32a、32bから読出し配線VSLa、VSLbへのイベント信号Eon、Eoffの読出し動作は、行アドレスごとに実行するため、或る程度の時間がかかる。しかし、本実施形態による光検出素子1は、記録部31a、31bだけでなく、記録部32a、32bが記録部31a、31bに対応して記録部31a、31bの後段にそれぞれ設けられている。したがって、記録部31a、31bに記録されたイベント信号Eon_1、Eoff_1を記録部32a、32bへ予め転送しておいて、イベント信号Eon_1、Eoff_1を記録部32a、32bから読み出しながら、リセット動作および次のフレームを実行することができる。これにより、イベント信号Eon_1、Eoff_1の読出し最中であっても、リセット動作を実行し、かつ、記録部31a、31bには、次のイベント信号Eon_2、Eoff_2をそれぞれ記録することができる。 In this way, the read operation of the event signals Eon and Eoff from the recording units 32a and 32b to the read wirings VSLa and VSLb takes a certain amount of time because it is performed for each row address. However, the photodetector element 1 according to this embodiment not only has recording units 31a and 31b, but also has recording units 32a and 32b provided after recording units 31a and 31b in correspondence with recording units 31a and 31b, respectively. Therefore, the event signals Eon_1 and Eoff_1 recorded in recording units 31a and 31b can be transferred in advance to recording units 32a and 32b, and the reset operation and the next frame can be performed while reading out the event signals Eon_1 and Eoff_1 from recording units 32a and 32b. This allows the reset operation to be performed even while the event signals Eon_1 and Eoff_1 are being read, and the next event signals Eon_2 and Eoff_2 can be recorded in the recording units 31a and 31b, respectively.
尚、イベント信号Eon_1、Eoff_1の読出し動作は、リセット動作と重複するので、次のフレームのリセット動作が開始されるまでに終了する必要がある。次のフレームのリセット動作では、イベント信号Eon_2、Eoff_2の読出し動作が開始されるからである。 Note that the read operation of the event signals Eon_1 and Eoff_1 overlaps with the reset operation, so it must be completed before the reset operation of the next frame begins. This is because the read operation of the event signals Eon_2 and Eoff_2 begins during the reset operation of the next frame.
即ち、t6~t7において、リセット動作がt3~t4の動作と同様に実行される。このとき、イベント信号Eon_2、Eoff_2が記録部32a、32bから読出し配線VSLa、VSLbへそれぞれ読み出される。 That is, from t6 to t7, the reset operation is performed in the same manner as the operation from t3 to t4. At this time, the event signals Eon_2 and Eoff_2 are read out from the recording units 32a and 32b to the read lines VSLa and VSLb, respectively.
その後、t7以降、さらに次のフレームが開始される。 Then, at t7 onwards, the next frame begins.
本実施形態による光検出素子1は、オンイベント信号Eonを記録するために複数の31a、32aが設けられており、オフイベント信号Eoffを記録するために複数の31b、32bが設けられている。これにより、記録部31a、31bに記録されたイベント信号Eon、Eoffを記録部32a、32bへ予め転送しておいて、イベント信号Eon、Eoffを記録部32a、32bから読み出しながら、リセット動作および次のフレームを実行することができる。これにより、リセット動作の期間中であっても、イベント信号Eon、Eoffの読出しが可能である。また、イベント信号Eon、Eoffの読出し期間中であっても、記録部31a、31bには、次のイベント信号をそれぞれ記録することができる。その結果、フレームを短縮し、イベント信号の検出周期を短縮することができる。 The photodetector element 1 according to this embodiment is provided with a plurality of 31a, 32a for recording the on-event signal Eon, and a plurality of 31b, 32b for recording the off-event signal Eoff. This allows the event signals Eon, Eoff recorded in the recording units 31a, 31b to be transferred in advance to the recording units 32a, 32b, and the reset operation and the next frame can be executed while the event signals Eon, Eoff are read from the recording units 32a, 32b. This allows the event signals Eon, Eoff to be read even during the reset operation. Furthermore, even during the readout period of the event signals Eon, Eoff, the next event signal can be recorded in the recording units 31a, 31b. As a result, the frame can be shortened, and the detection period of the event signal can be shortened.
(第2実施形態)
図10は、第2実施形態による光検出素子1の動作例を示すタイミング図である。第2実施形態の光検出素子1の構成は、第1実施形態の構成と同じでよい。第2実施形態では、記録部31a、31bから記録部32a、32bへのイベント信号Eon、Eoffのそれぞれの転送動作が、次のフレームから開始されている点で第1実施形態と異なる。
Second Embodiment
10 is a timing chart showing an example of the operation of the photodetector 1 according to the second embodiment. The configuration of the photodetector 1 according to the second embodiment may be the same as that of the first embodiment. The second embodiment differs from the first embodiment in that the transfer operations of the event signals Eon and Eoff from the recording units 31a and 31b to the recording units 32a and 32b are started from the next frame.
まず、t1~t3の動作は、図9のt1~t3の動作と同じである。これにより、オンイベント信号Eonおよびオフイベント信号Eoffの検出動作が実行される。オンイベント信号Eon_1は、記録部31aに記録される。オフイベント信号Eoff_1は、記録部31bに記録される。 First, the operation from t1 to t3 is the same as the operation from t1 to t3 in FIG. 9. This executes the detection operation of the on-event signal Eon and the off-event signal Eoff. The on-event signal Eon_1 is recorded in the recording unit 31a. The off-event signal Eoff_1 is recorded in the recording unit 31b.
次に、t3~t4のリセット動作は、図9のt3~t4のリセット動作と同じである。ただし、t3~t4のリセット動作の期間において、記録部31aに記録されたオンイベント信号Eon_1は、記録部32aにはまだ転送されない。記録部31bに記録されたオフイベント信号Eoff_1も、記録部32bにはまだ転送されない。よって、リセット動作の期間においては、オンイベント信号Eon_1およびオフイベント信号Eoff_1の読出し動作もまだ開始されない。 Next, the reset operation from t3 to t4 is the same as the reset operation from t3 to t4 in FIG. 9. However, during the reset operation from t3 to t4, the on-event signal Eon_1 recorded in recording unit 31a has not yet been transferred to recording unit 32a. The off-event signal Eoff_1 recorded in recording unit 31b has not yet been transferred to recording unit 32b. Therefore, during the reset operation, the read operation of the on-event signal Eon_1 and the off-event signal Eoff_1 has not yet started.
t4~t7において、次のフレームが実行される。このとき、記録部31aに記録されたオンイベント信号Eon_1が記録部32aに転送され、記録部31bに記録されたオフイベント信号Eoff_1が記録部32bに転送される。また、記録部32aは、オンイベント信号Eon_1を読出し配線VSLaへ出力開始する。記録部32bは、オフイベント信号Eoff_1を読出し配線VSLbへ出力開始する。即ち、オンイベント信号Eon_1は、次のフレームにおいて、記録部31aから記録部32aへ一旦転送され、記録部32aから読出し配線VSLaへ順次読み出される。オフイベント信号Eoff_1は、次のフレームにおいて、記録部31bから記録部32bへ一旦転送され、記録部32bから読出し配線VSLbへ順次読み出される。 The next frame is executed from t4 to t7. At this time, the on-event signal Eon_1 recorded in the recording unit 31a is transferred to the recording unit 32a, and the off-event signal Eoff_1 recorded in the recording unit 31b is transferred to the recording unit 32b. The recording unit 32a also starts outputting the on-event signal Eon_1 to the readout wiring VSLa. The recording unit 32b starts outputting the off-event signal Eoff_1 to the readout wiring VSLb. That is, in the next frame, the on-event signal Eon_1 is temporarily transferred from the recording unit 31a to the recording unit 32a, and is sequentially read out from the recording unit 32a to the readout wiring VSLa. In the next frame, the off-event signal Eoff_1 is temporarily transferred from the recording unit 31b to the recording unit 32b, and is sequentially read out from the recording unit 32b to the readout wiring VSLb.
次のフレームが開始されると、t4~t5において、オンイベント信号Eonの検出動作がt1~t2の動作と同様に実行され、t5~t6において、オフイベント信号Eoffの検出動作がt2~t3の動作と同様に実行される。これにより、記録部31aは、オンイベント信号Eon_2を記録し、記録部31bは、オフイベント信号Eoff_2を記録する。このとき、オンイベント信号Eon_1およびオフイベント信号Eoff_1は、記録部32a、32bから読出し配線VSLa、VSLbへそれぞれ読み出されている最中である。しかし、オンイベント信号Eon_1は、記録部32aに記録され保持されており、オフイベント信号Eoff_1は、記録部32bに記録され保持されている。従って、記録部31aがオンイベント信号Eon_2で更新され、記録部31bがオフイベント信号Eoff_2で更新されても、オンイベント信号Eon_1およびオフイベント信号Eoff_1の読出し動作に差し支えない。 When the next frame starts, from t4 to t5, the detection operation of the on-event signal Eon is performed in the same manner as the operation from t1 to t2, and from t5 to t6, the detection operation of the off-event signal Eoff is performed in the same manner as the operation from t2 to t3. As a result, the recording unit 31a records the on-event signal Eon_2, and the recording unit 31b records the off-event signal Eoff_2. At this time, the on-event signal Eon_1 and the off-event signal Eoff_1 are being read out from the recording units 32a and 32b to the readout wirings VSLa and VSLb, respectively. However, the on-event signal Eon_1 is recorded and held in the recording unit 32a, and the off-event signal Eoff_1 is recorded and held in the recording unit 32b. Therefore, even if the recording unit 31a is updated with the on-event signal Eon_2 and the recording unit 31b is updated with the off-event signal Eoff_2, there is no problem with the read operation of the on-event signal Eon_1 and the off-event signal Eoff_1.
尚、第2実施形態では、イベント信号Eon_1、Eoff_1の読出し動作は、次のフレームの検出動作が開始されるまでに終了する必要がある。次のフレームの検出動作では、イベント信号Eon_2、Eoff_2の読出し動作が開始されるからである。 In the second embodiment, the read operation of the event signals Eon_1 and Eoff_1 must be completed before the detection operation of the next frame starts. This is because the read operation of the event signals Eon_2 and Eoff_2 starts during the detection operation of the next frame.
即ち、t7~t9において、検出動作がt4~t6の動作と同様に実行される。このとき、イベント信号Eon_2、Eoff_2が記録部32a、32bから読出し配線VSLa、VSLbへそれぞれ読み出される。 In other words, from t7 to t9, the detection operation is performed in the same manner as the operation from t4 to t6. At this time, the event signals Eon_2 and Eoff_2 are read out from the recording units 32a and 32b to the read lines VSLa and VSLb, respectively.
その後、t9以降、さらに次のフレームのリセット動作が開始される。 Then, from t9 onwards, the reset operation for the next frame begins.
第2実施形態による動作でも、記録部31a、31bに記録されたイベント信号Eon、Eoffを記録部32a、32bへ予め転送しておいて、イベント信号Eon、Eoffを記録部32a、32bから読み出しながら、次のフレームを実行することができる。これにより、フレームを短縮し、イベント信号の検出周期を短縮することができる。 Even in the operation of the second embodiment, the event signals Eon and Eoff recorded in the recording units 31a and 31b can be transferred to the recording units 32a and 32b in advance, and the next frame can be executed while the event signals Eon and Eoff are read from the recording units 32a and 32b. This makes it possible to shorten the frame and the detection period of the event signal.
(第3実施形態)
図11は、第3実施形態によるイベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。第3実施形態の記録領域30は、インバータINV1a、INVbと、論理ゲートG1a、G1bとを備える。
Third Embodiment
11 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the third embodiment. The recording area 30 of the third embodiment includes inverters INV1a and INVb, and logic gates G1a and G1b.
インバータINV1aは、記録部32aの出力端子と論理ゲートG1aとの間に接続されている。インバータINV1aは、記録部32aの出力信号の反転信号を論理ゲートG1aに出力する。 The inverter INV1a is connected between the output terminal of the recording unit 32a and the logic gate G1a. The inverter INV1a outputs an inverted signal of the output signal of the recording unit 32a to the logic gate G1a.
論理ゲートG1aの2つの入力端子は、インバータINV1aの出力端子と記録部31aの出力端子とにそれぞれ接続されている。論理ゲートG1aの出力端子は、読出し配線VSLaに接続されている。論理ゲートG1aは、記録部31aの出力信号とインバータINV1aの出力信号との論理積を読出し配線VSL1aに出力する。 The two input terminals of the logic gate G1a are connected to the output terminal of the inverter INV1a and the output terminal of the recording unit 31a, respectively. The output terminal of the logic gate G1a is connected to the read wiring VSLa. The logic gate G1a outputs the logical product of the output signal of the recording unit 31a and the output signal of the inverter INV1a to the read wiring VSL1a.
インバータINV1bは、記録部32bの出力端子と論理ゲートG1bとの間に接続されている。インバータINV1bは、記録部32bの出力信号の反転信号を論理ゲートG1bに出力する。 Inverter INV1b is connected between the output terminal of recording unit 32b and logic gate G1b. Inverter INV1b outputs an inverted signal of the output signal of recording unit 32b to logic gate G1b.
論理ゲートG1bの2つの入力端子は、インバータINV1bの出力端子と記録部31bの出力端子とにそれぞれ接続されている。論理ゲートG1bの出力端子は、読出し配線VSLbに接続されている。論理ゲートG1bは、記録部31bの出力信号とインバータINV1bの出力信号との論理積を読出し配線VSL1bに出力する。 The two input terminals of the logic gate G1b are connected to the output terminal of the inverter INV1b and the output terminal of the recording unit 31b, respectively. The output terminal of the logic gate G1b is connected to the read wiring VSLb. The logic gate G1b outputs the logical product of the output signal of the recording unit 31b and the output signal of the inverter INV1b to the read wiring VSL1b.
第3実施形態のその他の構成は、第1実施形態の対応する構成と同様でよい。 The other configurations of the third embodiment may be similar to the corresponding configurations of the first embodiment.
尚、第3実施形態では、インバータINV1a、INV1bは、記録部32a、32bの出力端子に接続されている。しかし、インバータINV1a、INV1bは、記録部32a、32bの出力端子に代わり、記録部31a、31bの出力端子にそれぞれ接続されてもよい。この場合、論理ゲートG1aは、記録部31aの出力信号の反転信号と記録部32aの出力信号との論理積を読出し配線VSL1aに出力する。論理ゲートG1bは、記録部31bの出力信号の反転信号と記録部32bの出力信号との論理積を読出し配線VSL1bに出力する。 In the third embodiment, the inverters INV1a and INV1b are connected to the output terminals of the recording units 32a and 32b. However, the inverters INV1a and INV1b may be connected to the output terminals of the recording units 31a and 31b, respectively, instead of the output terminals of the recording units 32a and 32b. In this case, the logic gate G1a outputs the logical product of the inverted signal of the output signal of the recording unit 31a and the output signal of the recording unit 32a to the read wiring VSL1a. The logic gate G1b outputs the logical product of the inverted signal of the output signal of the recording unit 31b and the output signal of the recording unit 32b to the read wiring VSL1b.
次に、第3実施形態による光検出素子1の動作を説明する。 Next, the operation of the light detection element 1 according to the third embodiment will be described.
図12および図13は、第3実施形態による光検出素子1の動作例を示すタイミング図である。第3実施形態の光検出素子1の検出動作、リセット動作、読出し動作は、基本的に図10に示すそれぞれの動作と同じでよい。ただし、第3実施形態では、1フレーム内において、検出動作、リセット動作および読出し動作が1フレーム内においてそれぞれ実行されており、読出し動作は、検出動作またはリセット動作に重複していない。 FIGS. 12 and 13 are timing diagrams showing an example of the operation of the photodetector 1 according to the third embodiment. The detection operation, reset operation, and read operation of the photodetector 1 according to the third embodiment may be basically the same as the respective operations shown in FIG. 10. However, in the third embodiment, the detection operation, reset operation, and read operation are each performed within one frame, and the read operation does not overlap with the detection operation or reset operation.
また、読出し配線VSLa、VSLbに読み出される読出し信号がそれぞれ論理ゲートG1a、G1bの出力信号である。従って、読出し配線VSLaに読み出される読出し信号は、記録部1aと記録部2aの出力信号の論理演算結果となり、読出し配線VSLbに読み出される読出し信号は、記録部1bと記録部2bの出力信号の論理演算結果である。 The read signals read out to the read lines VSLa and VSLb are the output signals of the logic gates G1a and G1b, respectively. Therefore, the read signal read out to the read line VSLa is the result of a logical operation between the output signals of the recording units 1a and 2a, and the read signal read out to the read line VSLb is the result of a logical operation between the output signals of the recording units 1b and 2b.
この場合、例えば、図8の受光部221が受光量の変化を検知したときに、対数変換回路310の出力電圧が複数のフレームf1~f6に亘って徐々に大きく変化する場合がある。このような場合に、1つのイベントに対して、複数のイベント信号が検出されることがある。このような1つのイベントに対して検出される複数のイベント信号は、テールイベントと呼ばれる。このようなテールイベントを1つのイベント信号として検出するために、第3実施形態による光検出素子1は、記録領域30に論理ゲートG1a、G1bを備える。 In this case, for example, when the light receiving unit 221 in FIG. 8 detects a change in the amount of received light, the output voltage of the logarithmic conversion circuit 310 may change gradually and significantly over multiple frames f1 to f6. In such a case, multiple event signals may be detected for one event. Such multiple event signals detected for one event are called tail events. In order to detect such tail events as one event signal, the light detection element 1 according to the third embodiment has logic gates G1a and G1b in the recording area 30.
尚、以下、オンイベント信号またはオフイベント信号が立ち上がっていない状態において、記録部31a、32a、31b、32bが、論理“0”を記録しているとし、オンイベント信号またはオフイベント信号が立ち上がったときに、記録部31a、32a、31b、32bが、論理“1”を記録するものとする。 In the following, it is assumed that when the on-event signal or off-event signal is not rising, the recording units 31a, 32a, 31b, and 32b record a logic "0," and when the on-event signal or off-event signal rises, the recording units 31a, 32a, 31b, and 32b record a logic "1."
例えば、図12に示すように、受光部221の出力が立ち上がり、対数変換回路310の出力が徐々に上昇していく。 For example, as shown in FIG. 12, the output of the light receiving unit 221 rises and the output of the logarithmic conversion circuit 310 gradually increases.
最初のフレームf1において、コンパレータ336に入力される電圧信号が比較基準電圧Vonを超えると、コンパレータ336の出力(オンイベント信号)が立ち上がり、図13に示すように記録部31aが “1”を記録する。即ち、図10のイベント信号Eon_1が“1”となる。このとき、図13に示すように、記録部32aはまだ“0”のままであるので、論理ゲートG1aは、“1”を出力する。 In the first frame f1, when the voltage signal input to the comparator 336 exceeds the comparison reference voltage Von, the output (on-event signal) of the comparator 336 rises, and the recording unit 31a records "1" as shown in FIG. 13. That is, the event signal Eon_1 in FIG. 10 becomes "1". At this time, as shown in FIG. 13, the recording unit 32a is still at "0", so the logic gate G1a outputs "1".
次のフレームf2において、比較基準電圧Vonはフレームf1における比較基準電圧よりも高い閾値電圧に更新されている。また、図13に示すように、記録部31aのオンイベント信号“1”が記録部32aに転送されて、記録部32aは、“1”を記録する。そして、コンパレータ336に入力される電圧信号が更新後の比較基準電圧Vonを超えると、コンパレータ336の出力(オンイベント信号)が立ち上がり、図13に示すように記録部31aが “1”を記録する。従って、記録部31a、32aは、ともに“1”を出力し、論理ゲートG1aは、“0”を出力する。 In the next frame f2, the comparison reference voltage Von is updated to a higher threshold voltage than the comparison reference voltage in frame f1. Also, as shown in FIG. 13, the on-event signal "1" of recording unit 31a is transferred to recording unit 32a, which records "1". Then, when the voltage signal input to comparator 336 exceeds the updated comparison reference voltage Von, the output (on-event signal) of comparator 336 rises, and recording unit 31a records "1" as shown in FIG. 13. Therefore, both recording units 31a and 32a output "1", and logic gate G1a outputs "0".
フレームf3~f6は、フレームf2と同様の動作を繰り返す。従って、フレームf3~f6において、論理ゲートG1aは、“0”を出力する。このとき、比較基準電圧Vonは、その直前のフレームにおける比較基準電圧よりも高い閾値電圧に更新されている。 Frames f3 to f6 repeat the same operation as frame f2. Therefore, in frames f3 to f6, logic gate G1a outputs "0." At this time, the comparison reference voltage Von is updated to a threshold voltage higher than the comparison reference voltage in the previous frame.
フレームf7において、比較基準電圧Vonは比較基準電圧を超えなくなる。従って、図13に示すように、記録部32aは、“0”を記録する。従って、記録部31a、32aは、それぞれ“0”および “1”を出力し、論理ゲートG1aは、“0”を出力する。その後、信号電圧が比較基準電圧Vonを超えない限り、論理ゲートG1aは、“0”を出力する。 In frame f7, the comparison reference voltage Von no longer exceeds the comparison reference voltage. Therefore, as shown in FIG. 13, the recording unit 32a records "0". Therefore, the recording units 31a and 32a output "0" and "1", respectively, and the logic gate G1a outputs "0". Thereafter, as long as the signal voltage does not exceed the comparison reference voltage Von, the logic gate G1a outputs "0".
即ち、フレームf1~f7・・・において、論理ゲートG1aは、“1”、“0”、“0”、“0” 、“0” 、“0” 、“0”・・・ をそれぞれ出力する。 In other words, in frames f1 to f7, logic gate G1a outputs "1", "0", "0", "0", "0", "0", "0", "0", "0"... respectively.
このように、第3実施形態による光検出素子1は、1つのイベントが複数のフレームに亘るテールイベントを含む場合であっても、電圧信号が連続して更新後の比較基準電圧Vonを超える限りにおいて、1つのイベント信号として検出することができる。 In this way, the photodetector element 1 according to the third embodiment can detect an event as a single event signal even if the event includes a tail event that spans multiple frames, as long as the voltage signal continuously exceeds the updated comparison reference voltage Von.
上記具体例は、オンイベント信号について説明した。しかし、オフイベント信号についても、同様である。この場合、コンパレータ336に入力される電圧信号が比較基準電圧Voffを下回ったときに、コンパレータ336の出力(オフイベント信号)が立ち上がり、記録部31bが “1”を記録する。このとき、記録部32bはまだ“0”のままであるので、論理ゲートG1bは、“1”を出力する。 The above specific example describes an on-event signal. However, the same applies to an off-event signal. In this case, when the voltage signal input to comparator 336 falls below the comparison reference voltage Voff, the output of comparator 336 (off-event signal) rises and recording unit 31b records "1". At this time, recording unit 32b is still at "0", so logic gate G1b outputs "1".
次のフレームにおいて、比較基準電圧Voffは直前のフレームにおける比較基準電圧よりも低い閾値電圧に更新される。また、記録部31bのオフイベント信号“1”が記録部32bに転送されて、記録部32bは、“1”を記録する。そして、コンパレータ336に入力される電圧信号が更新後の比較基準電圧Voffを下回ると、コンパレータ336の出力(オフイベント信号)が立ち上がり、記録部31bが “1”を記録する。従って、記録部31b、32bは、ともに“1”を出力し、論理ゲートG1bは、“0”を出力する。 In the next frame, the comparison reference voltage Voff is updated to a threshold voltage lower than the comparison reference voltage in the previous frame. In addition, the off event signal "1" of recording unit 31b is transferred to recording unit 32b, which records "1". Then, when the voltage signal input to comparator 336 falls below the updated comparison reference voltage Voff, the output (off event signal) of comparator 336 rises, and recording unit 31b records "1". Therefore, recording units 31b and 32b both output "1", and logic gate G1b outputs "0".
その後のフレームにおいて、電圧信号が連続して更新後の比較基準電圧Voffを下回る限りにおいて、論理ゲートG1bは、“0”を出力する。このとき、比較基準電圧Voffは、その直前のフレームにおける比較基準電圧よりも低い閾値電圧に更新されている。 In the subsequent frames, as long as the voltage signal continues to fall below the updated comparison reference voltage Voff, the logic gate G1b outputs "0." At this time, the comparison reference voltage Voff has been updated to a threshold voltage lower than the comparison reference voltage in the previous frame.
信号電圧が比較基準電圧Voffを下回らなくなると、記録部32bは、“0”を記録する。従って、記録部31a、32aは、それぞれ“0”および “1”を出力し、論理ゲートG1aは、“0”を出力する。その後、信号電圧が比較基準電圧Voffを下回らない限り、論理ゲートG1bは、“0”を出力する。 When the signal voltage does not fall below the comparison reference voltage Voff, the recording unit 32b records "0". Therefore, the recording units 31a and 32a output "0" and "1", respectively, and the logic gate G1a outputs "0". Thereafter, as long as the signal voltage does not fall below the comparison reference voltage Voff, the logic gate G1b outputs "0".
このように、1つのイベントが複数のフレームに亘るテールイベントを含む場合であっても、1つのイベント信号として検出することができる。 In this way, even if a single event includes a tail event that spans multiple frames, it can be detected as a single event signal.
第3実施形態のその他の動作は、第2実施形態の動作と同様でよい。よって、第3実施形態は、第2実施形態と同様の効果を得ることができる。 Other operations of the third embodiment may be similar to those of the second embodiment. Therefore, the third embodiment can achieve the same effects as the second embodiment.
(第4実施形態)
図14は、第4実施形態によるイベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。第4実施形態の記録領域30は、論理ゲートG2a、G2bを備える。
Fourth Embodiment
14 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the fourth embodiment. The recording area 30 of the fourth embodiment includes logic gates G2a and G2b.
論理ゲートG2aの2つの入力端子は、記録部31aの出力端子と記録部32aの出力端子とにそれぞれ接続されている。論理ゲートG2aの出力端子は、読出し配線VSLaに接続されている。論理ゲートG2aは、記録部31aの出力信号と記録部32aの出力信号との論理積を読出し配線VSL1aおよび制御部40に出力する。 The two input terminals of logic gate G2a are connected to the output terminal of recording unit 31a and the output terminal of recording unit 32a, respectively. The output terminal of logic gate G2a is connected to read wiring VSLa. Logic gate G2a outputs the logical product of the output signal of recording unit 31a and the output signal of recording unit 32a to read wiring VSL1a and control unit 40.
論理ゲートG2bの2つの入力端子は、記録部31bの出力端子と記録部32bの出力端子とにそれぞれ接続されている。論理ゲートG2bの出力端子は、読出し配線VSLbに接続されている。論理ゲートG2bは、記録部31bの出力信号と記録部32bの出力信号との論理積を読出し配線VSL1bおよび制御部40に出力する。 The two input terminals of logic gate G2b are connected to the output terminal of recording unit 31b and the output terminal of recording unit 32b, respectively. The output terminal of logic gate G2b is connected to read wiring VSLb. Logic gate G2b outputs the logical product of the output signal of recording unit 31b and the output signal of recording unit 32b to read wiring VSL1b and control unit 40.
論理ゲートG2a、G2bのそれぞれの出力端子は、制御部40に接続されている。制御部40は、論理ゲートG2a、G2bのそれぞれの出力信号に基づいてスイッチング素子332を制御する。よって、制御部40は、オンイベント信号が2回連続して立ち上がったときにリセット動作を実行する。あるいは、制御部40は、オフイベント信号が2回連続して立ち上がったときにリセット動作を実行する。 The output terminals of the logic gates G2a and G2b are connected to the control unit 40. The control unit 40 controls the switching element 332 based on the output signals of the logic gates G2a and G2b. Thus, the control unit 40 executes a reset operation when the on-event signal rises two consecutive times. Alternatively, the control unit 40 executes a reset operation when the off-event signal rises two consecutive times.
第4実施形態のその他の構成は、第1実施形態の対応する構成と同様でよい。 The other configurations of the fourth embodiment may be similar to the corresponding configurations of the first embodiment.
次に、第4実施形態による光検出素子1の動作を説明する。 Next, the operation of the photodetector element 1 according to the fourth embodiment will be described.
図15および図16は、第4実施形態による光検出素子1の動作例を示すタイミング図である。第4実施形態の光検出素子1の検出動作、リセット動作、読出し動作は、基本的に図10に示すそれぞれの動作と同じでよい。ただし、第4実施形態では、1フレーム内において、検出動作、リセット動作および読出し動作が1フレーム内においてそれぞれ実行されており、読出し動作は、検出動作またはリセット動作に重複していない。 FIGS. 15 and 16 are timing diagrams showing an example of the operation of the photodetector 1 according to the fourth embodiment. The detection operation, reset operation, and read operation of the photodetector 1 according to the fourth embodiment may basically be the same as the respective operations shown in FIG. 10. However, in the fourth embodiment, the detection operation, reset operation, and read operation are each performed within one frame, and the read operation does not overlap with the detection operation or reset operation.
また、制御部40に出力される信号は、論理ゲートG2a、G2bの出力信号である。従って、制御部40は、記録部1aと記録部2aの出力信号の論理積または記録部1bと記録部2bの出力信号の論理積をリセット信号としてリセット動作を実行する。即ち、イベントが連続して発生したときに、制御部40は、リセット動作を実行する。 The signal output to the control unit 40 is the output signal of logic gates G2a and G2b. Therefore, the control unit 40 executes a reset operation using the logical product of the output signals of recording unit 1a and recording unit 2a or the logical product of the output signals of recording unit 1b and recording unit 2b as a reset signal. In other words, when events occur consecutively, the control unit 40 executes a reset operation.
尚、以下、オンイベント信号またはオフイベント信号が立ち上がっていない状態において、記録部31a、32a、31b、32bが、論理“0”を記録しているとし、オンイベント信号またはオフイベント信号が連続して立ち上がったときに、記録部31a、32a、31b、32bが、論理“1”を記録するものとする。 In the following, it is assumed that when the on-event signal or off-event signal is not rising, the recording units 31a, 32a, 31b, and 32b record a logic "0," and when the on-event signal or off-event signal rises consecutively, the recording units 31a, 32a, 31b, and 32b record a logic "1."
例えば、図15において、対数変換回路310の出力電圧をV310とすると、比較基準電圧Vonは、イベントが無い状態において、出力電圧V310よりも閾値電圧の分だけ高い。 For example, in FIG. 15, if the output voltage of the logarithmic conversion circuit 310 is V310, the comparison reference voltage Von is higher than the output voltage V310 by the threshold voltage when there is no event.
ここで、フレームf1において、ノイズNが発生した場合、出力電圧V310が比較基準電圧Vonを瞬間的に超えることがある。この場合、出力電圧V310が比較基準電圧Vonを超えるので、記録部31aは“1”を記録する。しかし、その次のフレームf2では、出力電圧V310は、比較基準電圧Vonを超えていない。従って、記録部31aの“1”が記録部32aに転送されるものの、記録部31aには、“0”が記録される。記録部31a、32aの両方が“1”とならないので、論理ゲートG2aは、“0”を維持する。この場合、制御部40はリセット期間において、リセット動作を実行しない。このように、1フレームのみにおいて、出力電圧V310が比較基準電圧Vonを超えても、制御部40はリセット期間において、リセット動作を実行しない。 Here, if noise N occurs in frame f1, the output voltage V310 may momentarily exceed the comparison reference voltage Von. In this case, since the output voltage V310 exceeds the comparison reference voltage Von, the recording unit 31a records "1". However, in the next frame f2, the output voltage V310 does not exceed the comparison reference voltage Von. Therefore, although the "1" of the recording unit 31a is transferred to the recording unit 32a, a "0" is recorded in the recording unit 31a. Since both recording units 31a and 32a are not "1", the logic gate G2a maintains "0". In this case, the control unit 40 does not execute a reset operation during the reset period. In this way, even if the output voltage V310 exceeds the comparison reference voltage Von in only one frame, the control unit 40 does not execute a reset operation during the reset period.
フレームf3、f4において、ノイズおよびイベントが発生しておらず、出力電圧V310が比較基準電圧Vonを超えていない。従って、記録部31a、32aが“0”を記録しており、論理ゲートG2aは、“0”を出力する。 In frames f3 and f4, no noise or event occurs, and the output voltage V310 does not exceed the comparison reference voltage Von. Therefore, the recording units 31a and 32a record "0", and the logic gate G2a outputs "0".
例えば、図16において、フレームf1において、イベントが発生した場合、出力電圧V310が比較基準電圧Vonを超える。この場合、出力電圧V310が比較基準電圧Vonを超えるので、記録部31aは“1”を記録する。しかし、フレームf1では、まだ論理ゲートG2aは“0”を維持しているので、制御部40はフレームf1のリセット期間においてはリセット動作を実行しない。 For example, in FIG. 16, if an event occurs in frame f1, the output voltage V310 exceeds the comparison reference voltage Von. In this case, since the output voltage V310 exceeds the comparison reference voltage Von, the recording unit 31a records "1". However, since the logic gate G2a still maintains "0" in frame f1, the control unit 40 does not perform a reset operation during the reset period of frame f1.
次のフレームf2では、イベントが発生して、出力電圧V310が比較基準電圧Vonを超えたままである。従って、記録部31aの“1”が記録部32aに転送され、記録部31aには、“1”が記録される。記録部31a、32aの両方が“1”となるので、論理ゲートG2aは、“1”を出力する。この場合、制御部40はリセット期間において、リセット動作を実行し、比較基準電圧Vonが更新される。このように、連続した2つのフレームにおいて、出力電圧V310が比較基準電圧Vonを超えている場合、制御部40はリセット期間において、リセット動作を実行する。 In the next frame f2, an event occurs and the output voltage V310 remains above the comparison reference voltage Von. Therefore, the "1" in the recording unit 31a is transferred to the recording unit 32a, and a "1" is recorded in the recording unit 31a. Since both recording units 31a and 32a are "1", the logic gate G2a outputs "1". In this case, the control unit 40 executes a reset operation during the reset period, and the comparison reference voltage Von is updated. In this way, if the output voltage V310 exceeds the comparison reference voltage Von in two consecutive frames, the control unit 40 executes a reset operation during the reset period.
フレームf3、f4において、イベントが発生しておらず、出力電圧V310が比較基準電圧Vonを超えていない。従って、記録部31aが“0”を記録しており、論理ゲートG2aは、“0”を出力する。 In frames f3 and f4, no event occurs, and the output voltage V310 does not exceed the comparison reference voltage Von. Therefore, the recording unit 31a records "0", and the logic gate G2a outputs "0".
上記具体例は、オンイベント信号について説明した。しかし、オフイベント信号についても、同様である。オフイベント信号の検出については、オンイベント信号の上記説明から容易に理解できる。従って、第4実施形態によるオフイベント信号の説明はここでは省略する。 The above specific example describes an on-event signal. However, the same applies to an off-event signal. Detection of an off-event signal can be easily understood from the above explanation of an on-event signal. Therefore, a description of the off-event signal according to the fourth embodiment will be omitted here.
もし、論理ゲートG2a、G2bが設けられていない場合、1フレーム内において瞬間的に立ち上がるノイズをイベントの発生と判断して、制御部40がリセット動作を実行し、比較基準電圧VonまたはVoffが更新されてしまう。 If logic gates G2a and G2b were not provided, a momentary noise that occurs within one frame would be judged to be the occurrence of an event, and the control unit 40 would execute a reset operation, updating the comparison reference voltage Von or Voff.
これに対し、第4実施形態による光検出素子1は、論理ゲートG2a、G2bを備え、論理ゲートG2a、G2bは、記録部31a、32aの出力信号の論理積、または、記録部31b、32bの出力信号の論理積を出力する。これにより、連続した2つ以上のフレームにおいて、オンイベント信号またはオフイベント信号が検出されたときに、論理ゲートG2a、G2bは出力信号を立ち上げ、制御部40は、リセット動作を実行することができる。その結果、光検出素子1は、ノイズをイベントとして誤って判断することを抑制し、イベントを確実に検出することができる。 In contrast, the photodetector element 1 according to the fourth embodiment includes logic gates G2a and G2b, which output the logical product of the output signals of the recording units 31a and 32a, or the logical product of the output signals of the recording units 31b and 32b. As a result, when an on-event signal or an off-event signal is detected in two or more consecutive frames, the logic gates G2a and G2b raise their output signals, and the control unit 40 can perform a reset operation. As a result, the photodetector element 1 is able to suppress erroneous determination of noise as an event and reliably detect events.
第4実施形態のその他の動作は、第2実施形態の動作と同様でよい。よって、第4実施形態は、第2実施形態と同様の効果を得ることができる。 Other operations of the fourth embodiment may be similar to those of the second embodiment. Therefore, the fourth embodiment can achieve the same effects as the second embodiment.
(第5実施形態)
図17は、第5実施形態によるイベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。第5実施形態の記録領域30は、コンパレータ336の出力端子と読出し配線VSLaとの間に直列に接続された2つの記録部31a、32aを備える。しかし、記録部31b、32bおよび読出し配線VSLbは省略されている。
Fifth Embodiment
17 is a circuit diagram showing an example of the configuration of the event detection circuit 300, the recording area 30, and the control unit 40 according to the fifth embodiment. The recording area 30 of the fifth embodiment includes two recording units 31a and 32a connected in series between the output terminal of the comparator 336 and the readout wiring VSLa. However, the recording units 31b and 32b and the readout wiring VSLb are omitted.
一方、この場合、記録部31a、32aは、オンイベント信号Eonとオフイベント信号Eoffを交互に記録する。また、記録部31a、32aは、読出し配線VSLaを介してオンイベント信号Eonとオフイベント信号Eoffを交互に読み出す。従って、各画素の読出し動作は、各フレームに対して2回ずつ実行される。 In this case, the recording units 31a and 32a alternately record the on-event signal Eon and the off-event signal Eoff. The recording units 31a and 32a also alternately read out the on-event signal Eon and the off-event signal Eoff via the readout wiring VSLa. Therefore, the readout operation for each pixel is performed twice for each frame.
図18は、第5実施形態による光検出素子1の動作例を示すタイミング図である。検出動作およびリセット動作は、それぞれ第1実施形態のそれらと基本的に同じである。しかし、第5実施形態による光検出素子1は、記録部31a、32aがオンイベント信号Eonおよびオフイベント信号Eoffを交互に検出する。 FIG. 18 is a timing diagram showing an example of the operation of the photodetector 1 according to the fifth embodiment. The detection operation and reset operation are basically the same as those in the first embodiment. However, in the photodetector 1 according to the fifth embodiment, the recording units 31a and 32a alternately detect the on-event signal Eon and the off-event signal Eoff.
例えば、フレームf1の検出動作では、制御部40は、スイッチング素子333をオンにする。フレームf1の検出動作では、イベント検出回路300は、比較基準電圧Vonを用いてオンイベント信号Eonを検出し、記録部31aは、オンイベント信号Eonを記録する。記録部31aのオンイベント信号Eonは、記録部32aに転送される。フレームf1のリセット動作および次のフレームf2の検出動作において、記録部32aのオンイベント信号Eonは、読出し配線VSLaに読み出される。 For example, in the detection operation of frame f1, the control unit 40 turns on the switching element 333. In the detection operation of frame f1, the event detection circuit 300 detects the on-event signal Eon using the comparison reference voltage Von, and the recording unit 31a records the on-event signal Eon. The on-event signal Eon of the recording unit 31a is transferred to the recording unit 32a. In the reset operation of frame f1 and the detection operation of the next frame f2, the on-event signal Eon of the recording unit 32a is read out to the read wiring VSLa.
次のフレームf2の検出動作では、制御部40は、スイッチング素子335をオンにする。フレームf2の検出動作では、イベント検出回路300は、比較基準電圧Voffを用いてオフイベント信号Eoffを検出し、記録部31a、32aは、オフイベント信号Eoffを記録する。記録部31aのオフイベント信号Eoffは、記録部32aに転送される。フレームf2のリセット動作および次のフレームf3の検出動作において、記録部32aのオフイベント信号Eoffは、読出し配線VSLaに読み出される。 In the detection operation of the next frame f2, the control unit 40 turns on the switching element 335. In the detection operation of frame f2, the event detection circuit 300 detects the off event signal Eoff using the comparison reference voltage Voff, and the recording units 31a and 32a record the off event signal Eoff. The off event signal Eoff of the recording unit 31a is transferred to the recording unit 32a. In the reset operation of frame f2 and the detection operation of the next frame f3, the off event signal Eoff of the recording unit 32a is read out to the read wiring VSLa.
このように、記録部31a、32aは、オンイベント信号Eonおよびオフイベント信号Eoffを交互に記録し、交互に読み出す。即ち、リセット動作または次のフレームの検出動作において、記録部32aは、記録部31aからのイベント信号EonまたはEoffを交互に記録し、このイベント信号EonまたはEoffを読出し配線VSLaに交互に出力する。 In this way, the recording units 31a and 32a alternately record and alternately read out the on-event signal Eon and the off-event signal Eoff. That is, during the reset operation or the detection operation of the next frame, the recording unit 32a alternately records the event signal Eon or Eoff from the recording unit 31a, and alternately outputs this event signal Eon or Eoff to the readout wiring VSLa.
第5実施形態のその他の動作は、第1実施形態と同様でよい。 Other operations of the fifth embodiment may be similar to those of the first embodiment.
第5実施形態によれば、記録部31b、32bおよび読出し配線VSLbは省略されているので、光検出素子1の回路規模やレイアウト面積が小さくなる。また、第5実施形態によれば、リセット動作および検出動作において、イベント信号EonまたはEoffの読出し動作を重複して実行することができる。従って、第5実施形態は、第1実施形態と同様の効果を得ることができる。 According to the fifth embodiment, the recording units 31b, 32b and the readout wiring VSLb are omitted, so that the circuit scale and layout area of the light detection element 1 are reduced. Furthermore, according to the fifth embodiment, the readout operation of the event signal Eon or Eoff can be executed in a redundant manner in the reset operation and the detection operation. Therefore, the fifth embodiment can obtain the same effect as the first embodiment.
(第6実施形態)
図19は、第6実施形態によるイベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。第6実施形態の記録領域30は、記録部32a、32bの出力端子と読出し配線VSLaとの間に接続されたマルチプレクサMUX1を備える。読出し配線VSLaは、マルチプレクサMUX1の出力端子に接続されている。読出し配線VSLbは省略されている。
Sixth Embodiment
19 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the sixth embodiment. The recording area 30 of the sixth embodiment includes a multiplexer MUX1 connected between the output terminals of the recording units 32a and 32b and a readout wiring VSLa. The readout wiring VSLa is connected to the output terminal of the multiplexer MUX1. The readout wiring VSLb is omitted.
マルチプレクサMUX1は、MOSトランジスタなどのスイッチング素子で構成されており、記録部32a、32bのいずれか一方の出力端子を選択的に読出し配線VSLaに接続するように構成されている。制御部40は、マルチプレクサMUX1のスイッチング素子を制御する。 The multiplexer MUX1 is composed of switching elements such as MOS transistors, and is configured to selectively connect one of the output terminals of the recording units 32a and 32b to the readout wiring VSLa. The control unit 40 controls the switching elements of the multiplexer MUX1.
一方、この場合、マルチプレクサMUX1が、記録部32a、32bに記録されたイベント信号EonまたはEoffを交互に読出し配線VSLaに読み出す。従って、各画素の読出し動作は、フレームごとに各アドレスに対して2回ずつ実行される。 In this case, the multiplexer MUX1 alternately reads out the event signals Eon and Eoff recorded in the recording units 32a and 32b to the readout wiring VSLa. Therefore, the readout operation for each pixel is performed twice for each address per frame.
図20は、第6実施形態による光検出素子1の動作例を示すタイミング図である。検出動作およびリセット動作は、それぞれ第1実施形態のそれらと基本的に同じである。しかし、第6実施形態によれば、マルチプレクサMUX1が、記録部32aのオンイベント信号Eonと記録部32bのオフイベント信号Eoffとを交互に読出し配線VSLaへ読み出す。 FIG. 20 is a timing diagram showing an example of the operation of the photodetector 1 according to the sixth embodiment. The detection operation and reset operation are basically the same as those in the first embodiment. However, according to the sixth embodiment, the multiplexer MUX1 alternately reads out the on-event signal Eon of the recording unit 32a and the off-event signal Eoff of the recording unit 32b to the readout wiring VSLa.
例えば、フレームf1の検出動作では、イベント検出回路300は、第1実施形態と同様に、検出動作およびリセット動作を実行する。記録部31aおよび31bは、検出されたイベント信号Eon_1、Eoff_1をそれぞれ記録し、リセット動作の開始時にイベント信号Eon_1、Eoff_1を記録部32a、32bへそれぞれ転送する。 For example, in the detection operation of frame f1, the event detection circuit 300 executes the detection operation and the reset operation in the same manner as in the first embodiment. The recording units 31a and 31b record the detected event signals Eon_1 and Eoff_1, respectively, and transfer the event signals Eon_1 and Eoff_1 to the recording units 32a and 32b, respectively, at the start of the reset operation.
マルチプレクサMUX1は、記録部32aの出力端子を読出し配線VSLaに接続し、記録部32aのオンイベント信号Eon_1を読出し配線VSLaに読出す。次に、マルチプレクサMUX1は、記録部32bの出力端子を読出し配線VSLaに接続し、記録部32bのオフイベント信号Eoff_1を読出し配線VSLaに読出す。 The multiplexer MUX1 connects the output terminal of the recording unit 32a to the readout wiring VSLa, and reads out the on-event signal Eon_1 of the recording unit 32a to the readout wiring VSLa. Next, the multiplexer MUX1 connects the output terminal of the recording unit 32b to the readout wiring VSLa, and reads out the off-event signal Eoff_1 of the recording unit 32b to the readout wiring VSLa.
オンイベント信号Eon_1の読出し動作は、フレームf1のリセット動作に重複して実行され、オフイベント信号Eoff_1の読出し動作は、フレームf2の検出動作に重複して実行される。 The read operation of the on-event signal Eon_1 is executed overlapping with the reset operation of frame f1, and the read operation of the off-event signal Eoff_1 is executed overlapping with the detection operation of frame f2.
次のフレームf2の検出動作では、検出動作およびリセット動作の実行後、記録部31aおよび31bは、検出されたオンイベント信号Eon_2、Eoff_2をそれぞれ記録し、リセット動作の開始時にオンイベント信号Eon_2、Eoff_2を記録部32a、32bへそれぞれ転送する。 In the detection operation of the next frame f2, after the detection operation and the reset operation are performed, the recording units 31a and 31b record the detected on-event signals Eon_2 and Eoff_2, respectively, and transfer the on-event signals Eon_2 and Eoff_2 to the recording units 32a and 32b, respectively, at the start of the reset operation.
マルチプレクサMUX1は、記録部32aの出力端子を読出し配線VSLaに接続し、記録部32aのオンイベント信号Eon_2を読出し配線VSLaに読出す。次に、マルチプレクサMUX1は、記録部32bの出力端子を読出し配線VSLaに接続し、記録部32bのオフイベント信号Eoff_2を読出し配線VSLaに読出す。 The multiplexer MUX1 connects the output terminal of the recording unit 32a to the readout wiring VSLa, and reads out the on-event signal Eon_2 of the recording unit 32a to the readout wiring VSLa. Next, the multiplexer MUX1 connects the output terminal of the recording unit 32b to the readout wiring VSLa, and reads out the off-event signal Eoff_2 of the recording unit 32b to the readout wiring VSLa.
オンイベント信号Eon_2の読出し動作は、フレームf2のリセット動作に重複して実行され、オフイベント信号Eoff_2の読出し動作は、フレームf3の検出動作に重複して実行される。 The read operation of the on-event signal Eon_2 is executed overlapping with the reset operation of frame f2, and the read operation of the off-event signal Eoff_2 is executed overlapping with the detection operation of frame f3.
このように、制御部40は、オンイベント信号Eonおよびオフイベント信号Eoffを交互に読み出すようにマルチプレクサMUX1を制御する。 In this way, the control unit 40 controls the multiplexer MUX1 to alternately read out the on-event signal Eon and the off-event signal Eoff.
第6実施形態のその他の動作は、第1実施形態と同様でよい。 Other operations of the sixth embodiment may be similar to those of the first embodiment.
第6実施形態によれば、マルチプレクサMUX1が各画素に追加されるものの、読出し配線VSLbは省略されているので、光検出素子1の回路規模やレイアウト面積が小さくなり得る。また、第6実施形態によれば、リセット動作および検出動作において、イベント信号EonまたはEoffの読出し動作を重複して実行することができる。従って、第6実施形態は、第1実施形態と同様の効果を得ることができる。 According to the sixth embodiment, although a multiplexer MUX1 is added to each pixel, the readout wiring VSLb is omitted, so that the circuit scale and layout area of the photodetection element 1 can be reduced. Also, according to the sixth embodiment, the readout operation of the event signal Eon or Eoff can be executed in a redundant manner in the reset operation and the detection operation. Therefore, the sixth embodiment can obtain the same effect as the first embodiment.
(第7実施形態)
図21は、第7実施形態によるイベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。第7実施形態の複数のイベント検出回路300と複数の記録領域30との間に共通に設けられたバッファBUF1およびマルチプレクサMUX2、MUX3を備えている。
Seventh Embodiment
21 is a circuit diagram showing an example of the configuration of an event detection circuit 300, a recording area 30, and a control unit 40 according to the seventh embodiment. A buffer BUF1 and multiplexers MUX2 and MUX3 are provided in common between a plurality of event detection circuits 300 and a plurality of recording areas 30 of the seventh embodiment.
バッファBUF1は、複数のイベント検出回路300の比較器336の出力端子と、複数の記録領域30との間に設けられており、オンイベント信号Eonまたはオフイベント信号Eoffをイベント検出回路300から記録領域30へ転送する。 The buffer BUF1 is provided between the output terminals of the comparators 336 of the multiple event detection circuits 300 and the multiple recording areas 30, and transfers the on-event signal Eon or the off-event signal Eoff from the event detection circuits 300 to the recording areas 30.
マルチプレクサMUX2は、バッファBUF1の入力端子と複数のコンパレータ336の出力端子との間に設けられ、複数のコンパレータ336から任意に選択された選択コンパレータ336の出力端子をバッファBUF1の入力端子に接続する。 The multiplexer MUX2 is provided between the input terminal of the buffer BUF1 and the output terminals of the multiple comparators 336, and connects the output terminal of a selection comparator 336 arbitrarily selected from the multiple comparators 336 to the input terminal of the buffer BUF1.
マルチプレクサMUX3は、バッファBUF1の出力端子と複数の記録領域30の入力端子との間に設けられ、複数の記録領域30から任意に選択された選択記録領域30の入力端子をバッファBUF1の出力端子に接続する。 The multiplexer MUX3 is provided between the output terminal of the buffer BUF1 and the input terminals of the multiple recording areas 30, and connects the input terminal of a selected recording area 30 arbitrarily selected from the multiple recording areas 30 to the output terminal of the buffer BUF1.
各イベント検出回路300および各記録領域30の構成は、それぞれ第1実施形態のそれらの構成と同様でよい。制御部40は、バッファBUF1と同様に、複数のイベント検出回路300および複数の記録領域30に対して共通に設けられていてもよい。制御部40は、マルチプレクサMUX2、MUX3およびバッファBUF1を制御する。 The configuration of each event detection circuit 300 and each recording area 30 may be the same as that of the first embodiment. The control unit 40 may be provided in common to multiple event detection circuits 300 and multiple recording areas 30, similar to the buffer BUF1. The control unit 40 controls the multiplexers MUX2, MUX3 and the buffer BUF1.
尚、記録領域30の構成は、第1~第6実施形態のいずれの構成であってもよい。 The configuration of the recording area 30 may be any of the configurations in the first to sixth embodiments.
第7実施形態では、マルチプレクサMUX2は、選択コンパレータ336をバッファBUF1に接続し、選択コンパレータ336からのオンイベント信号Eonまたはオフイベント信号EoffをバッファBUF1へ転送する。 In the seventh embodiment, the multiplexer MUX2 connects the selection comparator 336 to the buffer BUF1 and transfers the on-event signal Eon or the off-event signal Eoff from the selection comparator 336 to the buffer BUF1.
バッファBUF1は、選択コンパレータ336からのオンイベント信号Eonまたはオフイベント信号Eoffを増幅してマルチプレクサMUX3へ転送する。 Buffer BUF1 amplifies the on-event signal Eon or off-event signal Eoff from selection comparator 336 and transfers it to multiplexer MUX3.
マルチプレクサMUX3は、選択記録領域30をバッファBUF1に接続し、選択コンパレータ336からのオンイベント信号Eonまたはオフイベント信号Eoffを選択記録領域30へ転送する。これにより、選択記録領域30の記録部31a、32aがオンイベント信号Eonを記録し、あるいは、選択記録領域30の記録部31b、32bがオフイベント信号Eoffを記録することができる。 The multiplexer MUX3 connects the selected recording area 30 to the buffer BUF1 and transfers the on-event signal Eon or the off-event signal Eoff from the selection comparator 336 to the selected recording area 30. This allows the recording units 31a and 32a of the selected recording area 30 to record the on-event signal Eon, or the recording units 31b and 32b of the selected recording area 30 to record the off-event signal Eoff.
イベント検出回路300と記録領域30との間の配線距離が長い場合には、バッファBUF1が必要となる。もし、複数のイベント検出回路300と複数の記録領域30との間のそれぞれに対応してバッファBUF1が設けられている場合、光検出素子1の回路規模が大きくなる。 If the wiring distance between the event detection circuit 300 and the recording area 30 is long, the buffer BUF1 is required. If a buffer BUF1 is provided between each of a plurality of event detection circuits 300 and a plurality of recording areas 30, the circuit scale of the light detection element 1 will become large.
これに対し、第7実施形態では、複数のイベント検出回路300および複数の記録領域30に対して1つのバッファBUF1が共通に設けられている。これにより、光検出素子1の回路規模の増大を抑制することができる。尚、図22では、2つのイベント検出回路300および2つの記録領域30に対して1つのバッファBUF1が共通に設けられている。しかし、3つ以上のイベント検出回路300および3つ以上の記録領域30に対して1つのバッファBUF1が共通に設けられていてもよい。 In contrast, in the seventh embodiment, one buffer BUF1 is provided in common for multiple event detection circuits 300 and multiple recording areas 30. This makes it possible to suppress an increase in the circuit size of the light detection element 1. Note that in FIG. 22, one buffer BUF1 is provided in common for two event detection circuits 300 and two recording areas 30. However, one buffer BUF1 may be provided in common for three or more event detection circuits 300 and three or more recording areas 30.
第7実施形態のその他の構成および動作は、第1~第6実施形態のいずれかの構成および動作と同じでよい。従って、第7実施形態は、第1~第6実施形態のいずれかの効果も得ることができる。 Other configurations and operations of the seventh embodiment may be the same as those of any of the first to sixth embodiments. Therefore, the seventh embodiment can also obtain the effects of any of the first to sixth embodiments.
(第8実施形態)
図22は、第8実施形態によるイベント検出回路300、記録領域30および制御部40の構成の一例を示す回路図である。第8実施形態による記録領域30では、記録部31a、32aがコンパレータ336の出力端子に対して並列に接続されている。記録部31b、32bがコンパレータ336の出力端子に対して並列に接続されている。
Eighth embodiment
22 is a circuit diagram showing an example of the configuration of the event detection circuit 300, the recording area 30, and the control unit 40 according to the eighth embodiment. In the recording area 30 according to the eighth embodiment, the recording units 31a and 32a are connected in parallel to the output terminal of the comparator 336. The recording units 31b and 32b are connected in parallel to the output terminal of the comparator 336.
記録部31a、32aの一方がオンイベント信号Eonを記録しているときに、記録部31a、32aの他方がその直前のオンイベント信号Eonを読出し配線VSLaに出力する。記録部31b、32bの一方がオフイベント信号Eoffを記録しているときに、記録部31b、32bの他方がその前のオフイベント信号Eoffを読出し配線VSLbに出力する。このように、記録部31a、32aは、オンイベント信号Eonの記録動作と読出し動作とを時間的に交互に切り替えて用いられる。記録部31b、32bは、オフイベント信号Eoffの記録動作と読出し動作とを時間的に交互に切り替えて用いられる。よって、記録部31a、32aは、互いに連続した異なるオンイベント信号Eonを交互に記録し、出力する。記録部31b、32bは、互いに連続した異なるオフイベント信号Eoffを交互に記録し、出力する。 When one of the recording units 31a and 32a is recording an on-event signal Eon, the other of the recording units 31a and 32a outputs the immediately preceding on-event signal Eon to the readout wiring VSLa. When one of the recording units 31b and 32b is recording an off-event signal Eoff, the other of the recording units 31b and 32b outputs the immediately preceding off-event signal Eoff to the readout wiring VSLb. In this way, the recording units 31a and 32a are used by alternately switching between the recording operation and the readout operation of the on-event signal Eon over time. The recording units 31b and 32b are used by alternately switching between the recording operation and the readout operation of the off-event signal Eoff over time. Thus, the recording units 31a and 32a alternately record and output consecutive different on-event signals Eon. The recording units 31b and 32b alternately record and output consecutive different off-event signals Eoff.
このような動作を実現するために、記録領域30は、スイッチング素子301a~306a、301b~306bを備える。スイッチング素子301a~306a、301b~306bには、例えばMOSトランジスタが用いられる。 To achieve this operation, the recording area 30 is equipped with switching elements 301a to 306a and 301b to 306b. For example, MOS transistors are used for the switching elements 301a to 306a and 301b to 306b.
スイッチング素子301aは、コンパレータ336の出力端子と記録部31aの入力端子との間に接続されている。スイッチング素子302aは、コンパレータ336の出力端子と記録部32aの入力端子との間に接続されている。 Switching element 301a is connected between the output terminal of comparator 336 and the input terminal of recording unit 31a. Switching element 302a is connected between the output terminal of comparator 336 and the input terminal of recording unit 32a.
スイッチング素子303aは、記録部31aの出力端子と読出し配線VSLaとの間に接続されている。スイッチング素子304aは、記録部31aの出力端子と制御部40との間に接続されている。スイッチング素子305aは、記録部32aの出力端子と読出し配線VSLaとの間に接続されている。スイッチング素子306aは、記録部32aの出力端子と制御部40との間に接続されている。 The switching element 303a is connected between the output terminal of the recording unit 31a and the readout wiring VSLa. The switching element 304a is connected between the output terminal of the recording unit 31a and the control unit 40. The switching element 305a is connected between the output terminal of the recording unit 32a and the readout wiring VSLa. The switching element 306a is connected between the output terminal of the recording unit 32a and the control unit 40.
スイッチング素子301bは、コンパレータ336の出力端子と記録部31bの入力端子との間に接続されている。スイッチング素子302bは、コンパレータ336の出力端子と記録部32bの入力端子との間に接続されている。 Switching element 301b is connected between the output terminal of comparator 336 and the input terminal of recording unit 31b. Switching element 302b is connected between the output terminal of comparator 336 and the input terminal of recording unit 32b.
スイッチング素子303bは、記録部31bの出力端子と読出し配線VSLbとの間に接続されている。スイッチング素子304bは、記録部31bの出力端子と制御部40との間に接続されている。スイッチング素子305bは、記録部32bの出力端子と読出し配線VSLbとの間に接続されている。スイッチング素子306bは、記録部32bの出力端子と制御部40との間に接続されている。 Switching element 303b is connected between the output terminal of recording unit 31b and the readout wiring VSLb. Switching element 304b is connected between the output terminal of recording unit 31b and the control unit 40. Switching element 305b is connected between the output terminal of recording unit 32b and the readout wiring VSLb. Switching element 306b is connected between the output terminal of recording unit 32b and the control unit 40.
スイッチング素子301a、304aおよび305aがオン(導通状態)であり、スイッチング素子302a、303aおよび306aはオフ(非導通状態)であるときに、記録部31aがオンイベント信号Eonを記録し、記録部32aがその直前のオンイベント信号Eonを読出し配線VSLaに出力する。また、制御部40は、記録部31aに記録されるオンイベント信号Eonに応じてリセット動作を行うか否かを決める。 When switching elements 301a, 304a, and 305a are on (conductive state) and switching elements 302a, 303a, and 306a are off (non-conductive state), recording unit 31a records on-event signal Eon, and recording unit 32a outputs the immediately preceding on-event signal Eon to readout wiring VSLa. Also, control unit 40 determines whether or not to perform a reset operation depending on the on-event signal Eon recorded in recording unit 31a.
スイッチング素子302a、303aおよび306aがオンであり、スイッチング素子301a、304aおよび305aはオフであるときに、記録部32aがオンイベント信号Eonを記録し、記録部31aがその直前のオンイベント信号Eonを読出し配線VSLaに出力する。また、制御部40は、記録部32aに記録されるオンイベント信号Eonに応じてリセット動作を行うか否かを決める。 When switching elements 302a, 303a, and 306a are on and switching elements 301a, 304a, and 305a are off, recording unit 32a records on-event signal Eon, and recording unit 31a outputs the immediately preceding on-event signal Eon to read wiring VSLa. In addition, control unit 40 determines whether or not to perform a reset operation depending on the on-event signal Eon recorded in recording unit 32a.
スイッチング素子301b、304bおよび305bがオンであり、スイッチング素子302b、303bおよび306bはオフであるときに、記録部31bがオフイベント信号Eoffを記録し、記録部32bがその直前のオフイベント信号Eoffを読出し配線VSLbに出力する。また、制御部40は、記録部31bに記録されるオフイベント信号Eoffに応じてリセット動作を行うか否かを決める。 When switching elements 301b, 304b, and 305b are on and switching elements 302b, 303b, and 306b are off, recording unit 31b records off-event signal Eoff, and recording unit 32b reads out the immediately preceding off-event signal Eoff and outputs it to read wiring VSLb. Also, control unit 40 determines whether or not to perform a reset operation depending on the off-event signal Eoff recorded in recording unit 31b.
スイッチング素子302b、303bおよび306bがオンであり、スイッチング素子301b、304bおよび305bはオフであるときに、記録部32bがオフイベント信号Eoffを記録し、記録部31bがその直前のオフイベント信号Eoffを読出し配線VSLbに出力する。また、制御部40は、記録部32bに記録されるオフイベント信号Eoffに応じてリセット動作を行うか否かを決める。 When switching elements 302b, 303b, and 306b are on and switching elements 301b, 304b, and 305b are off, recording unit 32b records off-event signal Eoff, and recording unit 31b reads out the immediately preceding off-event signal Eoff and outputs it to read wiring VSLb. Also, control unit 40 determines whether or not to perform a reset operation depending on the off-event signal Eoff recorded in recording unit 32b.
図23は、第8実施形態による光検出素子1の動作例を示すタイミング図である。検出動作およびリセット動作は、それぞれ第1実施形態のそれらと基本的に同じである。しかし、第8実施形態によれば、スイッチング素子301a~306aが、記録部31aの動作および記録部32aの動作を、オンイベント信号Eonの記録動作とオンイベント信号Eonの読出し動作との間で互い違いに切り替える。スイッチング素子301b~306bが、記録部31bの動作および記録部32bの動作を、オフイベント信号Eoffの記録動作とオフイベント信号Eoffの読出し動作との間で互い違いに切り替える。 FIG. 23 is a timing diagram showing an example of the operation of the photodetector 1 according to the eighth embodiment. The detection operation and reset operation are basically the same as those in the first embodiment. However, according to the eighth embodiment, the switching elements 301a to 306a alternately switch the operation of the recording unit 31a and the operation of the recording unit 32a between the recording operation of the on-event signal Eon and the read operation of the on-event signal Eon. The switching elements 301b to 306b alternately switch the operation of the recording unit 31b and the operation of the recording unit 32b between the recording operation of the off-event signal Eoff and the read operation of the off-event signal Eoff.
信号Φ1は、スイッチング素子301a、304aおよび305a並びにスイッチング素子301b、304bおよび305bの制御信号である。 Signal Φ1 is a control signal for switching elements 301a, 304a, and 305a, and switching elements 301b, 304b, and 305b.
信号Φ2は、スイッチング素子302a、303aおよび306a並びにスイッチング素子302b、303bおよび306bの制御信号である。 Signal Φ2 is a control signal for switching elements 302a, 303a, and 306a, and switching elements 302b, 303b, and 306b.
フレームf1において、信号Φ1が活性化され、信号Φ2は不活性状態である。よって、スイッチング素子301a、304aおよび305aがオンになり、スイッチング素子302a、303aおよび306aがオフになっている。これにより、記録部31aがオンイベント信号Eon_2を記録する。記録部32aがオンイベント信号Eon_2の直前に記録されたオンイベント信号Eon_1を読出し配線VSLaに出力する。また、制御部40は、記録部31aに記録されるオンイベント信号Eon_2に応じてリセット動作を行う、あるいは、行わない。 In frame f1, signal Φ1 is activated and signal Φ2 is in an inactive state. Therefore, switching elements 301a, 304a, and 305a are turned on, and switching elements 302a, 303a, and 306a are turned off. This causes recording unit 31a to record on-event signal Eon_2. Recording unit 32a outputs on-event signal Eon_1, which was recorded immediately before on-event signal Eon_2, to read wiring VSLa. Furthermore, control unit 40 performs or does not perform a reset operation depending on on-event signal Eon_2 recorded in recording unit 31a.
また、スイッチング素子301b、304bおよび305bがオンになり、スイッチング素子302b、303bおよび306bがオフになっている。これにより、記録部31bがオフイベント信号Eoff_2を記録する。記録部32bがオフイベント信号Eoff_2の直前に記録されたオフイベント信号Eoff_1を読出し配線VSLbに出力する。また、制御部40は、記録部31bに記録されるオフイベント信号Eoff_2に応じてリセット動作を行う、あるいは、行わない。 Furthermore, switching elements 301b, 304b, and 305b are turned on, and switching elements 302b, 303b, and 306b are turned off. As a result, recording unit 31b records off-event signal Eoff_2. Recording unit 32b reads out off-event signal Eoff_1 recorded immediately before off-event signal Eoff_2 and outputs it to read wiring VSLb. Furthermore, control unit 40 performs or does not perform a reset operation according to off-event signal Eoff_2 recorded in recording unit 31b.
次のフレームf2において、信号Φ2が活性化され、信号Φ1は不活性状態になる。よって、スイッチング素子301a、304aおよび305aがオフになり、スイッチング素子302a、303aおよび306aがオンになる。これにより、記録部31aがオンイベント信号Eon_2を読出し配線VSLaに出力する。記録部32aがオンイベント信号Eon_3を記録する。また、制御部40は、記録部32aに記録されるオンイベント信号Eon_3に応じてリセット動作を行う、あるいは、行わない。 In the next frame f2, signal Φ2 is activated and signal Φ1 is inactive. Therefore, switching elements 301a, 304a, and 305a are turned off, and switching elements 302a, 303a, and 306a are turned on. This causes recording unit 31a to output on-event signal Eon_2 to read wiring VSLa. Recording unit 32a records on-event signal Eon_3. Furthermore, control unit 40 performs or does not perform a reset operation depending on on-event signal Eon_3 recorded in recording unit 32a.
また、スイッチング素子301b、304bおよび305bがオフになり、スイッチング素子302b、303bおよび306bがオンになる。これにより、記録部31bがオフイベント信号Eoff_2を読出し配線VSLbに出力する。記録部32bがオフイベント信号Eoff_3を記録する。また、制御部40は、記録部32bに記録されるオフイベント信号Eoff_3に応じてリセット動作を行う、あるいは、行わない。 Furthermore, switching elements 301b, 304b, and 305b are turned off, and switching elements 302b, 303b, and 306b are turned on. This causes recording unit 31b to output off-event signal Eoff_2 to read wiring VSLb. Recording unit 32b records off-event signal Eoff_3. Furthermore, control unit 40 performs or does not perform a reset operation depending on off-event signal Eoff_3 recorded in recording unit 32b.
次のフレームf3において、信号Φ1が再度活性化され、信号Φ2は再度不活性状態になる。よって、スイッチング素子301a、304aおよび305aがオンになり、スイッチング素子302a、303aおよび306aがオフになる。これにより、記録部31aがオンイベント信号Eon_4を記録する。記録部32aがオンイベント信号Eon_3を読出し配線VSLaに出力する。また、制御部40は、記録部31aに記録されるオンイベント信号Eon_4に応じてリセット動作を行う、あるいは、行わない。 In the next frame f3, signal Φ1 is activated again, and signal Φ2 is inactivated again. Therefore, switching elements 301a, 304a, and 305a are turned on, and switching elements 302a, 303a, and 306a are turned off. This causes recording unit 31a to record on-event signal Eon_4. Recording unit 32a outputs on-event signal Eon_3 to read wiring VSLa. Furthermore, control unit 40 performs or does not perform a reset operation depending on on-event signal Eon_4 recorded in recording unit 31a.
また、スイッチング素子301b、304bおよび305bがオンになり、スイッチング素子302b、303bおよび306bがオフになる。これにより、記録部31bがオフイベント信号Eoff_4を記録する。記録部32bがオフイベント信号Eoff_3を読出し配線VSLbに出力する。また、制御部40は、記録部31bに記録されるオフイベント信号Eoff_4に応じてリセット動作を行う、あるいは、行わない。 Furthermore, switching elements 301b, 304b, and 305b are turned on, and switching elements 302b, 303b, and 306b are turned off. As a result, recording unit 31b records off-event signal Eoff_4. Recording unit 32b outputs off-event signal Eoff_3 to read wiring VSLb. Furthermore, control unit 40 performs or does not perform a reset operation according to off-event signal Eoff_4 recorded in recording unit 31b.
このように、第8実施形態による記録部31a、32aは、コンパレータ336と読出し配線VSLaとの間に並列に接続されている。記録部31b、32bは、コンパレータ336と読出し配線VSLbとの間に並列に接続されている。また、スイッチング素子301a~306a、301b~306bが設けられている。これにより、記録部31a、32aは、オンイベント信号Eonを交互に記録し、記録したオンイベント信号Eonを交互に読出し配線VSLaへ読み出す。記録部31b、32bは、オフイベント信号Eoffを交互に記録し、記録したオフイベント信号Eoffを交互に読出し配線VSLbへ読み出す。 In this way, the recording units 31a and 32a according to the eighth embodiment are connected in parallel between the comparator 336 and the readout wiring VSLa. The recording units 31b and 32b are connected in parallel between the comparator 336 and the readout wiring VSLb. In addition, switching elements 301a to 306a and 301b to 306b are provided. As a result, the recording units 31a and 32a alternately record the on-event signal Eon, and alternately read out the recorded on-event signal Eon to the readout wiring VSLa. The recording units 31b and 32b alternately record the off-event signal Eoff, and alternately read out the recorded off-event signal Eoff to the readout wiring VSLb.
第8実施形態のその他の構成および動作は、第1実施形態の構成および動作と同様でよい。第8実施形態によれば、リセット動作および検出動作において、イベント信号EonまたはEoffの読出し動作を重複して実行することができる。従って、第8実施形態も、第1実施形態と同様の効果を得ることができる。 Other configurations and operations of the eighth embodiment may be similar to those of the first embodiment. According to the eighth embodiment, the read operation of the event signal Eon or Eoff can be executed in a redundant manner during the reset operation and the detection operation. Therefore, the eighth embodiment can also achieve the same effects as the first embodiment.
(移動体への応用例)
本開示に係る技術(本技術)は、様々な電子機器へ応用することができる。例えば、本開示に係る技術は、自動車、電気自動車、ハイブリッド電気自動車、自動二輪車、自転車、パーソナルモビリティ、飛行機、ドローン、船舶、ロボット、等のいずれかの種類の移動体に搭載される装置として実現されてもよい。
(Example of application to moving objects)
The technology according to the present disclosure (the present technology) can be applied to various electronic devices. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, or the like.
図24は、本開示に係る技術が適用され得る移動体制御システムの一例である車両制御システムの概略的な構成例を示すブロック図である。 FIG. 24 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology disclosed herein can be applied.
車両制御システム12000は、通信ネットワーク12001を介して接続された複数の電子制御ユニットを備える。図24に示した例では、車両制御システム12000は、駆動系制御ユニット12010、ボディ系制御ユニット12020、車外情報検出ユニット12030、車内情報検出ユニット12040、及び統合制御ユニット12050を備える。また、統合制御ユニット12050の機能構成として、マイクロコンピュータ12051、音声画像出力部12052、及び車載ネットワークI/F(Interface)12053が図示されている。 The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in FIG. 24, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside vehicle information detection unit 12030, an inside vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio/video output unit 12052, and an in-vehicle network I/F (Interface) 12053.
駆動系制御ユニット12010は、各種プログラムにしたがって車両の駆動系に関連する装置の動作を制御する。例えば、駆動系制御ユニット12010は、内燃機関又は駆動用モータ等の車両の駆動力を発生させるための駆動力発生装置、駆動力を車輪に伝達するための駆動力伝達機構、車両の舵角を調節するステアリング機構、及び、車両の制動力を発生させる制動装置等の制御装置として機能する。 The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 functions as a control device for a drive force generating device for generating the drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force for the vehicle.
ボディ系制御ユニット12020は、各種プログラムにしたがって車体に装備された各種装置の動作を制御する。例えば、ボディ系制御ユニット12020は、キーレスエントリシステム、スマートキーシステム、パワーウィンドウ装置、あるいは、ヘッドランプ、バックランプ、ブレーキランプ、ウィンカー又はフォグランプ等の各種ランプの制御装置として機能する。この場合、ボディ系制御ユニット12020には、鍵を代替する携帯機から発信される電波又は各種スイッチの信号が入力され得る。ボディ系制御ユニット12020は、これらの電波又は信号の入力を受け付け、車両のドアロック装置、パワーウィンドウ装置、ランプ等を制御する。 The body system control unit 12020 controls the operation of various devices installed in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, tail lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals from various switches transmitted from a portable device that replaces a key can be input to the body system control unit 12020. The body system control unit 12020 accepts the input of these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.
車外情報検出ユニット12030は、車両制御システム12000を搭載した車両の外部の情報を検出する。例えば、車外情報検出ユニット12030には、撮像部12031が接続される。車外情報検出ユニット12030は、撮像部12031に車外の画像を撮像させるとともに、撮像された画像を受信する。車外情報検出ユニット12030は、受信した画像に基づいて、人、車、障害物、標識又は路面上の文字等の物体検出処理又は距離検出処理を行ってもよい。 The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the image capturing unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the image capturing unit 12031 to capture images outside the vehicle, and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, or characters on the road surface, based on the received images.
撮像部12031は、光を受光し、その光の受光量に応じた電気信号を出力する光センサである。撮像部12031は、電気信号を画像として出力することもできるし、測距の情報として出力することもできる。また、撮像部12031が受光する光は、可視光であっても良いし、赤外線等の非可視光であっても良い。 The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared light.
車内情報検出ユニット12040は、車内の情報を検出する。車内情報検出ユニット12040には、例えば、運転者の状態を検出する運転者状態検出部12041が接続される。運転者状態検出部12041は、例えば運転者を撮像するカメラを含み、車内情報検出ユニット12040は、運転者状態検出部12041から入力される検出情報に基づいて、運転者の疲労度合い又は集中度合いを算出してもよいし、運転者が居眠りをしていないかを判別してもよい。 The in-vehicle information detection unit 12040 detects information inside the vehicle. To the in-vehicle information detection unit 12040, for example, a driver state detection unit 12041 that detects the state of the driver is connected. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's degree of fatigue or concentration based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.
マイクロコンピュータ12051は、車外情報検出ユニット12030又は車内情報検出ユニット12040で取得される車内外の情報に基づいて、駆動力発生装置、ステアリング機構又は制動装置の制御目標値を演算し、駆動系制御ユニット12010に対して制御指令を出力することができる。例えば、マイクロコンピュータ12051は、車両の衝突回避あるいは衝撃緩和、車間距離に基づく追従走行、車速維持走行、車両の衝突警告、又は車両のレーン逸脱警告等を含むADAS(Advanced Driver Assistance System)の機能実現を目的とした協調制御を行うことができる。 The microcomputer 12051 can calculate control target values for the driving force generating device, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an Advanced Driver Assistance System (ADAS), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.
また、マイクロコンピュータ12051は、車外情報検出ユニット12030又は車内情報検出ユニット12040で取得される車両の周囲の情報に基づいて駆動力発生装置、ステアリング機構又は制動装置等を制御することにより、運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行うことができる。 The microcomputer 12051 can also perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.
また、マイクロコンピュータ12051は、車外情報検出ユニット12030で取得される車外の情報に基づいて、ボディ系制御ユニット12030に対して制御指令を出力することができる。例えば、マイクロコンピュータ12051は、車外情報検出ユニット12030で検知した先行車又は対向車の位置に応じてヘッドランプを制御し、ハイビームをロービームに切り替える等の防眩を図ることを目的とした協調制御を行うことができる。 The microcomputer 12051 can also output control commands to the body system control unit 12030 based on information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching high beams to low beams.
音声画像出力部12052は、車両の搭乗者又は車外に対して、視覚的又は聴覚的に情報を通知することが可能な出力装置へ音声及び画像のうちの少なくとも一方の出力信号を送信する。図24の例では、出力装置として、オーディオスピーカ12061、表示部12062及びインストルメントパネル12063が例示されている。表示部12062は、例えば、オンボードディスプレイ及びヘッドアップディスプレイの少なくとも一つを含んでいてもよい。 The audio/image output unit 12052 transmits at least one output signal of audio and image to an output device capable of visually or audibly notifying the occupants of the vehicle or the outside of the vehicle of information. In the example of FIG. 24, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.
図25は、撮像部12031の設置位置の例を示す図である。 FIG. 25 shows an example of the installation position of the imaging unit 12031.
図25では、撮像部12031として、撮像部12101、12102、12103、12104、12105を有する。 In FIG. 25, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.
撮像部12101、12102、12103、12104、12105は、例えば、車両12100のフロントノーズ、サイドミラー、リアバンパ、バックドア及び車室内のフロントガラスの上部等の位置に設けられる。フロントノーズに備えられる撮像部12101及び車室内のフロントガラスの上部に備えられる撮像部12105は、主として車両12100の前方の画像を取得する。サイドミラーに備えられる撮像部12102、12103は、主として車両12100の側方の画像を取得する。リアバンパ又はバックドアに備えられる撮像部12104は、主として車両12100の後方の画像を取得する。車室内のフロントガラスの上部に備えられる撮像部12105は、主として先行車両又は、歩行者、障害物、信号機、交通標識又は車線等の検出に用いられる。 The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at the front nose, side mirrors, rear bumper, back door, and upper part of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin is mainly used to detect leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.
なお、図25には、撮像部12101ないし12104の撮影範囲の一例が示されている。撮像範囲12111は、フロントノーズに設けられた撮像部12101の撮像範囲を示し、撮像範囲12112,12113は、それぞれサイドミラーに設けられた撮像部12102,12103の撮像範囲を示し、撮像範囲12114は、リアバンパ又はバックドアに設けられた撮像部12104の撮像範囲を示す。例えば、撮像部12101ないし12104で撮像された画像データが重ね合わせられることにより、車両12100を上方から見た俯瞰画像が得られる。 Note that FIG. 25 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.
撮像部12101ないし12104の少なくとも1つは、距離情報を取得する機能を有していてもよい。例えば、撮像部12101ないし12104の少なくとも1つは、複数の撮像素子からなるステレオカメラであってもよいし、位相差検出用の画素を有する撮像素子であってもよい。 At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple imaging elements, or an imaging element having pixels for phase difference detection.
例えば、マイクロコンピュータ12051は、撮像部12101ないし12104から得られた距離情報を基に、撮像範囲12111ないし12114内における各立体物までの距離と、この距離の時間的変化(車両12100に対する相対速度)を求めることにより、特に車両12100の進行路上にある最も近い立体物で、車両12100と略同じ方向に所定の速度(例えば、0km/h以上)で走行する立体物を先行車として抽出することができる。さらに、マイクロコンピュータ12051は、先行車の手前に予め確保すべき車間距離を設定し、自動ブレーキ制御(追従停止制御も含む)や自動加速制御(追従発進制御も含む)等を行うことができる。このように運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行うことができる。 For example, the microcomputer 12051 can obtain the distance to each solid object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, and can extract as a preceding vehicle, in particular, the closest solid object on the path of the vehicle 12100 that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km/h or faster). Furthermore, the microcomputer 12051 can set the inter-vehicle distance that should be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on the driver's operation.
例えば、マイクロコンピュータ12051は、撮像部12101ないし12104から得られた距離情報を元に、立体物に関する立体物データを、2輪車、普通車両、大型車両、歩行者、電柱等その他の立体物に分類して抽出し、障害物の自動回避に用いることができる。例えば、マイクロコンピュータ12051は、車両12100の周辺の障害物を、車両12100のドライバが視認可能な障害物と視認困難な障害物とに識別する。そして、マイクロコンピュータ12051は、各障害物との衝突の危険度を示す衝突リスクを判断し、衝突リスクが設定値以上で衝突可能性がある状況であるときには、オーディオスピーカ12061や表示部12062を介してドライバに警報を出力することや、駆動系制御ユニット12010を介して強制減速や回避操舵を行うことで、衝突回避のための運転支援を行うことができる。 For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects, such as two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, based on the distance information obtained from the imaging units 12101 to 12104, and can use the data to automatically avoid obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or exceeds a set value and there is a possibility of a collision, it can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by forcibly decelerating or steering to avoid a collision via the drive system control unit 12010.
撮像部12101ないし12104の少なくとも1つは、赤外線を検出する赤外線カメラであってもよい。例えば、マイクロコンピュータ12051は、撮像部12101ないし12104の撮像画像中に歩行者が存在するか否かを判定することで歩行者を認識することができる。かかる歩行者の認識は、例えば赤外線カメラとしての撮像部12101ないし12104の撮像画像における特徴点を抽出する手順と、物体の輪郭を示す一連の特徴点にパターンマッチング処理を行って歩行者か否かを判別する手順によって行われる。マイクロコンピュータ12051が、撮像部12101ないし12104の撮像画像中に歩行者が存在すると判定し、歩行者を認識すると、音声画像出力部12052は、当該認識された歩行者に強調のための方形輪郭線を重畳表示するように、表示部12062を制御する。また、音声画像出力部12052は、歩行者を示すアイコン等を所望の位置に表示するように表示部12062を制御してもよい。 At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured image of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured image of the imaging units 12101 to 12104 and recognizes a pedestrian, the audio/image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio/image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.
以上、本開示に係る技術が適用され得る車両制御システムの一例について説明した。本開示に係る技術は、以上説明した構成のうち、例えば、撮像部12031等に適用され得る。 The above describes an example of a vehicle control system to which the technology disclosed herein can be applied. The technology disclosed herein can be applied to, for example, the imaging unit 12031, etc., of the configurations described above.
なお、本技術は、以下のような構成をとることができる。 This technology can be configured as follows:
(1)
入射光を光電変換して電気信号を生成する受光部と、
前記電気信号の変化量が閾値を超えたとき、あるいは、下回ったときにイベント信号を出力する比較部と、
前記比較部の出力端子に接続され前記イベント信号を記録し、該イベント信号を出力する第1記録部と、
前記第1記録部に接続され前記第1記録部からの前記イベント信号を記録し、該イベント信号を出力する第2記録部と、を備える光検出素子。
(1)
a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold;
a first recording unit connected to an output terminal of the comparison unit, for recording the event signal, and outputting the event signal;
a second recording unit connected to the first recording unit, for recording the event signal from the first recording unit, and for outputting the event signal.
(2)
前記第2記録部に記録された前記イベント信号を読み出している読出し期間中に、前記第1記録部は、前記比較部から次のイベント信号を記録する、(1)に記載の光検出素子。
(2)
The photodetector element according to (1), wherein the first recording section records a next event signal from the comparison section during a readout period in which the event signal recorded in the second recording section is being read out.
(3)
前記比較部の入力端子と前記比較部の出力端子との間に接続された第1スイッチング素子と、
前記第1記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第2記録部の出力端子に接続された第1読出し配線と、をさらに備え、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部は前記イベント信号を前記第1読出し配線に出力する、(1)または(2)に記載の光検出素子。
(3)
a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit;
a control unit provided between an output terminal of the first recording unit and the first switching element, the control unit controlling the first switching element based on the event signal output from the first recording unit;
a first read wiring connected to an output terminal of the second recording unit;
The photodetector element according to (1) or (2), wherein when the first switching element is in a conductive state, the second recording unit outputs the event signal to the first readout wiring.
(4)
前記比較部の出力端子に接続され前記イベント信号を記録する第3記録部と、
前記第3記録部に接続され前記第3記録部からの前記イベント信号を記録する第4記録部と、をさらに備える(1)から(3)のいずれか一項に記載の光検出素子。
(4)
a third recording unit connected to an output terminal of the comparison unit and configured to record the event signal;
The light detection element according to any one of (1) to (3), further comprising: a fourth recording unit connected to the third recording unit and configured to record the event signal from the third recording unit.
(5)
前記第4記録部に記録された前記イベント信号を読み出している読出し期間中に、前記第3記録部は、前記比較部から次のイベント信号を記録する、(4)に記載の光検出素子。
(5)
The photodetector element according to (4), wherein the third recording section records a next event signal from the comparison section during a readout period in which the event signal recorded in the fourth recording section is being read out.
(6)
前記比較部の入力端子と前記比較部出力端子との間に接続された第1スイッチング素子と、
前記第1および第3記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1および第3記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第2記録部の出力端子に接続された第1読出し配線と、
前記第4記録部の出力端子に接続された第2読出し配線と、をさらに備え、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部に記録された前記イベント信号が前記第1読出し配線に読み出され、かつ、前記第4記録部に記録された前記イベント信号が前記第2読出し配線に読み出される、(4)または(5)に記載の光検出素子。
(6)
a first switching element connected between the input terminal of the comparison unit and the output terminal of the comparison unit;
a control unit provided between output terminals of the first and third recording units and the first switching element, the control unit controlling the first switching element based on the event signals output from the first and third recording units;
a first read wiring connected to an output terminal of the second recording unit;
A second readout wiring connected to an output terminal of the fourth recording unit,
A photodetector element according to (4) or (5), wherein, when the first switching element is in a conductive state, the event signal recorded in the second recording section is read out to the first readout wiring, and the event signal recorded in the fourth recording section is read out to the second readout wiring.
(7)
前記比較部は、第1期間において前記変化量を第1閾値と比較して第1イベント信号を出力し、前記第1期間に続く第2期間において前記変化量を前記第1閾値とは異なる第2閾値と比較して第2イベント信号を出力し、
前記第1記録部は、前記第1期間において前記第1イベント信号を記録し、
前記第3記録部は、前記第2期間において前記第2イベント信号を記録し、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部は、前記第1記録部からの前記第1イベント信号を記録し、かつ、該第1イベント信号を前記第1読出し配線に出力し、前記第4記録部は、前記第3記録部からの前記第2イベント信号を記録し、かつ、該第2イベント信号を前記第2読出し配線に出力する、(6)に記載の光検出素子。
(7)
the comparison unit compares the amount of change with a first threshold during a first period to output a first event signal, and compares the amount of change with a second threshold different from the first threshold during a second period following the first period to output a second event signal;
the first recording unit records the first event signal during the first period;
the third recording unit records the second event signal during the second period;
The photodetector element of claim 6, wherein, when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, and the fourth recording unit records the second event signal from the third recording unit and outputs the second event signal to the second readout wiring.
(8)
前記制御部は、前記第1スイッチング素子を導通状態にすることによって、前記比較部の入力端子および出力端子の電圧を前記第1閾値と前記第2閾値との間の電圧にリセットする、(7)に記載の光検出素子。
(8)
The photodetector element of (7), wherein the control unit resets the voltages of the input terminal and output terminal of the comparison unit to a voltage between the first threshold value and the second threshold value by turning on the first switching element.
(9)
前記制御部は、前記第1および第3記録部のそれぞれに記録された前記イベント信号に基づいて前記第1スイッチング素子を制御する、(6)に記載の光検出素子。
(9)
The light detection element according to (6), wherein the control unit controls the first switching element based on the event signals recorded in the first and third recording units.
(10)
前記第1および第2記録部の一方の出力端子に接続されたインバータと、
前記第1および第2記録部の他方の出力信号と前記インバータの出力信号との論理積を前記第1読出し配線に出力する第1論理ゲートとをさらに備える、(3)に記載の光検出素子。
(10)
an inverter connected to one output terminal of the first and second recording units;
The light detection element according to (3), further comprising a first logic gate that outputs a logical product of the output signal of the other of the first and second recording units and the output signal of the inverter to the first read wiring.
(11)
前記第1および第2記録部の一方の出力端子に接続されたインバータと、
前記第1および第2記録部の他方の出力信号と前記インバータの出力信号との論理積を前記第1読出し配線に出力する第1論理ゲートと、
前記第3および第4記録部の一方の出力端子に接続されたインバータと、
前記第3および第4記録部の他方の出力信号と前記インバータの出力信号との論理積を前記第2読出し配線に出力する第2論理ゲートとをさらに備える、(6)に記載の光検出素子。
(11)
an inverter connected to one output terminal of the first and second recording units;
a first logic gate that outputs a logical product of the other output signal of the first and second recording units and an output signal of the inverter to the first read wiring;
an inverter connected to one output terminal of the third and fourth recording units;
The light detection element according to (6), further comprising a second logic gate that outputs a logical product of the other output signal of the third and fourth recording units and an output signal of the inverter to the second read wiring.
(12)
前記第1および第2記録部の出力信号の論理積を前記制御部に出力する第3論理ゲートをさらに備え、
前記制御部は、前記第3論理ゲートの出力信号に基づいて前記第1スイッチング素子を制御する、(3)に記載の光検出素子。
(12)
a third logic gate that outputs a logical product of the output signals of the first and second recording units to the control unit;
The light detection element according to (3), wherein the control unit controls the first switching element based on an output signal of the third logic gate.
(13)
前記第1および第2記録部の出力信号の論理積を前記制御部に出力する第3論理ゲートと、
前記第3および第4記録部の出力信号の論理積を前記制御部に出力する第4論理ゲートと、をさらに備え、
前記制御部は、前記第3および第4論理ゲートの出力信号に基づいて前記第1スイッチング素子を制御する、(6)に記載の光検出素子。
(13)
a third logic gate that outputs a logical product of the output signals of the first and second recording units to the control unit;
a fourth logic gate that outputs a logical product of the output signals of the third and fourth recording units to the control unit;
The light detection element according to (6), wherein the control unit controls the first switching element based on output signals of the third and fourth logic gates.
(14)
前記比較部は、第1期間において前記変化量を第1閾値と比較して第1イベント信号を出力し、前記第1期間に続く第2期間において前記変化量を前記第1閾値とは異なる第2閾値と比較して第2イベント信号を出力し、
前記第1記録部は、前記第1イベント信号と前記第2イベント信号を交互に記録し、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部は、前記第1記録部からの前記第1イベント信号を記録し、かつ、該第1イベント信号を前記第1読出し配線に出力し、あるいは、前記第1記録部からの前記第2イベント信号を記録し、かつ、該第2イベント信号を前記第1読出し配線に出力する、(3)に記載の光検出素子。
(14)
the comparison unit compares the amount of change with a first threshold during a first period to output a first event signal, and compares the amount of change with a second threshold during a second period following the first period, the second threshold being different from the first threshold, to output a second event signal;
the first recording unit alternately records the first event signal and the second event signal;
The photodetector element of claim 3, wherein, when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, or records the second event signal from the first recording unit and outputs the second event signal to the first readout wiring.
(15)
前記比較部の入力端子と前記比較部の出力端子との間に接続された第1スイッチング素子と、
前記第1および第3記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1および第3記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第2および第4記録部の出力端子に接続された第1スイッチ回路と、
前記第1スイッチ回路の出力端子に接続された第1読出し配線と、をさらに備え、
前記第1スイッチ回路は、前記第2および第4記録部のいずれか一方の出力端子を選択的に前記第1読出し配線に接続する、(4)、(5)、(12)または(13)のいずれか一項に記載の光検出素子。
(15)
a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit;
a control unit provided between output terminals of the first and third recording units and the first switching element, the control unit controlling the first switching element based on the event signals output from the first and third recording units;
a first switch circuit connected to the output terminals of the second and fourth recording units;
a first read wiring connected to an output terminal of the first switch circuit;
The photodetector element according to any one of (4), (5), (12), or (13), wherein the first switch circuit selectively connects an output terminal of either the second or fourth recording unit to the first read wiring.
(16)
複数の前記受光部と、
前記複数の受光部に対応して設けられた複数の前記比較部と、
複数の前記第1記録部と、
前記複数の第1記録部に対応して設けられた複数の前記第2記録部と、
前記複数の比較部と前記複数の第1記録部との間に設けられたバッファと、
前記バッファの入力端子と前記複数の比較部との間に設けられ、前記複数の比較部から選択された選択比較部を前記バッファの入力端子に接続する第2スイッチ回路と、
前記バッファの出力端子と前記複数の第1記録部との間に設けられ、前記複数の第1記録部から選択された選択第1記録部を前記バッファの出力端子に接続する第3スイッチ回路と、をさらに備える(1)から(16)のいずれか一項に記載の光検出素子。
(16)
A plurality of the light receiving units;
A plurality of the comparison units provided corresponding to the plurality of light receiving units;
A plurality of the first recording units;
a plurality of the second recording sections provided corresponding to the plurality of the first recording sections;
a buffer provided between the plurality of comparison units and the plurality of first recording units;
a second switch circuit provided between an input terminal of the buffer and the plurality of comparison units, the second switch circuit connecting a selection comparison unit selected from the plurality of comparison units to the input terminal of the buffer;
The light detection element described in any one of (1) to (16), further comprising: a third switch circuit provided between an output terminal of the buffer and the plurality of first recording units, the third switch circuit connecting a selected first recording unit selected from the plurality of first recording units to the output terminal of the buffer.
(17)
入射光を光電変換して電気信号を生成する受光部と、
前記受光部が生成する前記電気信号の変化量と閾値とを比較してイベント信号を出力する比較部と、
前記比較部の出力端子に並列に接続された第1および第2記録部とを備え、
前記第1および第2記録部の一方が前記イベント信号を記録しているときに、前記第1および第2記録部の他方が前記イベント信号を出力する、光検出素子。
(17)
a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that compares an amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal;
a first and a second recording unit connected in parallel to an output terminal of the comparison unit;
A photodetector element, wherein when one of the first and second recording sections is recording the event signal, the other of the first and second recording sections outputs the event signal.
(18)
前記比較部の出力端子と前記第1記録部との間に接続された第2スイッチング素子と、 前記比較部の出力端子と前記第2記録部との間に接続された第3スイッチング素子と、 前記第1記録部と前記第1読出し配線との間に接続された第4スイッチング素子と、
前記第2記録部と前記第1読出し配線との間に接続された第5スイッチング素子と、
前記第1記録部と前記制御部との間に接続された第6スイッチング素子と、
前記第2記録部と前記制御部との間に接続された第7スイッチング素子とをさらに備え、
前記第1記録部が前記イベント信号を記録し、前記第2記録部が前記イベント信号を出力しているときに、前記第2、第5および第6スイッチング素子が導通状態であり、前記第3、第4および第7スイッチング素子は非導通状態であり、
前記第2記録部が前記イベント信号を記録し、前記第1記録部が前記イベント信号を出力しているときに、前記第3、第4および第7スイッチング素子が導通状態であり、前記第2、第5および第6スイッチング素子は非導通状態である、(17に記載の光検出素子。
(18)
a second switching element connected between an output terminal of the comparison unit and the first recording unit; a third switching element connected between an output terminal of the comparison unit and the second recording unit; and a fourth switching element connected between the first recording unit and the first read wiring.
a fifth switching element connected between the second recording unit and the first read wiring;
a sixth switching element connected between the first recording unit and the control unit;
a seventh switching element connected between the second recording unit and the control unit,
when the first recording unit records the event signal and the second recording unit outputs the event signal, the second, fifth and sixth switching elements are in a conductive state and the third, fourth and seventh switching elements are in a non-conductive state;
When the second recording unit records the event signal and the first recording unit outputs the event signal, the third, fourth, and seventh switching elements are in a conductive state, and the second, fifth, and sixth switching elements are in a non-conductive state.
(19)
入射光を光電変換して電気信号を生成する受光部と、
前記電気信号の変化量が閾値を超えたとき、あるいは、下回ったときにイベント信号を出力する比較部と、
前記比較部の出力端子に接続され前記イベント信号を記録し、該イベント信号を出力する第1記録部と、
前記第1記録部に接続され前記第1記録部からの前記イベント信号を記録し、該イベント信号を出力する第2記録部と、を備える光検出素子を有する電子機器。
(19)
a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold;
a first recording unit connected to an output terminal of the comparison unit, for recording the event signal, and outputting the event signal;
and a second recording unit connected to the first recording unit, for recording the event signal from the first recording unit, and for outputting the event signal.
(20)
入射光を光電変換して電気信号を生成する受光部と、
前記受光部が生成する前記電気信号の変化量と閾値とを比較してイベント信号を出力する比較部と、
前記比較部の出力端子に並列に接続された第1および第2記録部とを備え、
前記第1および第2記録部の一方が前記イベント信号を記録しているときに、前記第1および第2記録部の他方が前記イベント信号を出力する、光検出素子を有する電子機器。
(20)
a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that compares an amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal;
a first and a second recording unit connected in parallel to an output terminal of the comparison unit;
An electronic device having a photodetector, wherein, when one of the first and second recording units is recording the event signal, the other of the first and second recording units outputs the event signal.
尚、本開示は、上述した実施形態に限定されるものではなく、本開示の要旨を逸脱しない範囲において種々の変更が可能である。また、本明細書に記載された効果はあくまで例示であって限定されるものでは無く、他の効果があってもよい。 Note that this disclosure is not limited to the above-described embodiment, and various modifications are possible without departing from the spirit of this disclosure. Furthermore, the effects described in this specification are merely examples and are not limiting, and other effects may also be present.
30 記録領域
40 制御部
221 受光部
300 イベント検出回路
310 対数変換回路
320 バッファ
330 量子化器
331 コンデンサ
332、333、334、335 スイッチング素子
336 コンパレータ
31a、32a、31b、32b 記録部
30 Recording area 40 Control unit 221 Light receiving unit 300 Event detection circuit 310 Logarithmic conversion circuit 320 Buffer 330 Quantizer 331 Capacitors 332, 333, 334, 335 Switching element 336 Comparators 31a, 32a, 31b, 32b Recording unit
Claims (20)
前記電気信号の変化量が閾値を超えたとき、あるいは、下回ったときにイベント信号を出力する比較部と、
前記比較部の出力端子に接続され前記イベント信号を記録し、該イベント信号を出力する第1記録部と、
前記第1記録部に接続され前記第1記録部からの前記イベント信号を記録し、該イベント信号を出力する第2記録部と、を備える光検出素子。 a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold;
a first recording unit connected to an output terminal of the comparison unit, for recording the event signal, and outputting the event signal;
a second recording unit connected to the first recording unit, for recording the event signal from the first recording unit, and for outputting the event signal.
前記第1記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第2記録部の出力端子に接続された第1読出し配線と、をさらに備え、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部は前記イベント信号を前記第1読出し配線に出力する、請求項1に記載の光検出素子。 a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit;
a control unit provided between an output terminal of the first recording unit and the first switching element, the control unit controlling the first switching element based on the event signal output from the first recording unit;
a first read wiring connected to an output terminal of the second recording unit;
The photodetector element according to claim 1 , wherein the second recording section outputs the event signal to the first readout wiring when the first switching element is in a conductive state.
前記第3記録部に接続され前記第3記録部からの前記イベント信号を記録する第4記録部と、をさらに備える請求項1に記載の光検出素子。 a third recording unit connected to an output terminal of the comparison unit and configured to record the event signal;
The light detection element according to claim 1 , further comprising: a fourth recording section connected to the third recording section and configured to record the event signal from the third recording section.
前記第1および第3記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1および第3記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第2記録部の出力端子に接続された第1読出し配線と、
前記第4記録部の出力端子に接続された第2読出し配線と、をさらに備え、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部に記録された前記イベント信号が前記第1読出し配線に読み出され、かつ、前記第4記録部に記録された前記イベント信号が前記第2読出し配線に読み出される、請求項4に記載の光検出素子。 a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit;
a control unit provided between output terminals of the first and third recording units and the first switching element, the control unit controlling the first switching element based on the event signals output from the first and third recording units;
a first read wiring connected to an output terminal of the second recording unit;
A second readout wiring connected to an output terminal of the fourth recording unit,
5. The photodetector element of claim 4, wherein when the first switching element is in a conductive state, the event signal recorded in the second recording section is read out to the first readout wiring, and the event signal recorded in the fourth recording section is read out to the second readout wiring.
前記第1記録部は、前記第1期間において前記第1イベント信号を記録し、
前記第3記録部は、前記第2期間において前記第2イベント信号を記録し、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部は、前記第1記録部からの前記第1イベント信号を記録し、かつ、該第1イベント信号を前記第1読出し配線に出力し、前記第4記録部は、前記第3記録部からの前記第2イベント信号を記録し、かつ、該第2イベント信号を前記第2読出し配線に出力する、請求項6に記載の光検出素子。 the comparison unit compares the amount of change with a first threshold during a first period to output a first event signal, and compares the amount of change with a second threshold during a second period following the first period, the second threshold being different from the first threshold, to output a second event signal;
the first recording unit records the first event signal during the first period;
the third recording unit records the second event signal during the second period;
7. The photodetector element of claim 6, wherein when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, and the fourth recording unit records the second event signal from the third recording unit and outputs the second event signal to the second readout wiring.
前記第1および第2記録部の他方の出力信号と前記インバータの出力信号との論理積を前記第1読出し配線に出力する第1論理ゲートとをさらに備える、請求項3に記載の光検出素子。 an inverter connected to one output terminal of the first and second recording units;
4. The light detection element according to claim 3, further comprising a first logic gate that outputs a logical product of the output signal of the other of said first and second recording units and an output signal of said inverter to said first read wiring.
前記第1および第2記録部の他方の出力信号と前記インバータの出力信号との論理積を前記第1読出し配線に出力する第1論理ゲートと、
前記第3および第4記録部の一方の出力端子に接続されたインバータと、
前記第3および第4記録部の他方の出力信号と前記インバータの出力信号との論理積を前記第2読出し配線に出力する第2論理ゲートとをさらに備える、請求項6に記載の光検出素子。 an inverter connected to one output terminal of the first and second recording units;
a first logic gate that outputs a logical product of the other output signal of the first and second recording units and an output signal of the inverter to the first read wiring;
an inverter connected to one output terminal of the third and fourth recording units;
7. The light detection element according to claim 6, further comprising a second logic gate that outputs a logical product of the other output signal of said third and fourth recording units and an output signal of said inverter to said second read wiring.
前記制御部は、前記第3論理ゲートの出力信号に基づいて前記第1スイッチング素子を制御する、請求項3に記載の光検出素子。 a third logic gate that outputs a logical product of the output signals of the first and second recording units to the control unit;
The light detection element according to claim 3 , wherein the control unit controls the first switching element based on an output signal of the third logic gate.
前記第3および第4記録部の出力信号の論理積を前記制御部に出力する第4論理ゲートと、をさらに備え、
前記制御部は、前記第3および第4論理ゲートの出力信号に基づいて前記第1スイッチング素子を制御する、請求項6に記載の光検出素子。 a third logic gate that outputs a logical product of the output signals of the first and second recording units to the control unit;
a fourth logic gate that outputs a logical product of the output signals of the third and fourth recording units to the control unit;
The light detection element according to claim 6 , wherein the control unit controls the first switching element based on output signals of the third and fourth logic gates.
前記第1記録部は、前記第1イベント信号と前記第2イベント信号を交互に記録し、
前記第1スイッチング素子が導通状態であるときに、前記第2記録部は、前記第1記録部からの前記第1イベント信号を記録し、かつ、該第1イベント信号を前記第1読出し配線に出力し、あるいは、前記第1記録部からの前記第2イベント信号を記録し、かつ、該第2イベント信号を前記第1読出し配線に出力する、請求項3に記載の光検出素子。 the comparison unit compares the amount of change with a first threshold during a first period to output a first event signal, and compares the amount of change with a second threshold during a second period following the first period, the second threshold being different from the first threshold, to output a second event signal;
the first recording unit alternately records the first event signal and the second event signal;
4. The photodetector element according to claim 3, wherein, when the first switching element is in a conductive state, the second recording unit records the first event signal from the first recording unit and outputs the first event signal to the first readout wiring, or records the second event signal from the first recording unit and outputs the second event signal to the first readout wiring.
前記第1および第3記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1および第3記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第2および第4記録部の出力端子に接続された第1スイッチ回路と、
前記第1スイッチ回路の出力端子に接続された第1読出し配線と、をさらに備え、
前記第1スイッチ回路は、前記第2および第4記録部のいずれか一方の出力端子を選択的に前記第1読出し配線に接続する、請求項4に記載の光検出素子。 a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit;
a control unit provided between output terminals of the first and third recording units and the first switching element, the control unit controlling the first switching element based on the event signals output from the first and third recording units;
a first switch circuit connected to the output terminals of the second and fourth recording units;
a first read wiring connected to an output terminal of the first switch circuit;
5. The light detection element according to claim 4, wherein the first switch circuit selectively connects an output terminal of either the second or fourth recording portion to the first read wiring.
前記複数の受光部に対応して設けられた複数の前記比較部と、
複数の前記第1記録部と、
前記複数の第1記録部に対応して設けられた複数の前記第2記録部と、
前記複数の比較部と前記複数の第1記録部との間に設けられたバッファと、
前記バッファの入力端子と前記複数の比較部との間に設けられ、前記複数の比較部から選択された選択比較部を前記バッファの入力端子に接続する第2スイッチ回路と、
前記バッファの出力端子と前記複数の第1記録部との間に設けられ、前記複数の第1記録部から選択された選択第1記録部を前記バッファの出力端子に接続する第3スイッチ回路と、をさらに備える請求項1に記載の光検出素子。 A plurality of the light receiving units;
A plurality of the comparison units provided corresponding to the plurality of light receiving units;
A plurality of the first recording units;
a plurality of the second recording sections provided corresponding to the plurality of the first recording sections;
a buffer provided between the plurality of comparison units and the plurality of first recording units;
a second switch circuit provided between an input terminal of the buffer and the plurality of comparison units, the second switch circuit connecting a selection comparison unit selected from the plurality of comparison units to the input terminal of the buffer;
2. The light detection element according to claim 1, further comprising: a third switch circuit provided between an output terminal of the buffer and the plurality of first recording units, the third switch circuit connecting a selected first recording unit selected from the plurality of first recording units to the output terminal of the buffer.
前記受光部が生成する前記電気信号の変化量と閾値とを比較してイベント信号を出力する比較部と、
前記比較部の出力端子に並列に接続された第1および第2記録部とを備え、
前記第1および第2記録部の一方が前記イベント信号を記録しているときに、前記第1および第2記録部の他方が前記イベント信号を出力する、光検出素子。 a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that compares an amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal;
a first and a second recording unit connected in parallel to an output terminal of the comparison unit;
A photodetector element, wherein when one of the first and second recording units is recording the event signal, the other of the first and second recording units outputs the event signal.
前記第1および第2記録部の出力端子と前記第1スイッチング素子との間に設けられ、前記第1または第2記録部から出力されている前記イベント信号に基づいて前記第1スイッチング素子を制御する制御部と、
前記第1および第2記録部の出力端子側に設けられた第1読出し配線と、
前記比較部の出力端子と前記第1記録部との間に接続された第2スイッチング素子と、
前記比較部の出力端子と前記第2記録部との間に接続された第3スイッチング素子と、
前記第1記録部と前記第1読出し配線との間に接続された第4スイッチング素子と、
前記第2記録部と前記第1読出し配線との間に接続された第5スイッチング素子と、
前記第1記録部と前記制御部との間に接続された第6スイッチング素子と、
前記第2記録部と前記制御部との間に接続された第7スイッチング素子とをさらに備え、
前記第1記録部が前記イベント信号を記録し、前記第2記録部が前記イベント信号を出力しているときに、前記第2、第5および第6スイッチング素子が導通状態であり、前記第3、第4および第7スイッチング素子は非導通状態であり、
前記第2記録部が前記イベント信号を記録し、前記第1記録部が前記イベント信号を出力しているときに、前記第3、第4および第7スイッチング素子が導通状態であり、前記第2、第5および第6スイッチング素子は非導通状態である、請求項17に記載の光検出素子。 a first switching element connected between an input terminal of the comparison unit and an output terminal of the comparison unit;
a control unit provided between output terminals of the first and second recording units and the first switching element, the control unit controlling the first switching element based on the event signal output from the first or second recording unit;
a first read wiring provided on the output terminal side of the first and second recording units;
a second switching element connected between an output terminal of the comparison unit and the first recording unit;
a third switching element connected between an output terminal of the comparison unit and the second recording unit;
a fourth switching element connected between the first recording unit and the first read wiring;
a fifth switching element connected between the second recording unit and the first read wiring;
a sixth switching element connected between the first recording unit and the control unit;
a seventh switching element connected between the second recording unit and the control unit,
when the first recording unit records the event signal and the second recording unit outputs the event signal, the second, fifth and sixth switching elements are in a conductive state and the third, fourth and seventh switching elements are in a non-conductive state;
18. The photodetector element of claim 17, wherein when the second recording unit records the event signal and the first recording unit outputs the event signal, the third, fourth and seventh switching elements are in a conductive state and the second, fifth and sixth switching elements are in a non-conductive state.
前記電気信号の変化量が閾値を超えたとき、あるいは、下回ったときにイベント信号を出力する比較部と、
前記比較部の出力端子に接続され前記イベント信号を記録し、該イベント信号を出力する第1記録部と、
前記第1記録部に接続され前記第1記録部からの前記イベント信号を記録し、該イベント信号を出力する第2記録部と、を備える光検出素子を有する電子機器。 a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that outputs an event signal when the amount of change in the electrical signal exceeds or falls below a threshold;
a first recording unit connected to an output terminal of the comparison unit, for recording the event signal, and outputting the event signal;
and a second recording unit connected to the first recording unit, for recording the event signal from the first recording unit, and for outputting the event signal.
前記受光部が生成する前記電気信号の変化量と閾値とを比較してイベント信号を出力する比較部と、
前記比較部の出力端子に並列に接続された第1および第2記録部とを備え、
前記第1および第2記録部の一方が前記イベント信号を記録しているときに、前記第1および第2記録部の他方が前記イベント信号を出力する、光検出素子を有する電子機器。 a light receiving unit that performs photoelectric conversion on incident light to generate an electrical signal;
a comparison unit that compares an amount of change in the electrical signal generated by the light receiving unit with a threshold value and outputs an event signal;
a first and a second recording unit connected in parallel to an output terminal of the comparison unit;
An electronic device having a photodetector, wherein, when one of the first and second recording units is recording the event signal, the other of the first and second recording units outputs the event signal.
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