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WO2024246199A1 - Method on how to connect modules external electromagnetic interference coating with a ball grid array on the bottom - Google Patents

Method on how to connect modules external electromagnetic interference coating with a ball grid array on the bottom Download PDF

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Publication number
WO2024246199A1
WO2024246199A1 PCT/EP2024/064897 EP2024064897W WO2024246199A1 WO 2024246199 A1 WO2024246199 A1 WO 2024246199A1 EP 2024064897 W EP2024064897 W EP 2024064897W WO 2024246199 A1 WO2024246199 A1 WO 2024246199A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
electrically conductive
conductive coating
contact portion
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/EP2024/064897
Other languages
French (fr)
Inventor
Michael WEISSGERBER
Reinhard Spinotti
Radoslaw GANCARZ
Renzo CLEMENTE
Markus Griesshammer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram Asia Pacific Pte Ltd
Original Assignee
Ams Osram Asia Pacific Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ams Osram Asia Pacific Pte Ltd filed Critical Ams Osram Asia Pacific Pte Ltd
Publication of WO2024246199A1 publication Critical patent/WO2024246199A1/en
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/8506—Containers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68331—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. die mounting substrate

Definitions

  • This disclosure generally relates to a device package having an electromagnetic interference coating, and a method to manufacture the same .
  • An electronic device package includes a device housing and an electromagnetic interference (EMI ) protective means .
  • the electronic device package having a mainboard packaged in the device housing usually has a problem that non-conductive device housings do not provide an EMI protective means on the packaging level (also denoted as module level ) .
  • the non- conductive device housing may include a glass-housing or plastic-housing for example , and it is di f ficult to connect an external EMI coating on the device housing with the mainboard .
  • metallic cages of any si ze and any shape made of suitable metallic conductive materials are placed around electronic components on the mainboard to provide EMI protection .
  • this requires additional parts increasing the bill of materials (BoM) and generates bigger footprint of the packaging .
  • a device package having an improved electromagnetic interference provision is provided, and a method to manufacture the device package are provided .
  • the invention is set out in the appended set of claims .
  • a device package in one aspect , includes an electrically non-conductive first substrate attached to a second substrate , the second substrate having a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate , wherein the contact portion structure is coupled to the first substrate ; and an electrically conductive coating disposed over at least a part of the first substrate and electrically conductively coupled to the contact portion structure .
  • the device package provides an improved electromagnetic interference , EMI , protection .
  • the electrically conductive coating acting as EMI coating may increase the overall si ze of a device package only for a few micrometers (pm) , adheres well to the housing of the device package formed by the first and second substrates and may be in exact conformity with the shape of the device housing . Adequate thickness of the EMI coating on top and lateral surfaces of the device housing can be well controlled on process .
  • a method to manufacture device package includes attaching an electrically non- conductive first substrate to a second substrate , wherein the second substrate comprises a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate such that contact portion structure is coupled to the first substrate ; and disposing an electrically conductive coating over at least a part of the first substrate such that the electrically conductive coating is electrically conductively coupled to the contact portion structure .
  • the electrically conductive coating is formed on a surface of the first substrate facing away from the contact portion structure .
  • FIG . 1 shows a flow diagram of a method to manufacture a device housing having an improved electromagnetic interference protection
  • FIG . 2A to FIG . 2H shows schematic cross-sectional views illustrating the manufacturing of a device housing having an improved electromagnetic interference protection
  • FIG . 3A shows a schematic cross-sectional view of a comparative device having a metal cap as electromagnetic interference protection
  • FIG . 3B shows a schematic cross-sectional view of a device having a device housing having an improved electromagnetic interference protection
  • FIG . 4A and FIG . 4B show schematic top views of the second substrate of a device housing having an improved electromagnetic interference protection .
  • the EMI protection provision connects an EMI coating layer with a ground contact of a printed circuit board .
  • the fully populated second substrate e . g . the wafer die
  • all the preliminary features may be in place .
  • a further process of singulating the modules and recombine the singulated modules may allow to form, e . g . via spray coating, the EMI shield material .
  • second substrate may be formed with an all- around contact portion structure connected with vias , e . g . Thru-Silicon-Vias , with a bottom ball grid array (BGA) .
  • EMI protection provision of the device is a coating layer and not a metal cap as in the comparative example .
  • a connection between the EMI coating layer and the BGA may include the exposed conductive adhesive layer on the side surface of the module between the first substrate and the second substrate of the singulated modules .
  • an advantage of the EMI coating is to have all the proper layers designed to collect electrical interferences , trans fer interferences to a bottom side of the second substrate through a via, e . g . a through- silicon via ( TSV) in case of the second substrate being a silicon die or wafer, and redistributing the electrical interference to a contact pad structure, e.g. a ball grid array (BGA) , with a proper redistribution layer design at the bottom side (e.g. second surface) of the second substrate, and transfer the electric interference from the BGA to a ground (GND) contact of a printed circuit board coupled to the BGA.
  • a contact pad structure e.g. a ball grid array (BGA)
  • BGA ball grid array
  • GDD ground
  • the method of manufacturing the device package may include a stacking process of substrates, e.g. a wafer level stacking process, followed by a singulation process to two form two or more device housings from the stacked substrates.
  • the singulated device housings are coated with an EMI coating layer and thus one or more device packages having an EMI shield are realized.
  • the stacked substrates may include a glass substrate (optionally with one or lenses) (also denoted as first substrate portion of a first substrate) forming the top part of the device housing, a spacer substrate (optionally with one or more cavities) (also denoted as first substrate portion of a first substrate) forming at least one side wall of the device housing, and a die substrate (also denoted as second substrate) (optionally with one or more surface mounted device components) forming the bottom part of the device housing.
  • a glass substrate also denoted as first substrate portion of a first substrate
  • a spacer substrate also denoted as one or more cavities
  • first substrate portion of a first substrate forming at least one side wall of the device housing
  • a die substrate also denoted as second substrate
  • the accuracy of the alignment of substrates may be critical to quality (CTQ) in optical devices, in order to get a well- aligned laser-to-lens module.
  • CQ quality
  • the second substrate portion of the first substrate is may be attached to the second substrate such that a contact portion structure on surface side of the second substrate facing the first substrate portion of the first substrate is directly or indirectly exposed to an electrical contact at the outside of the side wall of the device housing (e.g. the second substrate portion of the first substrate) .
  • An indirect coupling may be achieved using an electrically conductive adhesive used to attach the second substrate portion of the first substrate to the second substrate .
  • a process to singulate the device housings (also denoted as modules ) may generate side walls of the device housing having a smooth side surface , e . g . with an exposed conductive adhesive layer between the second substrate portion of the first substrate and the second substrate .
  • An EMI coating layer covering the side walls and ( optionally) at least a part of the exposed top surface of the first substrate portion may form an EMI protection provision of the device package .
  • the EMI coating layer may electrically connect the surface of the device package with a contact pad structure at a second surface of the second substrate ( opposite to the first surface of the second substrate ) .
  • the contact pad structure may be coupled to a ground contact of a printed circuit board (also denoted as mainboard) .
  • mainboard also denoted as mainboard
  • the EMI coating layer may be formed using a spray coating method . This may increase the overall si ze of the device package ( e . g . device housing with EMI protection provision) compared to the device housing only for a few micro meters . Thus , the device package provides an improved footprint compared to a comparative device package using a metal cap as EMI protection provision . Further, the EMI coating layer adheres and conforms exactly to the shape of the device housing compared to a comparative device package using a metal cap as EMI protection provision . Thus , the bill of material may be improved,
  • the spray coated EMI coating layer allows an improved control of the uni formity of thickness and roughness on top and lateral surfaces of the device housing . This allows an accurate suppression of EMI by controlling the thickness of the EMI coating layer . Further, the described method may allow forming the device package without a Pick-and-Place process of a metal cap as EMI protection provision.
  • FIG. 1 shows a flow diagram of a method 100 to manufacture a device housing having an improved electromagnetic interference protection.
  • FIG.2A to FIG.2G shows schematic cross-sectional views illustrating the manufacturing of a device housing, as shown in FIG.l, and of a device having a respective device housing .
  • the method 100 may include a preparation 102 of substrate portions 202, 204, e.g. of a first substrate portion 202 and a second substrate portion 204, as illustrated in FIG.l (see also FIG.2A) .
  • the first substrate portion 202 attached to the second substrate portion 204 may form a first substrate 210.
  • the preparation 102 may include a cutting, cleaning, and surface preparation of the substrate portions 202, 204.
  • the preparation 102 may further include a forming of one or more cavities 206 in at least one of the substrate portions 202, 204.
  • a cavity 206 may be used as markings and/or intended separation points of the first substrate 210.
  • the substrate portions 202, 204 may be glass substrates, for example .
  • the method 100 may further include a stacking 104 of the prepared first substrate portion 202 on the prepared second substrate portion 204 (or vice versa) , as illustrated in FIG.l and FIG.2B.
  • FIG.2B to FIG.2H only show a single first substrate 210 stacked on a second substrate 306 this is only for illustration purpose.
  • the device housing to be formed may have a rectangular shape (e.g. as becomes apparent from FIG.3A to FIG.4B) or circular shape.
  • the illustrated cross- sectional view represents only a cross-section of one side wall of one or more side walls of the device housing.
  • the first substrate portion may be optically transparent, e.g. a glass substrate, e.g. a glass waver, to act as an optical window for one or more light emitting device (s) , e.g. a surface or side emitting laser and/or an array thereof, encapsulated by the device housing.
  • the first substrate portion 202 may include one or more optical lenses, e.g. a lens array, e.g. a micro lens array.
  • the first substrate portion 202 may act as an optical tap.
  • the first substrate portion 202 may form an electrically non- conductive top part of the housing to be formed.
  • the second substrate portion 204 may form an electrically non- conductive side part of the housing to be formed.
  • the second substrate portion 202 may be a spacer glass for example .
  • the combined substrate may be denoted as the first substrate 210.
  • the first substrate 210 may include a first substrate portion 202, e.g. the top glass wafer 202, and a second substrate portion 204, e.g. the spacer glass 204.
  • the stacking 104 may include attaching the first portion 202 to the second portion 202 using a material specific process, e.g. using an adhesive.
  • the cavity 206 may be arranged on a side of the second substrate portion 204 opposite to the connection interface with the first substrate portion 202.
  • the first substrate portion 202 may be a planar substrate, e.g. having a wafer-shape.
  • the second substrate portion 204 may have a rather compact shape, e.g. having a higher thickness and smaller areal surface.
  • the second substrate portion 206 may be arranged at about a geometric center of the first substrate 210 portion.
  • the first substrate 210 may have a T-shape cross-section as illustrated in FIG.2A.
  • the method 100 may include a stacking 106 of the first substrate 210 (see FIG.2A) with a second substrate 306, as illustrated in FIG.l and FIG.2B.
  • the second substrate 306 may be a die, for example.
  • the second substrate portion 204 of the first substrate 210 may be attached, e.g. arranged at about a geometric center of the second substrate.
  • the second substrate attached to the first substrate 210 may have form a double-T-shape crosssection as illustrated in FIG.2B.
  • the second substrate 306 may be attached to the first substrate 210 using an adhesive layer 302.
  • the cavity 106 of the second substrate portion 204 of the first substrate 210 facing the second substrate 306 may be substantially free of adhesive layer 302.
  • the second substrate 306 may include a first surface facing the first substrate 210, and a second surface opposite to the first surface.
  • the second substrate 306 may include a conductive structure 304.
  • the conductive structure 304 may include a via structure 312, e.g. a through glass via (TGV) in case of the second substrate 306 being a glass substrate, or a through silicon via (TSV) in case of the second substrate 306 being a silicon substrate.
  • a via structure 312 e.g. a through glass via (TGV) in case of the second substrate 306 being a glass substrate, or a through silicon via (TSV) in case of the second substrate 306 being a silicon substrate.
  • TSV through glass via
  • TSV through silicon via
  • the conductive structure 304 may include a contact pad structure 310 at the second surface.
  • the contact pad structure may be electrically conductively coupled to the via structure 312.
  • the conductive structure 304 may include a contact portion structure 308 on the first surface of the second substrate 306.
  • the contact portion structure 308 may be electrically conductively coupled to the via structure 312.
  • the contact portion structure 308 may be configured to be at least laterally along a sidewall of the cavity 206 or overlap with the at least one cavity in the second substrate portion 204 of the second substrate 306 . This way, when cutting the first and second substrates 210 , 306 vertically along a line cutting through the cavity 206 , the contact portion structure 308 of the conductive structure 304 is laterally exposed at the separation line 502 .
  • FIG .4A shows contact portion structures 308 at the first surface of the second substrate and FIG .4B shows contact pad structures 310 coupled through connection lines 1112 , e . g . redistribution lines 1112 , with vias 312 at the second surface of the second substrate 306 .
  • the adhesive layer 302 may be configured to overlap the conductive structure 304 at least in the region between the cavity 206 in the second substrate portion 204 of the first substrate 210 and the second substrate 306 . This way, the adhesive layer may seal the housing to be formed properly, e . g . against humidity, dust and/or oxygen .
  • the conductive structure 304 may be configured to provide an electrically conductive connection from the contact portion structure at the first surface of the second substrate 306 through the second substrate 306 with the contact pad structure 310 .
  • the adhesive layer 302 may be formed from a non-conductive adhesive , e . g . an epoxide .
  • the adhesive layer 302 may be formed from an electrically conductive material , e . g . containing silver-particles .
  • the adhesive layer 302 and the contact portion structure 308 may be formed continuously, e . g . as a common structure from the same material .
  • the adhesive layer 302 formed from an electrically conductive material may be part of the conductive structure 304 .
  • the method 100 may include an attaching 108 of a contact structure 402 to the second substrate 306.
  • the contact structure 402 may be arranged in a lateral distance from the cavity 206.
  • the contact structure 402 may be one or more solder bump(s) , ball grid array (s) (BGA) or land grid array (s) (LGA) for example, as illustrated in FIG.l and FIG.2C.
  • the contact structure 402 may be configured for external contacting.
  • the contact structure 402 may be formed on or above the second surface of the second substrate 306 after re-arranging such that the second surface of the second substrate 306 is the top surface .
  • the method 100 may include a singulating of the substrate stack into singulated modules 504, 506, as illustrated in FIG.l and FIG.2E.
  • the singulating 110 into modules 504, 506 may include a separating, e.g. cutting, of the first substrate 210 and the second substrate 306 along a separation line 502 such that the contact portion structure 308 of the conductive structure 304 is exposed at a side surface of the module (s) , e.g. between the first substrate 210 and the second substrate 306.
  • the singulating 110 into modules 504, 506 may include a laser cutting of the stack of first and second substrates 210, 306, for example.
  • the singulated modules 504, 506 may have smooth surfaces at the side walls along the separation line 502.
  • the adhesive layer 302 of the singulated modules 504, 506 may have a smooth and continuous exposed surface at the side surface.
  • a continuous surface of conductive adhesive layer 302 may overlook between the second substrate portion 204 of the first substrate 210 and the second substrate 306, e.g. on the whole perimeter .
  • the method 100 may include a recombination 112 of singulated modules 504, 506, as illustrated in FIG.l and FIG.2F.
  • the recombination 112 may be used for forming the EMI coating at least on the side surface 602 including an exposed portion 604 of the contact portion structure and of the adhesive layer 302.
  • the recombination 112 may include an increasing of a distance of the singulated modules 504, 506, e.g. an arranging of singulated modules 504, 506 in a coating apparatus, for instance for spray coating.
  • the conductive adhesive layer 312 may cover the contact portion structure (thus there may be no exposed portion 604) , and the contact portion structure may be electrically conductively coupled to the electrically conductive adhesive layer 312 exposed at the side surface 602.
  • the distance between the modules 504, 506 may allow that the coating nozzle to be arranged in the gap.
  • a recombination process may be used for setting a gap distance between the singulated modules 504, 506.
  • the distance may have a certain ratio according to the module size.
  • an efficient coating is enabled.
  • the coating may cover the whole top and sidewalls of the modules 504, 506.
  • modules 504, 506 may be arranged over a soft thick tape 606.
  • the method 100 may include a forming 112 of an EMI coating 702, e.g. using a spray coating, as illustrated in FIG.l and FIG.2G.
  • the tape 606 may be removed after the EMI coating 702 has been formed.
  • the EMI coating 702 may electrically conductively contact the exposed surface of the adhesive layer 302 (and optionally of the exposed surface 604 of the contact portion structure) . This way, an EMI coating 702 may be formed on the module 504, 506.
  • Each of the modules 504, 506 may be part of a housing for a device.
  • the method of forming a device having the device housing 800 may further include coupling a printed circuit board 802, e.g. a ground contact 804, 806 of the printed circuit board 802 with the conductive structure 304, as illustrated in FIG.2G.
  • a printed circuit board 802 e.g. a ground contact 804, 806 of the printed circuit board 802 with the conductive structure 304, as illustrated in FIG.2G.
  • FIG.2G an electrically conductive connection from the EMI coating 702 to the ground contact 804, 806 of the printed circuit board 802 through the conductive structure 304 is formed.
  • FIG.2H by the arrows external interferences are collected by the completely coated external surfaces of the module 800 and transferred to ground contact 804, 806 of the printed circuit board 802.
  • the interference path may be, in sequence, the conductive adhesive layer 302, the contact portion structure, on the first surface of the second substrate 306, the via through the second substrate 306, the contact pad structure, e.g. that may act as a redistribution layer, the contact structure, e.g. the ball grid array, and the ground contact 804, 806 of the printed circuit board 802.
  • the EMI coating 702 may be formed substantially having uniformity in thickness and/or texture.
  • the adhesive layer 302 and/or the contact portion structure may be configured having a good conductivity, e.g. substantially free of air bubbles or material voids allowed.
  • FIG.3A shows a schematic cross-sectional view of a comparative device 1000 having separate device housing.
  • a metal cap 1002 for EMI is attached to a printed circuit board 1004 using an adhesive layer 1006.
  • the printed circuit board 1004 may include a plurality of contact pads 1004 as described before.
  • a surface emitting laser 1016 may be arranged on the printed circuit board 1002 and may be coupled to it using wire bonds 1020.
  • the device 1000 includes a packaging having an optical window 1010 and a spacer substrate 1012.
  • the VCSEL device 1000 may include one or more driving circuits 1018.
  • FIG.3B shows a schematic cross-sectional view of a device 1010 having a device housing described above having an improved electromagnetic interference protection.
  • the device 1030 illustrated in FIG.3B may include the EMI coating layer 702 attached to the first and second substrate portions 202, 204 of the first substrate and the second substrate 306.
  • the printed circuit board 802 may include a plurality of contact pads 804, 806 as described before.
  • the first substrate portion 202 may form an optical window for the VCSEL device 1030.
  • the EMI layer 702 may form a bezel for the optical window . This allows an improved window alignment for a VCSEL device 1030 .
  • the VCSEL device 1030 may include one or more driving circuits 1036 .
  • a surface emitting laser 1034 may be arranged on the printed circuit board 802 and may be coupled to it using wire bonds 1038 .
  • the method to manufacture the device 1010 may include the spray coating process step at recombined wafer level as described before . There may be only material needed to form the EMI protection provision .
  • the optical window, e . g . aperture may be formed by laser ablation of the EMI layer in the region of the optical window, e . g . us ing local reference points .
  • the device 1030 may be formed without a Pick-and-Place ( PnP ) - process .
  • Example 1 is a device package including an electrically non- conductive first substrate attached to a second substrate , the second substrate having a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate , wherein the contact portion structure is coupled to the first substrate ; and an electrically conductive coating disposed over at least a part of the first substrate and electrically conductively coupled to the contact portion structure .
  • the first and second substrate may form the device housing, and the electrically conductive coating may form the EMI coating layer as described before .
  • the EMI coating layer may also be denoted as EMI prevention layer .
  • the EMI coating layer may be an EMI protection provision for an electronic device packaged by the device package .
  • the subj ect matter of Example 1 can optionally include a printed circuit board including at least one ground contact coupled to the contact pad structure .
  • the subj ect matter of Example 1 or 2 can optionally include that the first substrate includes a first substrate portion and a second substrate portion stacked above each other .
  • Example 4 the subj ect matter of Example 3 can optionally include that in the first substrate portion is a glass substrate .
  • Example 5 the subj ect matter of Example 3 or 4 can optionally include that the first substrate portion includes at least one of an optical window, an optical tap, and one or more optical lenses .
  • Example 6 the subj ect matter of any one of Examples 3 to 5 can optionally include that the second substrate portion has a rectangular shape or a circular shape .
  • Example 7 the subj ect matter of any one of Examples 3 to 6 can optionally include that the second substrate portion includes one or more glass substrates .
  • Example 8 the subj ect matter of any one of Examples 3 to 5 can optionally include that the first substrate portion is attached to the second substrate portion by at least one of a solder connection, a welding connection or an adhesive layer .
  • Example 9 the subj ect matter of any one of Examples 3 to 8 can optionally include that the contact portion structure is arranged along the second substrate portion of the first substrate .
  • Example 10 the subj ect matter of any one of Examples 1 to 9 can optionally include that the contact pad structure includes at least one of a solder ball , a ball grid array and a land grid array .
  • Example 11 the subj ect matter of any one of Examples 1 to
  • the 10 can optionally include that the second substrate is a semiconductor substrate .
  • Example 12 the subj ect matter of any one of Examples 1 to
  • the second substrate is a silicon substrate .
  • Example 13 the subj ect matter of any one of Examples 1 to
  • the electrically conductive coating is a spray coating layer .
  • Example 14 the subj ect matter of any one of Examples 1 to 10 can optionally include that the first substrate and the second substrate are configured as a device housing for at least one optical device component to be arranged on the first surface of the second substrate .
  • Example 15 the subj ect matter of any one of Examples 1 to 14 can optionally include that the electrically conductive coating is configured as an electromagnetic interference , EMI , prevention layer .
  • Example 16 the subj ect matter of any one of Examples 1 to 15 can optionally include an adhesive layer configured to attach the second substrate to the first substrate , wherein the adhesive layer is arranged between the second substrate and the first substrate .
  • Example 17 the subj ect matter of Example 16 can optionally include that the adhesive layer is configured to electrically conductively couple the contact portion structure with the electrically conductive coating .
  • Example 18 the subj ect matter of any one of Example 16 or 17 can optionally include that the adhesive layer is formed from an electrically conductive material .
  • Example 19 the subj ect matter of any one of Examples 16 to 18 can optionally include that the contact portion structure is embedded in the adhesive layer such that at least a part of the contact portion structure directly contacts the electrically conductive coating .
  • Example 20 the subj ect matter of any one of Examples 3 to 19 can optionally include that at least a part of the first substrate portion is substantially free of electrically conductive coating .
  • Example 21 the subj ect matter of any one of Examples 3 to
  • the second surface of the second substrate is substantially free of electrically conductive coating .
  • Example 22 the subj ect matter of any one of Examples 16 to
  • first substrate attached to the second substrate via the adhesive layer are configured to substantially seal electronic device components arranged on the first surface of the second substrate against water and/or oxygen .
  • Example 23 is a device including a device package of any one of Examples 1 to 22 , and at least one light emitting component arrange on the first surface of the second substrate .
  • Example 24 the subj ect matter of Example 23 can optionally include that the device is a vertical cavity surface emitting laser, VCSEL, device .
  • the device is a vertical cavity surface emitting laser, VCSEL, device .
  • Example 25 is a method to manufacture a device package , the method including attaching an electrically non-conductive first substrate to a second substrate , wherein the second substrate comprises a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate such that contact portion structure is coupled to the first substrate ; and disposing an electrically conductive coating over at least a part of the first substrate such that the electrically conductive coating is electrically conductively coupled to the contact portion structure .
  • Example 26 the subj ect of Example 25 can optionally include coupling a printed circuit board including at least one ground contact to the contact pad structure .
  • Example 27 the subj ect matter of Example 25 or 26 can optionally include forming the first substrate by stacking a first substrate portion on a second substrate portion .
  • Example 28 the subj ect matter of any one of Examples 25 to
  • the first substrate portion is a glass substrate .
  • Example 29 the subj ect matter of any one of Examples 27 to
  • the first substrate portion includes at least one of an optical window, an optical tap, and one or more optical lenses .
  • Example 30 the subj ect matter of any one of Examples 27 to
  • the second substrate portion has a rectangular shape or a circular shape .
  • Example 31 the subj ect of any one of Examples 27 to 30 can optionally include that the second substrate portion includes one or more glass substrates .
  • Example 32 the subj ect matter of any one of Examples 27 to
  • the first substrate portion is attached to the second substrate portion by at least one of a solder connection, a welding connection and an adhesive layer .
  • Example 33 the subj ect matter of any one of Examples 27 to
  • the contact portion structure is arranged along the second substrate portion of the first substrate .
  • Example 34 the subj ect matter of any one of Examples 25 to
  • the contact pad structure includes at least one of a solder ball , a ball grid array and a land grid array .
  • Example 35 the subj ect matter of any one of Examples 25 to
  • the second substrate is a semiconductor substrate .
  • Example 36 the subj ect matter of any one of Examples 25 to
  • the second substrate is a silicon substrate .
  • Example 37 the subj ect matter of any one of Examples 25 to
  • the electrically conductive coating is disposed using a spray coating of the material of the electrically conductive coating .
  • Example 38 the subj ect matter of any one of Examples 25 to
  • first substrate and the second substrate are configured as a device housing for at least one optical device component to be arranged on the first surface of the second substrate .
  • Example 39 the subj ect matter of any one of Examples 25 to
  • the electrically conductive coating is disposed as an electromagnetic interference , EMI , prevention layer .
  • Example 40 the subj ect matter of any one of Examples 25 to
  • first substrate and the second substrate are attached to each other using an adhesive layer arranged between the first substrate and the second substrate .
  • Example 41 the subj ect matter of Example 40 can optionally include that the adhesive layer is configured to electrically conductively couple the contact portion structure with the electrically conductive coating .
  • Example 42 the subj ect matter of any one of Examples 40 to
  • the adhesive layer is disposed from an electrically conductive material .
  • Example 43 the subj ect matter of any one of Examples 40 to
  • the contact portion structure is embedded in the adhesive layer such that at least a part of the contact portion structure directly contacts the electrically conductive coating .
  • Example 44 the subj ect matter of any one of Examples 40 to
  • the 43 can optionally include that at least a part of the first substrate portion is di sposed substantially free of electrically conductive coating .
  • Example 45 the subj ect matter of any one of Examples 40 to
  • the second surface of the second substrate is substantially free of electrically conductive coating .
  • Example 46 the subj ect matter of any one of Examples 40 to
  • first substrate attached to the second substrate via the adhesive layer are configured to substantially seal electronic device components arranged on the first surface of the second substrate against water and/or oxygen .
  • Example 47 the subj ect matter of any one of Examples 25 to
  • the method 46 can optionally include that the method further including providing a first device housing and a second device housing by cutting through the first substrate and the second substrate before the electrically conductive coating is disposed .
  • Example 48 the subj ect matter of Examples 47 can optionally include that the electrically conductive coating is disposed on a surface formed by the cutting process .
  • Example 49 the subj ect matter of any one of Examples 25 to 48 can optionally include that the method further including forming at least one cavity in the second substrate portion of the first substrate , the cavity at a side of the second substrate portion facing the second substrate .
  • Example 50 the subj ect matter of Example 49 can optionally include that the adhesive layer to attach the second substrate with the first substrate is arranged on or above the cavity .
  • Example 51 the subj ect matter of any one of Examples 49 to
  • the cavity is substantially free of adhesive layer .
  • Example 52 the subj ect matter of any one of Examples 49 to
  • the cavity 51 can optionally include that the cavity is arranged in the cutting line of the cutting process .
  • Example 53 the subj ect matter of any one of Examples 25 to
  • the second surface of the second substrate is covered using a tape during forming of the electrically conductive coating .
  • Example 54 the subj ect matter of any one of Examples 25 to
  • the 53 can optionally include that at least a part of the first substrate is covered using a tape during forming of the electrically conductive coating .
  • Example 55 the subj ect matter of any one of Examples 25 to 54 can optionally include that the electrically conductive coating is removed at least from a part of the first substrate after forming the electrically conductive coating .
  • Example 56 the subj ect matter of Example 55 can optionally include that the electrically conductive coating is removed using a laser ablation process .
  • Example 57 is a method to manufacture a device, the method including: a method of any one of Examples 25 to 56 and arranging at least one light emitting component on the first surface of the second substrate.
  • Example 58 the subject matter of Example 57 can optionally include that the device is a vertical cavity surface emitting laser, VCSEL, device.
  • the device is a vertical cavity surface emitting laser, VCSEL, device.
  • pluricity and “multiple” in the description or the claims expressly refer to a quantity greater than one.
  • group (of) “, “set [of] “, “collection (of) “, “series (of)”, “sequence (of)”, “grouping (of)”, etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state “plurality” or “multiple” likewise refers to a quantity equal to or greater than one .
  • connection can be understood in the sense of a (e.g. mechanical, optical and/or electrical) , e.g. direct or indirect, connection and/or interaction.
  • a e.g. mechanical, optical and/or electrical
  • several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) .
  • implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device .
  • implementations of devices detailed herein are understood as capable o f being implemented as a corresponding method .
  • a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

A device package is provided including A device package including an electrically non-conductive first substrate attached to a second substrate, the second substrate having a contact portion structure at a first surface of the second substrate coupled to a contact pad structure at a second surface of the second substrate opposite to the first surface by a via structure through the second substrate, wherein the contact portion structure is arranged between the first substrate and the second substrate; and an electrically conductive coating arranged on at least a part of the first substrate and electrically conductively coupled to the contact portion structure between the first substrate and the second substrate.

Description

METHOD ON HOW TO CONNECT MODULES EXTERNAL ELECTROMAGNETIC INTERFERENCE COATING WITH A BALL GRID ARRAY ON THE BOTTOM
Description
This disclosure generally relates to a device package having an electromagnetic interference coating, and a method to manufacture the same .
An electronic device package includes a device housing and an electromagnetic interference (EMI ) protective means . The electronic device package having a mainboard packaged in the device housing usually has a problem that non-conductive device housings do not provide an EMI protective means on the packaging level ( also denoted as module level ) . The non- conductive device housing may include a glass-housing or plastic-housing for example , and it is di f ficult to connect an external EMI coating on the device housing with the mainboard . Thus , commonly, metallic cages of any si ze and any shape made of suitable metallic conductive materials are placed around electronic components on the mainboard to provide EMI protection . However, this requires additional parts increasing the bill of materials (BoM) and generates bigger footprint of the packaging .
Thus , a device package having an improved electromagnetic interference provision is provided, and a method to manufacture the device package are provided . The invention is set out in the appended set of claims .
In one aspect , a device package is provided . The device package includes an electrically non-conductive first substrate attached to a second substrate , the second substrate having a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate , wherein the contact portion structure is coupled to the first substrate ; and an electrically conductive coating disposed over at least a part of the first substrate and electrically conductively coupled to the contact portion structure .
This way, the device package provides an improved electromagnetic interference , EMI , protection . In particular, the electrically conductive coating acting as EMI coating may increase the overall si ze of a device package only for a few micrometers (pm) , adheres well to the housing of the device package formed by the first and second substrates and may be in exact conformity with the shape of the device housing . Adequate thickness of the EMI coating on top and lateral surfaces of the device housing can be well controlled on process .
In another aspect , a method to manufacture device package is provided . The method includes attaching an electrically non- conductive first substrate to a second substrate , wherein the second substrate comprises a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate such that contact portion structure is coupled to the first substrate ; and disposing an electrically conductive coating over at least a part of the first substrate such that the electrically conductive coating is electrically conductively coupled to the contact portion structure .
I llustratively, the electrically conductive coating is formed on a surface of the first substrate facing away from the contact portion structure .
This way, the method provides an improved way of manufacturing an electromagnetic interference protection for a device package . In the drawings , like reference characters generally refer to the same parts throughout the di f ferent views . The drawings are not necessarily to scale , emphasis instead generally being placed upon illustrating the principles of the invention . In the following description, various aspects of the invention are described with reference to the following drawings , in which :
FIG . 1 shows a flow diagram of a method to manufacture a device housing having an improved electromagnetic interference protection;
FIG . 2A to FIG . 2H shows schematic cross-sectional views illustrating the manufacturing of a device housing having an improved electromagnetic interference protection;
FIG . 3A shows a schematic cross-sectional view of a comparative device having a metal cap as electromagnetic interference protection;
FIG . 3B shows a schematic cross-sectional view of a device having a device housing having an improved electromagnetic interference protection; and
FIG . 4A and FIG . 4B show schematic top views of the second substrate of a device housing having an improved electromagnetic interference protection .
The following detailed description refers to the accompanying drawings that show, by way of illustration, speci fic details and aspects in which the disclosure may be practiced . One or more aspects are described in suf ficient detail to enable those skilled in the art to practice the disclosure . Other aspects may be utili zed and structural , logical , and electrical changes may be made without departing from the scope of the disclosure . The various aspects described herein are not necessarily mutually exclusive , as some aspects can be combined with one or more other aspects to form new aspects . Various aspects are described in connection with methods and various aspects are described in connection with devices . However, it may be understood that aspects described in connection with methods may similarly apply to the devices , and vice versa . Throughout the drawings , it should be noted that like reference numbers are used to depict the same or similar elements , features , and structures .
Compared to comparative EMI solutions , the EMI protection provision connects an EMI coating layer with a ground contact of a printed circuit board . Thus , there is no need for dispensing adhesive layer to attach a metal cap or metal lid to the printed circuit board . This may allow reducing the footprint of the overall device , e . g . of the EMI protection provision of the device package . After the fully populated second substrate , e . g . the wafer die , has been manufactured and after the first substrate has been attached to the second substrate , all the preliminary features may be in place . A further process of singulating the modules and recombine the singulated modules may allow to form, e . g . via spray coating, the EMI shield material .
I llustratively, second substrate may be formed with an all- around contact portion structure connected with vias , e . g . Thru-Silicon-Vias , with a bottom ball grid array (BGA) . EMI protection provision of the device is a coating layer and not a metal cap as in the comparative example . A connection between the EMI coating layer and the BGA may include the exposed conductive adhesive layer on the side surface of the module between the first substrate and the second substrate of the singulated modules .
In designing the second substrate , an advantage of the EMI coating is to have all the proper layers designed to collect electrical interferences , trans fer interferences to a bottom side of the second substrate through a via, e . g . a through- silicon via ( TSV) in case of the second substrate being a silicon die or wafer, and redistributing the electrical interference to a contact pad structure, e.g. a ball grid array (BGA) , with a proper redistribution layer design at the bottom side (e.g. second surface) of the second substrate, and transfer the electric interference from the BGA to a ground (GND) contact of a printed circuit board coupled to the BGA. In the forming of the adhesive layer between the first substrate and the second substrate, e.g. dispensing the adhesive, it is an advantage to have a controlled overflow that is then exposed by singulating the modules. In the spray coating of the EMI coating layer advantage is a better control of the material thickness according to shielding needs of the device.
The method of manufacturing the device package may include a stacking process of substrates, e.g. a wafer level stacking process, followed by a singulation process to two form two or more device housings from the stacked substrates. The singulated device housings are coated with an EMI coating layer and thus one or more device packages having an EMI shield are realized. The stacked substrates may include a glass substrate (optionally with one or lenses) (also denoted as first substrate portion of a first substrate) forming the top part of the device housing, a spacer substrate (optionally with one or more cavities) (also denoted as first substrate portion of a first substrate) forming at least one side wall of the device housing, and a die substrate (also denoted as second substrate) (optionally with one or more surface mounted device components) forming the bottom part of the device housing.
The accuracy of the alignment of substrates may be critical to quality (CTQ) in optical devices, in order to get a well- aligned laser-to-lens module.
The second substrate portion of the first substrate is may be attached to the second substrate such that a contact portion structure on surface side of the second substrate facing the first substrate portion of the first substrate is directly or indirectly exposed to an electrical contact at the outside of the side wall of the device housing (e.g. the second substrate portion of the first substrate) . An indirect coupling may be achieved using an electrically conductive adhesive used to attach the second substrate portion of the first substrate to the second substrate . A process to singulate the device housings ( also denoted as modules ) may generate side walls of the device housing having a smooth side surface , e . g . with an exposed conductive adhesive layer between the second substrate portion of the first substrate and the second substrate .
An EMI coating layer covering the side walls and ( optionally) at least a part of the exposed top surface of the first substrate portion may form an EMI protection provision of the device package . The EMI coating layer may electrically connect the surface of the device package with a contact pad structure at a second surface of the second substrate ( opposite to the first surface of the second substrate ) . The contact pad structure may be coupled to a ground contact of a printed circuit board ( also denoted as mainboard) . Thus electric interferences at the housing can be trans ferred to the ground contact of the printed circuit board . This provides a device package having an improved EMI protection provision .
The EMI coating layer may be formed using a spray coating method . This may increase the overall si ze of the device package ( e . g . device housing with EMI protection provision) compared to the device housing only for a few micro meters . Thus , the device package provides an improved footprint compared to a comparative device package using a metal cap as EMI protection provision . Further, the EMI coating layer adheres and conforms exactly to the shape of the device housing compared to a comparative device package using a metal cap as EMI protection provision . Thus , the bill of material may be improved,
Further, the spray coated EMI coating layer allows an improved control of the uni formity of thickness and roughness on top and lateral surfaces of the device housing . This allows an accurate suppression of EMI by controlling the thickness of the EMI coating layer . Further, the described method may allow forming the device package without a Pick-and-Place process of a metal cap as EMI protection provision.
FIG. 1 shows a flow diagram of a method 100 to manufacture a device housing having an improved electromagnetic interference protection. FIG.2A to FIG.2G shows schematic cross-sectional views illustrating the manufacturing of a device housing, as shown in FIG.l, and of a device having a respective device housing .
The method 100 may include a preparation 102 of substrate portions 202, 204, e.g. of a first substrate portion 202 and a second substrate portion 204, as illustrated in FIG.l (see also FIG.2A) . The first substrate portion 202 attached to the second substrate portion 204 may form a first substrate 210. The preparation 102 may include a cutting, cleaning, and surface preparation of the substrate portions 202, 204. The preparation 102 may further include a forming of one or more cavities 206 in at least one of the substrate portions 202, 204. A cavity 206 may be used as markings and/or intended separation points of the first substrate 210.
The substrate portions 202, 204 may be glass substrates, for example .
The method 100 may further include a stacking 104 of the prepared first substrate portion 202 on the prepared second substrate portion 204 (or vice versa) , as illustrated in FIG.l and FIG.2B.
While FIG.2B to FIG.2H only show a single first substrate 210 stacked on a second substrate 306 this is only for illustration purpose. In particular, the device housing to be formed may have a rectangular shape (e.g. as becomes apparent from FIG.3A to FIG.4B) or circular shape. Thus, the illustrated cross- sectional view represents only a cross-section of one side wall of one or more side walls of the device housing. Further, the first substrate portion may be optically transparent, e.g. a glass substrate, e.g. a glass waver, to act as an optical window for one or more light emitting device (s) , e.g. a surface or side emitting laser and/or an array thereof, encapsulated by the device housing. Alternatively, or in addition, the first substrate portion 202 may include one or more optical lenses, e.g. a lens array, e.g. a micro lens array. Alternatively, or in addition, the first substrate portion 202 may act as an optical tap.
The first substrate portion 202 may form an electrically non- conductive top part of the housing to be formed.
The second substrate portion 204 may form an electrically non- conductive side part of the housing to be formed.
The second substrate portion 202 may be a spacer glass for example .
The combined substrate may be denoted as the first substrate 210. Thus, the first substrate 210 may include a first substrate portion 202, e.g. the top glass wafer 202, and a second substrate portion 204, e.g. the spacer glass 204. The stacking 104 may include attaching the first portion 202 to the second portion 202 using a material specific process, e.g. using an adhesive.
The cavity 206 may be arranged on a side of the second substrate portion 204 opposite to the connection interface with the first substrate portion 202.
The first substrate portion 202 may be a planar substrate, e.g. having a wafer-shape. Compared to the first substrate 210 portion, the second substrate portion 204 may have a rather compact shape, e.g. having a higher thickness and smaller areal surface. The second substrate portion 206 may be arranged at about a geometric center of the first substrate 210 portion. Thus, the first substrate 210 may have a T-shape cross-section as illustrated in FIG.2A. The method 100 may include a stacking 106 of the first substrate 210 (see FIG.2A) with a second substrate 306, as illustrated in FIG.l and FIG.2B. The second substrate 306 may be a die, for example. As an example, the second substrate portion 204 of the first substrate 210, e.g. the spacer glass, may be attached, e.g. arranged at about a geometric center of the second substrate. Thus, the second substrate attached to the first substrate 210 may have form a double-T-shape crosssection as illustrated in FIG.2B.
The second substrate 306 may be attached to the first substrate 210 using an adhesive layer 302.
The cavity 106 of the second substrate portion 204 of the first substrate 210 facing the second substrate 306 may be substantially free of adhesive layer 302.
The second substrate 306 may include a first surface facing the first substrate 210, and a second surface opposite to the first surface. The second substrate 306 may include a conductive structure 304.
The conductive structure 304 may include a via structure 312, e.g. a through glass via (TGV) in case of the second substrate 306 being a glass substrate, or a through silicon via (TSV) in case of the second substrate 306 being a silicon substrate.
The conductive structure 304 may include a contact pad structure 310 at the second surface. The contact pad structure may be electrically conductively coupled to the via structure 312.
The conductive structure 304 may include a contact portion structure 308 on the first surface of the second substrate 306. The contact portion structure 308 may be electrically conductively coupled to the via structure 312. The contact portion structure 308 may be configured to be at least laterally along a sidewall of the cavity 206 or overlap with the at least one cavity in the second substrate portion 204 of the second substrate 306 . This way, when cutting the first and second substrates 210 , 306 vertically along a line cutting through the cavity 206 , the contact portion structure 308 of the conductive structure 304 is laterally exposed at the separation line 502 .
FIG .4A shows contact portion structures 308 at the first surface of the second substrate and FIG .4B shows contact pad structures 310 coupled through connection lines 1112 , e . g . redistribution lines 1112 , with vias 312 at the second surface of the second substrate 306 .
The adhesive layer 302 may be configured to overlap the conductive structure 304 at least in the region between the cavity 206 in the second substrate portion 204 of the first substrate 210 and the second substrate 306 . This way, the adhesive layer may seal the housing to be formed properly, e . g . against humidity, dust and/or oxygen .
The conductive structure 304 may be configured to provide an electrically conductive connection from the contact portion structure at the first surface of the second substrate 306 through the second substrate 306 with the contact pad structure 310 .
The adhesive layer 302 may be formed from a non-conductive adhesive , e . g . an epoxide . Alternatively, or in addition, the adhesive layer 302 may be formed from an electrically conductive material , e . g . containing silver-particles . For example , the adhesive layer 302 and the contact portion structure 308 may be formed continuously, e . g . as a common structure from the same material . The adhesive layer 302 formed from an electrically conductive material may be part of the conductive structure 304 . The method 100 may include an attaching 108 of a contact structure 402 to the second substrate 306. The contact structure 402 may be arranged in a lateral distance from the cavity 206. The contact structure 402 may be one or more solder bump(s) , ball grid array (s) (BGA) or land grid array (s) (LGA) for example, as illustrated in FIG.l and FIG.2C. The contact structure 402 may be configured for external contacting. The contact structure 402 may be formed on or above the second surface of the second substrate 306 after re-arranging such that the second surface of the second substrate 306 is the top surface .
The method 100 may include a singulating of the substrate stack into singulated modules 504, 506, as illustrated in FIG.l and FIG.2E. The singulating 110 into modules 504, 506 may include a separating, e.g. cutting, of the first substrate 210 and the second substrate 306 along a separation line 502 such that the contact portion structure 308 of the conductive structure 304 is exposed at a side surface of the module (s) , e.g. between the first substrate 210 and the second substrate 306.
The singulating 110 into modules 504, 506 may include a laser cutting of the stack of first and second substrates 210, 306, for example.
The singulated modules 504, 506 may have smooth surfaces at the side walls along the separation line 502. As an example, the adhesive layer 302 of the singulated modules 504, 506 may have a smooth and continuous exposed surface at the side surface.
A continuous surface of conductive adhesive layer 302 may overlook between the second substrate portion 204 of the first substrate 210 and the second substrate 306, e.g. on the whole perimeter .
The method 100 may include a recombination 112 of singulated modules 504, 506, as illustrated in FIG.l and FIG.2F. The recombination 112 may be used for forming the EMI coating at least on the side surface 602 including an exposed portion 604 of the contact portion structure and of the adhesive layer 302. The recombination 112 may include an increasing of a distance of the singulated modules 504, 506, e.g. an arranging of singulated modules 504, 506 in a coating apparatus, for instance for spray coating. In case of an electrically conductive adhesive layer 312, the conductive adhesive layer 312 may cover the contact portion structure (thus there may be no exposed portion 604) , and the contact portion structure may be electrically conductively coupled to the electrically conductive adhesive layer 312 exposed at the side surface 602.
In spray coating, the distance between the modules 504, 506 may allow that the coating nozzle to be arranged in the gap. As an example, a recombination process may be used for setting a gap distance between the singulated modules 504, 506. The distance may have a certain ratio according to the module size. Thus, an efficient coating is enabled. The coating may cover the whole top and sidewalls of the modules 504, 506.
As an example, in order to protect and seal the contact structure 402 against contamination of coating particles, e.g. with a risk of electrical shortages, modules 504, 506 may be arranged over a soft thick tape 606.
The method 100 may include a forming 112 of an EMI coating 702, e.g. using a spray coating, as illustrated in FIG.l and FIG.2G.
The tape 606 may be removed after the EMI coating 702 has been formed. The EMI coating 702 may electrically conductively contact the exposed surface of the adhesive layer 302 (and optionally of the exposed surface 604 of the contact portion structure) . This way, an EMI coating 702 may be formed on the module 504, 506. Each of the modules 504, 506 may be part of a housing for a device.
The method of forming a device having the device housing 800 may further include coupling a printed circuit board 802, e.g. a ground contact 804, 806 of the printed circuit board 802 with the conductive structure 304, as illustrated in FIG.2G. This way, an electrically conductive connection from the EMI coating 702 to the ground contact 804, 806 of the printed circuit board 802 through the conductive structure 304 is formed. Thus, as illustrated in FIG.2H by the arrows, external interferences are collected by the completely coated external surfaces of the module 800 and transferred to ground contact 804, 806 of the printed circuit board 802. The interference path may be, in sequence, the conductive adhesive layer 302, the contact portion structure, on the first surface of the second substrate 306, the via through the second substrate 306, the contact pad structure, e.g. that may act as a redistribution layer, the contact structure, e.g. the ball grid array, and the ground contact 804, 806 of the printed circuit board 802.
The EMI coating 702 may be formed substantially having uniformity in thickness and/or texture.
The adhesive layer 302 and/or the contact portion structure may be configured having a good conductivity, e.g. substantially free of air bubbles or material voids allowed.
FIG.3A shows a schematic cross-sectional view of a comparative device 1000 having separate device housing. In the comparative example 1000, a metal cap 1002 for EMI is attached to a printed circuit board 1004 using an adhesive layer 1006. The printed circuit board 1004 may include a plurality of contact pads 1004 as described before. A surface emitting laser 1016 may be arranged on the printed circuit board 1002 and may be coupled to it using wire bonds 1020. The device 1000 includes a packaging having an optical window 1010 and a spacer substrate 1012. The VCSEL device 1000 may include one or more driving circuits 1018.
FIG.3B shows a schematic cross-sectional view of a device 1010 having a device housing described above having an improved electromagnetic interference protection. The device 1030 illustrated in FIG.3B may include the EMI coating layer 702 attached to the first and second substrate portions 202, 204 of the first substrate and the second substrate 306. The printed circuit board 802 may include a plurality of contact pads 804, 806 as described before. The first substrate portion 202 may form an optical window for the VCSEL device 1030. The EMI layer 702 may form a bezel for the optical window . This allows an improved window alignment for a VCSEL device 1030 . The VCSEL device 1030 may include one or more driving circuits 1036 . A surface emitting laser 1034 may be arranged on the printed circuit board 802 and may be coupled to it using wire bonds 1038 . The method to manufacture the device 1010 may include the spray coating process step at recombined wafer level as described before . There may be only material needed to form the EMI protection provision . The optical window, e . g . aperture may be formed by laser ablation of the EMI layer in the region of the optical window, e . g . us ing local reference points . The device 1030 may be formed without a Pick-and-Place ( PnP ) - process .
In the following some examples are described, which relate to what is described herein and shown in the figures .
Example 1 is a device package including an electrically non- conductive first substrate attached to a second substrate , the second substrate having a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate , wherein the contact portion structure is coupled to the first substrate ; and an electrically conductive coating disposed over at least a part of the first substrate and electrically conductively coupled to the contact portion structure .
Here , the first and second substrate may form the device housing, and the electrically conductive coating may form the EMI coating layer as described before . The EMI coating layer may also be denoted as EMI prevention layer . The EMI coating layer may be an EMI protection provision for an electronic device packaged by the device package .
In Example 2 , the subj ect matter of Example 1 can optionally include a printed circuit board including at least one ground contact coupled to the contact pad structure . In Example 3 , the subj ect matter of Example 1 or 2 can optionally include that the first substrate includes a first substrate portion and a second substrate portion stacked above each other .
In Example 4 , the subj ect matter of Example 3 can optionally include that in the first substrate portion is a glass substrate .
In Example 5 , the subj ect matter of Example 3 or 4 can optionally include that the first substrate portion includes at least one of an optical window, an optical tap, and one or more optical lenses .
In Example 6 , the subj ect matter of any one of Examples 3 to 5 can optionally include that the second substrate portion has a rectangular shape or a circular shape .
In Example 7 , the subj ect matter of any one of Examples 3 to 6 can optionally include that the second substrate portion includes one or more glass substrates .
In Example 8 , the subj ect matter of any one of Examples 3 to 5 can optionally include that the first substrate portion is attached to the second substrate portion by at least one of a solder connection, a welding connection or an adhesive layer .
In Example 9 , the subj ect matter of any one of Examples 3 to 8 can optionally include that the contact portion structure is arranged along the second substrate portion of the first substrate .
In Example 10 , the subj ect matter of any one of Examples 1 to 9 can optionally include that the contact pad structure includes at least one of a solder ball , a ball grid array and a land grid array . In Example 11 , the subj ect matter of any one of Examples 1 to
10 can optionally include that the second substrate is a semiconductor substrate .
In Example 12 , the subj ect matter of any one of Examples 1 to
11 can optionally include that the second substrate is a silicon substrate .
In Example 13 , the subj ect matter of any one of Examples 1 to
12 can optionally include that the electrically conductive coating is a spray coating layer .
In Example 14 , the subj ect matter of any one of Examples 1 to 10 can optionally include that the first substrate and the second substrate are configured as a device housing for at least one optical device component to be arranged on the first surface of the second substrate .
In Example 15 , the subj ect matter of any one of Examples 1 to 14 can optionally include that the electrically conductive coating is configured as an electromagnetic interference , EMI , prevention layer .
In Example 16 , the subj ect matter of any one of Examples 1 to 15 can optionally include an adhesive layer configured to attach the second substrate to the first substrate , wherein the adhesive layer is arranged between the second substrate and the first substrate .
In Example 17 , the subj ect matter of Example 16 can optionally include that the adhesive layer is configured to electrically conductively couple the contact portion structure with the electrically conductive coating .
In Example 18 , the subj ect matter of any one of Example 16 or 17 can optionally include that the adhesive layer is formed from an electrically conductive material . In Example 19 , the subj ect matter of any one of Examples 16 to 18 can optionally include that the contact portion structure is embedded in the adhesive layer such that at least a part of the contact portion structure directly contacts the electrically conductive coating .
In Example 20 , the subj ect matter of any one of Examples 3 to 19 can optionally include that at least a part of the first substrate portion is substantially free of electrically conductive coating .
In Example 21 , the subj ect matter of any one of Examples 3 to
20 can optionally include that the second surface of the second substrate is substantially free of electrically conductive coating .
In Example 22 , the subj ect matter of any one of Examples 16 to
21 can optionally that the first substrate attached to the second substrate via the adhesive layer are configured to substantially seal electronic device components arranged on the first surface of the second substrate against water and/or oxygen .
Example 23 is a device including a device package of any one of Examples 1 to 22 , and at least one light emitting component arrange on the first surface of the second substrate .
In Example 24 , the subj ect matter of Example 23 can optionally include that the device is a vertical cavity surface emitting laser, VCSEL, device .
Example 25 is a method to manufacture a device package , the method including attaching an electrically non-conductive first substrate to a second substrate , wherein the second substrate comprises a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate such that contact portion structure is coupled to the first substrate ; and disposing an electrically conductive coating over at least a part of the first substrate such that the electrically conductive coating is electrically conductively coupled to the contact portion structure .
In Example 26 , the subj ect of Example 25 can optionally include coupling a printed circuit board including at least one ground contact to the contact pad structure .
In Example 27 , the subj ect matter of Example 25 or 26 can optionally include forming the first substrate by stacking a first substrate portion on a second substrate portion .
In Example 28 , the subj ect matter of any one of Examples 25 to
27 can optionally include that the first substrate portion is a glass substrate .
In Example 29 , the subj ect matter of any one of Examples 27 to
28 can optionally include that the first substrate portion includes at least one of an optical window, an optical tap, and one or more optical lenses .
In Example 30 , the subj ect matter of any one of Examples 27 to
29 can optionally include that the second substrate portion has a rectangular shape or a circular shape .
In Example 31 , the subj ect of any one of Examples 27 to 30 can optionally include that the second substrate portion includes one or more glass substrates .
In Example 32 , the subj ect matter of any one of Examples 27 to
31 can optionally include that the first substrate portion is attached to the second substrate portion by at least one of a solder connection, a welding connection and an adhesive layer .
In Example 33 , the subj ect matter of any one of Examples 27 to
32 can optionally include that the contact portion structure is arranged along the second substrate portion of the first substrate .
In Example 34 , the subj ect matter of any one of Examples 25 to
33 can optionally include that the contact pad structure includes at least one of a solder ball , a ball grid array and a land grid array .
In Example 35 , the subj ect matter of any one of Examples 25 to
34 can optionally include that the second substrate is a semiconductor substrate .
In Example 36 , the subj ect matter of any one of Examples 25 to
35 can optionally include that the second substrate is a silicon substrate .
In Example 37 , the subj ect matter of any one of Examples 25 to
36 can optionally include that the electrically conductive coating is disposed using a spray coating of the material of the electrically conductive coating .
In Example 38 , the subj ect matter of any one of Examples 25 to
37 can optionally include that the first substrate and the second substrate are configured as a device housing for at least one optical device component to be arranged on the first surface of the second substrate .
In Example 39 , the subj ect matter of any one of Examples 25 to
38 can optionally include that the electrically conductive coating is disposed as an electromagnetic interference , EMI , prevention layer .
In Example 40 , the subj ect matter of any one of Examples 25 to
39 can optionally include that the first substrate and the second substrate are attached to each other using an adhesive layer arranged between the first substrate and the second substrate .
In Example 41 , the subj ect matter of Example 40 can optionally include that the adhesive layer is configured to electrically conductively couple the contact portion structure with the electrically conductive coating .
In Example 42 , the subj ect matter of any one of Examples 40 to
41 can optionally include that the adhesive layer is disposed from an electrically conductive material .
In Example 43 , the subj ect matter of any one of Examples 40 to
42 can optionally include that the contact portion structure is embedded in the adhesive layer such that at least a part of the contact portion structure directly contacts the electrically conductive coating .
In Example 44 , the subj ect matter of any one of Examples 40 to
43 can optionally include that at least a part of the first substrate portion is di sposed substantially free of electrically conductive coating .
In Example 45 , the subj ect matter of any one of Examples 40 to
44 can optionally include that the second surface of the second substrate is substantially free of electrically conductive coating .
In Example 46 , the subj ect matter of any one of Examples 40 to
45 can optionally include that the first substrate attached to the second substrate via the adhesive layer are configured to substantially seal electronic device components arranged on the first surface of the second substrate against water and/or oxygen .
In Example 47 , the subj ect matter of any one of Examples 25 to
46 can optionally include that the method further including providing a first device housing and a second device housing by cutting through the first substrate and the second substrate before the electrically conductive coating is disposed .
In Example 48 , the subj ect matter of Examples 47 can optionally include that the electrically conductive coating is disposed on a surface formed by the cutting process . In Example 49 , the subj ect matter of any one of Examples 25 to 48 can optionally include that the method further including forming at least one cavity in the second substrate portion of the first substrate , the cavity at a side of the second substrate portion facing the second substrate .
In Example 50 , the subj ect matter of Example 49 can optionally include that the adhesive layer to attach the second substrate with the first substrate is arranged on or above the cavity .
In Example 51 , the subj ect matter of any one of Examples 49 to
50 can optionally include that the cavity is substantially free of adhesive layer .
In Example 52 , the subj ect matter of any one of Examples 49 to
51 can optionally include that the cavity is arranged in the cutting line of the cutting process .
In Example 53 , the subj ect matter of any one of Examples 25 to
52 can optionally include that the second surface of the second substrate is covered using a tape during forming of the electrically conductive coating .
In Example 54 , the subj ect matter of any one of Examples 25 to
53 can optionally include that at least a part of the first substrate is covered using a tape during forming of the electrically conductive coating .
In Example 55 , the subj ect matter of any one of Examples 25 to 54 can optionally include that the electrically conductive coating is removed at least from a part of the first substrate after forming the electrically conductive coating .
In Example 56 , the subj ect matter of Example 55 can optionally include that the electrically conductive coating is removed using a laser ablation process . Example 57 is a method to manufacture a device, the method including: a method of any one of Examples 25 to 56 and arranging at least one light emitting component on the first surface of the second substrate.
In Example 58, the subject matter of Example 57 can optionally include that the device is a vertical cavity surface emitting laser, VCSEL, device.
The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any example or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other examples or designs .
The words "plurality" and "multiple" in the description or the claims expressly refer to a quantity greater than one. The terms "group (of) ", "set [of] ", "collection (of) ", "series (of)", "sequence (of)", "grouping (of)", etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state "plurality" or "multiple" likewise refers to a quantity equal to or greater than one .
The term "connected" can be understood in the sense of a (e.g. mechanical, optical and/or electrical) , e.g. direct or indirect, connection and/or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) .
While the above descriptions and connected figures may depict optical device components as separate elements, skilled persons will appreciate the various possibilities to combine or integrate discrete optical functions into a single element. Such may include combining two or more components from a single component. Conversely, skilled persons will recognize the possibility to separate a single element into two or more discrete elements , such as splitting a single component into two or more separate component .
It is appreciated that implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device . Likewise , it is appreciated that implementations of devices detailed herein are understood as capable o f being implemented as a corresponding method . It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .
All acronyms defined in the above description additionally hold in all claims included herein .
While the disclosure has been particularly shown and described with reference to speci fic embodiments , it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims . The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced .

Claims

1 . A device package comprising an electrically non-conductive first substrate attached to a second substrate , the second substrate having a contact portion structure at a first surface of the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure i s coupled to the contact pad structure by a via structure extending through the second substrate , wherein the contact portion structure is coupled to the first substrate ; an electrically conductive coating disposed over at least a part of the first substrate and electrically conductively coupled to the contact portion structure ; and an adhesive layer configured to attach the second substrate to the first substrate , wherein the adhesive layer is arranged between the second substrate and the first substrate , wherein the adhesive layer is configured to electrically conductively couple the contact portion structure with the electrically conductive coating .
2 . The device package of claim 1 , further comprising a printed circuit board comprising at least one ground contact coupled to the contact pad structure .
3 . The device package of claim 1 or 2 , wherein the first substrate comprises a first substrate portion and a second substrate portion stacked above each other, wherein the first substrate portion comprises at least one of an optical window, an optical tap, or one or more optical lenses .
4 . The device package of claim 3 , wherein the first substrate portion is attached to the second substrate portion by at least one of a solder connection, a welding connection or an adhesive layer .
5 . The device package of any one of claims 1 to 4 , wherein the contact pad structure comprises at least one of a solder ball , a ball grid array and a land grid array .
6 . The device package of any one of claims 1 to 5 , wherein the electrically conductive coating is formed on a surface of the first substrate facing away from the contact portion structure .
7 . The device package of any one of claims 3 to 6 , wherein at least a part of the first substrate portion is substantially free of electrically conductive coating .
8 . The device package of any one of claims 1 to 7 , wherein the second surface of the second substrate is substantially free of electrically conductive coating .
9 . A device comprising : a device package of any one of claims 1 to 8 and at least one light emitting component arranged on the first surface of the second substrate .
10 . The device of claim 9 , wherein the device is a vertical cavity surface emitting laser, VCSEL, device .
11 . A method to manufacture a device package , the method comprising : attaching an electrically non-conductive first substrate to a second substrate , wherein the second substrate comprises a contact portion structure at a first surface o f the second substrate and a contact pad structure at a second surface of the second substrate opposite to the first surface , wherein the contact portion structure is coupled to the contact pad structure by a via structure extending through the second substrate such that contact portion structure is coupled to the first substrate ; disposing an electrically conductive coating over at least a part of the first substrate such that the electrically conductive coating is electrically conductively coupled to the contact portion structure ; and attaching the second substrate to the first substrate using an adhesive layer, wherein the adhesive layer is arranged between the second substrate and the first substrate , wherein the adhesive layer is configured to electrically conductively couple the contact portion structure with the electrically conductive coating .
12 . The method of claim 11 , further comprising providing a first device housing and a second device housing by cutting through the first substrate and the second substrate before the electrically conductive coating is disposed .
13 . The method of claim 12 , wherein the electrically conductive coating is formed on a surface formed by the cutting process .
14 . The method of any one of claims 11 to 13 , further comprising forming at least one cavity in a second substrate portion of the first substrate , the cavity at a side of the second substrate portion facing the second substrate .
15 . The method of claim 14 , wherein an adhesive layer to attach the second substrate with the first substrate is arranged on or above the cavity .
16 . The method of claim 14 or 15 , wherein the cavity is arranged in the cutting line of the cutting process .
17 . The method of any one of claims 14 to 16 , wherein the second surface of the second substrate is covered using a tape during forming of the electrically conductive coating .
18 . The method of any one of claims 11 to 17 wherein at least a part of the first substrate is covered using a tape during forming of the electrically conductive coating .
PCT/EP2024/064897 2023-05-31 2024-05-30 Method on how to connect modules external electromagnetic interference coating with a ball grid array on the bottom Pending WO2024246199A1 (en)

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DE102023114254 2023-05-31

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US20200373249A1 (en) * 2018-12-27 2020-11-26 STATS ChipPAC Pte. Ltd. Semiconductor Device with Partial EMI Shielding Removal Using Laser Ablation
US20220066036A1 (en) * 2020-08-25 2022-03-03 Lumentum Operations Llc Package for a time of flight device
US20230108464A1 (en) * 2021-10-06 2023-04-06 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and electronic component package including the same

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Publication number Priority date Publication date Assignee Title
US5832598A (en) * 1995-03-02 1998-11-10 Circuit Components Incorporated Method of making microwave circuit package
US20130083229A1 (en) * 2011-09-30 2013-04-04 Omnivision Technologies, Inc. Emi shield for camera module
US20130154085A1 (en) * 2011-12-14 2013-06-20 Daesik Choi Integrated circuit packaging system with heat conduction and method of manufacture thereof
US20200373249A1 (en) * 2018-12-27 2020-11-26 STATS ChipPAC Pte. Ltd. Semiconductor Device with Partial EMI Shielding Removal Using Laser Ablation
US20220066036A1 (en) * 2020-08-25 2022-03-03 Lumentum Operations Llc Package for a time of flight device
US20230108464A1 (en) * 2021-10-06 2023-04-06 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and electronic component package including the same

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