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WO2024141103A1 - Photodiode et son procédé de fabrication - Google Patents

Photodiode et son procédé de fabrication Download PDF

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Publication number
WO2024141103A1
WO2024141103A1 PCT/CN2024/070079 CN2024070079W WO2024141103A1 WO 2024141103 A1 WO2024141103 A1 WO 2024141103A1 CN 2024070079 W CN2024070079 W CN 2024070079W WO 2024141103 A1 WO2024141103 A1 WO 2024141103A1
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WIPO (PCT)
Prior art keywords
type
layer
type semiconductor
semiconductor region
region
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Ceased
Application number
PCT/CN2024/070079
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English (en)
Chinese (zh)
Inventor
施长治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai United Imaging Microelectronics Technology Co Ltd
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Shanghai United Imaging Microelectronics Technology Co Ltd
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Filing date
Publication date
Priority claimed from CN202211735815.5A external-priority patent/CN116053339A/zh
Priority claimed from CN202211732601.2A external-priority patent/CN115911155A/zh
Application filed by Shanghai United Imaging Microelectronics Technology Co Ltd filed Critical Shanghai United Imaging Microelectronics Technology Co Ltd
Publication of WO2024141103A1 publication Critical patent/WO2024141103A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies

Definitions

  • the present application relates to the field of semiconductor devices, and in particular to a photodiode and a method for manufacturing the same.
  • the first-type semiconductor layer is usually prepared on the upper surface of the second-type semiconductor layer (including at least the epitaxial layer), and the PN junction is formed near the upper surface of the epitaxial layer.
  • the absorption depth of photons in the epitaxial layer is related to the wavelength of light. The longer the light wave, the greater the absorption depth, and the shorter the light wave, the smaller the absorption depth.
  • the absorption position of long-wave photons in the epitaxial layer is far away from the PN junction; for back-incident (incident from the lower surface side of the epitaxial layer) photodiodes, the absorption position of short-wave photons in the epitaxial layer is far away from the PN junction.
  • the photogenerated carriers generated at a long distance need a long transit time to enter the charge depletion region and be collected.
  • these photogenerated carriers are easily captured by defects in the lattice during the diffusion process with the concentration gradient, resulting in a decrease in quantum efficiency; on the other hand, the increase in the transit time of the photogenerated carriers will also cause a decrease in the response speed of the photodiode.
  • the present application provides a photodiode and a method for manufacturing the same to solve the problem that in some usage scenarios of existing photodiodes, the absorption position of photons in the epitaxial layer is far away from the junction position.
  • a photodiode in the present application.
  • the photodiode includes: a semiconductor layer, a first electrode and a second electrode.
  • An insulating column perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer includes a first-type semiconductor region and a second-type semiconductor region surrounding the insulating column.
  • the upper surface of the semiconductor layer is covered with an insulating layer, the first electrode penetrates through the insulating layer and contacts the first-type semiconductor region, and the second electrode penetrates through the insulating layer and contacts the second-type semiconductor region.
  • the sidewalls of the insulating pillar are surrounded and covered with a first-type pinning layer, and the first-type pinning layer is located between the second-type semiconductor region and the insulating pillar.
  • the doping concentration of the first-type pinning layer is higher than the doping concentration of the second-type semiconductor region.
  • a top of the first-type pinned layer extends outward to form a first-type extension layer
  • a top of the second-type semiconductor region extends outward to form a second-type extension region
  • the first-type extension layer is located between the second-type extension region and the insulating layer.
  • the first-type extension layer has a contact window, and the second electrode contacts the second-type extension region through the contact window.
  • the semiconductor layer includes an epitaxial layer grown on a substrate, and the insulating pillar is disposed in the epitaxial layer.
  • the first type semiconductor region and the second type semiconductor region are located in the epitaxial layer.
  • the insulating column penetrates the epitaxial layer, or a preset distance exists between the bottom surface of the insulating column and the lower surface of the epitaxial layer.
  • the inner end of the first electrode contacts the first-type semiconductor region through a first-type contact layer
  • the inner end of the second electrode contacts the second-type semiconductor region through a second-type contact layer
  • the ratio of the length to the diameter of the insulating column ranges from 3 to 10.
  • the present invention provides a method for manufacturing a photodiode, the manufacturing method comprising: etching a through hole perpendicular to the first-type semiconductor layer in a first-type semiconductor layer; injecting second-type doping ions into the side walls of the through hole to form a second-type semiconductor region surrounding the through hole in the first-type semiconductor layer; wherein the non-second-type semiconductor region in the first-type semiconductor layer constitutes the first-type semiconductor region; depositing insulating material in the through hole to form an insulating column; forming an insulating layer on the upper surface of the first-type semiconductor layer; preparing a first electrode and a second electrode passing through the insulating layer, the first electrode being in contact with the first-type semiconductor region, and the second electrode being in contact with the second-type semiconductor region.
  • the distribution depth of the first-type pinned layer in the semiconductor layer is greater than the distribution depth of the second-type semiconductor region in the semiconductor layer.
  • the manufacturing method further comprises: implanting first-type dopant ions into the sidewalls of the through hole, and forming a first-type pinning layer surrounding the through hole inside the second-type semiconductor region.
  • the first-type pinning layer is formed between the second-type semiconductor region and the insulating pillar, and the doping concentration of the first-type pinning layer is higher than the doping concentration of the second-type semiconductor region.
  • the manufacturing method further includes: implanting second-type dopant ions into the upper surface of the first-type semiconductor layer to form a second-type extension region extending outward from the top of the second-type semiconductor region; implanting first-type dopant ions into the upper surface of the first-type semiconductor layer to form a first-type extension layer extending outward from the top of the first-type pinning layer, wherein a contact window is reserved in the first-type extension layer.
  • the first-type extension layer is formed between the second-type extension region and the insulating layer, and the contact window is configured to provide a contact space between the second electrode and the second-type extension region.
  • the manufacturing method further includes: implanting the first-type dopant ions into the upper surface of the first-type semiconductor region to form a first-type contact layer in contact with the first-type semiconductor region; implanting the second-type dopant ions into the upper surface of the second-type semiconductor region to form a second-type contact layer in contact with the second-type semiconductor region.
  • the first-type contact layer is formed to contact the first electrode
  • the second-type contact layer is formed to contact the second electrode.
  • the first-type semiconductor layer includes a first-type epitaxial layer grown on a substrate.
  • the through hole is formed in the first-type epitaxial layer, the second-type semiconductor region is formed in the first-type epitaxial layer, and the non-second-type semiconductor region in the first-type epitaxial layer constitutes the first-type semiconductor region.
  • the through hole penetrates the first-type epitaxial layer, or a preset distance is formed between the bottom wall of the through hole and the lower surface of the first-type epitaxial layer.
  • the ratio of the length to the diameter of the through hole is in the range of 3-10.
  • a conductor column perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer includes a first type semiconductor region and a second type semiconductor region surrounding the conductor column.
  • the side wall of the conductor column is surrounded and covered with a first insulating layer, the first insulating layer is located between the second-type semiconductor region and the conductor column, and the upper surface of the semiconductor layer is covered with a second insulating layer.
  • the first electrode penetrates the second insulating layer and contacts the top end of the conductor column, the bottom end of the conductor column contacts the first type semiconductor region, and the second electrode penetrates the second insulating layer and contacts the second type semiconductor region.
  • an outer sidewall of the first insulating layer is surrounded and covered with a first-type pinning layer, and the first-type pinning layer is located between the second-type semiconductor region and the first insulating layer.
  • the top of the first-type pinned layer extends outward to form a first-type extension layer
  • the top of the second-type semiconductor region extends outward to form a second-type extension region
  • the distribution depth of the first-type pinned layer in the semiconductor layer is greater than the distribution depth of the second-type semiconductor region in the semiconductor layer.
  • the ratio of the length to the diameter of the conductor post is in the range of 3-10.
  • the manufacturing method further includes, after forming the second-type semiconductor region and before forming the first insulating layer: injecting first-type dopant ions into the sidewalls of the through hole to form a first-type pinning layer surrounding the through hole on the inner side of the second-type semiconductor region; wherein the first-type pinning layer is formed between the second-type semiconductor region and the first insulating layer, and the doping concentration of the first-type pinning layer is higher than the doping concentration of the second-type semiconductor region.
  • the manufacturing method further includes: injecting second-type dopant ions into the upper surface of the first-type semiconductor layer to form a second-type extension region extending outward from the top of the second-type semiconductor region; injecting first-type dopant ions into the upper surface of the first-type semiconductor layer to form a first-type extension layer extending outward from the top of the first-type pinning layer, wherein a contact window is reserved in the first-type extension layer; wherein the first-type extension layer is formed between the second-type extension region and the second insulating layer, and the contact window is used to provide contact space between the second electrode and the second-type extension region.
  • the present application provides a photodiode, which includes a semiconductor layer, a first electrode, and a second electrode.
  • the semiconductor layer includes a first-type semiconductor region and a second-type semiconductor region, and the junction region formed by the first-type semiconductor region and the second-type semiconductor region is located inside the semiconductor layer and distributed along the depth direction of the semiconductor layer, and the depth direction of the semiconductor layer is the direction from the top to the bottom of the semiconductor layer.
  • the first electrode is in contact with the first-type semiconductor region
  • the second electrode is in contact with the second-type semiconductor region.
  • the sidewall of the insulating column is surrounded and covered with a first type pinning layer, and the first type pinning layer is located between the second
  • the first type pinning layer has a doping concentration higher than that of the second type semiconductor region.
  • a distribution depth of the first-type pinning layer in the semiconductor layer is greater than a distribution depth of the second-type semiconductor region in the semiconductor layer.
  • a conductor column is provided in the second-type semiconductor region, and the conductor column extends in the depth direction of the semiconductor layer.
  • the sidewall of the conductor column is surrounded and covered with a first insulating layer, the first insulating layer is located between the second-type semiconductor region and the conductor column, and the upper surface of the semiconductor layer is covered with a second insulating layer.
  • the first electrode penetrates the second insulating layer and contacts the top of the conductor column, the bottom of the conductor column contacts the first-type semiconductor region, and the second electrode penetrates the second insulating layer and contacts the second-type semiconductor region.
  • a distribution depth of the first-type pinning layer in the semiconductor layer is greater than a distribution depth of the second-type semiconductor region in the semiconductor layer.
  • the semiconductor layer includes an epitaxial layer grown on a substrate, the insulating column is disposed in the epitaxial layer, the first-type semiconductor region and the second-type semiconductor region are located in the epitaxial layer.
  • the insulating column (300) penetrates the epitaxial layer, or a preset distance is provided between the bottom surface of the insulating column and the lower surface of the epitaxial layer.
  • FIG1 is a schematic diagram of the structure of a photodiode in an embodiment of the present application.
  • FIG2 is a schematic diagram of the structure of a photodiode in an embodiment of the present application.
  • FIG3 is a schematic diagram of the structure of a photodiode in an embodiment of the present application.
  • FIG4 is a flow chart of a method for manufacturing a photodiode in one embodiment of the present application.
  • the second-type semiconductor layer is usually prepared on the upper surface of the first-type semiconductor layer, so the junction area is formed on the upper surface of the first-type semiconductor layer.
  • the absorption position of long-wave photons is deeper in the first-type semiconductor layer, and thus the absorption position is far away from the junction area.
  • the photodiode proposed in the present invention forms a junction area inside the semiconductor layer.
  • the absorption position of long-wave photons is deeper in the semiconductor layer, the photogenerated carriers generated at the absorption position can be absorbed by the junction area at the deeper position, and this part of the photogenerated carriers does not need to cross to the surface of the semiconductor layer. This overcomes the problem that when the existing photodiodes face long-wave photons, the absorption position of photons in the semiconductor layer will be far away from the junction area.
  • an epitaxial layer is usually first grown on the upper surface of the substrate 600, and then the relevant process is performed in the epitaxial layer to finally form a finished diode. Therefore, the semiconductor layer of the photodiode in the present application generally refers to the epitaxial layer. Furthermore, an insulating layer 500 needs to be formed on the upper surface of the semiconductor layer, and two electrodes are prepared on the upper surface of the semiconductor layer. Whether an insulating layer 500 is formed on the lower surface of the semiconductor layer is related to whether the substrate 600 is removed. In some embodiments, whether to remove the substrate 600 can be selected according to the type of photodiode, and the type of photodiode can be divided into front-side incident (FSI) and back-side incident (BSI).
  • FSI front-side incident
  • BSI back-side incident
  • the first type extension layer 410 is located between the second type extension region 221 and the insulating layer 500 , and the first type extension layer 410 isolates the second type extension region 221 from the insulating layer 500 ; a contact window is reserved in the first type extension layer 410 , and the second electrode 120 contacts the second type extension region 221 through the contact window.
  • the present application also proposes a method for manufacturing a photodiode, which is used to manufacture the photodiode based on the insulating pillar proposed in the present invention.
  • the manufacturing method includes the following steps S110 to S150 .
  • Step S110 etching a through hole in the first-type semiconductor layer that is perpendicular to the first-type semiconductor layer.
  • Step S150 preparing a first electrode 110 and a second electrode 120 penetrating the insulating layer, wherein the first electrode 110 contacts the first-type semiconductor region 210 , and the second electrode 120 contacts the second-type semiconductor region 220 .
  • the through hole may penetrate the first epitaxial layer, and in the diode without removing the substrate 600, the bottom of the through hole will penetrate into the substrate 600. In other embodiments, the through hole does not penetrate the first epitaxial layer, and there is a certain distance between the bottom of the through hole and the lower surface of the first epitaxial layer. Usually, when the junction region needs to be distributed at a deeper position, the through hole that penetrates the first epitaxial layer is selected for etching.
  • the above-mentioned specific injection tilt angle is selected as arctan (1.6um/7.5um), that is, the depth of the p-type ion injection area along the side wall of the through hole is controlled to be about 7.5um.
  • the above-mentioned tilt angle injection method is also adopted to form an n+ type pinning area on the surface of the device photosensitive area and the entire side wall of the through hole by utilizing the self-blocking effect of the upper edge of the through hole, and the injection tilt angle is selected as arctan (1.6um/8um).
  • the coverage area of the n+ type pinning area must exceed the p-type ion injection area to prevent the depletion area from contacting the surface area of the device to reduce the impact of interface defects on device performance.
  • the n+ type pinning area constitutes the first type pinning layer 400.
  • the center hole is filled with dielectric materials such as SiO2 for surface passivation; the device surface is passivated using conventional CMOS surface passivation technology.
  • the photogenerated carriers generated by light excitation in the epitaxial layer do not need to diffuse a long distance to reach the junction area near the surface before being collected.
  • the photogenerated carriers can be quickly collected by lateral diffusion to the ring-hole type pn junction area.
  • the photodiode comprises: a semiconductor layer, a first electrode 110 and a second electrode 120; a conductor column 2300 perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the conductor column 2300 extends along the depth direction of the semiconductor layer.
  • the conductor column 2300 can also be arranged inside the semiconductor layer along other directions.
  • the first electrode 110 penetrates the second insulating layer 2500 and contacts the top of the conductor column 2300, the bottom of the conductor column 2300 contacts the first-type semiconductor region 210, and the second electrode 120 penetrates the second insulating layer 2500 and contacts the second-type semiconductor region 220.
  • the first electrode 110 may also be disposed at other positions of the semiconductor layer, as long as it can achieve contact with the first-type semiconductor region 210.
  • the second-type semiconductor region 220 is an integral structure surrounding the conductor post 2300, or may be disposed as a plurality of discontinuous split structures, wherein the plurality of split structures are disposed around the conductor post 2300. That is, in a cross section of the semiconductor layer perpendicular to the depth direction, the second-type semiconductor region 220 is in a ring shape surrounding the conductor post 2300, or is a plurality of ring segments surrounding the conductor post 2300.
  • the first-type semiconductor and the second-type semiconductor in the photodiode refer to two types of complementary semiconductors, that is, they represent P-type semiconductor and N-type semiconductor respectively.
  • the main body of the photodiode is a semiconductor layer, which includes a first-type semiconductor region 210 and a second-type semiconductor region 220.
  • the conductor column 2300 is arranged in the semiconductor layer, and its lower end is in contact with the first-type semiconductor region 210, while the second-type semiconductor region 220 surrounds the conductor column 2300.
  • the side wall of the conductor column 2300 is also covered with a first insulating layer 2310, and the first insulating layer 2310 can isolate the second-type semiconductor region 220 and the conductor column 2300 so that the two will not directly contact.
  • the first electrode 110 and the upper end of the conductor column 2300 The first semiconductor region 210 is in contact with the second semiconductor region 220, and the second electrode 120 is in contact with the second semiconductor region 220. Therefore, a junction region is formed at the contact surface between the first semiconductor region 210 and the second semiconductor region 220. Since the conductor column 2300 is vertically located inside the semiconductor layer, and the second semiconductor region 220 surrounds the outside of the conductor column 2300, a junction region is formed inside the semiconductor layer.
  • the top of the second-type semiconductor region 220 extends outward to form a second-type extension region 221. Therefore, from the vertical cross-section of the diode device, the second-type semiconductor region 220 presents an "L"-shaped structure as a whole.
  • the second-type extension region 221 is arranged at the upper surface position of the semiconductor layer, so the junction formed by the second-type extension region 221 and the first-type semiconductor region 210 is close to the upper surface position of the semiconductor layer, and then the absorption position of the short-wave photon in the semiconductor layer is closer to the junction region at this position.
  • the absorption position of the photon in the semiconductor layer is relatively close to the junction position.
  • the top of the first-type pinning layer 400 extends outward to form a first-type extension layer 410, and the first-type extension layer 410 isolates the second-type extension region 221 from the second insulating layer 2500. Therefore, the extension width of the first-type extension layer 410 is greater than the extension width of the second-type extension region 221. Furthermore, a contact window is provided in the first-type extension layer 410 , so that the inner end of the second electrode 120 can contact the second-type extension region 221 through the contact window.
  • a partial area on the upper surface of the semiconductor layer constitutes a device photosensitive region, and the second-type extension region 221 in this embodiment is formed in the device photosensitive region.
  • the present application also proposes a method for manufacturing a photodiode, which is used to manufacture the photodiode based on the conductor pillar proposed in the present invention.
  • the manufacturing method includes the following steps S210 to S250.
  • Step S210 etching a through hole in the first-type semiconductor layer that is perpendicular to the first-type semiconductor layer.
  • the first-type semiconductor layer generally refers to a first-type epitaxial layer grown on a substrate, and the substrate is a first-type substrate.
  • a through hole is etched from the upper surface of the first-type semiconductor layer, and the etching depth and width of the through hole can be determined according to actual design requirements.
  • the ratio of the length to the diameter of the conductor column ranges from 3 to 10.
  • the ratio can be 4 or 6 or 8.
  • the ratio of the length to the diameter of the conductor column can also be 2.5 or 10.5.
  • step S220 second-type dopant ions are implanted into the sidewalls of the through hole to form a second-type semiconductor region 220 surrounding the through hole in the first-type semiconductor layer; wherein the non-second-type semiconductor region in the first-type semiconductor layer forms the first-type semiconductor region 210 .
  • Step S250 preparing a first electrode 110 and a second electrode 120 penetrating the second insulating layer 2500 , wherein the first electrode 110 contacts the top of the conductive pillar 2300 , and the second electrode 120 contacts the second-type semiconductor region 220 .
  • the photodiode based on the conductor column proposed in the present application can be manufactured, and the photodiode includes: a semiconductor layer, a first electrode 110 and a second electrode 120; a conductor column 2300 perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer includes a first-type semiconductor region 210 and a second-type semiconductor region 220 surrounding the conductor column.; the side wall of the conductor column 2300 is surrounded and covered with a first insulating layer 2310, and the first insulating layer 2310 isolates the second-type semiconductor region 220 from the conductor column 2300, and the upper surface of the semiconductor layer is covered with a second insulating layer 2500.
  • a first-type epitaxial layer is formed on the upper surface of the substrate, and the first-type epitaxial layer constitutes a first-type semiconductor layer; then, a through hole perpendicular to the epitaxial layer is etched in the first-type epitaxial layer; further, a second semiconductor region 220 is formed in the first-type epitaxial layer, and a non-second-type semiconductor region in the first-type epitaxial layer constitutes a first-type semiconductor region 210; and a second insulating layer 2500 is formed on the upper surface of the first-type epitaxial layer, and a first electrode 110 and a second electrode 120 are prepared; finally, the substrate is removed, and a third insulating layer 2600 is formed on the lower surface of the first-type epitaxial layer. Since a back-illuminated photodiode is manufactured, an anti-reflection film and a passivation film are also covered on the third insulating film.
  • the first type dopant ions are implanted into the side wall of the through hole by the same ion implantation process, so as to form the first type pinning layer 400 inside the second semiconductor region 220, and the doping concentration of the first type pinning layer 400 is higher than the doping concentration of the second semiconductor region 220.
  • the function of the first type pinning layer 400 is to completely isolate the second semiconductor region 220 from the subsequent first insulating layer 2310. Therefore, it is necessary to control the implantation angle of the first type dopant ions so that the distribution depth of the first type pinning layer 400 is greater than the distribution depth of the second semiconductor region 220.
  • a contact window area is reserved in the pinned heavily doped area for the cathode (n-type) output of the ring diode.
  • a passivation layer is deposited on the inner wall of the through hole and the upper surface of the device for insulation isolation.
  • a window is etched at the bottom of the through hole and the cathode contact area, and then p++ type and n++ type ion implantation are performed respectively to form ohmic contact. Annealing treatment process is performed after each step of ion implantation.
  • the through hole is filled with metal, and an anode electrode is prepared, and a cathode electrode is prepared in the cathode window area.
  • the substrate is removed, and an epitaxial layer of about 5.5um is retained, and an anti-reflection film and a passivation film are deposited on the lower surface of the device.
  • Passivation isolation is performed on the inner wall of the through hole and the upper surface of the device.
  • the passivation layer is etched away at the bottom of the through hole, and the contact area of the epitaxial layer is formed by heavy doping.
  • the contact area of the implanted area is formed by heavy doping.
  • the central through hole is filled with metal to prepare the epitaxial layer contact electrode, and the implanted area contact is prepared in the contact area of the implanted area. Electrode, complete the electrode lead-out of the photodiode.

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Abstract

L'invention concerne une photodiode et son procédé de fabrication. La photodiode comprend une couche semi-conductrice, une première électrode (110) et des secondes électrodes (120). La couche semi-conductrice est pourvue d'une colonne isolante (300) perpendiculaire à la couche semi-conductrice, et la couche semi-conductrice comprend une zone semi-conductrice de premier type (210) et une zone semi-conductrice de second type (220) qui entoure la colonne isolante (300). La surface supérieure de la couche semi-conductrice est recouverte d'une couche isolante (500), la première électrode (110) pénètre à travers la couche isolante (500) pour être en contact avec la zone semi-conductrice de premier type (210), et les secondes électrodes (120) pénètrent à travers la couche isolante (500) pour être en contact avec la zone semi-conductrice de second type (220).
PCT/CN2024/070079 2022-12-30 2024-01-02 Photodiode et son procédé de fabrication Ceased WO2024141103A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
CN202211732601.2 2022-12-30
CN202211735815.5A CN116053339A (zh) 2022-12-30 2022-12-30 一种基于绝缘柱的光电二极管及其制造方法
CN202211735815.5 2022-12-30
CN202211732601.2A CN115911155A (zh) 2022-12-30 2022-12-30 一种基于导体柱的光电二极管及其制造方法

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WO2024141103A1 true WO2024141103A1 (fr) 2024-07-04

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