WO2024073917A1

WO2024073917A1 - Robust codebook for fully coherent ue with eight antenna ports

Info

Publication number: WO2024073917A1
Application number: PCT/CN2022/130166
Authority: WO
Inventors: Bingchao LIU; Lingling Xiao
Original assignee: Lenovo Beijing Ltd
Current assignee: Lenovo Beijing Ltd
Priority date: 2022-11-06
Filing date: 2022-11-06
Publication date: 2024-04-11
Anticipated expiration: 2025-05-06

Abstract

Methods and apparatuses for 8Tx PUSCH and the corresponding TPMI indication are disclosed. In one embodiment, a UE comprises a transceiver; and a processor coupled to the transceiver, wherein the processor is configured to receive, via the transceiver, a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determine a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

Description

ROBUST CODEBOOK FOR FULLY COHERENT UE WITH EIGHT ANTENNA PORTS

FIELD

The subject matter disclosed herein generally relates to wireless communications, and more particularly relates to methods and apparatuses for robust codebook for fully coherent UE with eight antenna ports.

BACKGROUND

The following abbreviations are herewith defined, at least some of which are referred to within the following description: New Radio (NR) , Very Large Scale Integration (VLSI) , Random Access Memory (RAM) , Read-Only Memory (ROM) , Erasable Programmable Read-Only Memory (EPROM or Flash Memory) , Compact Disc Read-Only Memory (CD-ROM) , Local Area Network (LAN) , Wide Area Network (WAN) , User Equipment (UE) , Evolved Node B (eNB) , Next Generation Node B (gNB) , Uplink (UL) , Downlink (DL) , Central Processing Unit (CPU) , Graphics Processing Unit (GPU) , Field Programmable Gate Array (FPGA) , Orthogonal Frequency Division Multiplexing (OFDM) , Radio Resource Control (RRC) , User Entity/Equipment (Mobile Terminal) , Transmitter (TX) , Receiver (RX) , Physical Uplink Shared Channel (PUSCH) , codebook (CB) , non-codebook (nCB) , Transmit Precoding Matrix Indicator (TPMI) , Sounding Reference Signal (SRS) , Bandwidth part (BWP) , Channel State Information Reference Signal (CSI-RS) , Downlink Control Information (DCI) , Discrete Fourier Transform (DFT) .

PUSCH transmission with 8 antenna ports (8Tx PUSCH) shall be supported in NR Release 18 for advanced UE equipped with 8 antennas with one or multiple layers.

This disclosure targets codebooks for 8Tx PUSCH and the corresponding TPMI indication.

BRIEF SUMMARY

Methods and apparatuses for 8Tx PUSCH and the corresponding TPMI indication are disclosed.

In one embodiment, a UE comprises a transceiver; and a processor coupled to the transceiver, wherein the processor is configured to receive, via the transceiver, a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determine a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In some embodiment, if the scheduled PUSCH transmission is rank 1 PUSCH transmission, the co-phasing coefficient is indicated as 1, j, -1 or -j, and if the scheduled PUSCH transmission is rank 2, rank 3, rank 4, rank 5, rank 6, rank 7 and rank 8 PUSCH transmission, the co-phasing coefficient is indicated as 1 or j.

In some embodiment, if the scheduled PUSCH transmission is rank 1 PUSCH transmission, the one 4Tx precoding matrix is a rank 1 4Tx precoding matrix; if the scheduled PUSCH transmission is rank 2 PUSCH transmission, the one 4Tx precoding matrix is a rank 2 4Tx precoding matrix; if the scheduled PUSCH transmission is rank 3 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix; if the scheduled PUSCH transmission is rank 4 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix; if the scheduled PUSCH transmission is rank 5 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix, or the two 4Tx precoding matrices are a rank 2 4Tx precoding matrix and a rank 3 4Tx precoding matrix; if the scheduled PUSCH transmission is rank 6 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix, or the two 4Tx precoding matrices are two rank 3 4Tx precoding matrices; if the scheduled PUSCH transmission is rank 7 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix, or the two 4Tx precoding matrices are a rank 3 4Tx precoding matrix and a rank 4 4Tx precoding matrix; and if the scheduled PUSCH transmission is rank 8 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix, or the two 4Tx precoding matrices are two rank 4 4Tx precoding matrices.

In some embodiment, if the maximum number of PUSCH layers of the scheduled PUSCH transmission is less than or equal to 4, the length of the part for indicating the one 4Tx precoding matrix is 4 bits for fully coherent only transmission, and is 5 bits for fully and partial and non-coherent transmission, and if the maximum number of PUSCH layers of the scheduled PUSCH transmission is larger than 4, the length of the part for indicating the one 4Tx precoding matrix is 2 bits or 4 bits for fully coherent only transmission and is 3 bits for fully and partial and non-coherent transmission, or the length of the part for indicating the two 4Tx precoding matrices is 3+2 bits or 4+4 bits for fully coherent only transmission and is 5+3 bits for fully and partial and non-coherent transmission.

In some embodiment, the processor is further configured to report, via the transceiver, a maxRank = 8.

In some embodiment, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding matrix:

or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

where, each of {b ₀} , {b ₀, b ₁} , {b ₀, b ₁, b ₂} and {b ₀, b ₁, b ₂, b ₃} is the one 4Tx precoding matrix, each pair of {b _0, 0, b _0, 1} and {b _1, 0, b _1, 1, b _1, 2} , {b _0, 0, b _0, 1, b _0, 2} and {b _1, 0, b _1, 1, b _1, 2} , {b _0, 0, b _0, 1, b _0, 2} and {b _1, 0, b _1, 1, b _1, 2, b _1, 3} , and {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and {b _1, 0, b _1, 1, b _1, 2, b _1, 3} is the two 4Tx precoding matrices,

is the co-phasing coefficient, and M indicates the number of antennas in horizontal, and N indicates the number of antennas in vertical.

In some embodiment, the TPMI field further indicates the rank of the scheduled PUSCH transmission.

In another embodiment, a method performed at a UE comprises receiving a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determining a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In still another embodiment, a base unit comprises a transceiver; and a processor coupled to the transceiver, wherein the processor is configured to transmit, via the transceiver, a DCI scheduling a PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determine the precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In yet another embodiment, a method performed at a base unit comprises transmitting a DCI scheduling a PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determining the precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

BRIEF DESCRIPTION OF THE DRAWINGS

A more particular description of the embodiments briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Understanding that these drawings depict only some embodiments, and are not therefore to be considered to be limiting of scope, the embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings, in which:

Figure 1 illustrates an example of antenna layout 1-a and antenna layout 1-b;

Figure 2 is a schematic flow chart diagram illustrating an embodiment of a method;

Figure 3 is a schematic flow chart diagram illustrating an embodiment of another method; and

Figure 4 is a schematic block diagram illustrating apparatuses according to one embodiment.

DETAILED DESCRIPTION

As will be appreciated by one skilled in the art that certain aspects of the embodiments may be embodied as a system, apparatus, method, or program product. Accordingly, embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc. ) or an embodiment combining software and hardware aspects that may generally all be referred to herein as a “circuit” , “module” or “system” . Furthermore, embodiments may take the form of a program product embodied in one or more computer readable storage devices storing machine-readable code, computer readable code, and/or program code, referred to hereafter as “code” . The storage devices may be tangible, non-transitory, and/or non-transmission. The storage devices may not embody signals. In a certain embodiment, the storage devices only employ signals for accessing code.

Certain functional units described in this specification may be labeled as “modules” , in order to more particularly emphasize their independent implementation. For example, a module may be implemented as a hardware circuit comprising custom very-large-scale integration (VLSI) circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.

Modules may also be implemented in code and/or software for execution by various types of processors. An identified module of code may, for instance, include one or more physical or logical blocks of executable code which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module need not be physically located together, but, may include disparate instructions stored in different locations which, when joined logically together, include the module and achieve the stated purpose for the module.

Indeed, a module of code may contain a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules and may be embodied in any suitable form and organized within any suitable type of data structure. This operational data may be collected as a single data set, or may be distributed over different locations including over different computer readable storage devices. Where a module or portions of a module are implemented in software, the software portions are stored on one or more computer readable storage devices.

Any combination of one or more computer readable medium may be utilized. The computer readable medium may be a computer readable storage medium. The computer readable storage medium may be a storage device storing code. The storage device may be, for example, but need not necessarily be, an electronic, magnetic, optical, electromagnetic, infrared, holographic, micromechanical, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.

A non-exhaustive list of more specific examples of the storage device would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, random access memory (RAM) , read-only memory (ROM) , erasable programmable read-only memory (EPROM or Flash Memory) , portable compact disc read-only memory (CD-ROM) , an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium may be any tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device.

Code for carrying out operations for embodiments may include any number of lines and may be written in any combination of one or more programming languages including an object-oriented programming language such as Python, Ruby, Java, Smalltalk, C++, or the like, and conventional procedural programming languages, such as the "C" programming language, or the like, and/or machine languages such as assembly languages. The code may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the very last scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN) , or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider) .

Reference throughout this specification to “one embodiment” , “an embodiment” , or similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrases “in one embodiment” , “in an embodiment” , and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment, but mean “one or more but not all embodiments” unless expressly specified otherwise. The terms “including” , “comprising” , “having” , and variations thereof mean “including but are not limited to” , unless otherwise expressly specified. An enumerated listing of items does not imply that any or all of the items are mutually exclusive, otherwise unless expressly specified. The terms “a” , “an” , and “the” also refer to “one or more” unless otherwise expressly specified.

Furthermore, described features, structures, or characteristics of various embodiments may be combined in any suitable manner. In the following description, numerous specific details are provided, such as examples of programming, software modules, user selections, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of embodiments. One skilled in the relevant art will recognize, however, that embodiments may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid any obscuring of aspects of an embodiment.

Aspects of different embodiments are described below with reference to schematic flowchart diagrams and/or schematic block diagrams of methods, apparatuses, systems, and program products according to embodiments. It will be understood that each block of the schematic flowchart diagrams and/or schematic block diagrams, and combinations of blocks in the schematic flowchart diagrams and/or schematic block diagrams, can be implemented by code. This code may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which are executed via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the schematic flowchart diagrams and/or schematic block diagrams for the block or blocks.

The code may also be stored in a storage device that can direct a computer, other programmable data processing apparatus, or other devices, to function in a particular manner, such that the instructions stored in the storage device produce an article of manufacture including instructions which implement the function specified in the schematic flowchart diagrams and/or schematic block diagrams block or blocks.

The code may also be loaded onto a computer, other programmable data processing apparatus, or other devices, to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the code executed on the computer or other programmable apparatus provides processes for implementing the functions specified in the flowchart and/or block diagram block or blocks.

The schematic flowchart diagrams and/or schematic block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of apparatuses, systems, methods and program products according to various embodiments. In this regard, each block in the schematic flowchart diagrams and/or schematic block diagrams may represent a module, segment, or portion of code, which includes one or more executable instructions of the code for implementing the specified logical function (s) .

It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the Figures. For example, two blocks shown in succession may substantially be executed concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. Other steps and methods may be conceived that are equivalent in function, logic, or effect to one or more blocks, or portions thereof, to the illustrated Figures.

Although various arrow types and line types may be employed in the flowchart and/or block diagrams, they are understood not to limit the scope of the corresponding embodiments. Indeed, some arrows or other connectors may be used to indicate only the logical flow of the depicted embodiment. For instance, an arrow may indicate a waiting or monitoring period of unspecified duration between enumerated steps of the depicted embodiment. It will also be noted that each block of the block diagrams and/or flowchart diagrams, and combinations of blocks in the block diagrams and/or flowchart diagrams, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and code.

The description of elements in each Figure may refer to elements of proceeding figures. Like numbers refer to like elements in all figures, including alternate embodiments of like elements.

The UE can be configured in two different modes for PUSCH multi-antenna precoding, referred as codebook (CB) based transmission and non-codebook (nCB) based transmission, respectively. When the UE is configured with codebook based PUSCH transmission, one SRS resource set used for codebook can be configured in a BWP of a cell for the UE. When the UE is configured with non-codebook based PUSCH transmission, one SRS resource set used for non-codebook can be configured in a BWP of a cell for the UE.

To enable codebook based PUSCH transmission, the UE shall be configured to transmit one or more SRS resources used for codebook for uplink channel measurement. Based on the measurements on the configured SRS resources transmitted by the UE, the gNB determines a suitable rank and the precoding matrix from a pre-defined codebook, which includes a set of precoding matrices with different ranks, and sends the information, i.e., the transmit precoding matrix and number of layers information, to the UE when scheduling a PUSCH transmission.

For non-codebook based PUSCH transmission, the UE is required to measure a CSI-RS to obtain the uplink channel information based on channel reciprocity. In this case, a CSI-RS resource, which is a DL reference signaling transmitted by the gNB for DL channel measurement, is associated with the SRS resource set used for non-codebook. The UE selects what it believes is a suitable uplink precoder and applies the selected precoder to a set of configured SRS resources with one SRS resource transmitted on each layer defined by the precoder. Based on the received SRS resources, the gNB decides to modify the UE-selected precoder for the scheduled PUSCH transmission.

When a UE is equipped with 8 antenna ports (e.g., PUSCH or SRS antenna ports) , the base unit (e.g., gNB) may send to the UE a DCI (e.g., DCI with format 0_1 or DCI with format 0_2) scheduling a PUSCH transmission with up to 8 spatial layers (i.e., PUSCH layers) . The 8 antenna ports (e.g., PUSCH or SRS antenna ports) may be numbered as PUSCH or SRS antenna ports 1000, 1001, 1002, 1003, 1004, 1005, 1006, and 1007.

When a PUSCH is transmitted from the UE with 8 antenna ports, a precoding matrix is used to perform UL precoding on modulated data in codebook based PUSCH transmission. The UE shall perform UL precoding according to Equation 1.

Equation 1:

where, the block of vector

is the modulated data that will be transmitted for the scheduled PUSCH transmission occasion i; W ₀ is the precoding matrix applied to the block of vector; and the block of vector

is the pre-coded data to be transmitted by the UE. v ₀ indicates the number of PUSCH layers. P ₀ corresponds to PUSCH antenna port 1000 and P _ρ-1 corresponds to PUSCH antenna port 1000+ρ-1. In this invention, ρ=8.

Coherent transmission is described as follows:

If a UE reports a capability of fully-coherent and 8 antenna ports (i.e., PUSCH antenna port 1000, 1001, 1002, 1003, 1004, 1005, 1006 and 1007) , all 8 PUSCH antenna ports can be used for coherent transmission of a PUSCH layer. For example, the precoding vector used for each layer can have 8 non-zero elements, e.g.,

is a valid precoding vector for a rank 1 PUSCH transmission (where, each rank corresponds to a PUSCH layer) with 8 fully-coherent antenna ports. If the phase difference between any two antenna ports among multiple antenna ports is fixed, the multiple antenna ports are coherent. If the phase difference between any two antenna ports among multiple antenna ports is not fixed, the multiple antenna ports are non-coherent.

The antenna layout 1-a and antenna layout 1-b illustrated in Figure 1 are dual-polarized antenna layouts for fully coherent UE with eight antenna ports (i.e., fully coherent 8Tx UE). M indicates the number of antennas in horizontal, and N indicates the number of antennas in vertical. For antenna layout 1-a, M = 2 and N = 2. For antenna layout 1-b, M = 4 and N = 1. In this specification, one antenna corresponds to one antenna port. It means that M also indicates the number of antenna ports in horizontal, and N indicates the number of antenna ports in vertical.

The UE can report the supported maxRank∈ {1, 2, 3, 4, 5, 6, 7, 8} , i.e., the supported maximum number of PUSCH layers for a PUSCH transmission.

The gNB sends a DCI to the UE to schedule one or more PUSCH transmissions. The rank of the scheduled PUSCH transmission may be 1, 2, 3, 4, 5, 6, 7 or 8 depending on the reported maxRank. It means that the PUSCH transmission has L PUSCH layers, where L is equal to the indicated rank, which is equal to or less than the reported maxRank. A precoding matrix (which can also be referred to as precoder) shall be determined for the scheduled PUSCH transmission.

The number of columns of the precoding matrix is equal the number of layers (i.e., the rank) of a PUSCH transmission for which the precoding matrix can be applied. So, precoding matrix (i.e., precoder) can be further described as rank R precoding matrix (precoder) , e.g., rank 1 precoder, rank 2 precoder, rank 3 precoder, rank 4 precoder, rank 5 precoder, rank 6 precoder, rank 7 precoder, rank 8 precoder. Rank R precoding matrix (precoder) can be also denoted as R-layer precoding matrix (precoder) , e.g., one-layer precoder (or single-layer precoder) , two-layer precoder, three-layer precoder, four-layer precoder, five-layer precoder, six-layer precoder, seven-layer precoder, eight-layer precoder. The number of rows of the precoding matrix (precoder) is equal to the number of antenna ports for which the precoding matrix can be applied. For example, the precoding matrix (precoder) shall have 8 rows (denoted as 8Tx) for a UE with 8 antenna ports.

A first embodiment relates to rank 1 precoder (W _8Tx, 1) , rank 2 precoder (W _8Tx, 2) , rank 3 precoder (W _8Tx, 3) , and rank 4 precoder (W _8Tx, 4) for fully coherent UE (i.e., 8Tx UE) , and the corresponding indication by TPMI field.

M indicates the number of antennas in horizontal, and N indicates the number of antennas in vertical. For fully coherent UE, M = 2 and N = 2 for antenna layout 1-a, or M = 4 and N = 1 for antenna layout 1-b. It means that MN = 4.

Each of b ₀, b ₁, b ₂, and b ₃ is a 4Tx precoding vector for each PUSCH layer. W ₁= {b ₀} is a rank 1 4Tx precoding matrix for antennas in a same polarization. W ₂= {b ₀, b ₁} is a rank 2 4Tx precoding matrix for antennas in a same polarization. W ₃= {b ₀, b ₁, b ₂} is a rank 3 4Tx precoding matrix for antennas in a same polarization. W ₄= {b ₀, b ₁, b ₂, b ₃} is a rank 4 4Tx precoding matrix for antennas in a same polarization.

There are two schemes (i.e., Scheme 1 and Scheme 2) to determine W ₁, W ₂, W ₃, and W ₄.

(1) Scheme 1:

For rank 1, for fully coherent only transmission, W ₁= {b ₀} corresponds to a matrix (one of 16 candidates) provided in Table 2 for DFT-s-OFDM based PUSCH transmission or a matrix (one of 16 candidates) provided in Table 3 for CP-OFDM based PUSCH transmission; and for fully and partial and non-coherent transmission, W ₁= {b ₀} corresponds to a matrix (one of 28 candidates) provided in Table 6.3.1.5-2 for DFT-s-OFDM without coefficient or a matrix (one of 28 candidates) provided in Table 6.3.1.5-3 for CP-OFDM of TS38.211 without coefficient.

Note that all of the tables are listed at the end of this specification.

For rank 2, for fully coherent only transmission, W ₂= {b ₀, b ₁} corresponds to a matrix (one of 8 candidates) provided in Table 4; and for fully and partial and non-coherent transmission, W ₂= {b ₀, b ₁} corresponds to a matrix (one of 22 candidates) provided in Table 6.3.1.5-5 without coefficient.

For rank 3, for fully coherent only transmission, W ₃= {b ₀, b ₁, b ₂} corresponds to a matrix (one of 4 candidates) provided in Table 5; and for fully and partial and non-coherent transmission, W ₃= {b ₀, b ₁, b ₂} corresponds to a matrix (one of 7 candidates) provided in Table 6.3.1.5-6 without coefficient.

For rank 4, for fully coherent only transmission, W ₄= {b ₀, b ₁, b ₂, b ₃} corresponds to a matrix (one of 2 candidates) provided in Table 6; and for fully and partial and non-coherent transmission, W ₄= {b ₀, b ₁, b ₂, b ₃} corresponds to a matrix (one of 5 candidates) provided in Table 6.3.1.5-7 without coefficient.

For Scheme 1, it can be seen that, for fully coherent only transmission, all the elements of the 8Tx precoding matrix are non-zero values (see Tables 2 to 6) , i.e., all the 8 antennas are used for each PUSCH layer transmission. On the other hand, for fully and partial and non-coherent transmission, some elements of the 8Tx precoding matrix may be zero (see Tables 6.3.1.5-2, 6.3.1.5-3, 6.3.1.5-5, 6.3.1.5-6 and 6.3.1.5-7) , i.e., it is possible that only partial antenna port (s) are used for a PUSCH layer transmission.

(2) Scheme 2:

For rank 1, W ₁= {b ₀} corresponds to a matrix (i.e., vector) (one of 16 candidates) provided by the 3 ^rd column in Table 1.

For rank 2, W ₂= {b ₀, b ₁} corresponds to a matrix (one of 16 candidates) provided by the 4 ^th column in Table 1.

For rank 3, W ₃= {b ₀, b ₁, b ₂} corresponds to a matrix (one of 16 candidates) provided by the 5 ^th column in Table 1.

For rank 4, W ₄= {b ₀, b ₁, b ₂, b ₃} corresponds to a matrix (one of 16 candidates) provided by the 6 ^th column in Table 1.

For Scheme 2, it can be seen that only fully coherent transmission is supported, that is, all the elements of the 8Tx precoding matrix are non-zero values.

corresponding to l∈ {0, 1, 2, 3} is the co-phasing coefficient between two polarizations. For rank 1,

It means that there are 4 candidates for

for rank 1. For rank 2, rank 3, and rank 4,

It means that there are 2 candidates for

for each of rank 2, rank 3 and rank 4. As a whole, the co-phasing coefficient

is calculated based on the index l. In the following description,

may be abbreviated as

In the first embodiment, the precoder for maxRank = 4 (i.e., rank≤4) for 8Tx UE is determined according to a 4Tx precoding matrix and a co-phasing coefficient

The TPMI indication of the rank 1 precoder (W _8Tx, 1) , the rank 2 precoder (W _8Tx, 2) , the rank 3 precoder (W _8Tx, 3) , and the rank 4 precoder (W _8Tx, 4) for fully coherent UE (i.e., 8Tx UE) is described as follows.

For rank≤4 (i.e., rank 1, rank 2, rank 3 and rank 4) , if the rank of the scheduled PUSCH can be obtained from other field (i.e., not the TPMI field) of the scheduling DCI, the TPMI field of the scheduling DCI only needs to indicate the 4Tx precoding matrix (i.e., W ₁, W ₂, W ₃, and W ₄) and the co-phasing coefficient (i.e.,

) . For fully coherent only transmission, depending on the candidates for W and the candidiates for

for each of rank 1, rank 2, rank 3 and rank 4, the required TPMI indication overhead for “Scheme 1, fully coherent only transmission” , “Scheme 1, fully and partial and non-coherent transmission” and “Scheme 2 (fully coherent only transmission) ” are provided in Table 7.

For example, for “Scheme 1, fully coherent only transmission” and Rank 2, the candidates for W ₂ are eight (8) (see Table 4) and the candidates for

(i.e., the candidates for the index l) are two (2) . So, the required TPMI indication overhead for W ₂ and

is log ₂ (8) +log ₂ (2) =3 + 1 = 4 bits.

For another example, for “Scheme 1, fully and partial and non-coherent transmission” and Rank 1, the candidates for W ₁ are eight (28) (see Table 6.3.1.5-2 or 6.3.1.5-3) and the candidates for

(i.e., the candidates for the index l) are four (4) . So, the required TPMI indication overhead for W ₁ and

is

As a whole, if the rank of the scheduled PUSCH can be obtained from other field (that is, not TPMI field) of the scheduling DCI, the TPMI field, used for indicating the 4Tx precoding matrix (i.e., W ₁, W ₂, W ₃, and W ₄) and the co-phasing coefficient (i.e.,

) , shall have 6 (=4+2) bits (i.e., the maximum overhead among rank 1, rank 2, rank 3 and rank 4 for fully coherent only transmission for both Scheme 1 and Scheme 2) or 7 (=5+2) bits (i.e., the maximum overhead among rank 1, rank 2, rank 3 and rank 4 for fully and partial and non-coherent transmission for Scheme 1) .

On the other hand, if the rank, the 4Tx precoding matrix (i.e., W ₁, W ₂, W ₃, and W ₄) and the co-phasing coefficient (i.e.,

) are jointed coded in the TPMI field (i.e., each TPMI field codepoint indicates a different combination of the rank, the 4Tx precoding matrix and the co-phasing coefficient) , the total number of candidate 8Tx precoding matrices for maxRank = 4 (i.e., for rank≤4) for “Scheme 1, fully coherent only transmission” is 16×4+8×2+4×2+2×2=92. It implies that the TPMI overhead will be

bits. If the rank is also jointly indicated in the TMPI field along with the 4Tx precoding matrix and the co-phasing coefficient, the TMPI field can be alternatively referred to as ‘index of transmit precoding matrix and rank’ field. Table 8 illustrates joint precoding matrix, co-phasing coefficient and transmit rank indicated for “Scheme 1, fully coherent only transmission” with maxRank=4. Note that, in Table 8, ‘1 layer’ , ‘2 layers’ , ‘3 layers’ and ‘4 layers’ correspond to rank 1, rank 2, rank 3 and rank 4 respectively; TMPI indicates a matrix in Table 2 or 3 or 4 or 5 or 6 without coefficient; and each l (l = 0, 1, 2 or 3) corresponds a different

For example, index ‘0’ of the ‘index of transmit precoding matrix and rank’ field indicates rank 1 (i.e., 1 layer) , 4Tx precoding matrix

or

(the matrix without coefficient in Table 2 or Table 3 indicated by TPMI = 0) , and the co-phasing coefficient 1 (calculated according to

when l=0) .

Similarly, if the rank, the 4Tx precoding matrix (i.e., W ₁, W ₂, W ₃, and W ₄) and the co-phasing coefficient (i.e.,

) are jointly coded (i.e., each TPMI field codepoint indicates a different combination of the rank, the 4Tx precoding matrix and the co-phasing coefficient) , the total number of candidate 8Tx precoding matrices for maxRank = 4 (i.e., for rank≤4) for “Scheme 2 (fully coherent only transmission) ” is 16×4+16×2+16×2+16×2=160. It implies that the TPMI overhead will be

bits. Similarly, if the rank is also jointly indicated in the TMPI field along with the 4Tx precoding matrix and the co-phasing coefficient, the TMPI field can be alternatively referred to as ‘index of transmit precoding matrix and rank’ field. Table 9 illustrates joint precoding matrix, co-phasing coefficient and transmit rank indicated for “Scheme 2 (fully coherent only transmission) ” with maxRank=4. Note that, in Table 9, ‘1 layer’ , ‘2 layers’ , ‘3 layers’ and ‘4 layers’ correspond to rank 1, rank 2, rank 3 and rank 4 respectively; TMPI indicates a matrix in the 3 ^rd, 4 ^th, 5 ^th, or 6 ^th column in Table 1; and each l (l = 0, 1, 2 or 3) corresponds a different

A second embodiment relates to rank 5 precoder (W _8Tx, 5) , rank 6 precoder (W _8Tx, 6) , rank 7 precoder (W _8Tx, 7) , and rank 8 precoder (W _8Tx, 8) for fully coherent UE (i.e., 8Tx UE) , and the corresponding indication by TPMI field.

It is assumed that two codewords shall be transmitted for more than 4 layers PUSCH transmission (i.e., rank 5, rank 6, rank 7 and rank 8) . Each codeword is transmitted by 4 layers or less. Codeword-specific TPMI indication is adopted in the second embodiment. It means that the TPMI field of the scheduling DCI indicates two 4Tx precoding matrices, where each 4Tx precoding matrix is a rank 2 or rank 3 or rank 4 4Tx precoding matrix, and a co-phasing coefficient (i.e.,

) (which corresponds to a co-phasing coefficient index (i.e., l)) .

In particular, for rank 5, a rank 2 4Tx precoding matrix W _5, 1= {b _0, 0, b _0, 1} and a rank 3 4Tx precoding matrix W _5, 2= {b _1, 0, b _1, 1, b _1, 2} and a co-phasing coefficient are indicated. For rank 6, two rank 3 4Tx precoding matrices W _6, 1= {b _0, 0, b _0, 1, b _0, 2} and W _6, 2= {b _1, 0, b _1, 1, b _1, 2} and a co-phasing coefficient are indicated. For rank 7, a rank 3 4Tx precoding matrix W _7, 1= {b _0, 0, b _0, 1, b _0, 2} and a rank 4 4Tx precoding matrix W _7, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} and a co-phasing coefficient are indicated. For rank 8, two rank 4 4Tx precoding matrices W _8, 1= {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and W _8, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} and a co-phasing coefficient are indicated.

Since only rank 2, rank 3 and rank 4 4Tx precoding matrices are used to compose rank 5, rank 6, rank 7 and rank 8 8Tx precoding matrices, for both Scheme 1 and Scheme 2,

It means that there are 2 candidates for

for each of rank 5, rank 6, rank 7 and rank 8.

In Scheme 1, for fully coherent only transmission, the rank 2 4Tx precoding matrix W _5, 1= {b _0, 0, b _0, 1} corresponds to a matrix (one of 8 candidates) provided in Table 4; each of the rank 3 4Tx precoding matrix W _5, 2= {b _1, 0, b _1, 1, b _1, 2} , W _6, 1= {b _0, 0, b _0, 1, b _0, 2} , W _6, 2= {b _1, 0, b _1, 1, b _1, 2} and W _7, 1= {b _0, 0, b _0, 1, b _0, 2} corresponds to a matrix (one of 4 candidates) provided in Table 5; and each of the rank 4 4Tx precoding matrix W _7, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} , W _8, 1= {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and W _8, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} corresponds to a matrix (one of 2 candidates) provided in Table 6.

In Scheme 1, for fully and partial and non-coherent transmission, the rank 2 4Tx precoding matrix W _5, 1= {b _0, 0, b _0, 1} corresponds to a matrix (one of 22 candidates) provided in Table 6.3.1.5-5 without coefficient; each of the rank 3 4Tx precoding matrix W _5, 2= {b _1, 0, b _1, 1, b _1, 2} , W _6, 1= {b _0, 0, b _0, 1, b _0, 2} , W _6, 2= {b _1, 0, b _1, 1, b _1, 2} and W _7, 1= {b _0, 0, b _0, 1, b _0, 2} corresponds to a matrix (one of 7 candidates) provided in Table 6.3.1.5-6 without coefficient; and each of the rank 4 4Tx precoding matrix W _7, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} , W _8, 1= {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and W _8, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} corresponds to a matrix (one of 5 candidates) provided in Table 6.3.1.5-7 without coefficient.

In Scheme 2 (for fully coherent only transmission) , the rank 2 4Tx precoding matrix W _5, 1= {b _0, 0, b _0, 1} corresponds to a matrix (one of 16 candidates) provided by the 4 ^th column in Table 1; each of the rank 3 4Tx precoding matrix W _5, 2= {b _1, 0, b _1, 1, b _1, 2} , W _6, 1= {b _0, 0, b _0, 1, b _0, 2} , W _6, 2= {b _1, 0, b _1, 1, b _1, 2} and W _7, 1= {b _0, 0, b _0, 1, b _0, 2} corresponds to a matrix (one of 16 candidates) provided by the 5 ^th column in Table 1; and each of the rank 4 4Tx precoding matrix W _7, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} , W _8, 1= {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and W _8, 2= {b _1, 0, b _1, 1, b _1, 2, b _1, 3} corresponds to a matrix (one of 16 candidates) provided by the 6 ^th column in Table 1.

Table 10 illustrates TPMI field overhead for rank 1 to rank 8. In particular, the TPMI field overheads for rank 1, rank 2, rank 3 and rank 4 are substantially the same contents as Table 7. It is assumed that the DCI schedules a PUSCH transmission with rank 1, rank 2, rank 3 and rank 4 with a same TPMI field interpretation (i.e., for rank 1/2/3/4) . So, the TPMI field shall have a bit length that is the longest among rank 1, rank 2, rank 3 and rank 4. It means that, for “Scheme 1, fully coherent only transmission” , the bit length for rank 1/2/3/4 shall be 6

(which the same as “Rank 1” ) ; and for “Scheme 1, Fully and Partial and Non-coherent transmission” , the bit length for rank 1/2/3/4 shall be 7

(which the same as “Rank 1” ) ; and for “Scheme 2 (fully coherent only transmission) ” , the bit length for rank 1/2/3/4 shall be 6

(which the same as “Rank 1” ) .

The TPMI field overheads for rank 5, rank 6, rank 7 and rank 8 are calculated according to the overheads for two 4Tx precoding matrices and the co-phasing coefficient. It is assumed that the DCI schedules a PUSCH transmission with rank 5, rank 6, rank 7 and rank 8 with a same TPMI field interpretation (i.e., for rank 5/6/7/8) . So, the TPMI field shall have a bit length that is the longest among rank 5, rank 6, rank 7 and rank 8. It means that, for “Scheme 1, fully coherent only transmission” , the bit length for rank 5/6/7/8 shall be 6 bits = W _ri, 1 (3 bits) +

(which the same as “Rank 5” ) ; for “Scheme 1, Fully and Partial and Non-coherent transmission” , the bit length for rank 5/6/7/8 shall be 9

(which the same as “Rank 5” ) ; and for “Scheme 2 (fully coherent only transmission) ” , the bit length for rank 5/6/7/8 shall be 9

(which the same as “Rank 5” or “Rank 6” or “Rank 7” or “Rank 8” ) .

A third embodiment relates to another proposal of rank 5 precoder (W _8Tx, 5) , rank 6 precoder (W _8Tx, 6) , rank 7 precoder (W _8Tx, 7) , and rank 8 precoder (W _8Tx, 8) for fully coherent UE (i.e., 8Tx UE) , and the corresponding indication by TPMI field.

In the second embodiment, each of the rank 5 precoder (W _8Tx, 5) , the rank 6 precoder (W _8Tx, 6) , the rank 7 precoder (W _8Tx, 7) , and the rank 8 precoder (W _8Tx, 8) is composed according to two 4Tx precoding matrices as well as the co-phasing coefficient. In the third embodiment, each of the rank 5 precoder (W _8Tx, 5) , the rank 6 precoder (W _8Tx, 6) , the rank 7 precoder (W _8Tx, 7) , and the rank 8 precoder (W _8Tx, 8) is composed according to only one 4Tx precoding matrix as well as the co-phasing coefficient as follows.

Since only rank 3 4Tx precoding matrix {b ₀, b ₁, b ₂} and rank 4 4Tx precoding matrix {b ₀, b ₁, b ₂, b ₃} are used to compose rank 5, rank 6, rank 7 and rank 8 8Tx precoding matrices, for both Scheme 1 and Scheme 2,

It means that there are 2 candidates for

for each of rank 5, rank 6, rank 7 and rank 8.

For rank 5, a rank 3 4Tx precoding matrix W ₅= {b ₀, b ₁, b ₂} and a co-phasing coefficient are indicated. For rank 6, a rank 3 4Tx precoding matrix W ₆= {b ₀, b ₁, b ₂} and a co-phasing coefficient are indicated. For rank 7, a rank 4 4Tx precoding matrix W ₇= {b ₀, b ₁, b ₂, b ₃} and a co-phasing coefficient are indicated. For rank 8, a rank 4 4Tx precoding matrix W ₈= {b ₀, b ₁, b ₂, b ₃} and a co-phasing coefficient are indicated.

In Scheme 1, for fully coherent only transmission, each of the rank 3 4Tx precoding matrix W ₅= {b ₀, b ₁, b ₂} and W ₆= {b ₀, b ₁, b ₂} corresponds to a matrix (one of 4 candidates) provided in Table 5; and each of the rank 4 4Tx precoding matrix W ₇= {b ₀, b ₁, b ₂, b ₃} and W ₈= {b ₀, b ₁, b ₂, b ₃} a matrix (one of 2 candidates) provided in Table 6.

In Scheme 1, for fully and partial and non-coherent transmission, each of the rank 3 4Tx precoding matrix W ₅= {b ₀, b ₁, b ₂} and W ₆= {b ₀, b ₁, b ₂} corresponds to a matrix (one of 7 candidates) provided in Table 6.3.1.5-6 without coefficient; and each of the rank 4 4Tx precoding matrix W ₇= {b ₀, b ₁, b ₂, b ₃} and W ₈= {b ₀, b ₁, b ₂, b ₃} corresponds to a matrix (one of 5 candidates) provided in Table 6.3.1.5-7 without coefficient.

In Scheme 2 (for fully coherent only transmission) , each of the rank 3 4Tx precoding matrix W ₅= {b ₀, b ₁, b ₂} and W ₆= {b ₀, b ₁, b ₂} corresponds to a matrix (one of 16 candidates) provided by the 5 ^th column in Table 1; and each of the rank 4 4Tx precoding matrix W ₇={b ₀, b ₁, b ₂, b ₃} and W ₈= {b ₀, b ₁, b ₂, b ₃} corresponds to a matrix (one of 16 candidates) provided by the 6 ^th column in Table 1.

Table 11 illustrates TPMI field overhead for rank 5 to rank 8 in the third embodiment. The TPMI field overheads for rank 5, rank 6, rank 7 and rank 8 are calculated according to the overheads for indicating the one 4Tx precoding matrix and the co-phasing coefficient. It is assumed that the DCI schedules a PUSCH transmission with rank 5, rank 6, rank 7 and rank 8 with a same TPMI field interpretation (i.e., for rank 5/6/7/8) . So, the TPMI field shall have a bit length that is the longest among rank 5, rank 6, rank 7 and rank 8. It means that, for “Scheme 1, fully coherent only transmission” , the bit length for rank 5/6/7/8 shall be 3 bits =W (2 bits) + φ (1 bit) (which the same as “Rank 5” or “Rank 6” ) ; and for “Scheme 1, Fully and Partial and Non-coherent transmission” , the bit length for rank 5/6/7/8 shall be 4

(which the same as “Rank 5” or “Rank 6” or “Rank 7” or “Rank 8” ) ; and for “Scheme 2 (fully coherent only transmission) ” , the bit length for rank 5/6/7/8 shall be 5

Figure 2 is a schematic flow chart diagram illustrating an embodiment of a method 200 according to the present application. In some embodiments, the method 200 is performed by an apparatus, such as a remote unit (e.g., UE) . In certain embodiments, the method 200 may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like.

The method 200 is a method performed at a UE, comprising: 202 receiving a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and 204 determining a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In some embodiment, the method further comprises reporting a maxRank = 8.

In some embodiment, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding matrix:

or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

Figure 3 is a schematic flow chart diagram illustrating an embodiment of a method 300 according to the present application. In some embodiments, the method 300 is performed by an apparatus, such as a base unit. In certain embodiments, the method 300 may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like.

The method 300 may comprise 302 transmitting a DCI scheduling a PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and 304 determining the precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In some embodiment, the method further comprises receiving a maxRank = 8.

In some embodiment, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding matrix:

or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

Referring to Figure 4, the UE (i.e., the remote unit) includes a processor, a memory, and a transceiver. The processor implements a function, a process, and/or a method which are proposed in Figure 2.

The UE comprises a transceiver; and a processor coupled to the transceiver, wherein the processor is configured to receive, via the transceiver, a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determine a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In some embodiment, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding matrix:

or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

The gNB (i.e., the base unit) includes a processor, a memory, and a transceiver. The processor implements a function, a process, and/or a method which are proposed in Figure 3.

The base unit comprises a transceiver; and a processor coupled to the transceiver, wherein the processor is configured to transmit, via the transceiver, a DCI scheduling a PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and determine the precoding matrix for the scheduled PUSCH transmission according to the TPMI field.

In some embodiment, the processor is further configured to receive, via the transceiver, a maxRank = 8.

In some embodiment, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding matrix:

or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

Layers of a radio interface protocol may be implemented by the processors. The memories are connected with the processors to store various pieces of information for driving the processors. The transceivers are connected with the processors to transmit and/or receive a radio signal. Needless to say, the transceiver may be implemented as a transmitter to transmit the radio signal and a receiver to receive the radio signal.

The memories may be positioned inside or outside the processors and connected with the processors by various well-known means.

In the embodiments described above, the components and the features of the embodiments are combined in a predetermined form. Each component or feature should be considered as an option unless otherwise expressly stated. Each component or feature may be implemented not to be associated with other components or features. Further, the embodiment may be configured by associating some components and/or features. The order of the operations described in the embodiments may be changed. Some components or features of any embodiment may be included in another embodiment or replaced with the component and the feature corresponding to another embodiment. It is apparent that the claims that are not expressly cited in the claims are combined to form an embodiment or be included in a new claim.

The embodiments may be implemented by hardware, firmware, software, or combinations thereof. In the case of implementation by hardware, according to hardware implementation, the exemplary embodiment described herein may be implemented by using one or more application-specific integrated circuits (ASICs) , digital signal processors (DSPs) , digital signal processing devices (DSPDs) , programmable logic devices (PLDs) , field programmable gate arrays (FPGAs) , processors, controllers, micro-controllers, microprocessors, and the like.

Embodiments may be practiced in other specific forms. The described embodiments are to be considered in all respects to be only illustrative and not restrictive. The scope of the invention is, therefore, indicated in the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

The tables mentioned in this specification:

Table 1: Household based 4Tx Codebook W

Note: The quantity

denotes the matrix defined by the columns given by the set {s} from the expression

where I is the 4×4 identity matrix and the vector. For example,

refers to a matrix defined by the first column of

refers to a matrix defined by the first and the fourth columns of W ₀;

refers to a matrix defined by the first, the second and the fourth columns of W ₀; and

refers to a matrix defined by the first, the second, the third and the fourth columns of W ₀ (i.e., the same as W ₀) .

Table 2: Precoding matrix W for rank 1 transmission with DFT-s-OFDM waveform

Table 3: Precoding matrix W for rank 1 transmission with CP-OFDM waveform

Table 4: Precoding matrix W for rank 2 transmission with CP-OFDM waveform

Table 5: Precoding matrix W for rank 3 transmission with CP-OFDM waveform

Table 6: Precoding matrix W for rank 4 transmission with CP-OFDM waveform

Table 7: TPMI field overhead

Table 8: Joint precoding matrix, co-phasing coefficient and transmit rank indicated for “Scheme 1, fully coherent only transmission” with maxRank=4

Table 9: Joint precoding matrix, co-phasing coefficient and transmit rank indicated for “Scheme 2 (fully coherent only transmission) ” with maxRank=4

Table 10: TPMI field contents for different schemes

Table 11: TPMI field contents for different schemes

Table 6.3.1.5-2: Precoding matrix W for single-layer transmission using four antenna ports with transform precoding enabled.

Table 6.3.1.5-3: Precoding matrix W for single-layer transmission using four antenna ports with transform precoding disabled.

Table 6.3.1.5-5: Precoding matrix W for two-layer transmission using four antenna ports with transform precoding disabled.

Table 6.3.1.5-6: Precoding matrix W for three-layer transmission using four antenna ports with transform precoding disabled.

Table 6.3.1.5-7: Precoding matrix W for four-layer transmission using four antenna ports with transform precoding disabled.

Claims

A user equipment (UE) , comprising:

a transceiver; and

a processor coupled to the transceiver, wherein the processor is configured to

receive, via the transceiver, a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating at least one or two 4Tx precoding matrices and a co-phasing coefficient; and

determine a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.
The UE of claim 1, wherein,

if the scheduled PUSCH transmission is rank 1 PUSCH transmission, the co-phasing coefficient is indicated as 1, j, -1 or -j, and

if the scheduled PUSCH transmission is rank 2, rank 3, rank 4, rank 5, rank 6, rank 7 and rank 8 PUSCH transmission, the co-phasing coefficient is indicated as 1 or j.
The UE of claim 1, wherein,

if the scheduled PUSCH transmission is rank 1 PUSCH transmission, the one 4Tx precoding matrix is a rank 1 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 2 PUSCH transmission, the one 4Tx precoding matrix is a rank 2 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 3 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 4 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 5 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix, or the two 4Tx precoding matrices are a rank 2 4Tx precoding matrix and a rank 3 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 6 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix, or the two 4Tx precoding matrices are two rank 3 4Tx precoding matrices;

if the scheduled PUSCH transmission is rank 7 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix, or the two 4Tx precoding matrices are a rank 3 4Tx precoding matrix and a rank 4 4Tx precoding matrix; and

if the scheduled PUSCH transmission is rank 8 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix, or the two 4Tx precoding matrices are two rank 4 4Tx precoding matrices.
The UE of claim 1, wherein,

if the maximum number of PUSCH layers of the scheduled PUSCH transmission is less than or equal to 4, the length of the part for indicating the one 4Tx precoding matrix is 4 bits for fully coherent only transmission, and is 5 bits for fully and partial and non-coherent transmission, and

if the maximum number of PUSCH layers of the scheduled PUSCH transmission is larger than 4, the length of the part for indicating the one 4Tx precoding matrix is 2 bits or 4 bits for fully coherent only transmission and is 3 bits for fully and partial and non-coherent transmission, or the length of the part for indicating the two 4Tx precoding matrices is 3+2 bits or 4+4 bits for fully coherent only transmission and is 5+3 bits for fully and partial and non-coherent transmission.
The UE of claim 1, wherein, the processor is further configured to report, via the transceiver, a maxRank = 8.
The UE of claim 1, wherein, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding

matrix:
or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

where,

each of {b ₀} , {b ₀, b ₁} , {b ₀, b ₁, b ₂} and {b ₀, b ₁, b ₂, b ₃} is the one 4Tx precoding matrix,

each pair of {b _0, 0, b _0, 1} and {b _1, 0, b _1, 1, b _1, 2} , {b _0, 0, b _0, 1, b _0, 2} and {b _1, 0, b _1, 1, b _1, 2} , {b _0, 0, b _0, 1, b _0, 2} and {b _1, 0, b _1, 1, b _1, 2, b _1, 3} , and {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and {b _1, 0, b _1, 1, b _1, 2, b _1, 3} is the two 4Tx precoding matrices,

is the co-phasing coefficient, and

M indicates the number of antennas in horizontal, and N indicates the number of antennas in vertical.
The UE of claim 1, wherein, the TPMI field further indicates the rank of the scheduled PUSCH transmission.
A method performed at a user equipment (UE) , comprising:

receiving a DCI scheduling PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and

determining a 8Tx precoding matrix for the scheduled PUSCH transmission according to the TPMI field.
A base unit, comprising:

a transceiver; and

a processor coupled to the transceiver, wherein the processor is configured to

transmit, via the transceiver, a DCI scheduling a PUSCH transmission with 8 antenna ports, wherein the DCI includes a TPMI field indicating one or two 4Tx precoding matrices and a co-phasing coefficient; and

determine the precoding matrix for the scheduled PUSCH transmission according to the TPMI field.
The base unit of claim 9, wherein,

if the scheduled PUSCH transmission is rank 1 PUSCH transmission, the co-phasing coefficient is indicated as 1, j, -1 or -j, and

if the scheduled PUSCH transmission is rank 2, rank 3, rank 4, rank 5, rank 6, rank 7 and rank 8 PUSCH transmission, the co-phasing coefficient is indicated as 1 or j.
The base unit of claim 9, wherein,

if the scheduled PUSCH transmission is rank 1 PUSCH transmission, the one 4Tx precoding matrix is a rank 1 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 2 PUSCH transmission, the one 4Tx precoding matrix is a rank 2 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 3 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 4 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 5 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix, or the two 4Tx precoding matrices are a rank 2 4Tx precoding matrix and a rank 3 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 6 PUSCH transmission, the one 4Tx precoding matrix is a rank 3 4Tx precoding matrix, or the two 4Tx precoding matrices are two rank 3 4Tx precoding matrices;

if the scheduled PUSCH transmission is rank 7 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix, or the two 4Tx precoding matrices are a rank 3 4Tx precoding matrix and a rank 4 4Tx precoding matrix;

if the scheduled PUSCH transmission is rank 8 PUSCH transmission, the one 4Tx precoding matrix is a rank 4 4Tx precoding matrix, or the two 4Tx precoding matrices are two rank 4 4Tx precoding matrices.
The base unit of claim 9, wherein,

if the maximum number of PUSCH layers of the scheduled PUSCH transmission is less than or equal to 4, the length of the part for indicating the one 4Tx precoding matrix is 4 bits for fully coherent only transmission, and is 5 bits for fully and partial and non-coherent transmission,

if the maximum number of PUSCH layers of the scheduled PUSCH transmission is larger than 4, the length of the part for indicating the one 4Tx precoding matrix is 2 bits or 4 bits for fully coherent only transmission and is 3 bits for fully and partial and non-coherent transmission, or the length of the part for indicating the two 4Tx precoding matrices is 3+2 bits or 4+4 bits for fully coherent only transmission and is 5+3 bits for fully and partial and non-coherent transmission.
The base unit of claim 9, wherein, the processor is further configured to receive, via the transceiver, a maxRank = 8.
The base unit of claim 9, wherein, the 8Tx precoding matrix for each rank is:

rank 1 8Tx precoding matrix:

rank 2 8Tx precoding matrix:

rank 3 8Tx precoding matrix:

rank 4 8Tx precoding matrix:

rank 5 8Tx precoding

matrix:
or

rank 6 8Tx precoding matrix:

or

rank 7 8Tx precoding matrix:

or

rank 8 8Tx precoding matrix:

or

where,

each of {b ₀} , {b ₀, b ₁} , {b ₀, b ₁, b ₂} and {b ₀, b ₁, b ₂, b ₃} is the one 4Tx precoding matrix,

each pair of {b _0, 0, b _0, 1} and {b _1, 0, b _1, 1, b _1, 2} , {b _0, 0, b _0, 1, b _0, 2} and {b _1, 0, b _1, 1, b _1, 2} , {b _0, 0, b _0, 1, b _0, 2} and {b _1, 0, b _1, 1, b _1, 2, b _1, 3} , and {b _0, 0, b _0, 1, b _0, 2, b _0, 3} and {b _1, 0, b _1, 1, b _1, 2, b _1, 3} is the two 4Tx precoding matrices,

is the co-phasing coefficient, and

M indicates the number of antennas in horizontal, and N indicates the number of antennas in vertical.
The base unit of claim 9, wherein, the TPMI field further indicates the rank of the scheduled PUSCH transmission.