WO2023184030A1 - System for locating a defect in an underground portion of a medium-voltage electricity grid - Google Patents

Abstract

A system and a method for locating a defect between detection points upstream and downstream of an underground portion of an electricity grid are disclosed. Detection units are respectively arranged at the detection points. The units have sensors for picking up a breakdown traveling wave propagated by one or more cables of the underground portion from the defect to each detection point. A logic circuit acquires each picked-up signal and determines a time of arrival of a wavefront of the traveling wave present in each signal in accordance with a GPS-synchronized time signal. A processing unit computes a distance between one of the detection units and the defect on the basis of the times of arrival, a known length of the underground portion between the sensors, and a known propagation speed of the traveling wave in each cable. The distance is displayed on a display.

Description

SYSTEM FOR LOCALIZING A FAULT IN AN UNDERGROUND PART OF A MEDIUM VOLTAGE ELECTRIC NETWORK

FIELD OF THE INVENTION

The invention relates to a system and a method for locating a fault in an underground part of a medium voltage electrical network, based in particular on a propagation of traveling waves resulting from breakdown of the fault.

CONTEXT

Certain techniques are already known for locating a fault in an underground part of an electrical network. One of the best known and commonly used techniques requires that the underground part be out of service. The technique involves a low-voltage echometry method that is used to determine the overall length of a cable, replacement of very low resistance faults, replacement of cable breaks, and the location of joints along the cable. An echometer is used in combination with a shock wave generator on medium or high voltage cables with a length of 0 to 65 km. The pulse generator sends a pulse to snap the fault in the faulty cable. During breakdown, the fault location becomes short-circuited by the arc. It is at this moment that the reflectometer sends a low voltage pulse (160V maximum) which travels the cable and is reflected negatively at the location of the fault, to then deduce the distance of the fault from the echometer. The technique is, however, not practical for lines with branches. In addition, repetitive breakdowns with this technique are likely to damage the cables and accessories subjected to breakdown tests.

Another technique is to use an acoustic method to locate the location of highly resistive and intermittent faults/gaps in underground cables. A surge generator (SSG) used in mode Repetitive pulse releases high energy pulses. Such a voltage pulse travels along the cable and produces a breakdown at the fault point. This causes a high acoustic signal which is audible locally. The intensity of the acoustic signal varies depending on the energy of the pulse. This noise is detected on the ground surface using a microphone, a receiver and headphones. The shorter the distance between the fault and the microphone, the higher the amplitude of the breakdown noise. At the fault point, the breakdown noise level is highest and can be detected easily. However, this technique is also harmful to cables and accessories and is likely to reduce their lifespan. Also, the propagation of sound is less homogeneous for a cable in a conduit.

There are other techniques when the underground part is in service. For example, one of the known methods calculates an impedance between a voltage and current measurement point and a point where the fault is located. This location technique is, however, less precise and more suited to a transmission line which has a much simpler configuration than an underground network. Another technique is described in patent FR 3016444, which is based on a construction of phase diagrams from amplitude vectors of pulses detected at successive times by sensors then a calculation of distances with the amplitude vectors standardized.

SUMMARY

An object of the present invention is to propose a system and a method for locating a fault in an underground part of a medium voltage electrical network which provide increased precision and robustness of resolution for locating the fault without damaging effects of cables and electrical network equipment in the underground part.

A subsidiary object of the present invention is to provide such a system and method which focuses on an initial wavefront of an original fault breakdown in in-service mode, or initiated by dielectric testing in out of service, without the need for waveform analysis or measurement of wave reflections of any nature to locate the fault.

Another subsidiary object of the present invention is to propose such a system and such a method which can provide a location of the fault and possibly a diagnosis of the fault even if the underground part includes branches.

Another subsidiary object of the present invention is to propose such a system and such a method which can provide a location of the fault whether when the underground part is out of service or in service.

According to one aspect of the present invention, there is proposed a system for locating a fault between detection points upstream and downstream of an underground part of a medium voltage electrical network, the system comprising: detection units respectively arranged at the detection points, each detection unit having: by phase cable of the underground part, a sensor coupling to the phase cable to capture a progressive breakdown wave propagated by the phase cable from the fault towards the point of detection where the detection unit is arranged, the sensor having an output producing a signal quantifying the detected breakdown traveling wave; a GPS receiver having an output for producing a time synchronization signal; a clock connected to the GPS receiver, the clock having an output for producing a time signal synchronized to the time synchronization signal of the GPS receiver; a conditioning stage connected to each sensor of the detection unit, for conditioning the signal produced by the sensor into a signal compatible for digital processing; a logic circuit connected to the clock and to the conditioning stage, the logic circuit being configured to acquire each compatible signal produced by the conditioning stage and determine an arrival time of a front of the traveling wave of breakdown present in each compatible signal according to the synchronized time signal received from the clock; and a modem for transmitting the arrival time determined by the logic circuit; a processing unit in communication with the modem of each detection unit, the processing unit being configured to calculate a distance between one of the detection units and the fault as a function of the arrival times of the progressive breakdown wave fronts transmitted by the detection units, a known length of the underground part between the sensors of the detection units, and a known propagation speed of the progressive breakdown wave in each phase cable; and a display in communication with the processing unit for displaying the distance calculated by the processing unit.

According to another aspect of the present invention, a method is proposed for locating a fault between detection points upstream and downstream of an underground part of a medium voltage electrical network, the method comprising the following steps:

(i) per phase cable of the underground part, couple sensors to the respective detection points of each phase cable;

(ii) capture, with the sensors, progressive breakdown waves propagated by each phase cable of the underground part from the fault towards the respective detection points of the underground part and produce signals quantifying the captured progressive breakdown waves;

(iii) conditioning, by a conditioning stage, each signal produced in step (ii) in the form of a signal compatible for digital processing;

(iv) acquire, by a logic circuit, each compatible signal produced in step (iii) and determine an arrival time of a front of the traveling wave of breakdown present in each compatible signal according to a clock signal synchronized to a time synchronization signal provided by GPS;

(v) transmit, by modem, the arrival time of the front of the progressive breakdown wave associated with each detection point determined in step (iv);

(vi) receive, by a processing unit with modem located at a distance from the sensors, the arrival times transmitted in step (v) and calculate, by the processing unit, a distance between one of the sensors and the fault depending on the arrival times of the fronts of the progressive breakdown waves, a known length of the underground part between the sensors, and a known propagation speed of the progressive breakdown waves in each phase cable; And

(vii) display, on a display in communication with the processing unit, the distance calculated in step (vi).

BRIEF DESCRIPTION OF THE DRAWINGS

A detailed description of the preferred embodiments of the invention will be given below with reference to the following drawings:

Figure 1 is a schematic diagram illustrating a fault location system according to one embodiment of the invention.

Figure 2 is a schematic diagram illustrating a propagation of traveling waves produced by a breakdown in a phase cable between two detection points upstream and downstream of an underground part of an electrical network.

Figure 3 is a schematic diagram illustrating a conditioning stage of a detection unit according to one embodiment of the invention.

Figure 4 is a schematic diagram illustrating a conditioning stage of a detection unit according to another embodiment of the invention. Figure 5 is a schematic diagram illustrating an anti-discharge circuit of a battery supplying a detection unit according to one embodiment of the invention.

Figure 6 is a schematic diagram illustrating a system for locating a fault between detection points upstream and downstream of an underground part of an electrical network with a branch, according to one embodiment of the invention.

Figure 7 is a schematic diagram illustrating a sensor according to one embodiment of the invention.

Figure 8 is a schematic diagram illustrating a graphical user interface of a display according to one embodiment of the invention.

Figure 9 is a schematic diagram illustrating an FPGA according to one embodiment of the invention.

Figures 10A and 10B are schematic diagrams illustrating power supply circuits of a detection unit according to embodiments of the invention.

DETAILED DESCRIPTION OF FAVORITE ACHIEVEMENTS

With reference to Figure 1, a system for locating a fault between two detection points upstream and downstream of an underground part 2 of an electrical network according to one embodiment of the invention is illustrated.

With reference to Figure 2, the location system according to the invention uses progressive waves 4, 6 (and transients) which are generated during a breakdown caused by a fault 8 and which propagate on either side of the fault 8 in a phase cable 10 to detection points 12, 14 upstream and downstream of the phase cable 10. The invention consists in brief of detecting the traveling waves 4, 6, in the form of current or voltage, over a range preferably from 30 Hz to 100 MHz at the detection points 12, 14, and determine very precisely, by sampling of the order of nanoseconds, arrival times " _TA " and "T _s " of waves 4, 6 at points 12, 14 in order to calculate a distance "of of the fault by relation to one of the detection points 12, 14 (point 12 in Figure 2) as a function of a known distance "D" between the detection points 12, 14 and a known propagation speed "L>" of the waves 4, 6 in phase cable 10. The calculation can be done by the following equation: _ ^{D + U} ' ^T A ~ ^T B)

2

The calculation can also be done with a distance ratio, for example di = 43% and d ₂ = 57% or even d _? /d ₂ ~ 0.75.

Referring again to Figure 1, the location system comprises detection units 16 respectively arranged at detection points 12, 14, for example opposite ends of the underground part 2. Each detection unit 16 has, by cable of phase of the underground part 2, a sensor 18 coupling to the phase cable to capture the progressive breakdown wave propagated by the phase cable from the fault towards the detection point 12, 14 where the detection unit 16 is placed Thus, each detection unit 16 has one sensor 18 for a single-phase line, two sensors 18 for a two-phase line, and three sensors 18 for a three-phase line. Each sensor 18 has an output 19 producing a signal quantifying the progressive breakdown wave captured. According to one embodiment, the sensor 18 can be a voltage or current sensor, of the inductive or capacitive type, preferably having a sensing range of 30 Hz to 100 MHz, and being able to produce a voltage signal proportional to the voltage. or the current captured. Each detection unit 16 is provided with a GPS receiver 20 having an output 22 for producing a time synchronization signal. A clock 24 is connected to the GPS receiver 20. The clock has an output 26 for producing a time signal synchronized to the time synchronization signal of the GPS receiver 20. A conditioning stage 28 is connected to each sensor 18 of the detection unit 16 for conditioning the signal produced by the sensor 18 in the form of a signal compatible for digital processing. A logic circuit 30 is connected to the clock 24 and to the conditioning stage 28. The logic circuit 30 is configured to acquire each compatible signal produced by the conditioning stage 28 and determine an arrival time of an edge of the progressive breakdown wave present in each compatible signal according to the synchronized time signal received from the clock 24. A modem 32 is operationally configured to transmit the arrival time determined by the logic circuit 30 on a communication network, preferably a cellular network 34. It should be noted that the term "modem" is used in the context of the present disclosure in a broad sense including other types of data exchange devices. A processing unit 36 is in communication with the modem 32 of each detection unit 16. The processing unit 36 is configured to calculate a distance between one of the detection units 16 and the fault 8 (as illustrated eg in Figure 2 ) depending on the arrival times of the progressive breakdown wave fronts transmitted by the detection units 16, a known length of the underground part 2 between the sensors 18 of the detection units 16, and a speed (eg average) of known propagation of the progressive breakdown wave in each phase cable as described previously. The processing unit 36 can advantageously be included in a server (not illustrated) located at a distance from the underground part 2. The server can be equipped with a topological database describing the electrical network so as to be able to process the times of arrivals received from various location systems installed permanently or temporarily on different underground parts of the electrical network having lengths, number of phase cables, materials and cable gauges known to allow a calculation of distance from a fault. A display 38 is in communication with the processing unit 36 to display the distance calculated by the processing unit 36.

The location method according to the invention can be defined by the following steps: (i) by phase cable of the underground part 2, couple the sensors 18 to the respective detection points 12, 14 of each phase cable;

(ii) capture, with the sensors 18, progressive breakdown waves 4, 6 (illustrated e.g. in Figure 2) propagated by each phase cable of the underground part 2 from the fault 8 (illustrated e.g. in Figure 2) towards the respective detection points 12, 14 of the underground part 2 and produce signals quantifying the progressive breakdown waves 4, 6 captured;

(iii) conditioning each signal produced in step (ii) into a signal compatible for digital processing;

(iv) acquire, by the logic circuit 30, each compatible signal produced in step (iii) and determine an arrival time of a front of the progressive breakdown wave 4, 6 present in each compatible signal according to the clock signal synchronized to the time synchronization signal provided by GPS;

(v) transmit, by modem 32, the arrival time of the front of the progressive breakdown wave 4, 6 associated with each detection point 12, 14 determined in step (iv);

(vi) receive, by a processing unit 36 with modem 46 located at a distance from the sensors 18, the arrival times transmitted in step (v) and calculate, by the processing unit, a distance between one of the sensors 18 and the fault 8 as a function of the arrival times of the fronts of the progressive breakdown waves 4, 6, a known length of the underground part 2 between the sensors 18, and a known propagation speed of the progressive breakdown waves 4, 6 in each phase cable; And

(vii) display, on the display 38 in communication with the processing unit 36, the distance calculated in step (vi).

In the case where the underground part 2 is de-energized, a voltage generator 40 having an output 42 connectable to each phase cable of the underground part 2 can be used to generate a voltage causing a breakdown of the fault in the underground part 2 of the electrical network. The method according to the invention can then be defined by the following additional steps: before step (i), connect the voltage generator 40 to each phase cable of the underground part 2; and between steps (i) and (ii), generate, with the voltage generator 40, a voltage causing a breakdown of the fault 8 in the underground part 2 of the electrical network.

The voltage generator 40 can be operated to gradually increase the voltage until breakdown occurs.

With reference to Figure 6, in the case where the underground part 2 includes branches like the branch 44 in the case illustrated in Figure 6, then as many detection units 16 are arranged at detection points 14, 14 ' downstream of the fault 8 in the branches arising from the branch of the underground part 2, so as to be able to determine which branch of the underground part presents the fault according to the arrival times provided by the detection units 16.

Referring again to Figure 1, in the case where the communication network is a cellular network 34, then the modem 32 of each detection unit 16 is a cellular modem and the processing unit 36 comprises or is provided with a cellular modem 46 for communication with the cellular modem 32 of each detection unit 16. Other communications or telecommunications network configurations may be used if desired. The display 38 can advantageously be a screen 48 (e.g. illustrated in Figure 8) of a mobile device such as a smartphone, a tablet, a laptop or a desktop computer that can be moved as needed, having a modem 50, allowing a user to know the distance from the fault calculated by the processing unit 36 wherever it is.

With reference to Figure 8, an example of screen 48 of a mobile device such as a cell phone or a tablet is illustrated. The mobile device may be provided with an application having a graphical user interface (GUI) 92 displaying the distance from the fault 94 and being able to display various other useful information, for example a plan 96 illustrating a location of the fault in the underground part in relation to a location of a detection unit having captured a progressive breakdown wave. The IGU 92 may include icons 98 for interaction with the application, controls 100 for entering or selecting information concerning the underground part under surveillance or under test, different interface elements such as a progress bar 102 allowing you to follow or select various stages of the application, and a tabbed area 104 making it possible to display different data concerning the location of a fault. The IGU 92 can take other forms, with menus and submenus, windows and subwindows, graphs, controls and subcontrols.

Referring again to Figure 1, the conditioning stage 28 may include a printed circuit board (illustrated in circuit form in Figures 3 and 4) configured to adapt each signal produced by each sensor 18 to an acceptable value for acquisition inputs 52 of signals from the logic circuit 30. The clock 24 and the logic circuit 30 can be implemented in an FPGA ("Field-Programmable Gate Array") 54 operationally connected to the conditioning stage 28.

Each detection unit 16 may have a Bluetooth device or interface 80 connected to the logic circuit 30, to exchange analysis and debugging data from the detection unit 16. Each detection unit 16 may have a power supply by electric accumulator 83 (battery, supercapacitor, capacitor, etc.), or from a conventional low-voltage power source if available.

With reference to Figure 3, according to one embodiment, the conditioning stage 28 can take the form, for at least one sensor 18 of a detection unit 16 (illustrated eg in Figure 1), of a clipper having an input 58 for receiving the signal produced by the sensor 18 and limiting an amplitude of the signal to a predetermined limit value, and outputs 60, 60' connected to inputs 52 of the logic circuit 30 (illustrated in Figure 1), for transmit a pulse signal in response to the signal received at input 58 of the clipper. The clipper can be formed by an attenuator 56 followed by a band-pass filter 57 then by a flip-flop circuit 59. The attenuator 56 is connected to the input 58 to receive the signal produced by the sensor 18, and has a circuit for attenuating or limiting the signal amplitude for the acquisition inputs 52 of the logic circuit 30 (shown in Figure 1), as well as for advancing a phase of the signal in order to reduce a possible delay for the processing of the signal . The circuit of the attenuator 56 can be formed, for example, by a network of resistors R1, R2, R3, R4, R5 and capacitors C1, C2, C3, C4, C5 arranged to divide a voltage and advance the phase of the signal received at input 58. The attenuated signal then passes into the bandpass filter 57 which can be made up of a network of resistors R6, R7, R8, R9 and capacitors C6, C7, C8, C9 which makes it possible to remove any low frequency component (eg 60Hz) present in the signal and also to eliminate RF noise components that can be picked up by the cables (not shown) connecting to the sensor 18. The flip-flop circuit 59 can include a parallel arrangement of two active circuits 62, 62' for processing the filtered signal and detecting respectively, in a first case (U1A and D1), the positive wave fronts and, in a second case (U1 B and D2), the wave fronts negative. Two parallel circuits 63, 63' comprising Schmitt triggers 64, 64' produce the pulse signals transmitted to the logic circuit 30 (illustrated eg in Figure 1). Separate pulses are generated in the case of a positive wave versus a negative wave. The clipper can be designed to accept input voltages from a few volts up to 300 V with short wavefront processing delays, on the order of nanoseconds. In the example illustrated in Figure 3, the network of resistors R1, R2, R3, R4, R5 acts as a voltage divider in order to limit the voltage (eg below 3.3 V) at the input of the following circuit 57. capacitors C1, C2, C3, C4, C5 are used to advance the phase of the wavefront signal in order to reduce the delay in signal processing by acting as a diverting filter, ie the filter output reacts strongly on a front of wave but blocks low frequency signals. Without these capacitors, the wavefront voltage enabling detection would likely be much greater. Since the rise time of this voltage is not zero and varies depending on the phase cable monitored, the delay in processing the wave could be different for each input 52 of logic circuit 30 in the case where several sensors 18 and several conditioning stages 28 are used to monitor several phase cables. Capacitors C1, C2, C3, C4, C5 therefore make it possible to greatly reduce this delay, minimizing errors in measuring the distance from the fault. The bandpass filter 57 filters part of the noise present at the input, thus avoiding false detections. The active circuits 62, 62' around U1A and U1 B act as polarity detectors making it possible to differentiate whether the wavefront is positive or negative. It further allows detection of both signal polarities. The non-inverting amplifier with unity gain (+1) consisting of U1A and D1 processes the positive waves and the inverting amplifier with unity gain (-1) processes the negative waves. The Schmitt triggers 64, 64' preferably already include protection against electrostatic discharges, thus contributing to the robustness of the system and offering better immunity to electromagnetic noise. The Schmitt triggers 64, 64' preferably have a very low input capacitance (eg 5 nominal pF) and a short propagation delay (eg 3 nominal ns) so as to have a low impact on a possible delay in processing of the wave. In order to adjust the detection sensitivity, purely resistive voltage dividers formed of R12, R13 and R15, R16 can be used, making it possible to adjust the sensitivity of the conditioning stage 28 as a function of an observed noise level. for example during tests. Two RC filters formed of R14, C10 and R17, C11 at the output of the Schmitt triggers 64, 64' make it possible to smooth the waveform by filtering high frequency oscillations on signal transitions. The outputs 60, 60' of these filters directly attack two inputs 52 of the logic circuit 30 where the calculation of the wavefront delay is carried out.

With reference to Figure 4, according to another embodiment, the conditioning stage 28 can take the form, for at least one sensor 18 of a detection unit 16 (illustrated eg in Figure 1), of a buffer circuit provided with a unity gain amplifier stage 66 having an input 68 for receiving the signal produced by the sensor 18 and a capacitor C1 between the input 68 and the amplifier stage 66. Since the amplitude of the signal is high at this level, an amplitude (voltage) divider circuit R1, R2 can be connected to the circuit buffer to decrease the amplitude for example to 1 V peak to peak if such amplitude corresponds to the maximum voltage that can be applied to the input of an analog-to-digital converter (ADC) 78 of the logic circuit 30 (illustrated in Figure 1) configured to receive and convert the signal produced by the conditioning stage 28 into a digital value indicative of the progressive breakdown wave front captured by the sensor 18. If the logic circuit 30 is powered by a positive supply voltage only, the signal could then be between 0 and 1 V. This can be achieved by an absolute value circuit 70 connected to the amplitude divider circuit to produce a proportional signal limited in voltage and with absolute value in response to the signal received in input 68 of the buffer circuit. The absolute value circuit 70 may include a summing amplifier 72 which adds a DC level to the signal. The CC level can be obtained using a voltage reference and a resistive divider 74 adjusted for example to have precisely 0.5 V. A follower amplifier 76 with unity gain can transmit this CC level to a reference input of the analog-to-digital converter 78. At the output of the absolute value circuit 70, a signal level in the absence of modulation can be set to 0.5 V and it can vary from 0 to 1 V when the wavefront signal is present at input 68. Such a conditioning stage 28 makes it possible to interface a sensor 18 having an analog voltage output of up to approximately 10 V amplitude. Preferably, the bandwidth of the conditioning stage 28 is at least 1 MHz.

With reference to Figure 9, the internal contents of an FPGA 54 suitable for the location system according to the invention and its interconnections with the other electronic parts of the system are illustrated. According to one embodiment, the FPGA 54 comprises an embedded processor 82 (or several processors if desired), a RAM 106 operationally coupled to the processor 82, a flash memory 108 operationally coupled to the processor 82, and chipsets 116 configured to data exchanges between the FPGA 54, the processor 82, the RAM 106, the Flash memory 108, the clock 24 and the modem 32, the flash memory 108 being configured to store instructions which, when executed by the FPGA 54 and processor 82, cause the processor 82 to acquire each signal adapted by the conditioning stage 28, and the processor 82 to process each signal acquired by the FPGA 54 and filter the data exchanged according to the chipsets 116 to determine the arrival time of the edge of the progressive breakdown wave according to each signal acquired by the FPGA 54.

Thanks to programmable electronics tools, the internal modules can be simulated, synthesized, then implemented by targeting a family of FPGAs used. This technology makes it possible to configure and use tens of thousands of logic cells which will be interconnected together by a matrix allowing tens of thousands of connections. In addition, specialized resources can be used, such as high-performance computing units. This makes it possible to integrate a large amount of digital electronics that can be clocked at high speed into a small physical footprint, i.e. the FPGA 54 chip.

According to one embodiment, the processor 82 is preferably an ARM processor already integrated inside the chosen FPGA 54, which makes it possible to shorten the synthesis and implementation times of the FPGA tools compared to the use of a synthesized processor. At startup 112, the FPGA 54 can use a binary file located in the Flash memory 108 to configure itself and provide the DDR memory 106 with the computer code ("firmware") which will subsequently be used by the processor 82. In order to communicate with the outside, the processor 82 has access to a network interface 114 e.g. Ethernet type to communicate with the data visualization system (e.g. the processing unit 36 and the display 38 illustrated in Figure 1). A Bluetooth 80 interface may also be available for connection to local debugging and visualization software.

A processor bus interface module 110 can manage a connection of multiple different peripheral interfaces 116 to the high-speed processor bus 82. These peripheral interfaces 116 allow bridging between the processor bus 82 and the different standards and data formats which are used by the synthesized peripherals.

The startup manager 112 can manage the startup and a reset of the entire electronic system if desired.

A clock manager 124 makes it possible to derive the high speed clock 24 (illustrated e.g. in Figure 1) from the system for its use, by a GPS synchronization manager 118, as a short-term relative temporal reference.

A GPS communication block 120 allows serial communication with the GPS communication card 20 which uses the GPS signal coming from an external multi-network antenna 122. The GPS communication block 120 allows, through the processor 82, to configure the GPS system and obtain information about the status of the GPS system. In addition, it makes it possible to provide an absolute time reference signal to the GPS timing manager 118. The GPS timing manager 118 makes it possible to synchronize the high-speed internal clock 24 to the GPS timing signal, which provides an absolute reference of the order of the second. The fast and temporally precise clock signal produced by the GPS synchronization manager 118 can be used as a reference by the breakdown detection blocks 126, 128, 130. The current state of GPS synchronization can be transmitted to the processor 82 for for monitoring and diagnostic purposes.

Each breakdown detection block 126, 128, 130 detects edges of the breakdown signal coming from the conditioning stage 28 of the sensor 18 (illustrated eg in Figure 1) corresponding to a phase. Upon detection of an edge, the current absolute time and edge type can be instantly stored in a queue memory ("FIFO"). Subsequently, this data can be transferred to processor 82 for processing. A waveform acquisition module 132 can acquire different analog waveforms from the sensors 18 and digitize them as data that can be transmitted to the processor 82.

A system monitoring module 134 makes it possible to acquire temperatures and operating voltages of different components 136 of the detection unit 16 (illustrated e.g. in Figure 1). This data can be transmitted to the processor 82 to evaluate the proper functioning and remaining autonomy of the system.

With reference to Figure 5, the power supply of the detection unit 16 (illustrated eg in Figure 1) can include a discharge protection circuit 84 in order to avoid excessive discharge of the accumulator 83 (illustrated eg in Figure 1) may damage it. The discharge protection circuit may be integrated into a printed circuit board (not shown) on which the FPGA 54 is mounted. The discharge protection circuit is configured to detect a state of charge of the accumulator 83 and turn off the detection unit 16 when a voltage of the accumulator 83 drops below a predetermined voltage value and turn off the unit detection 16 under voltage when the voltage of the accumulator 83 rises to at least the predetermined voltage value. The discharge protection circuit 84 may use a comparator 86 with, for example, an integrated 400 mV reference. A feedback circuit 88 which may be composed of a diode 90 and a resistor R3 is configured to add hysteresis to a detection range of the charge of the accumulator 83. This hysteresis prevents oscillations when the accumulator 83 discharges and sees its discharge current reduced. Indeed, an accumulator such as a rechargeable battery can have a relaxation effect leading to an increase in its voltage in the absence of current. This effect is observable more specifically when a rechargeable battery used as accumulator 83 is fully charged or heavily discharged. The thresholds of the comparator 86 can be adjusted for powering off the detection unit 16 when the accumulator 83 reaches 11.8 V. The minimum threshold for powering up the card can be of 12.5 V, which is lower than the nominal voltage of a 12.8 V battery (for a Li-lon battery of the LiFePo4 type) used as an accumulator 83.

With reference to Figure 10A, the power supply of the logic circuit 30, the modem 32 and other circuits such as the conditioning stages 28 and the active sensors 18 of a detection unit 16 (illustrated in Figure 1) by accumulator 83 can be produced by means of a first switching circuit of the step-down converter type 138, based for example on a model LM2677 converter from Texas Instruments, having an input 140 connected to the accumulator 83. The first switching circuit can be configured to convert the voltage of the accumulator 83 into a voltage of 5 Vdc at output 146 as often required for electronic chip circuits, with a maximum output current of 4 A. A linear regulator 148 connected to output 146 of the first circuit switching 138 can be used to provide, for example, at output 142 a voltage of 3.3 V intended for the clipper of the conditioning stage 28.

With reference to Figure 10B, for powering the sensors 18 (illustrated e.g. in Figure 1), a second circuit with DC/DC converters 152, 154 connected to the accumulator 83 can be used. The DC/DC converters 152, 154 act as converters to raise the voltage from 5 V to approximately ±15 V. These voltages are then regulated by linear regulators 156, 158 in order to provide voltages around ±12 V at outputs 160, 162 as may be required for active sensors 18.

With reference to Figure 7, an example of sensor 18 according to one embodiment of the invention is illustrated. The sensor 18 can take the form of a clamp 162 which is installed around a phase cable on a part of the cable where a concentric neutral braid has been removed and direct contact with the semicon (conductive screen covering a core metallic conductor of the cable) is possible, or over a neutral strand which ends in a metal collar, or over a retractable modular or non-modular end, or even an angled plug (not shown). A signal produced by the sensor 18 can be transmitted by a coaxial cable 166 equipped for example with a BNC connector ("Bayonet Neill-Concelman") 168 for a simple and quick connection.

Referring again to Figure 1, in short, the invention allows, through the detection of traveling waves, to use a single breakdown to locate a fault, with greater precision than currently known techniques. The system according to the invention can be mobile if desired, using detection units 16 temporarily installed at detection points 12, 14 which are determined by prior knowledge of the configuration of the underground part 2 in play. The system according to the invention is compatible with an electrical network with decentralized production and with arteries susceptible to reconfiguration. The system according to the invention can be easily docked with various advanced distribution applications. The fault location accuracy can be around 20 m.

Although embodiments of the invention have been illustrated in the accompanying drawings and described above, it will be apparent to those skilled in the art that modifications can be made to these embodiments without departing from the invention.

Claims

CLAIMS: 1. System for locating a fault between detection points upstream and downstream of an underground part of a medium voltage electrical network, the system comprising: detection units respectively arranged at the detection points, each unit of detection having: by phase cable of the underground part, a sensor coupling to the phase cable to capture a progressive breakdown wave propagated by the phase cable from the fault towards the detection point where the detection unit is placed, the sensor having an output producing a signal quantifying the sensed breakdown traveling wave; a GPS receiver having an output for producing a time synchronization signal; a clock connected to the GPS receiver, the clock having an output for producing a time signal synchronized to the time synchronization signal of the GPS receiver; a conditioning stage connected to each sensor of the detection unit, for conditioning the signal produced by the sensor into a signal compatible for digital processing; a logic circuit connected to the clock and to the conditioning stage, the logic circuit being configured to acquire each compatible signal produced by the conditioning stage and determine an arrival time of a front of the traveling wave of breakdown present in each compatible signal according to the synchronized time signal received from the clock; and a modem for transmitting the arrival time determined by the logic circuit; a processing unit in communication with the modem of each detection unit, the processing unit being configured to calculate a distance between one of the detection units and the fault as a function of the arrival times of the progressive breakdown wave fronts transmitted by the units of detection, a known length of the underground part between the sensors of the detection units, and a known propagation speed of the traveling breakdown wave in each phase cable; and a display in communication with the processing unit for displaying the distance calculated by the processing unit. 2. The system according to claim 1, further comprising a voltage generator connectable to each phase cable of the underground part, to generate a voltage causing breakdown of the fault in the underground part of the electrical network. 3. The system according to claim 1, wherein the display comprises a screen of a mobile device. 4. The system according to claim 1, wherein the processing unit is included in a server. 5. The system according to claim 1, in which the underground part comprises at least one branch, as many detection units being arranged at detection points downstream of the fault in branches arising from said at least one branch of the underground part . 6. The system according to claim 1, wherein the modem of each detection unit comprises a cellular modem, and the processing unit comprises a cellular modem for communication with the cellular modem of each detection unit. 7. The system according to claim 1, wherein the clock and the logic circuit of at least one of the detection units are implemented in an FPGA operationally connected to the conditioning stage. 8. The system according to claim 7, in which the FPGA comprises an on-board processor, a RAM operationally coupled to the processor, flash memory operationally coupled to the processor, and chipsets configured for data exchange between the FPGA, the processor, the RAM, the Flash memory, the clock and the modem, the flash memory storing instructions which , when executed by the processor, cause: the FPGA to acquire each signal conditioned by the conditioning stage; and the processor processes each signal acquired by the FPGA and filters the data exchanged according to the chipsets to determine the arrival time of the front of the breakdown traveling wave according to each signal acquired by the FPGA. 9. The system according to claim 1, in which the conditioning stage of at least one of the detection units comprises, for at least one of the sensors of said at least one of the detection units: an attenuator having an input for receiving the signal produced by said at least one of the sensors, and a circuit for limiting the signal in amplitude and for advancing a phase of the signal; a bandpass filter connected to the attenuator, the bandpass filter having a circuit removing low frequency components in the signal and eliminating noise components in the signal; and a flip-flop circuit connected to the band-pass filter, to produce the compatible signal transmitted to the logic circuit as a pulse signal. 10. The system according to claim 9, wherein: the attenuator circuit comprises a first network of resistors and capacitors; the bandpass filter circuit includes a second network of resistors and capacitors; and the flip-flop circuit comprises a parallel arrangement of active circuits respectively detecting positive and negative waves in the signal coming from the band-pass filter, and of Schmitt triggers producing the pulse signal transmitted to the logic circuit. 11. The system according to claim 1, in which: the conditioning stage of at least one of the detection units comprises, for at least one of the sensors of said at least one of the detection units, a buffer circuit having an input to receive the signal produced by said at least one of the sensors, an amplitude divider circuit connected to the buffer circuit to produce a signal limited in amplitude proportional to the signal received by the buffer circuit, and an absolute value circuit connected to the divider circuit d amplitude to produce an absolute value signal in response to the signal received at the input of the buffer circuit; and the logic circuit comprises at least one analog-digital converter for receiving and converting the signal produced by the conditioning stage into digital form. 12. The system according to claim 1, wherein each detection unit further has a Bluetooth device connected to the logic circuit, to exchange analysis and debugging data from the detection unit. 13. The system according to claim 1, in which the logic circuit of each detection unit has a processing speed of the fronts of the progressive breakdown wave by sampling of the order of nanoseconds. 14. The system according to claim 1, in which each sensor has a sensing range of 30 Hz to 100 MHz. 15. The system according to claim 1, in which each detection unit further has a power supply per accumulator, the power supply comprising a discharge protection circuit for detecting a state of charge of the accumulator and putting the detection unit off when an accumulator voltage drops below a predetermined voltage value and turn the detection unit on when the accumulator voltage rises to at least the predetermined voltage value. 16. The system according to claim 15, wherein the discharge protection circuit comprises a feedback loop having the effect of adding hysteresis to a detection range of the accumulator charge. 17. The system according to claim 1, wherein each detection unit has an accumulator power supply, the power supply comprising: a first step-down converter type switching circuit having an input connected to the accumulator and an output connected to inputs power supply of the logic circuit and the modem; linear regulators having inputs connected to the accumulator and outputs connected to power inputs of the conditioning stage and analog circuits of the logic circuit; and for each sensor, a second "flyback" type switching circuit with isolation having an input connected to the accumulator and an output connected to a linear regulator connected in turn to the sensor. 18. Method for locating a fault between detection points upstream and downstream of an underground part of a medium voltage electrical network, the method comprising the following steps: (i) per phase cable of the underground part, couple sensors to the respective detection points of each phase cable; (ii) capture, with the sensors, progressive breakdown waves propagated by each phase cable of the underground part from the fault towards the respective detection points of the underground part and produce signals quantifying the captured progressive breakdown waves; (iii) conditioning, by a conditioning stage, each signal produced in step (ii) in the form of a signal compatible for digital processing; (iv) acquire, by a logic circuit, each compatible signal produced in step (iii) and determine an arrival time of a front of the progressive breakdown wave present in each compatible signal according to a clock signal synchronized to a time synchronization signal provided by GPS; (v) transmit, by modem, the arrival time of the front of the progressive breakdown wave associated with each detection point determined in step (iv); (vi) receive, by a processing unit with modem located at a distance from the sensors, the arrival times transmitted in step (v) and calculate, by the processing unit, a distance between one of the sensors and the fault depending on the arrival times of the fronts of the progressive breakdown waves, a known length of the underground part between the sensors, and a known propagation speed of the progressive breakdown waves in each phase cable; And (vii) display, on a display in communication with the processing unit, the distance calculated in step (vi). 19. The method according to claim 18, further comprising the steps of: before step (i), connecting a voltage generator to each phase cable of the underground part; and between steps (i) and (ii), generate, with the voltage generator, a voltage causing breakdown of the fault in the underground part of the electrical network.