WO2023167810A1

WO2023167810A1 - Silicon-containing layers with reduced hydrogen content and processes of making them

Info

Publication number: WO2023167810A1
Application number: PCT/US2023/013865
Authority: WO
Inventors: Cheng-Hang Hsu; Sophia S. CHANG; Lai ZHAO; Hsiao-Ling Yang
Original assignee: Applied Materials Inc
Current assignee: Applied Materials Inc
Priority date: 2022-03-04
Filing date: 2023-02-24
Publication date: 2023-09-07
Anticipated expiration: 2024-09-04
Also published as: CN119234291A; TW202400831A; KR20240160176A; TWI856541B

Abstract

Exemplary methods of making silicon-containing layer with low hydrogen content are described. The methods include flowing deposition gases into a substrate processing region of a processing chamber, where the deposition gases include a silicon-containing gas and a hydrogen gas. A deposition plasma is generated from the deposition gases in the substrate processing region. The methods further include depositing a silicon-containing layer on a substrate from the deposition plasma, where the silicon-containing layer is characterized by a hydrogen content of less than or about 6 mol.% hydrogen. The methods also include forming an amorphous silicon layer on the silicon-containing layer, where the amorphous silicon layer includes less than or about 1 wt.% microcrystalline silicon.

Description

SILICON-CONTAINING LAYERS WITH REDUCED HYDROGEN CONTENT AND PROCESSES OF MAKING THEM

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of and priority to U.S. Provisional Application No.

5 63/316,479, filed on March 4, 2022, and titled “SILICON-CONTAINING LAYERS WITH REDUCED HYDROGEN CONTENT AND PROCESSES OF MAKING THEM,” the content of which is herein incorporated by reference in its entirety for all purposes.

TECHNICAL FIELD

[0002] The present technology relates to deposition processes, structures, and systems. More

10 specifically, the present technology relates to methods of producing silicon-containing layers with reduced hydrogen content.

BACKGROUND

[0003] Integrated circuits are made possible by processes which produce intricately patterned material layers on substrate surfaces. Producing patterned material on a substrate requires

15 controlled methods for forming and removing material. Material characteristics may affect how the device operates and may also affect how the films are removed relative to one another. Plasma-enhanced deposition may produce films having certain characteristics. Many films that are formed require additional processing to adjust or enhance the material characteristics of the film to provide suitable properties.

20 [0004] Thus, there is a need for improved systems and methods that can be used to produce high quality devices and structures. These and other needs are addressed by the present technology.

SUMMARY

[0005] Embodiments of the present technology include processing methods for making silicon- containing layer with low hydrogen content. The methods include flowing deposition gases into a

25 substrate processing region of a processing chamber, where the deposition gases include a silicon- containing gas and a hydrogen gas. A deposition plasma is generated from the deposition gases in the substrate processing region. The methods further include depositing a silicon-containing layer on a substrate form the deposition plasma, where the silicon-containing layer is characterized by a hydrogen content of less than or about 6 at.% hydrogen. The methods also include forming an

30 amorphous silicon layer on the silicon-containing layer, where the amorphous silicon layer includes less than or about 1 vol.% microcrystalline silicon. [0006] In additional embodiments, the silicon-containing layer includes greater than or about 20 vol.% microcrystalline silicon. In further embodiments, the silicon-containing gas includes silane or disilane. In still further embodiments, the deposition gases are characterized by a hydrogen gas to silicon-containing gas flow rate ratio of greater than or about 50: 1. In yet additional

5 embodiments, the depositing of the silicon-containing layer on the substrate is characterized by a deposition rate of greater than or about 150 Å/min. In yet further embodiments, the depositing of the silicon-containing layer on the substrate is characterized by a deposition temperature of less than or about 380°C. In more embodiments, a thickness ratio for the silicon-containing layer to the amorphous silicon layer is greater than or about 1 : 1. In still more embodiments, the method

10 further includes reducing a hydrogen content in the silicon-containing layer, before the forming of the amorphous silicon layer, by greater than or about 10%, where the reducing of the hydrogen content is characterized by a removal temperature of less than or about 380°C.

[0007] Embodiments of the present technology include additional process methods. These methods include depositing a silicon-containing layer on a substrate, where the as-deposited

15 silicon-containing layer is characterized by an as-deposited hydrogen content of less than or about 6 at.%. The methods also include forming an amorphous silicon layer on the as-deposited silicon- containing layer, where the amorphous silicon layer has less than or about 1 vol.% microcrystalline silicon. The methods further include reducing hydrogen content in the as- deposited silicon-containing layer to form a reduced-hydrogen silicon-containing layer. The

20 reduced-hydrogen silicon-containing layer is characterized by a reduced hydrogen content of less than or about 5 at.%.

[0008] In additional embodiments, the depositing of the as-deposited silicon-containing layer on the substrate is characterized by a deposition rate of greater than or about 150 Å/min. In further embodiments, the depositing of the silicon-containing layer on the substrate includes forming a

25 deposition plasma from a deposition gas mixture that includes a silicon-containing gas and hydrogen gas, where the hydrogen gas to silicon-containing gas flow rate ratio is greater than or about 50: 1. The deposition plasma deposits the silicon-containing layer on the substrate, where the deposition is characterized by a deposition temperature of less than or about 380°C. In still further embodiments, the reducing of the hydrogen content in the as-deposited silicon-containing

30 layer is characterized by a hydrogen content reduction temperature of less than or about 380°C. In yet additional embodiments, the forming of the amorphous silicon layer includes forming an amorphous silicon deposition plasma from an amorphous silicon deposition gas mixture that is free of hydrogen gas. The amorphous silicon layer is deposited from the amorphous silicon deposition plasma. In more embodiments, the reduced-hydrogen silicon-containing layer includes greater than or about 20 vol.% microcrystalline silicon.

[0009] Embodiments of the present technology still further include silicon-containing structures. The structures include a substrate and a silicon-containing layer positioned on the substrate, where

5 the silicon-containing layer includes less than or about 6 at.% hydrogen. The structures further include an amorphous silicon layer positioned on the silicon-containing layer, where the amorphous silicon layer is characterized by less than or about 1 vol.% microcrystalline silicon.

[0010] In additional embodiments, the silicon-containing layer includes greater than or about 20 vol.% microcrystalline silicon. In further embodiments, a thickness ratio for the silicon-containing

10 layer to the amorphous silicon layer is greater than or about 1 : 1. In still further embodiments, the amorphous silicon layer is characterized by a thickness of less than or about 200 Å. In yet additional embodiments, the amorphous silicon layer includes less than or about 6 at.% hydrogen. In more embodiments, the substrate includes silicon-containing glass.

[0011] Such technology may provide numerous benefits over conventional processing methods

15 to make a silicon-containing layer with low hydrogen content. Counterintuitively, the high hydrogen gas to silicon-containing gas flow rate ratio in the deposition gas combined with the high deposition rate forms an as-deposited silicon-containing layer with less than or about 6 at.% hydrogen. In contrast, processing methods that use lower flow rate ratios and deposition rates deposit a silicon-containing layer with greater than or about 8 at.% hydrogen. In addition, the

20 processing methods according to the present technology may be performed at deposition temperatures of less than 400°C. The low hydrogen content in the as-deposited silicon-containing layers also permits any subsequent dehydrogenation operation to be performed at a lower dehydrogenation temperatures in short periods of time. The resulting silicon-containing layer is formed with low hydrogen content without exceeding the reduced thermal budgets that

25 increasingly characterize fabrication processes for electronic devices such as displays. These and other embodiments, along with many of their advantages and features, are described in more detail in conjunction with the below description and attached figures.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] A further understanding of the nature and advantages of the disclosed technology may be

30 realized by reference to the remaining portions of the specification and the drawings.

[0013] FIG. 1A shows a top plan view of an exemplary processing system according to embodiments of the present technology. [0014] FIG. IB shows a schematic cross-sectional view of an exemplary plasma system according to embodiments of the present technology.

[0015] FIG. 2 shows operations of an exemplary method of processing according to embodiments of the present technology.

5 [0016] FIGS. 3A-B shows the development of an exemplary structure according to embodiments of the present technology.

[0017] Several of the figures are included as schematics. It is to be understood that the figures are for illustrative purposes, and are not to be considered of scale unless specifically stated to be of scale. Additionally, as schematics, the figures are provided to aid comprehension and may not

10 include all aspects or information compared to realistic representations, and may include exaggerated material for illustrative purposes.

[0018] In the appended figures, similar components and/or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a letter that distinguishes among the similar components. If only the first

15 reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the letter.

DETAILED DESCRIPTION

[0019] Silicon-based transistors are found in the control electronics of most electronic displays.

The silicon-based transistors act as switches and channelers of electric current that turn on and off

20 the pixels in an electronic display, among other functions. As these displays increase in complexity and include new heat-sensitive materials, the thermal budgets for making the silicon- based transistors, and other silicon-containing components, continue to be lowered.

[0020] Conventional methods of fabricating silicon-containing layers for silicon-based electrical components include depositing the layer with plasma-enhanced chemical vapor deposition and

25 performing a dehydrogenation operation on the as-deposited material. The dehydrogenation operation is necessary to reduce the hydrogen content in the layer to a point where few voids are formed from the formation of hydrogen gas in post-deposition operations. For example, the low hydrogen content reduces the number of voids and defects formed by hydrogen gas during a laser annealing of a transistor channel in the silicon-containing layer.

30 [0021] Unfortunately, the dehydrogenation temperatures used in conventional dehydrogenation operations are increasingly exceeding the thermal budgets for fabricating electronic devices, including electronic displays. Conventional dehydrogenation temperatures typically reach or exceed 500°C. A significant reduction in the dehydrogenation temperature results in longer times for the silicon-containing layer to reach a specific hydrogen content. Thus, reducing the dehydrogenation temperature to stay within the thermal budget significantly increases process times and reduces process efficiency.

5 [0022] The present technology addresses this problem by forming an as-deposited silicon- containing layer with a significantly lower hydrogen content than a layer formed by conventional methods. In embodiments, the present processing methods can form an as-deposited silicon- containing layer with less than or about 6 at.% hydrogen compared to conventional PECVD deposition methods that form a layer with greater than or about 8 mol.%. In further embodiments,

10 the reduction in the at.% hydrogen may be characterized as greater than or about 30%, greater than or about 40%, greater than or about 50%, or more. The reduced hydrogen content in the as- deposited silicon-containing layer permits a fixed-time dehydrogenation operation to reduce the hydrogen content to a specified amount at a lower dehydrogenation temperature. In embodiments, the temperature may be reduced to less than or about 500°C compared to conventional methods

15 that conduct a dehydrogenation operation at greater than 500°C. The present methods permit a dehydrogenation operation to stay within a decreased thermal budget without increases the time to reduce the hydrogen content to a specified level.

[0023] The present technology can also reduce processing times and increase processing efficiencies by depositing the silicon-containing layer at faster deposition rates than conventional

20 processing methods. In embodiments, the present technology uses faster deposition rates and higher hydrogen gas to silicon-containing gas flow rate ratios to form an as-deposited silicon- containing layer with a lower hydrogen content. The faster deposition rates permit the formation of the silicon-containing layers in shorter deposition times.

[0024] Embodiments of the present technology include methods of forming a silicon-containing

25 layer with reduced hydrogen content on a substrate. In additional embodiments, an amorphous silicon layer may be formed on the silicon-containing layer to slow or prevent hydrogen from infiltrating the silicon-containing layer. Embodiments further include the structures made by the methods. The description below starts with an embodiment of a system of the present technology upon which the present methods may be conducted. Although specific deposition and treatment

30 processes utilizing the present technology are described, it will be readily understood that the systems and methods are equally applicable to other deposition and treatment systems, as well as processes as may occur in the described systems. Accordingly, the present technology should not be limited to the specific processes, structures, and systems described here. A system embodiment is first described, including a chamber used in the system to perform deposition and treatment processes according to embodiments of the present technology.

[0025] FIG. 1A shows a top plan view of an embodiment of a processing system 100 according to embodiments of the present technology. In embodiments, the processing system 100 may

5 include deposition, treatment, etching, baking, and curing chambers, among other types of chambers. As shown in FIG. 1A, a pair of front opening unified pods 102 supply substrates of a variety of sizes that are received by robotic arms 104 and placed into a low pressure holding area 106 before being placed into one of the substrate processing chambers 108a-f, positioned in tandem sections 109a-c. A second robotic arm 111 may be used to transport the substrate wafers

10 from the holding area 106 to the substrate processing chambers 108a-f and back. Each substrate processing chamber 108a-f, can be outfitted to perform one or more substrate processing operations, including the deposition and treatment of barrier layer materials as described herein. In embodiments, the substrate processing chambers 108a-f may be configured to perform plasma- enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, etch, pre¬

15 clean, degas, orientation, and other substrate processes including, annealing, ashing, etc.

[0026] The substrate processing chambers 108a-f may include one or more system components for depositing, treating, annealing, curing and/or etching barrier layer materials on the substrate. In one configuration, two pairs of the processing chambers, e.g., 108c-d and 108e-f, may be used to deposit and treat barrier layer materials on the substrate, and the third pair of processing

20 chambers, e.g., 108a-b, may be used to etch the deposited and treated barrier layer materials. In another configuration, all three pairs of chambers, e.g., 108a-f, may be configured to deposit a multi-layer stack of layers of barrier material on the substrate. Any one or more of the processes described may be carried out in chambers separated from the fabrication system shown in different embodiments. It will be appreciated that additional configurations of deposition, treating, etching,

25 annealing, and curing chambers for barrier layer materials are contemplated by system 100.

[0027] FIG. IB shows a schematic cross-sectional view of an exemplary plasma system according to embodiments of the present technology. In the embodiment shown in FIG. IB, the system includes a plasma enhanced chemical vapor deposition (PECVD) chamber (processing chamber) 110 in which a silicon-containing layer and an amorphous silicon layer may be formed

30 on a substrate.

[0028] In embodiments, the chamber 110 includes walls 142, a bottom 114, and a. lid 112, which help create a process volume 128. In additional embodiments, a gas distribution plate 115 and substrate support assembly 130 also help create the process volume 128. In further embodiments, the process volume 128 may be accessed through a gate 126 formed through the wall 142 such that a substrate 102 may be transferred in to and out of the chamber 100. [0029] In more embodiments, the substrate support assembly 130 may include a substrate receiving surface 132 to support a substrate 102. In still more embodiments, a stem 134 may 5 couple the substrate support assembly 130 to a lift system 136 operable to raise and lower the substrate support assembly 130 between a substrate transfer position and processing positions. In embodiments, a shadow frame 133 may be placed over periphery of the substrate 102 during processing to prevent deposition on the edge of the substrate 102. In additional embodiments, lift pins 138 may be moveably disposed through the substrate support assembly 130 and are operable 10 to raise the substrate 102 from the substrate receiving surface 132. In further embodiments, the substrate support assembly 130 may include heating and/or cooling elements 139 operable to maintain the substrate support assembly 130 at a specified temperature. In more embodiments, the substrate support assembly 130 may include grounding straps 131 to provide an RF return path around the periphery of the substrate support assembly 130. 15 [0030] In further embodiments, the gas distribution plate 115 may be coupled at its periphery to a lid 112 or wall 142 of the chamber 115 by a suspension 117. In still further embodiments, the gas distribution plate 115 may be coupled to the lid 112 by one or more center supports 116 to help prevent sag and/or control the straightness/curvature of the gas distribution plate 115. In embodiments, the gas distribution plate 115 may have different configurations with different 20 dimensions. In more embodiments, the gas distribution plate 115 may have a quadrilateral plan shape. In still more embodiments, the gas distribution plate 115 has a downstream surface 150 having a plurality of apertures 113 formed therein facing an upper surface 118 of the substrate 102 disposed on the substrate support assembly 130. The apertures 113 may have different shape, numbers, densities, dimensions, and distributions across the gas distribution plate 115. In still 25 further embodiments, the diameter of the apertures 113 may be greater than or about 0.01 inch, greater than or about 0.1 inch, greater than or about 1 inch, or more. [0031] In still more embodiments, a gas source 120 may be coupled to the lid 112 to provide gases through the lid 112, and then through the apertures 113 formed in the gas distribution plate 115 to the process volume 128. In further embodiments, a vacuum pump 119 may be coupled to 30 the chamber 110 to maintain the gas in the process volume 128 at a specific pressure. [0032] In embodiments, an RF power source 122 may be coupled to the lid 112, to the gas distribution plate 115, or both, to provide a RF power that creates an electric field between the gas distribution plate 115 and the substrate support assembly 130 so that a plasma may be generated from the gases present between the gas distribution plate 115 and the substrate support assembly 130. In additional embodiments, the RF power may be applied at various RF frequencies. For example, RF power may be applied at a frequency between about 0.3 MHz and about 200 MHz. In another embodiment the RF power is provided at a frequency of 13.56 MHz. 5 [0033] In additional embodiments, the edges of the downstream surface 150 of the gas distribution plate 115 may be curved so that a spacing gradient is defined between the edge and corners of the gas distribution plate 115 and substrate receiving surface 232 and, consequently, between the gas distribution plate 115 and the upper surface 118 of the substrate 102. In embodiments, the shape of the downstream surface 150 may be selected to meet specific process 10 requirements. For example, the shape of the downstream surface 150 may be convex, planar, concave or other suitable shape. In still further embodiments, the edge to corner spacing gradient may be utilized to tune the film property uniformity across the edge of the substrate to correct property non-uniformity in the corner of the substrate. In yet additional embodiments, the edge to center spacing may be controlled so that the film property distribution uniformity may be 15 controlled between the edge and center of the substrate. In embodiments, a concave curved edge of the gas distribution plate 115 may be used so the center portion of the edge of the gas distribution plate 115 is spaced farther from the upper surface 118 of the substrate 102 than the corners of the gas distribution plate 115. In additional embodiments, a convex curved edge of the gas distribution plate 115 may be used so that the corners of the gas distribution plate 115 are 20 spaced farther than the edges of the gas distribution plate 115 from the upper surface 118 of the substrate 102. [0034] In further embodiments, a remote plasma source 124, such as an inductively coupled remote plasma source, may be coupled between the gas source and the gas distribution plate 115. In embodiments, a cleaning gas may be energized in the remote plasma source 124 to remotely 25 provide a cleaning plasma utilized to clean chamber components. The cleaning gas may be further excited by the RF power provided to the gas distribution plate 115 by the power source 222. In more embodiments, the cleaning gases may include one or more fluorine-containing gases such as NF₃, F₂, and SF₆. [0035] FIG.2 shows operations of an exemplary method 200 of processing according to some 30 embodiments of the present technology. The method 200 forms an as-deposited silicon-containing layer with a reduced hydrogen content. The reduced hydrogen content in the layer reduces the temperature and time for a dehydrogenation operation to further reduce the hydrogen content to a specified level. This permits the deposited and dehydrogenated silicon-containing layer to be ) formed at lower temperatures that do not exceed the decreased thermal budgets of complex electronic devices that include heat-sensitive materials.

[0036] Method 200 includes providing deposition gases for the deposition of the silicon- containing layer at operation 205. In embodiments, the deposition gases may include one or more

5 silicon-containing gases and hydrogen (H₂) gas. In still further embodiments, the silicon- containing gases may include at least one of silane (SiH₄) and disilane (Si₂H₆) among other silicon-containing gases. In additional embodiments, the deposition gases may be free of inert gases such as nitrogen (N₂), helium, and argon, among other inert gases. In yet additional embodiments, the deposition gases may be free of oxygen.

10 [0037] In embodiments, the deposition gases may be provided to a substrate processing region of a substrate processing chamber. In further embodiments, the silicon-containing gases may be provided at a flow rate of greater than or about 10 seem, greater than or about 20 seem, greater than or about 30 seem, greater than or about 40 seem, greater than or about 50 seem, greater than or about 60 seem, greater than or about 70 seem, greater than or about 80 seem, greater than or

15 about 90 seem, greater than or about 100 seem, or more. In still further embodiments, the hydrogen gas may be provided at a flow rate of greater than or about 1000 seem, greater than or about 2000 seem, greater than or about 3000 seem, greater than or about 4000 seem, greater than or about 5000 seem, greater than or about 6000 seem, greater than or about 7000 seem, greater than or about 8000 seem, greater than or about 9000 seem, greater than or about 10,000 seem, or

20 more. In yet more embodiments, the relative flow rates of hydrogen gas and the silicon-containing gases may be characterized by a IL-gas-to-Si-gases flow rate ratio of less than or about 400: 1, less than or about 350: 1, less than or about 300: 1, less than or about 250: 1, less than or about 200: 1, less than or about 175: 1, less than or about 150: 1, less than or about 125: 1, less than or about 100: 1, or less.

25 [0038] In further embodiments, the deposition gases may be provided to a substrate processing region of a processing chamber. In embodiments, the deposition gases may pressurize processing chamber to a pressure of greater than or about 5000 mTorr, greater than or about 6000 mTorr, greater than or about 7000 mTorr, greater than or about 8000 mTorr, greater than or about 9000 mTorr, greater than or about 10,000 mTorr, or more.

30 [0039] Method 200 further includes generating a deposition plasma from the deposition gases at operation 210. The deposition plasma may be generated by energizing a pair of capacitively- coupled plates positioned in the substrate processing region of the processing chamber. As shown in FIG. IB, the pair of capacitively-coupled plates may include the lid 112 or gas distribution plate 115 as a first plate, and the substrate support assembly 130 as the second plate. A power source may energize the plates to create an electric field that ionizes the deposition gases flowing between the plates into the deposition plasma.

[0040] In embodiments, the power source may apply electric power to the capacitively-coupled

5 plates at a power level of greater than or about 5000 W, greater than or about 6000 W, greater than or about 7000 W, greater than or about 8000 W, greater than or about 9000 W, greater than or about 10,000 W, or more. In additional embodiments, the power source may apply an RF power to the capacitively-coupled plates at one or more RF frequencies. In yet additional embodiments, the RF frequency may be greater than or about 1 MHz, greater than or about 5 MHz, greater than

10 or about 10 MHz, greater than or about 25 MHz, greater than or about 50 MHz, greater than or about 100 MHz, greater than or about 150 MHz, greater than or about 200 MHz, or more. In still more embodiments, the frequency of the RF power may be 13.56 MHz.

[0041] In further embodiments, the deposition plasma may generate a deposition temperature in the processing chamber that is characterized as less than or about 450°C, less than or about 400°C,

15 less than or about 375°C, less than or about 350°C, less than or about 325°C, less than or about

300°C, less than or about 275°C, less than or about 250°C, or less. In still more embodiments, the deposition plasma generates a deposition temperature in the process chamber that is less than or about the highest temperature permitted by the thermal budget for the deposition process.

[0042] Method 200 also includes depositing a silicon-containing layer on the substate in the

20 processing chamber at operation 215. In embodiments, the silicon-containing layer is deposited from the deposition plasma at a deposition rate of greater than or about 150 Å/min, greater than or about 150 Å/min, greater than or about 160 Å/min, greater than or about 170 Å/min, greater than or about 180 Å/min, greater than or about 190 Å/min, greater than or about 200 Å/min, greater than or about 210 Å/min, greater than or about 220 Å/min, greater than or about 230 Å/min,

25 greater than or about 240 Å/min, greater than or about 250 Å/min, or more. The fast deposition rate combined with the flow rate ratio of hydrogen gas to silicon-containing gas deposits a silicon- containing layer characterized by a reduced hydrogen content. In additional embodiments, the hydrogen content of the as-deposited silicon-containing layer may be less than or about 7 at.%, less than or about 6.5 at.%, less than or about 6 at.%, less than or about 5.75 at.%, less than or

30 about 5.5 at.%, or less.

[0043] In further embodiments, the as-deposited silicon-containing layer may include microcrystalline silicon. In embodiments, the amount of microcrystalline silicon in the silicon layer may be characterized as the crystalline volume fraction (vol.%) representing an intensity ratio of the crystalline phase to the amorphous phase as measured by, for example, Raman spectroscopy. In additional embodiments, the as-deposited silicon-containing layer may include microcrystalline silicon in an amount greater than or about 20 vol.%, greater than or about 25 vol.%, greater than or about 30 vol.%, greater than or about 35 vol.%, greater than or about 40

5 vol.%, greater than or about 45 vol.%, greater than or about 50 vol.%, or more. In still further embodiments, the as-deposited silicon-containing layer may be characterized as a microcrystalline silicon layer. In yet more embodiments, the as-deposited silicon-containing layer may be characterized by a thickness of greater than or about 100 Å, greater than or about 200 Å, greater than or about 300 Å, greater than or about 400 Å, greater than or about 500 Å, greater than or

10 about 600 Å, greater than or about 700 Å, greater than or about 800 Å, greater than or about 900 Å, greater than or about 1000 Å, or more.

[0044] Method 200 may also include forming an amorphous silicon layer on the silicon- containing layer at operation 220. In embodiments, the amorphous silicon layer may function as a cap on the previously formed silicon-containing layer to reduce or prevent the absorption of

15 hydrogen into the silicon-containing layer. In further embodiments, the amorphous silicon layer may be thinner than the silicon-containing layer, and the relative thickness ratio of the silicon- containing layer to the amorphous silicon layer may be greater than or about 2: 1, greater than or about 3: 1, greater than or about 4: 1, greater than or about 5: 1, greater than or about 6: 1, greater than or about 7: 1, greater than or about 8: 1, greater than or about 9: 1, greater than or about 10: 1, or

20 more. In more embodiments, the amorphous silicon layer may be characterized with a thickness of less than or about 200 Å, less than or about 175 Å, less than or about 150 Å, less than or about 125 Å, less than or about 100 Å, less than or about 75 Å, less than or about 50 Å, or less.

[0045] In embodiments, the amorphous silicon layer may be formed by a plasma-enhanced chemical vapor deposition of the amorphous silicon on the silicon-containing layer. In further

25 embodiments, the deposition operation may include providing the amorphous silicon deposition gases to the substrate processing region of the processing chamber and generating an amorphous silicon deposition plasma. In further embodiments, the amorphous silicon deposition gases may include a silicon-containing gas and a carrier gas. In further embodiments, the silicon-containing gas may include one or more of silane and disilane. In still further embodiments, the carrier gas

30 may include helium or argon. In additional embodiments, the amorphous silicon deposition gases may be free of hydrogen (H₂) gas.

[0046] In additional embodiments, the amorphous silicon layer may be deposited at a lower deposition rate than the silicon-containing layer. In further embodiments, the amorphous silicon layer may be deposited at a deposition rate of less than or about 100 Å/min, less than or about 90 Å/min, less than or about 80 Å/min, less than or about 70 Å/min, less than or about 60 Å/min, less than or about 50 Å/min, or less. In still more embodiments, the amorphous silicon layer may include amorphous silicon with an amount of microcrystalline silicon that is less than or about 5

5 wt.%, less than or about 4 wt.%, less than or about 3 wt.%, less than or about 2 wt.%, less than or about 1 wt.%, or less. In yet more embodiments, the amorphous silicon layer may have a hydrogen content that is less than or about 5 mol.%, less than or about 4 mol.%, less than or about 3 mol.%, less than or about 2 mol.%, less than or about 1 mol.%, or less. As noted above, in embodiments, the amorphous silicon layer may be formed on the dehydrogenated silicon-

10 containing layer following the dehydrogenation operation.

[0047] In some embodiments, method 200 may further include reducing the hydrogen content in the as-deposited silicon-containing layer at operation 225. The optional dehydrogenation operation further reduces the hydrogen content of the silicon-containing layer to a specified level. In other embodiments, the as-deposited silicon-containing layer may already have a hydrogen

15 content that is at or below a specified hydrogen content, and no dehydrogenation operation is performed. In embodiments, the dehydrogenation operation reduces the hydrogen content of the silicon-containing layer to less than or about 6 at.%, less than or about 5.5 at.%, less than or about 5 at.%, less than or about 4.5 at.%, less than or about 4 at.%, less than or about 3.5 at.%, less than or about 3 at.%, less than or about 2.5 at.%, or less. In yet more embodiments, the

20 dehydrogenation operation reduces the hydrogen content of the as-deposited silicon-containing layer by greater than or about 10%, greater than or about 15%, greater than or about 20%, greater than or about 25%, greater than or about 30%, greater than or about 35%, greater than or about 40%, greater than or about 45%, greater than or about 50%, or more

[0048] In embodiments, the dehydrogenation operation may include quenching the deposition

25 plasma and removing the deposition gases from the substrate processing region of the processing chamber before heating the as-deposited silicon-containing layer. In further embodiments, the dehydrogenation temperature of the silicon-containing layer may be characterized as less than or about 450°C, less than or about 400°C, less than or about 380°C, less than or about 350°C, less than or about 325°C, less than or about 300°C, less than or about 275°C, less than or about 250°C,

30 or less. In yet further embodiments, dehydrogenation temperature is less than or about the highest temperature permitted by the thermal budget for the deposition process. In more embodiments, the dehydrogenation temperature is the same as the deposition temperature at which the silicon- containing layer was formed. In more embodiments, the dehydrogenation operation my last for less than or about 60 minutes, less than or about 45 minutes, less than or about 30 minutes, less than or about 15 minutes, less than or about 10 minutes, less than or about 5 minutes, less than or about 2 minutes, less than or about 1 minute, or less. The dehydrogenation operation may be of the same or shorter duration as a conventional dehydrogenation operation that is performed at a higher dehydrogenation temperature (e.g., greater than or about 500°C). This is made possible by

5 the lower starting content of the hydrogen in the as-deposited silicon-containing layer formed by the present processing methods.

[0049] FIGS. 3A-B show a progression in the fabrication of a structure 300 formed according to embodiments of the present technology. As shown in FIG. 3A, an embodiment of the structure 300 includes a substrate 302 upon which a silicon-containing layer 304 is formed. In

10 embodiments, the substrate 302 may include a silicon-containing glass, such as a glass used in an electronic display. In additional embodiments, the substrate 302 may include other silicon- containing materials such as amorphous silicon, polycrystalline silicon, or crystalline silicon, among other silicon-containing materials. In further embodiments, the substrate 302 may include inorganic dielectric materials such as silicon oxide or silicon nitride, among other inorganic

15 dielectric materials. In still further embodiments, the substrate 302 may include organic polymer materials.

[0050] FIG. 3B shows an amorphous silicon layer 306 positioned on the silicon-containing layer 304. In embodiments, both the silicon-containing layer 304 and the amorphous silicon layer may be characterized as silicon layers with different levels of amorphous and microcrystalline silicon.

20 In further embodiments, the silicon-containing layer 304 may be characterized as including greater than or about 20 vo.% microcrystalline silicon. In more embodiments, the amorphous silicon layer may be characterized as having less than or about 5 vol.% microcrystalline silicon. In yet further embodiments, the silicon layers 304 and 306 may be characterized as having less than or about 6 at.% hydrogen, less than or about 5.5 at.% hydrogen, less than or about 5 at.% hydrogen, or less.

25 [0051] Embodiments of the present technology provide silicon-containing layers with reduced hydrogen content formed at reduced deposition and dehydrogenation temperatures. This permits the incorporation of these reduced hydrogen silicon-containing layers into electronic products, such as electronic displays, without exceeding the thermal budgets for the fabrication of the product. Among other benefits, the processing methods of the present technology permit the

30 fabrication of electronic products with more heat sensitive materials, including display glass and organic light emitting materials.

[0052] In the preceding description, for the purposes of explanation, numerous details have been set forth in order to provide an understanding of various embodiments of the present technology. It will be apparent to one skilled in the art, however, that certain embodiments may be practiced without some of these details, or with additional details.

[0053] Having disclosed several embodiments, it will be recognized by those of skill in the art that various modifications, alternative constructions, and equivalents may be used without

5 departing from the spirit of the embodiments. Additionally, a number of well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present technology. Accordingly, the above description should not be taken as limiting the scope of the technology.

[0054] Where a range of values is provided, it is understood that each intervening value, to the

10 smallest fraction of the unit of the lower limit, unless the context clearly dictates otherwise, between the upper and lower limits of that range is also specifically disclosed. Any narrower range between any stated values or unstated intervening values in a stated range and any other stated or intervening value in that stated range is encompassed. The upper and lower limits of those smaller ranges may independently be included or excluded in the range, and each range

15 where either, neither, or both limits are included in the smaller ranges is also encompassed within the technology, subject to any specifically excluded limit in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

[0055] As used herein and in the appended claims, the singular forms “a ", “an”, and “the”

20 include plural references unless the context clearly dictates otherwise. Thus, for example, reference to “a material” includes a plurality of such materials, and reference to “the precursor” includes reference to one or more precursors and equivalents thereof known to those skilled in the art, and so forth.

[0056] Also, the words “comprise(s)”, “comprising”, “contain(s)”, “containing”, “include(s)”,

25 and “including”, when used in this specification and in the following claims, are intended to specify the presence of stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

CLAIMS:

1. A processing method comprising: flowing deposition gases into a substrate processing region of a processing chamber, wherein the deposition gases include a silicon-containing gas and hydrogen gas;

5 generating a deposition plasma from the deposition gases in the substrate processing region; depositing a silicon-containing layer on a substrate from the deposition plasma, wherein the silicon-containing layer is characterized by a hydrogen content of less than or about 6 at.%; and

10 forming an amorphous silicon layer on the silicon-containing layer, wherein the amorphous silicon layer comprises less than or about 1 vol.% microcrystalline silicon.

2. The processing method of claim 1, wherein the silicon-containing layer comprises greater than or about 20 vol.% microcrystalline silicon.

3. The processing method of claim 1, wherein the silicon-containing gas

15 comprises silane or disilane.

4. The processing method of claim 1, wherein the deposition gases are characterized by a hydrogen gas to silicon-containing gas flow rate ratio of greater than or about 50: 1.

5. The processing method of claim 1, wherein the depositing of the silicon-

20 containing layer on the substrate is characterized by a deposition rate of greater than or about 150 Å/min.

6. The processing method of claim 1, wherein the depositing of the silicon- containing layer on the substrate is characterized by a deposition temperature of less than or about

380°C.

25 7. The processing method of claim 1, wherein a thickness ratio for the silicon- containing layer to the amorphous silicon layer is greater than or about 1 : 1.

8. The processing method of claim 1, wherein the method further comprises reducing a hydrogen content in the silicon-containing layer after the forming of the amorphous silicon layer by greater than or about 10%, wherein the reducing of the hydrogen content is

30 characterized by a removal temperature of less than or about 380°C.

9. A processing method comprising: depositing a silicon-containing layer on a substrate, wherein the as-deposited silicon-containing layer is characterized by an as-deposited hydrogen content of less than or about 6 at.%;

5 forming an amorphous silicon layer on the as-deposited silicon-containing layer, wherein the amorphous silicon layer comprises less than or about 1 vol.% microcrystalline silicon; and reducing hydrogen content in the silicon-containing layer to form a reduced- hydrogen silicon-containing layer, wherein the reduced-hydrogen silicon-containing layer is

10 characterized by a reduced hydrogen content of less than or about 5 at.%.

10. The processing method of claim 9, wherein the depositing of the as- deposited silicon-containing layer on the substrate is characterized by a deposition rate of greater than or about 150 Å/min.

15 11. The processing method of claim 9, wherein the depositing of the silicon- containing layer on a substrate comprises: forming a deposition plasma from a depositing gas mixture comprising a silicon- containing gas and hydrogen gas, wherein a hydrogen gas to silicon-containing gas flow rate ratio is greater than or about 50: 1; and

20 depositing the silicon-containing layer on the substrate, wherein the depositing of the silicon-containing layer on the substrate is characterized by a deposition temperature of less than or about 380°C.

12. The processing method of claim 9, wherein the reducing of the hydrogen content in the silicon-containing layer is characterized by a hydrogen content reduction

25 temperature of less than or about 380°C.

13. The processing method of claim 9, wherein the forming of the amorphous silicon layer comprises: forming an amorphous silicon deposition plasma from an amorphous silicon deposition gas mixture that is free of hydrogen gas; and

30 depositing the amorphous silicon layer from the amorphous silicon deposition plasma.

14. The processing method of claim 9, wherein the reduced-hydrogen silicon- containing layer comprises greater than or about 20 vol.% microcrystalline silicon.

15. A silicon-containing structure comprising: a substrate;

5 a silicon-containing layer positioned on the substrate, wherein the silicon- containing layer comprises less than or about 6 at.% hydrogen; and an amorphous silicon layer positioned on the silicon-containing layer, wherein the amorphous silicon layer is characterized by less than or about 1 vol.% microcrystalline silicon.

16. The silicon-containing structure of claim 15, wherein the silicon-containing

10 layer comprises greater than or about 20 vol.% microcrystalline silicon.

17. The silicon-containing structure of claim 15, wherein a thickness ratio for the silicon-containing layer to the amorphous silicon layer is greater than or about 1 : 1.

18. The silicon-containing structure of claim 15, wherein the amorphous silicon layer is characterized by a thickness of less than or about 200 Å.

15 19. The silicon-containing structure of claim 15, wherein the amorphous silicon layer comprises less than or about 6 at.% hydrogen.

20. The silicon-containing structure of claim 15, wherein the substrate comprises silicon-containing glass.