WO2023035074A1 - In-situ ev battery electrochemical impedance spectroscopy with pack-level current perturbation from a 400v-to-12v triple-active bridge - Google Patents

Abstract

A system is provided for inducing a sinusoidal perturbation current in an EV battery for electrochemical impedance spectroscopy (EIS) in situ of an EV. A multi-port switched-mode power-converter such as a dual-active bridge (DAB) converter or a triple-active bridge (TAB) is connected to pack portions of the EV battery pack. A controller operates the power-converter in an EIS mode by modulating switches of the power-converter to induce sinusoidal perturbation currents between the pack portions.

Description

In-Situ EV Battery Electrochemical Impedance Spectroscopy with Pack- Level Current Perturbation from a 400V-to-12V Triple-Active-Bridge

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to and the benefit of U.S. provisional patent application no. 63/260,997, filed on September s, 2021 , the entire contents of which are incorporated by reference in this application, where permitted.

FIELD OF THE DISCLOSURE

[0002] This disclosure relates generally to the field of systems used for electrochemical impedance spectroscopy (EIS) of an EV battery to measure its state of health (SOH) or state of charge (SOC).

BACKGROUND OF THE DISCLOSURE

[0003] In 2020, 3 million electric vehicles (EVs) were sold worldwide [Ref. 1], The improvement of EV battery pack utilisation limits without sacrificing safety and reliability reduces the amount of overdesign and cost of EVs. A recent example of such a utilisation limit is the GM Bolt 90%-state-of-charge operating constraint to limit the risk of battery fire [Ref. 2], Identifying the specific performance of battery systems enables manufacturers to apply variable operating constraints across production units, thereby improving the average performance across all EVs in operation. Determining the EV battery’s state-of-health (SOH) or state-of-charge (SOC) requires an accurate understanding of the thermal/electrical behaviour, which is related to the electrical impedance [Ref. 3], [Ref. 4], A representative lithium battery impedance curve, in the form of a Nyquist plot, is shown in Fig. 1 A [Ref. 5], [Ref. 9], The various features of the EV battery impedance have been utilized in EV battery management systems (BMS) to improve EV battery modeling, degradation estimation and real-time state-of-charge estimation [Ref. 6]-[Ref. 8]. In general, as an EV battery ages, the impedance of the EV battery increases, the capacity of the EV battery deceases, and the SOH of the battery decreases.

Battery-cell impedance (Z) may be measured through electrochemical impedance spectroscopy (EIS), which involves applying a sinusoidal current (/) (i.e. , an alternating current perturbation current) over a range of frequencies ( s) to the battery-cell and measuring the response voltage phasor (V).

[0004] The results of EIS may be analyzed using mathematical models. For example, impedance (Z) may be plotted as a function of frequency ( s), in a Bode plot. Alternatively, the results may be plotted as impedance spectrum made up of a series of points, with each point corresponding to a frequency ( s) of the ac perturbation current, showing the imaginary ("reactive") component of the impedance (Zm) versus the real ("resistive") component of the impedance (Z_re), either as an Argan diagram in a polar coordinate system, or more commonly, a Nyquist plot in a Cartesian coordinate system as shown in Fig. 1 A. Lines and curves can be fitted to the plots, and used to derive quantitative parameters that directly or indirectly indicate the batterycell's SOC or SOH (e.g. electrolyte conductivity, charge transfer resistance, or capacity). Various aspects of this curve provide critical information about the state and health of the EV battery. In particular, the build-up of the Solid-Electrolyte Interface (giving rise to RSEI , XC.SE/ ) at the boundary between the electrode layers and liquid electrolyte contributes to both calendar and cycle aging. Charge Transfer impedance RCT , Xc.cr ) is related to ion intercalation and de-intercalation. The Warburg impedance (Zw) represents the mass-transport processes in the active materials of the electrodes due to changes in the electrochemical potential. The EV battery impedance also contains a real component, Rn, which reflects the parasitic resistance of the conductors and conductor-to-electrode junctions, and an inductive component, XL, which reflects the parasitic inductance arising from the conductor geometry. Performing in-situ EIS to periodically update the battery model inside an EV BMS is one method for maintaining accurate battery state estimation throughout the vehicle life.

[0005] Electric vehicles (EV) are typically equipped with two batteries: first, the aforementioned "EV battery" (also referred to as a traction battery), which is a relatively high-voltage (e.g. 450 V) battery used to power the electric motor that drives the vehicle; and second, an "auxiliary battery" (also referred to as an accessory battery), which is a relatively low voltage (e.g. 12 V) battery used to power other electronic accessories of the EV (e.g., computers, lighting, infotainment systems, etc.). A typical EV power system 10 is shown in Fig. 1 B. The EV battery pack 12 has a plurality of EV battery cells 16 that are grouped into pack portions. The system 10 also includes BMS 20, 12V lead-acid auxiliary battery 22, auxiliary loads 24 on the auxiliary battery 22, traction motor 26 for propulsion of the EV, heating ventilation and air conditioning (HVAC) system 28, de charging port 30, ac charging port 32, dc-to-dc converter 34, dc-to-ac converter 36, and ac-to-dc converter 38. The auxiliary battery 22 is connected to the system 100 via a low-voltage (LV) bus; the HVAC system 110 is connected to the system 100 via a high-voltage (HV) bus.

[0006] A significant challenge in EIS integration is related to the challenge of supplying the necessary bidirectional power, Pperturb, and storing the displaced energy, Estored, during current injection into the high-voltage EV batteries, as shown in Fig. 2A. In the measured NMC pouch-cell impedance of Fig. 2B, the electrochemical effects are manifested at frequencies of s <1 Hz. If a 0.05 Hz perturbation current, I perturb, is applied to a 400-V battery at 20 A_pp, then the peak Pperturb = 4 kW, Estored = 7 Wh, and the 2-parallel (2P) cell-group exhibits 10 mV-amplitude voltage response. In the harsh automotive in-situ environment, higher response amplitudes are necessary for practical measurement. While the EV 12V lead-acid auxiliary battery (typically rated at about 60 Ah) can absorb the Estored, its power rating may be insufficient to support the peak Pperturb, in addition to the on-board auxiliary 12-V loads. Meanwhile, the inductive and capacitive elements in the EV power electronics may support the peak Pperturb for high fes, but they cannot absorb the Estored for low s.

[0007] Existing methods for performing EIS inside an EV include cell-level perturbation using the balancing system in the BMS [Ref. 10]-[Ref. 13], and pack-level perturbation using one of the vehicle-internal high-voltage power conversion units [Ref. 10], [Ref. 14], The cell-level perturbation architectures do not experience the challenge of energy/power displacement, as they perform EIS with power flowing between the cells of the pack. However, the high current required to obtain a voltage response with a high SNR for the few cycles of perturbation at each frequency does not typically match the balancing capability required of the cell-level power electronics. Additional hardware or over-rated power electronics are therefore required, which increases the cost compared to a system that only performs cell balancing. The on-board charging system of [Ref. 14] injects an ac current ripple on top of the de charging current, and requires a grid connection to operate. These features address the energy/power displacement challenge, but can only operate during EV charging, which is disrupted to perform impedance measurements. Cell-level voltage sensing is preferred for large EV batteries, as the intra-pack variations that occur between cells lead to differences in cell electrical and thermal limits throughout the pack. Typical causes of such variation include manufacturing tolerance and asymmetric cooling [Ref. 16],

[0008] Accordingly, there is a need fora low-cost EIS perturbation architecture that supports arbitrarily-low perturbation frequencies, sufficiently high currents, and avoids the need for external power sources, and can be used during operation of the EV.

SUMMARY OF THE INVENTION

[0009] In one aspect, the present invention includes a system for inducing a sinusoidal perturbation current in an EV battery pack for electrochemical impedance spectroscopy (EIS) in situ of an EV. The EV battery pack includes a first pack portion and a second pack portion, wherein each of the pack portions comprise a plurality of cells. The system comprises a multiport switched-mode power-converter, and a controller. The multiport switched-mode power-converter is connected to the first pack portion, and the second pack portion. The controller includes a processor operatively connected to the multiport switched-mode power-converter, and a non-transitory computer-readable medium storing instructions executable by the processor to implement a method. The method includes operating the multiport switched-mode power-converter in an EIS mode by modulating switches of the multiport switched- mode power-converter to induce sinusoidal current perturbations in the pack portions.

[0010] In embodiments of the system, the system further includes a voltage sensor connected to one of the pack portions. The method further includes, using the voltage sensor, measuring a voltage response of the one of the pack portions when, in use, the sinusoidal current perturbations are induced in the one of the pack portions. In embodiments, the voltage sensor is connected to at least one of the cells of one of the pack portions for measuring the voltage response of the at least one of the pack portions at a cell level. In embodiments, the voltage sensor is connected by a multiplexer to a plurality of the cells of one of the pack portions, for measuring the voltage response of each of the plurality of the cells at the cell level. [0011] In embodiments of the system, the multiport switched-mode powerconverter includes a load or source port for connection to a load or a source of the EV. The method includes operating the multiport switched-mode power-converter in a power transfer mode by modulating the switches of the multiport switched-mode power-converter to transfer power between the pack portions and the load or the source via the load or source port. In embodiments, the load is an auxiliary load of the EV.

[0012] In embodiments of the system, the multiport switched-mode powerconverter includes an active-bridge converter that includes a dual-active-bridge (DAB) converter or a triple-active-bridge (TAB) converter. The DAB converter or the TAB converter includes a first full-bridge series connected to the first pack portion, a second full-bridge series connected to the second pack portion, and a transformer coupling the first and second full-bridges. In embodiments, each of the first and second-full bridges is a gallium nitride (GaN) based or a silicon carbide (SiC) based full-bridge.

[0013] In embodiments of the system that include the active-bridge converter, the active-bridge converter is the TAB converter, and the TAB converter further includes a third full-bridge series connected to an auxiliary load of the EV. In such embodiments, the transformer couples the third full-bridge to the first and second full-bridges. Operating the active-bridge converter in the EIS mode includes deactivating the third full-bridge to isolate the auxiliary load from power transfer from the first and second pack portions. The method further includes operating the active-bridge converter in an auxiliary supply mode by modulating the first, second, and third full-bridges to discharge power from the first and second pack portions to the auxiliary load. In embodiments, the third bridge is a silicon (Si) based full-bridge. In embodiments, the third full-bridge is series connected to the auxiliary load by a step-down converter. In embodiments, the step-down converter is configured to receive an input voltage from the third full-bridge of at least 48 volts. In embodiments, the step-down converter in configured to produce an output voltage of less than 13 volts.

[0014] In embodiments of the system comprising the DAB converter or the TAB converter, the controller processor is configured by the set of instructions to implement a phase shift between the sinusoidal perturbation current induced by the first fullbridge, and the sinusoidal perturbation current induced by the second full-bridge. [0015] In embodiments of the system, the first and second pack portions have matched power ratings. In other embodiments of the system, the first and second pack portions have different power ratings.

[0016] In accordance with an embodiment of the invention, a GaN-based triple- active-bridge (TAB) converter can serve as a replacement for existing EV 400 V-to-12 V converters to sinusoidally perturb two halves of an EV battery pack to perform Electrochemical Impedance Spectroscopy (EIS). The system requires no additional energy storage for EIS, and maintains energy balance between the half-packs. The embodiment enables high-power EIS perturbations at up to 20 _Pk,_Pk, providing a high SNR for short in-situ measurements and enabling fast, single-cycle impedance measurements. EIS measurements are demonstrated experimentally for 4 Hz< s <200 Hz and 900-W peak perturbation power. In embodiments, the invention allows for simultaneous in-situ pack-level EIS perturbation and cell-level response measurement. Operation at 4 kW in a 12 V auxiliary supply mode, and an EIS mode with the use of the embedded custom voltage sensor over a wide range of frequencies is demonstrated.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The foregoing and other aspects of the invention will be better appreciated with reference to the attached drawings, as follows.

[0018] Fig. 1A is a chart showing a representative lithium battery impedance curve in the prior art.

[0019] Fig. 1 B is schematic diagram of a typical EV power architecture in the prior art.

[0020] Fig. 1 C shows a custom liquid-cooled 84S2P 88Ah Li-NMC battery pack that is subject to the experiments described herein.

[0021 ] Fig. 2A show waveforms of a sinusoidal perturbation signal during EIS of an EV battery.

[0022] Fig. 2B is shows measured impedance of an individual cell identical to those used in Fig. 1 C. [0023] Fig. 2C is a schematic diagram of an embodiment of a system of the present disclosure, featuring cell-level voltage sensing, EV battery half-packs, and 12-V auxiliary battery bus connections to a multi-port switched power converter.

[0024] Fig. 2D is a schematic diagram of another embodiment of a system of the present disclosure, featuring cell-level voltage sensing, EV battery half-packs, and 12-

V auxiliary battery bus connections to a multi-port switched power converter.

[0025] Fig. 2E is a schematic diagram of another embodiment of a system of the present disclosure, featuring cell-level voltage sensing, EV battery half-packs, and 12-

V auxiliary battery bus connections to the TAB converter.

[0026] Fig. 3A is an equivalent circuit diagram of the system of Fig. 2E, including a TAB converter power-flow when the TAB converter is operated in EIS mode, and 12V auxiliary supply mode.

[0027] Fig. 3B is another equivalent circuit diagram of the system of Fig. 2E, when the TAB converter is operated in EIS mode.

[0028] Fig. 3C shows voltage and current waveforms for components of the TAB converter of Fig. 3B, when the TAB converter is operated in EIS mode.

[0029] Fig. 3D is another equivalent circuit diagram of the system of Fig. 2E, when the TAB converter is operated in 12V auxiliary supply mode.

[0030] Fig. 3E shows voltage and current waveforms for components of the TAB converter of Fig. 3D, when the TAB converter is operated in 12V auxiliary supply mode.

[0031] Fig. 3F is a schematic diagram of a control structure and scheme of the present disclosure for the TAB converter of Fig. 3A, when operating in EIS mode.

[0032] Fig. 3G is a schematic diagram of a control structure and scheme of the present disclosure for the TAB converter of Fig. 3A, when operating in 12V auxiliary supply mode.

[0033] Fig. 3H is another schematic diagram of a control structure of the present disclosure for the TAB converter of Fig. 3A, when operating in EIS mode. [0034] Fig. 31 is another schematic diagram of a control structure of the present disclosure for the TAB converter of Fig. 3B, when operating in 12 V auxiliary supply mode.

[0035] Fig. 4A is a schematic diagram of a voltage-sensor architecture of the present disclosure with a digital-to-analog converter (DAC) for de offset-voltage calibration.

[0036] Fig. 4B shows an exemplary system implementation of the TAB and voltage-sensor circuit of the present disclosure.

[0037] Fig. 4C is another schematic diagram of a voltage-sensor architecture of the present disclosure with a digital-to-analog converter (DAC) for de offset-voltage calibration.

[0038] Fig. 4D shows another exemplary system implementation of the TAB and voltage-sensor circuit of the present disclosure.

[0039] Fig. 5A shows converter waveforms resulting from an experiment using the system of Fig. 4B.

[0040] Fig. 5B shows the half-pack currents during closed-loop EIS operation at 50 Hz resulting from an experiment using the system of Fig. 4B or 4D.

[0041] Fig. 5C shows TAB inductor current, the bottom half-pack current, and the voltage response of one 2P sub-module during closed-loop EIS operation at 50 Hz, resulting from an experiment using the system of Fig. 4B or 4D.

[0042] Fig. 6A shows sampled top half-pack current, lt_op, data from a 976-Hz perturbation and the corresponding FFT magnitude and phase values from the experimental setup of Fig. 4D and MATLAB ™.

[0043] Fig. 6B shows sampled 2P sub-module voltage, v_ac, data from a 976-Hz perturbation and the corresponding FFT magnitude and phase values from the experimental setup of Fig. 4D and MATLAB ™.

[0044] Fig. 7 shows voltage-sensor input, vac, the top half-pack current, itop, and the sampling trigger signal, trig, during EIS measurements with the setup of Fig. 4B at 0.1 , 0.2, and 0.3 Hz. [0045] Fig. 8A shows measured 2P sub-module impedance from 4 Hz to 200 Hz from 15°C to 25°C, using TAB-induced perturbations, resulting from an experiment using the system of Fig. 4B or Fig. 4D.

[0046] Fig. 8B shows an impedance magnitude comparison between the reference and experimental current/voltage measurement setups, resulting from an experiment using the system of Fig. 4B or Fig. 4D.

[0047] Fig. 8C shows analog to digital converter (ADC) samples from the offset voltage calibration sequence, resulting from an experiment using the system of Fig. 4B.

[0048] Fig. 8D shows analog to digital converter (ADC) samples from a perturbation-response measurement, prior to post processing, resulting from an experiment using the system of Fig. 4B.

[0049] Fig. 9 is an equivalent circuit diagram of a full-bridge.

[0050] Fig. 10 is a side elevation of an electric vehicle in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0051] Interpretation

[0052] For simplicity and clarity of illustration, where considered appropriate, reference numerals may be repeated among the Figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiment or embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein may be practiced without these specific details. In other instances, well-known methods, procedures and components have not been described in detail so as not to obscure the embodiments described herein. It should be understood at the outset that, although exemplary embodiments are illustrated in the figures and described below, the principles of the present disclosure may be implemented using any number of techniques, whether currently known or not. The present disclosure should in no way be limited to the exemplary implementations and techniques illustrated in the drawings and described below.

[0053] Various terms used throughout the present description may be read and understood as follows, unless the context indicates otherwise: “or” as used throughout is inclusive, as though written “and/or”; singular articles and pronouns as used throughout include their plural forms, and vice versa; similarly, gendered pronouns include their counterpart pronouns so that pronouns should not be understood as limiting anything described herein to use, implementation, performance, etc. by a single gender; “exemplary” should be understood as “illustrative” or “exemplifying” and not necessarily as “preferred” over other embodiments. Further definitions for terms may be set out herein; these may apply to prior and subsequent instances of those terms, as will be understood from a reading of the present description. It will also be noted that the use of the term “a” or “an” will be understood to denote “at least one” in all instances unless explicitly stated otherwise or unless it would be understood to be obvious that it must mean “one”.

[0054] Modifications, additions, or omissions may be made to the systems, apparatuses, and methods described herein without departing from the scope of the disclosure. For example, the components of the systems and apparatuses may be integrated or separated. Moreover, the operations of the systems and apparatuses disclosed herein may be performed by more, fewer, or other components and the methods described may include more, fewer, or other steps. Additionally, steps may be performed in any suitable order. As used in this document, “each” refers to each member of a set or each member of a subset of a set.

[0055] As used in this document, “attached” in describing the relationship between two connected parts includes the case in which the two connected parts are “directly attached” with the two connected parts being in contact with each other, and the case in which the connected parts are “indirectly attached” and not in contact with each other, but connected by one or more intervening other part(s) between.

[0056] "Memory" refers to a non-transitory tangible computer-readable medium for storing information in a format readable by a processor, and/or instructions readable by a processor to implement an algorithm. The term "memory" includes a plurality of physically discrete, operatively connected devices despite use of the term in the singular. Non-limiting types of memory include solid-state, optical, and magnetic computer readable media. Memory may be non-volatile or volatile. Instructions stored by a memory may be based on a plurality of programming languages known in the art, with non-limiting examples including the C, C++, Python ™, MATLAB ™, and Java ™ programming languages.

[0057] "Processor" refers to one or more electronic devices that is/are capable of reading and executing instructions stored on a memory to perform operations on data, which may be stored on a memory or provided in a data signal. The term "processor" includes a plurality of physically discrete, operatively connected devices despite use of the term in the singular. Non-limiting examples of processors include devices referred to as microprocessors, microcontrollers, microcontroller units (MCU), central processing units (CPU), digital signal processors, and field programmable gate arrays (FPGAs).

[0058] Aspects of the present invention may be described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor, such that the processor, and a memory storing the instructions, which execute via the processor, collectively constitute a machine for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.

[0059] The flowcharts and functional block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

[0060] The embodiments of the inventions described herein are exemplary (e.g., in terms of materials, shapes, dimensions, and constructional details) and do not limit by the claims appended hereto and any amendments made thereto. Persons skilled in the art will appreciate that there are yet more alternative implementations and modifications possible, and that the following examples are only illustrations of one or more implementations. The scope of the invention, therefore, is only to be limited by the claims appended hereto and any amendments made thereto.

[0061 ] System

[0062] Figs. 2C to 2E show embodiments of a system 100 of the present disclosure connected to an EV power system. Some components of the system 100, such as the EV battery half-packs 14, 15, voltage sensors 301 , 302, and multiplexers 303, 304, exist in pairs. In order to distinguish between the individual components of such paired components, they may be described as being a "top", "bottom" or "middle" component, on account of their relative positions in the schematic depiction of Figs. 2C-3G. The identifiers "top", bottom" and "middle", however, do not limit the components to any particular position in actual implementation, and may interchanged with the identifiers such as "first", "second", "third", respectively.

[0063] In general, in the embodiment of Fig. 2C, the system 100 includes an EV battery pack 12, an auxiliary battery 22, a multiport switched-mode power-converter 180, and EIS sensing module 300 (labelled as a voltage sensing system in Fig. 2C), which may form part of a battery management system (BMS).

[0064] The embodiment of Fig. 2D is similar to the embodiment of Fig. 2C, with one difference being that the pack portions 14, 15 of the EV battery are not connected in series or "stacked". Accordingly, in Fig. 2D, the multiport switched-mode powerconverter 180 has one middle port connected to the top pack portion 14 by one middle wire 192, and another middle port connected to the bottom pack portion 15 by a different middle wire 194, whereas in Fig. 2C, the multiport switched-mode powerconverter 180 has only one middle port connected to both pack portions 14, 15 by one middle wire 190.

[0065] The embodiment of Fig. 2E is similar to the embodiment of Fig. 2C, with one difference being that the multiport switched-mode power-converter 180 is particularized as a triple-active bridge (TAB) converter 200. Given this relationship between the embodiments, it will be appreciated that the below description of the relationship of the TAB converter 200 to other parts of the system may apply generally to the switched-mode power-converter 180, and vice versa.

[0066] The EV battery pack 12 (which may also be referred to as a high voltage (HV) battery, or a traction battery) is used to power the traction motor of the EV. An example of the EV is shown in Fig. 10 at 600 and the traction motor is shown at 602. The traction motor 602 is used to drive one or more wheels 604 that support the EV on the ground. As shown symbolically in Fig. 2C by the terminals labelled "To Vehicle", the EV battery pack 12 is connected to a traction motor (not shown) (e.g. via, a dc-to- ac converter (if required)) in a manner analogous to the EV battery pack 12 and traction motor 26 shown in Fig. 1 B. It will also be understood that the EV battery pack 12 is connected to a de charging port (not shown) and/or an ac charging port in a manner analogous to the EV battery pack 12 and de charge port 30 and/or ac charge port 32 shown in Fig. 1 B.

[0067] The EV battery pack 12 is made of a pair of EV battery pack portions 14, 15, each of which are made of EV battery cells 16. In an exemplary embodiment, each of the EV battery pack portions 14,15 have an equal number of cells 16 of the EV battery 12, and therefore have matched power and energy ratings, are referred to herein as "half-packs". In other embodiments, each of the EV battery pack portions 14, 15 may not have matched power and energy ratings. In an exemplary embodiment, the EV battery pack 12 is a lithium-ion battery. In other embodiments, the EV battery pack 12 may be a type of battery, such as a nickel-metal hydride battery, a lithium metal battery, a lithium-sulphur batter, or a lithium-air battery. The present invention is not limited by a particular type or particular voltage of EV battery pack 12. [0068] The auxiliary battery 22 is used to power auxiliary loads 24 of electronic accessories of the EV (e.g., computers, lighting, infotainment systems, power windows, power doors, etc.). In an exemplary embodiment, the auxiliary battery 22 is a 12 V lead-acid battery, which may be one of a variety of battery types (e.g., wet cell, absorbent glass mat), or the auxiliary battery 22 may be a lithium-ion battery, as known in the art. The present invention is not limited by a particular type or particular voltage of the auxiliary battery 22.

[0069] In Fig. 2C, the multi-port switched power-converter 180 has a top (first) pack portion port 182, a bottom (second) pack portion port 184, first load or source port 186 and a second load or source port 188. The top and bottom pack portion ports 182, 184 are connected to the top and bottom pack portions 14, 15, respectively. The load or source ports 186, 188 may be connected to loads or sources of the EV. For example, in the embodiment of Fig. 2E, the multi-port switched power-converter 180 in the form of the TAB converter 200 is connected by such a port to 12V auxiliary loads of the EV. In another example, not shown, the multi-port switched power-converter 180 may be connected to a source such as an onboard charging system of the EV.

[0070] In Fig. 2E, the TAB converter 200 is connected by a circuit to the EV battery pack portions 14, 15, the auxiliary battery 22, and the auxiliary loads 24. Within the circuit, the TAB converter 200 is connected in series as between the EV battery pack portions 14, 15 and the auxiliary battery 22, and auxiliary loads 24, with the TAB converter 200 being intermediate to the EV battery pack portions 14, 15 and the auxiliary battery 22 and auxiliary loads 24. The EV battery pack portions 14, 15 are connected in series with each other, and in parallel in respect to the TAB converter 200. The auxiliary battery 22 and the auxiliary loads 24 are connected in parallel to the TAB converter 200. The TAB converter 200 can be used as a voltage converter for electrical current transmission between the relatively high-voltage EV battery pack portions 14, 15, and the relatively low-voltage auxiliary battery 22 and/or the auxiliary loads 24.

[0071] Referring to Fig. 2E, it will be noted that the TAB converter 200 is connected to the EV battery pack 12 and to the auxiliary loads 24 in a manner that is similar to the dc-to-dc converter 34 in the prior art typical EV power architecture of Fig. 1C. Accordingly, the dc-to-dc converter 34 of the typical EV power architecture may be substituted with the TAB converter 200 of the present disclosure with limited modifications to the overall power architecture. This is advantageous to retro-fitting existing EVs with the TAB converter.

[0072] In one embodiment, the TAB converter 200 is a 4-kW, 400V-to-12V converter to perform in-situ EIS perturbation on the high-voltage EV battery pack12 at arbitrarily low frequencies without additional energy reserves.

[0073] The multiport switched-mode power-converter 180, such as the TAB converter 200, is operable in two power flow modes: an "EIS mode" (Fig. 3B); and a "power transfer mode". In general, the "power transfer mode" refers to a mode in which the pack portions 14, 15 transfer power to a load or receive power from a source connected to the power-converter 180. Another example of a "power transfer mode" is a "charge mode" in which a source such as an onboard charger of the EV transfers power to the EV battery pack 12.

[0074] Another example of a "power transfer mode" is an "auxiliary supply mode" as shown in Fig. 3A and 3D. The auxiliary supply mode may be the normal or default operating mode of the TAB converter 200. In the auxiliary supply mode, the TAB converter 200, the TAB converter 200 supplies power from the EV battery pack 12 to the 12 V EV loads, drawing equally from both pack portions 14, 15.

[0075] The EIS mode may performed intermittently, and opportunistically such as when the EV is being driven, but stationary and the EV battery pack 12 is not supplying current to the traction motor. The TAB converter 200 is temporarily reconfigurable to the EIS mode to perform pack-level sinusoidal perturbation of the EV battery pack portions 14,15 using the other one of the high-voltage EV battery pack portions 15,14 as the reserve energy storage. When operated in EIS mode as shown in Fig. 3A and 3B, the TAB converter 200 performs as a dual-active-bridge (DAB) converter and regulates sinusoidal current perturbations between the EV battery pack portions 14, 15, thereby imposing only the converter loss on the full EV battery pack 12, as shown in Fig. 2E. In the EIS mode, a perturbation current is induced between the two series- connected half-packs 14, 15 of the EV battery pack 12. Due to the matched power and energy ratings of the half-packs 14, 15, arbitrarily-low EIS frequencies are supported without the addition of new energy reserves-storage elements. [0076] TAB Converter

[0077] Figs. 3A and 3B shows embodiments of the TAB converter 200 used in the system 200 of Fig. 2E. This embodiment allows current perturbation at the level of the pack portions 14, 15 to be coordinated with voltage sensing at the level the cells 16 to estimate the impedance phasor for use in EIS spectroscopy.

[0078] In the embodiment of Fig. 3A, the TAB converter 200 includes a 4-kW, 200- kHz TAB with a top (first) gallium nitride-based (GaN-based) full-bridge 202 (denoted FBcaNt in Fig. 3B), a bottom (second) GaN-based full-bridge 204 (denoted FBcaNb in Fig. 3B), a silicon-based (Si-based) (third) full-bridge 206 (denoted FBsi in Fig. 3B), and an off-the-shelf 48V-to-12V dc-to-dc voltage converter 208, as shown in Fig. 3B. The full-bridges that may be used are not limited to implementation by metal oxide semiconductor field effect transistors (MOSFETs) that are GaN-based or Si-based. For example, the full-bridges 202 and 204 may be silicon carbide (SiC) based. Accordingly, in other embodiments the notations "GaN" and "Si" may be replaced with generalized notations "HV" for high voltage and "LV" for low voltage, respectively.

[0079] Full-bridges, and their use and operation as dc-to-ac converters is known in the art. For completeness of description, Fig. 9 shows the equivalent circuit topology of a full-bridge 500 in isolation. In general, a full-bridge is a circuit that connects a de power source 502 to two parallel legs 504, 506, each having a pair of switches - i.e. , switches 508 and 514 in respect to the first leg 504, and switches 510 and 512 in respect to the second leg 506. To implement the full-bridge inverter 500 in a TAB converter, a load inductor 516 is connected to the legs 504, 506 at nodes between their associated switches 508, 514 and 510, 512. The full-bridge 500 can be operated as a dc-to-ac converter by switching "on" switches 502 and 506, switching "off" switches 502 and 506, switching "on" switches 504 and 508, and switching "off" switches 504 and 508 to produce voltage waveforms having a positive half-cycle and a negative half-cycle - e.g., a sinusoidal wave form.

[0080] It will be appreciated that a DAB converter or TAB converter is an example of a multi-port switched-mode power-converter. As used herein, a "multi-port switched- mode power-converter" refers to an electronic device comprising components (e.g., MOSFETS and circuitry) including one or more switches that are selectively controllable to vary the power output from the device in one of a plurality of different possible modes. "Modulating" a multiport switched-port power-converter or a fullbridge, as used herein, refers to switching the switches thereof "on" and "off" in a controlled manner or sequence to produce a power output in a mode, which may be characterized by an output voltage waveform. "Deactivating" a multiport-switched-port power-converter or full-bridge, as used herein, refers to switching the switches "off" thereof to electrically isolate a component attached to the power-converter or the fullbridge.

[0081] Referring to Figs. 3A or 3B, the TAB converter 200 consists of three fullbridge topologies connected via a shared transformer core. Two HV full-bridges 202, 204 are connected in series to two battery half-packs 14, 15, respectively, while the third full-bridge 206 is connected to the 48V-to-12V dc-to-dc step-down converter 208 which supplies the 12-V auxiliary system of the vehicle with the 12-V lead-acid (PbA) battery 22 buffer acting as a buffer. More particularly, the three-port isolation transformer 210 (shown by a transformer core) couples the load inductor of the top (first) full-bridge 202 to the load inductor of the bottom (second) full-bridge 204, and to the load inductor of the middle (third) full-bridge 206. The dot notation indicates that the windings of these inductors having the same polarity. The transformer core of the transformer 210 permits power transmission between the three full-bridge 202, 204, 206, with possible variation of the voltage ratio between them.

[0082] The pack-middle connection current, imid, can be expressed as imid = itop + ibot, where itop and ibot are the pack-top and pack-bottom connection currents, as shown in Fig. 2E. In 12V auxiliary supply mode, ibot is negative, and the TAB converter 200 equally discharges both half-packs. The pack-middle connection current is zero, as long as itop and ibot have equal magnitudes. Compared to a standard 400-V dc-dc auxiliary power converter, the TAB converter 200 architecture reduces the voltage rating of the input-side switching devices, at the cost of increased level-shifting complexity to accommodate sensing and gate-drive circuits referenced to the packmiddle voltage level. In EIS mode as shown in Figs. 3A or 3B, the two TAB converter HV full-bridge phases are operated to induce identical sinusoidal itop and ibot, resulting in a maximum imid of twice the perturbation current amplitude. The power-conversion loss is supplied by the half-packs 14, 15 in an alternating manner based on the sinusoidal half-cycle transitions. Any half-pack voltage/SOC imbalances already present in the battery pack 12 or introduced by the operation of the TAB converter can be mitigated by drawing power unequally from the half-packs in 12V-auxiliary supply mode as shown in Figs. 3A or 3D.

[0083] DAB converter

[0084] As noted above, in the EIS mode, the TAB converter 200 performs as a DAB converter. Therefore, in alternative embodiments, a DAB converter may be used instead of the TAB converter 200. The DAB converter would include the first and second full-bridges 202, 204 connected in the same manner as shown in Figs. 3A or 3B. The third full-bridge 206 would be omitted. The DAB converter would be operable in EIS mode, but not the power transfer mode such as the auxiliary supply mode. As used herein, the term "active-bridge converter" may be used to referto a TAB converter or a DAB converter.

[0085] Controller and control scheme

[0086] A controller 400 may be used to operate the TAB converter 200 (or a DAB converter) in the EIS mode, and alternately in a power transfer mode, such as the auxiliary supply mode or a charge mode. Such a controller 400 may be implemented by a processor and a memory storing a set of instructions executable by the processor. In an exemplary embodiment, a controller 400 may be implemented by a field programmable gate array (FPGA), but it will be understood that other implementations of processors and memories are possible.

[0087] Figs. 3F and 3H are schematic diagrams of a control structure and scheme for operation of the TAB converter 200 in EIS mode, that may be implemented by a controller 400. In EIS mode, the two GaN full-bridges 202, 204 are operated (i.e., modulated) with a single phase-shift PI controller to impose a sinusoidal perturbation current between the pack portions 14, 15, and the Si full-bridge 206 is shut-down (deactivated). In this embodiment, a 10-A peak EIS current perturbation is targeted, in the range of 0.05 Hz< s <2 kHz to cover all impedance characteristics described in Fig. 1A.

[0088] Figs. 3G and 3I are schematic diagrams of a control structure and scheme for operation of the TAB converter 200 in 12 V auxiliary supply mode, which be implemented by a controller 400. In 12 V auxiliary supply mode, the GaN full-bridges 202, 204 operate at 100 kHz with equal phase-shift that is leading the third Si fullbridge 206. The power delivered to the 12 V auxiliary loads 24 is thus equally shared between the two half-packs 14, 15.

[0089] The TAB converter 200 uses a modified version of the phase-shift-based control scheme discussed in [Ref. 17], The inner current-control loop of the TAB converter 200 in 12V-auxilary supply and EIS modes uses a digital current compensator, and integrated sense resistors 212, 214 in the full-bridges 202, 204 (Fig. 3A) to control the phase-shifts, cpnv b-Lv , (pnv t-Lv and (p Hvb-Hvt as shown in Fig. 3H. In the 12V auxiliary supply mode, the TAB converter 200 independently controls the current delivered from each of the half-pack terminals to ensure balanced power delivery to the 12-V loads. Prior to EIS mode, \Z_m/c/ is regulated to 60 V, followed by the 48V-to-12V dc-dc converter 208 and low voltage (LV) full-bridge 206 being turned off. The forced high voltage on the 48-V bus ensures no uncontrolled transient currents flow to/from the LV side during the start of the EIS perturbation, which would negatively affect measurements and reliability. During the short time period where EIS mode is enabled, the 12-V loads are supplied by the 12-V lead-acid auxiliary battery 22. In EIS mode, the HV full-bridges 202, 204 connected to the top and bottom half-packs 14, 15 of the EV battery pack 12 operate as a single-phase dual-active-bridge topology with phase-shift control. An idealized equation for steady-state power-flow in a dual-active- bridge converter is given by

where cpnv b-Hv t is the phase-shift between the bottom and top HV full-bridges, f_s is the converter switching frequency, and N-\ = N2 [Ref. 18], A drawback of phase-shift control is that the switching dead-time, necessary for shoot-through prevention, limits the current controllability at low current magnitudes, which affects the zero-crossings of the sinusoidal perturbation required for EIS [Ref. 15], A sinusoidal perturbation with sufficient de offset can be used to avoid this issue by eliminating zero-crossings, but the offset may amplify the battery-cell non-linearity, and increase converter peak-power requirements due to non-zero net energy transfer. Instead, this work proposes a dual-mode control scheme to ensure high fidelity in the sinusoidal perturbation. For frequencies below 244 Hz, the bandwidth of the closed-loop proportional-integral (PI) controller is sufficient for achieving high regulation accuracy. For higher frequencies where system non-linearities cannot be suppressed effectively by the PI controller, an additional feed-forward term based on the half-pack voltages is added to achieve the necessary regulation accuracy.

[0090] Current and Voltage Phasor Measurement

[0091] Referring to Fig. 2E, the EIS sensing module 300 is used to generate voltage reading signals for the EV battery pack portions 14, 15, when subjected to a perturbing current, for use in EIS analysis to determine a state-of-health (SOH) or a state-of-charge (SOC) of the EV battery pack 12. The EIS sensing module 300 includes a pair of voltage sensors 300, 301 for producing the voltage reading signals, and a pair of multiplexers 302, 303. The top voltage sensor 301 is connected, via the top multiplexer 302, to receive signals individually from a plurality of the EV battery cells 16 of the top EV battery pack portion 14. The bottom voltage sensor 301 is connected, via the top multiplexer 303, to receive signals individually from a plurality of the EV battery cells 16 of the bottom EV battery pack portion 15. Accordingly, the top and bottom voltage sensors 301 , 302 can generate cell-level voltage reading signals for each of the EV battery cells 16 of the top and bottom EV battery pack portions 14, 15, respectively. As shown symbolically in Fig. 2E by the label "Comms." (abbreviation for "Communications"), the voltage sensors 301 , 302 are connected to a communications bus (not shown) that can receive the voltage reading signals from the voltage sensors 301 , 302 and transmit them to a BMS module 306. Referring to Fig. 4A or Fig. 4C, the BMS module 306 includes a BMS module processor 308 and an associated memory 309, implemented in one embodiment by a field programmable gate array (FPGA) connected to a controller area network (CAN) bus 310. The BMS module processor 308, executing instructions stored in the memory, in coordination with the controller 400, acquires voltage response measurements of the pack portions 14, 15 using the voltage sensors 301 , 302, when sinusoidal perturbation currents are induced in the pack portions 14, 15 by operation of the multi-port switched-mode power-converter 180 (or TAB converter 200) in the EIS mode. That is, the voltage response measurements are synchronized with the sinusoidal perturbation currents. Although the BMS module 306 and the controller 400 are shown in Figs. 4B to 4D as discrete blocks or parts, it will be appreciated that their respective processors and memories may be considered collectively as a "processor" and a "memory", and may in some embodiments, be implemented by a single physically integrated device. In addition, the BMS module 306 may control the operation of the EV battery pack 12, loads on the EV battery pack 12, energy balancing of the EV battery pack 12, or accessories (e.g. fans, heaters, cooling systems) for temperature control of the environment of the EV battery 12, as known in the art. Exemplary EIS voltage-response sensor designs are shown in Fig. 4A and 4C. Figs. 4A and 4C show an exemplary embodiment of one of voltage sensors 301 in relation to its associated multiplexer 303 and BMS module processor 308. The voltage sensor 301 includes an amplifier 312, analog-to-digital converter (ADC) 314, and digital-to-analog converter (DAC) 316.

[0092] The measurement of the voltage response of a pack portion 14,15 may performed at either the pack portion-level (i.e., the response of the all constituent cells of the pack are measured collectively), or at the cell-level (i.e., the response of a single cell of the pack is measured individually). One embodiment of the current- and voltagesampling architecture for in-situ EIS is shown in Fig. 4C. In this embodiment, the EIS voltage-response measurement occurs at the cell-level rather than pack-level to obtain an improved modelling resolution forthe BMS. The required number of voltage-sensing channels is reduced by multiplexing multiple battery-cell voltages to a single sensor. Multiplexing the voltage sensors 301 does not constrain measurement capability because the occurrence of EIS measurements is relatively infrequent. Specifically, EIS measurements are only necessary when significant changes in temperature, SOC, and degradation state occur. These changes in the operating condition are all relatively slow compared to the EIS test duration, even with multiplexed measurements. The EIS perturbation current is sampled by the same sensor used in the TAB current-regulation loop.

[0093] The perturbation-current and response-voltage phasors are obtained by extracting the harmonic component corresponding to s from a Fast Fourier Transform (FFT) of the sampled signals. The FFT phase-shifts are synchronized by a central coordinator through the Controller Area Network (CAN) communication interface linking the modules - i.e. the controller 400 and the BMS module processor 308. The validity of extracting the battery-voltage and current phasors using the FFT is reliant upon the batteries exhibiting a linear response to the perturbation current. This is expected in cases where the perturbation current is small (<10%) relative to the total Ah-capacity, and where the perturbation current does not have a de offset that causes significant changes in the cell SOC.

[0094] Experimental Examples and Results

[0095] Fig. 4B and 4D show exemplary implementations of a system 100. The proposed architecture is implemented as a TAB converter 200 that is coordinated with one phase of the auto-calibrating voltage-sensing circuits. The TAB converter 200 consists of two GaN-based 200V full-bridges 202, 204, a Si-based 48V full-bridge 206, a custom three-port transformer 210, and a multi-phase off-the-shelf 48V-to-12V converter 208. The FPGA target used for in-situ EIS, as shown in Fig. 4A also serves as the state estimator for the entire battery module. The TAB prototype, shown in Fig. 4B and 4D, contains GaN full-bridges 202, 204 and an Si full-bridge 206 that utilise top-side cooled devices (GS66508T and XPW4R10ANB), as well as the EIS sense I BMS module 300 from Fig. 4A. The transformer 210 of the TAB converter 200 is implemented with Litz wire for the half-pack HV windings and PCB embedded traces (planar windings) for the high current LV winding, with a ratio of N1.N2.N3 = 14:14:4 in the case of Fig. 4B and N1.N2.N3 = 15:15:4 in the case of Fig. 4D between the fullbridges. The layout design was iterated using finite-element methods to achieve a power-loop inductance of 5.35 nH in the GaN (HV) full-bridges. The prototype was operated in EIS mode using a subset of the custom 350-V, 27-kWh Lithium NMC battery pack shown in Fig. 1 C as one half-pack. The voltage-sensing circuit features a high-gain measurement circuit capable of resolving the sub-1 OmV cell-level voltage responses, with automatic cell dc-voltage offset calibration for improved accuracy and embedded digital signal processing. The TAB control, offset-voltage calibration, and FFT are implemented in FPGA targets local to each module.

[0096] The ElS-mode TAB switching waveforms are shown in Fig. 5A. With reference to the symbols in Fig. 3A, the voltage Vsw -GaN is applied to the load inductor (LTAB) in each HV full-bridge, which results in a trapezoidal current, ITAB, as shown in Fig. 5A. When operating in a closed- EIS mode, ITAB is regulated to produce a sinusoidal ibot and itop, as shown in Fig. 5C. The half-pack sinusoidal perturbation currents at 50 Hz and corresponding to approximately 900 W peak power are shown in Fig. 5B. The combined mid-pack current, I mid ~ Ibot + Itop. In response to the perturbation, the voltage of a 2P sub-module, V?p(_Off -adj)> within the pack of Fig. 1 C can be seen varying sinusoidally with a 6 mV amplitude in Fig. 5C. The combined experimentally captured mid-pack current, l_mid the matches the value expected from Equation (1).

[0097] The sub-module exists within the battery pack shown in Fig. 1C, and produces a 6-m\/pk,_Pk sinusoidal response during EIS. The sampled currentperturbation waveform at a frequency of 976 Hz is presented in Fig. 6A. Distortion occurs at the zero-crossings of high-frequency perturbations due to the dead-time. The corresponding FPGA-implemented FFT of the perturbation current, also shown in Fig. 6A, shows that the measurement SNR is sufficiently high, even at this relatively high frequency.

[0098] The sampled and amplified sub-module voltage, v_ac, and the top half-pack current, it_op, are shown in Fig. 10B and 10A, respectively, for a 976-Hz, 12-A perturbation sequence. The resulting magnitude and phase of the first 100 harmonics from the FFT are also shown. The voltage and current samples are both obtained at 250 ksps and decimated based on the EIS perturbation frequency to fill a fixed FFT buffer of 1024 samples. The FFT output from the experimental setup was compared to the FFT output from MATLAB resulting from the same samples, showing no discrepancy and validating the FPGA-based implementation.

[0099] The response voltage, v_ac, and the top battery half-pack current, it_op, during EIS perturbations at 0.1 , 0.2, and 0.3 Hz, are shown in Fig. 11 . Each single-frequency perturbation begins with a dc-voltage offset calibration to zero v_ac. During the calibration sequence, a programmable-gain amplifier is initialised with an end-to-end analog voltage gain of 0.7 V/V. The offset-generation DAC output voltage, Vdc, is iteratively increased from zero until the sensed v_ac at the output of the amplifier falls to near-zero. The amplifier gain is then set to 60 V/V, and a second Vdc calibration phase occurs from the previous DAC configuration. Upon completion of the second calibration phase, the system is ready to sample the perturbation-voltage response. At this point, the trigger signal, trig, initiates the loading of voltage samples onto the FPGA FFT buffer for processing. [00100] The response voltage, v_ac, and the top battery half-pack current, it_op, during EIS perturbations at 0.1 , 0.2, and 0.3 Hz, are shown in Fig. 7. Each single-frequency perturbation begins with a dc-voltage offset calibration to zero v_ac. During the calibration sequence, a programmable-gain amplifier is initialised with an end-to-end analog voltage gain of 0.7 V/V. The offset-generation DAC output voltage, Vdc, is iteratively increased from zero until the sensed v_ac at the output of the amplifier falls to near-zero. The amplifier gain is then set to 60 V/V, and a second Vdc calibration phase occurs from the previous DAC configuration. Upon completion of the second calibration phase, the system is ready to sample the perturbation-voltage response. At this point, the trigger signal, trig, initiates the loading of voltage samples onto the FPGA FFT buffer for processing.

[00101] The measured impedance of one 2P sub-module in the test battery pack is shown in Fig. 8A. The measurements were obtained with the experimental TAB converter 200 (i.e., the TAB converter 200 including the full-bridges 202, 204, 206 and transformer 210 of Fig. 4B) operating in EIS mode for 4 Hz< s <200 Hz, and a 5-A perturbation amplitude, and a peak perturbation power of 900 W. The voltage and current were measured with a reference oscilloscope-based sampling setup to validate the perturbation methodology. As expected, the measured impedance varies with battery temperature at low frequencies (4 to 20 Hz), which is consistent with the independently obtained single-cell measurement shown in Fig. 2B.

[00102] The measured impedance magnitudes from the experimental voltage- and current-sensing setup are compared to the reference data in Fig. 8B, demonstrating a good match at frequencies below 10Hz, while further calibration is needed at higher frequencies.

[00103] A voltage-sensor offset calibration sequence is shown in Fig. 8C. Initially, the offset compensation is inaccurate with respect to the cell voltage, v_ceii, and the amplifier 312 preceding the ADC 314 saturates to either the positive or negative rail. As the compensation, Vdc, is adjusted, the ADC 314 input converges to zero. At this point, the system is ready to sample the perturbation voltage response. The sampled and amplified 5-mV_pp cell response voltage during a 300-Hz, 5-A perturbation are shown in Fig. 8D. While two half-packs 14 and 15 have been described herein, it will be noted that the half-packs 14 and 15 may, more broadly, be referred to as first and second pack portions 14 and 15. For greater certainty, the first and second pack portions 14 and 15 need not be the same size (capacity) as one another. Furthermore they need not together make up the entirety of the number of cells in the battery pack

[00104] Fig. 10 shows an EV at 600 that may include the system 100 or 200 described above, and any other components described herein.

[00105] Based on the above, it can be said that, in an embodiment, a system is provided (e.g. system 100, or system 200) for inducing a sinusoidal perturbation current in an EV battery pack (e.g. EV battery pack 12), for electrochemical impedance spectroscopy (EIS) in situ of an EV (e.g. EV 600). The EV battery pack 12 comprises a first pack portion (e.g. first pack portion 14) series connected to a second pack portion (e.g. second pack portion 15), wherein each of the first and second pack portions comprise a plurality of cells (e.g. cells 600). The system comprises an active-bridge converter comprising a dual-active-bridge (DAB) converter (e.g. converter 200) or a triple-active-bridge (TAB) converter (e.g. converter 200). The dual-active-bridge or the triple-active-bridge comprises a first full-bridge (e.g. full-bridge 202) series connected to the first pack portion; a second full-bridge (e.g. full-bridge 204) series connected to the second pack portion; and a transformer (e.g. transformer 210) coupling the first and second full-bridges. The system further comprises a controller (e.g. controller 400) comprising a processor (e.g. processor 308) operatively connected to the active-bridge converter, and a non-transitory computer-readable medium (e.g. memory shown at 309 in Figure 4A) storing instructions executable by the processor to implement a method. The method comprises operating the active-bridge converter in an EIS mode by modulating the first and second full-bridges to induce sinusoidal perturbation currents between the first and second pack portions.

[00106] While the description contained herein constitutes a plurality of embodiments of the present invention, it will be appreciated that the present invention is susceptible to further modification and change without departing from the fair meaning of the accompanying claims. REFERENCES

[00107] The following references and any reference referred to within this specification are incorporated herein by reference (where permitted) as if reproduced in their entirety. All references are indicative of the level of skill of those skilled in the art to which this invention pertains.

[1] “Global ev outlook 2021 ,” 2021 . [Online], Available: https://www.iea.org/reports/global-ev-outlook-2021

[2] “Bolt ev recall,” 2021. [Online], Available: https://my.gm.ca/chevrolet/en/how-to- support/safety/boltevrecall

[3] D. Galatro, M. Al-Zareer, C. Da Silva, D. Romero, and C. Amon, “Thermal behavior of lithium-ion batteries: Aging, heat generation, thermal management and failure,” Frontiers in Heat and Mass Transfer, vol. 14, 05 2020.

[4] A. Moshirvaziri, J. Liu, Y. Arumugam, and O. Trescases, “Modelling of temperature dependent impedance in lithium ion polymer batteries and impact analysis on electric vehicles,” in IEC0N 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Oct 2014, pp. 3149-3155.

[5] S. Nejad, D. T. Gladwin, and D. A. Stone, “Sensitivity of lumped parameter battery models to constituent parallel-rc element parameterisation error,” in IEC0N 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, 2014, pp. 5660-5665.

[6] H. Rathmann, C. Weber, W. Benecke, J. Eichholz, and D. Kaehler, “Novel method of state-of-charge estimation using in-situ impedance measurement: Single cells in-situ impedance measurement based state-of-charge estimation for LiFePO4 — Li2TO3 Battery Cells with a real bms,” in IEC0N 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, 2014, pp. 2192- 2198.

[7] W. Waag, C. Fleischer, and D. U. Sauer, “Critical review of the methods for monitoring of lithium-ion batteries in electric and hybrid vehicles,” Journal of Power Sources, vol. 258, pp. 321 - 339, 2014.

[8] S. M. R. Islam, S.-Y. Park, and B. Balasingam, “Circuit parameters extraction algorithm for a lithium-ion battery charging system incorporated with electrochemical impedance spectroscopy,” in 2078 IEEE Applied Power Electronics Conference and Exposition (APEC), 2018, pp. 3353-3358.

[9] S. Buller, M. Thele, R. W. A. A. De Doncker, and E. Karden, “Impedance-based simulation models of supercapacitors and li-ion batteries for power electronic applications,” IEEE Transactions on Industry Applications, vol. 41 , no. 3, pp. 742-747, May 2005.

[10] A. Kersten, M. Kuder, W. Han, T. Thiringer, A. Lesnicar, T. Weyh, and R. Eckerle, “Online and on-board battery impedance estimation of battery cells, modules or packs in a reconfigurable battery system or multilevel inverter,” in IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society, 2020, pp. 1884-1891.

[11] E. Din, C. Schaef, K. Moffat, and J. T. Stauth, “A scalable active battery management system with embedded real-time electrochemical impedance spectroscopy,” IEEE Transactions on Power Electronics, vol. 32, no. 7, pp. 5688-5698, July 2017.

[12] Z. Gong, Z. Liu, Y. Wang, K. Gupta, C. da Silva, T. Liu, Z. H. Zheng, W P. Zhang, J. P. M. van Lammeren, H. J. Bergveld, C. H. Amon, and O. Trescases, “Ic for online eis in automotive batteries and hybrid architecture for high-current perturbation in low-impedance cells,” in 2078 IEEE Applied Power Electronics Conference and Exposition (APEC), March 2018, pp. 1922-1929.

[13] Y. Elasser, Y. Chen, M. Liu, and M. Chen, “A multiway bidirectional multiport-ac- coupled (mac) battery balancer with online electrochemical impedance spectroscopy,” in 2020 IEEE Applied Power Electronics Conference and Exposition (APEC), 2020, pp. 1475- 1482.

[14] Y. D. Lee, S. Y. Park, and S. B. Han, “Online embedded impedance measurement using high-power battery charger,” IEEE Transactions on Industry Applications, vol. 51 , no. 1 , pp. 498-508, Jan 2015.

[15] H. Shi, H. Wen, and Y. Hu, “Deadband effect and accurate zvs boundaries of gan-based dual-active-bridge converters with multiple-phase-shift control,” IEEE Transactions on Power Electronics, vol. 35, no. 9, pp. 9886-9903, 2020. [16] Y. Xie, X. Wang, X. Hu, W. Li, Y. Zhang, and X. Lin, “An enhanced electrothermal model for ev battery packs considering current distribution in parallel branches,” IEEE Transactions on Power Electronics, vol. 37, no. 1 , pp. 1027- 1043, 2022.

[17] S. A. Assadi, H. Matsumoto, M. Moshirvaziri, M. Nasr, M. S. Zaman, and O. Trescases, “Active saturation mitigation in high-density dual- active-bridge dc- dc converter for on-board ev charger applications,” IEEE Transactions on Power Electronics, vol. 35, no. 4, pp. 4376-4387, 2020.

[18] M. Nasr, S. Poshtkouhi, N. Radimov, C. Cojocaru, and O. Trescases, “Fast average current mode control of dual-active-bridge dc-dc converter using cycle- by-cycle sensing and self-calibrated digital feedforward,” in 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), 2017, pp. 1129-1133.

PARTS LIST

10 EV power system

12 EV battery pack

14 EV battery pack portion, top

15 EV battery pack portion, bottom

16 EV battery cell

20 BMS

22 Auxiliary battery

24 Loads on auxiliary battery

26 traction motor

28 HVAC system

30 de charging port

32 ac charging port

34 dc-to-dc converter

36 dc-to-ac converter

38 ac-to-dc converter

100 system

180 multi-port switched-mode power-converter

182 multi-port switched power converter, top pack portion port 184 multi-port switched power converter, bottom pack portion port

186 multi-port switched power converter, load or source port, first

188 multi-port switched power converter, load or source port, second

190-194 middle wires connecting power-converter to EV battery packs

200 triple-active-bridge (TAB) converter between EV battery packs and auxiliary battery

202 TAB converter, first (top) full bridge

204 TAB converter, second (bottom) full bridge

206 TAB converter, third (middle) full bridge

208 TAB converter, dc-to-dc voltage converter

210 TAB converter, three-port transformer

212 TAB converter, first (top) sense resistor

214 TAB converter, second (bottom) sense resistor

300 EIS sensing module

301 EIS sensing module, voltage sensor, top

302 EIS sensing module, voltage sensor, bottom

303 EIS sensing module, multiplexer, top

304 EIS sensing module, multiplexer, bottom

306 EIS sensing module, BMS module

308 EIS sensing module, processor

309 Memory

310 EIS sensing module, CAN bus

312 EIS sensing module, voltage sensor, amplifier

314 EIS sensing module, voltage sensor, analog-to-digital converter (ADC)

316 EIS sensing module, voltage sensor, digital-to-analog converter (DAC)

400 Controller

500 Full-bridge inverter

502 Full-bridge inverter, de power source

504, 506 Full-bridge legs

508, 510, 512, 514 Full-bridge, switches (transistors)

516 Full-bridge, load inductor

600 EV (electric vehicle)

602 Traction Motor 604 Wheels

Claims

1 . A system for inducing a sinusoidal perturbation current in an EV battery pack for electrochemical impedance spectroscopy (EIS) in situ of an EV, wherein the EV battery pack comprises a first pack portion and a second pack portion, wherein each of the pack portions comprise a plurality of cells, the system comprising: a multiport switched-mode power-converter connected to the first pack portion, and the second pack portion; a controller comprising a processor operatively connected to the multiport switched-mode power-converter, and a non-transitory computer-readable medium storing instructions executable by the processor to implement a method comprising: operating the multiport switched-mode power-converter in an EIS mode by modulating switches of the multiport switched-mode power-converter to induce sinusoidal current perturbations in the pack portions.

2. The system of claim 1 , wherein the system further comprises: a voltage sensor connected to one of the pack portions; and the method further comprises: using the voltage sensor, measuring a voltage response of the one of the pack portions when, in use, the sinusoidal current perturbations are induced in the one of the pack portions.

3. The system of claim 2, wherein the voltage sensor is connected to at least one of the cells of one of the pack portions for measuring the voltage response of the at least one of the pack portions at a cell level.

4. The system of claim 3, wherein the voltage sensor is connected by a multiplexer to a plurality of the cells of one of the pack portions, for measuring the voltage response of each of the plurality of the cells at the cell level.

5. The system of any one of claims 1 to 4, wherein: the multiport switched-mode power-converter comprises a load or source port for connection to a load or a source of the EV; and the method comprises: operating the multiport switched-mode power-converter in a power transfer mode by modulating the switches of the multiport switched-mode power-converter to transfer power between the pack portions and the load or the source via the load or source port. The system of claim 5, wherein the load is an auxiliary load of the EV. The system of any one of claims 1 to 4, wherein: the multiport switched-mode power-converter comprises an active-bridge converter comprising a dual-active-bridge (DAB) converter or a triple- active-bridge (TAB) converter comprising: a first full-bridge series connected to the first pack portion; a second full-bridge series connected to the second pack portion; and a transformer coupling the first and second full-bridges. The system of claim 7, wherein each of the first and second-full bridges is a gallium nitride (GaN) based or a silicon carbide (SiC) based full-bridge. The system of any one of claim 7 to 8, wherein: the active-bridge converter comprises the TAB converter, and the TAB converter further comprises: a third full-bridge series connected to an auxiliary load of the EV, and wherein the transformer couples the third full-bridge to the first and second full-bridges; operating the active-bridge converter in the EIS mode comprises deactivating the third full-bridge to isolate the auxiliary load from power transfer from the first and second pack portions; and the method further comprises operating the active-bridge converter in an auxiliary supply mode by modulating the first, second, and third fullbridges to discharge power from the first and second pack portions to the auxiliary load. The system of claim 9, wherein the third bridge is a silicon (Si) based fullbridge. The system of any one of claim 9 to 10, wherein the third full-bridge is series connected to the auxiliary load by a step-down converter. The system of claim 11 wherein the step-down converter is configured to receive an input voltage from the third full-bridge of at least 48 volts. The system of any one of claims 11 to 12, wherein the step-down converter in configured to produce an output voltage of less than 13 volts. The system of any one of claims 7 to 13, wherein the controller processor is configured by the set of instructions to implement a phase shift between the sinusoidal perturbation current induced by the first full-bridge, and the sinusoidal perturbation current induced by the second full-bridge. The system of any one of claims 1 to 14, wherein the first and second pack portions have matched power ratings. The system of any one of claims 1 to 14, wherein the first and second pack portions have different power ratings.