WO2023003542A1 - Hybrid crest factor reduction - Google Patents

Abstract

Embodiments of apparatus and method for hybrid crest factor reduction are disclosed. In one example, an apparatus for crest factor reduction can include an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise-shaped output signal. The apparatus can also include a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise-shaped output signal and to provide a peak parallel cancelled output signal. The apparatus can further include a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal.

Description

HYBRID CREST FACTOR REDUCTION

BACKGROUND

[0001] Embodiments of the present disclosure relate to apparatuses and methods for wireless communication.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. In wireless communications, there may be uplink communications from a user equipment to a base station and downlink communications from the base station to the user equipment. Wireless communications from the user equipment and from the base station may be subject to a variety of technical and regulatory restrictions, such as limitations on the amplitude of signals at various stages of a transmission process.

SUMMARY

[0003] Embodiments of apparatus and method for hybrid crest factor reduction are disclosed herein.

[0004] In one example, an apparatus for crest factor reduction can include an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise-shaped output signal. The apparatus can also include a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise-shaped output signal and to provide a peak parallel cancelled output signal. The apparatus can further include a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal. [0005] In another example, a method for crest factor reduction can include adaptive noise shaping to achieve crest factor reduction on an input signal to provide an adaptive noise-shaped output signal. The method can also include parallel peak cancelling to achieve crest factor reduction on the adaptive noise-shaped output signal to provide a peak parallel cancelled output signal. The method can further include hard clipping the peak parallel cancelled output signal to provide a hard clipped output signal.

[0006] In a further example, a radio frequency chip can include an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise shaped output signal. The radio frequency chip can also include a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise-shaped output signal and to provide a peak parallel cancelled output signal. The radio frequency chip can further include a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal. The radio frequency chip can additionally include a power amplifier configured to receive the hard clipped output signal and to provide an amplified signal. The radio frequency chip can further include an interface to one or more antennas configured to transmit the amplified signal over the air.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0008] FIG. 1A illustrates a hybrid crest factor reduction circuit, according to some embodiments of the present disclosure.

[0009] FIG. IB illustrates another hybrid crest factor reduction circuit, according to some embodiments of the present disclosure.

[0010] FIG. 2 illustrates an example of an adaptive noise shaping crest factor reduction circuit, according to certain embodiments of the present disclosure.

[0011] FIG. 3 illustrates an example of the peaks, filtered peaks, and scaled peaks, according to certain embodiments of the present disclosure.

[0012] FIG. 4 illustrates an example of a wide peak case, according to certain embodiments of the present disclosure.

[0013] FIG. 5 illustrates cancellation with adaptive noise shaping, according to certain embodiments of the present disclosure.

[0014] FIG. 6 illustrates wide peak cancellation with adaptive noise shaping, according to certain embodiments of the present disclosure.

[0015] FIG. 7 illustrates a parallel peak cancellation circuit, according to certain embodiments of the present disclosure.

[0016] FIG. 8 illustrates an example of parallel peak cancellation, according to certain embodiments of the present disclosure.

[0017] FIG. 9 illustrates hard clipping, according to certain embodiments of the present disclosure. [0018] FIG. 10 illustrates a method for crest factor reduction, according to certain embodiments of the present disclosure.

[0019] FIG. 11 illustrates a block diagram of an apparatus including a baseband chip, a radio frequency chip, and a host chip, according to some embodiments of the present disclosure. [0020] FIG. 12 illustrates an example node, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure.

[0021] FIG. 13 illustrates an example wireless network, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure. [0022] Embodiments of the present disclosure will be described with reference to the accompanying drawings.

DETAILED DESCRIPTION

[0023] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0024] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0025] In general, terminology may be understood at least in part from usage in context.

For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0026] Various aspects of wireless communication systems will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

[0027] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC- FDMA) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as Global System for Mobile communication (GSM). An OFDMA network may implement a RAT, such as Long-Term Evolution (LTE) or New Radio (NR). The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0028] Fourth generation (4G) and Fifth Generation (5G) adopt an orthogonal frequency division multiplexed (OFDM) waveform to improve spectrum efficiency. The OFDM waveform usually has a high peak-to-average power ratio (PAPR). To achieve the same peak power, a high PAPR waveform may require improved linearity and max power on the power-amplifier (PA). Crest Factor Reduction (CFR) becomes more important for 4G/5G technologies to reduce the stress on the PA and to improve efficiency.

[0029] 5G standards support various bandwidths (from 5MHz to 100MHz) with flexible

Resource Block (RB) configuration. The RBs can be inner location, edge location, or anywhere within the transmission bandwidth. This poses a severe challenge to the CFR design.

[0030] There are many CFR algorithms including distortion-less algorithms and distortion- based algorithms. Various CFR solutions have been proposed. Different approaches are suited to different kinds of waveforms.

[0031] Various correction techniques can be used. Noise-shaping algorithms are sometimes used. When the peak pulses are cluster together, it is easy for a noise-shaping algorithm to overcorrect the peak, and thereby degrading error vector magnitude (EVM) performance. Peak- cancellation algorithms are also sometimes used. When the peak pulses are wide relative to the filter length, it can take several stages to cancel those peak pulses. Clipping and filtering algorithms are sometimes implemented in the frequency domain, but the implementation complexity is high. Such techniques are not able to fully restrict the peak regrowth, and, above all, to properly control the in-band noise.

[0032] Certain embodiments may provide a cascade of corrections that provide an improved tradeoff in performance. These techniques and circuits may be applied as discussed in the examples below or optionally with additional corrections added to the cascade.

[0033] For example, certain embodiments of the present disclosure provide an architecture that cascades adaptive noise shaping crest factor reduction, parallel peak cancellation crest factor reduction, and a hard clipper to take advantage of each technique. Adaptive noise shaping crest factor reduction may be efficient at handling slow waveforms with wide peaks. Parallel peak cancellation crest factor reduction can be efficient at handling fast waveforms with narrow peaks. Hard clipper can generate wideband clipping noise with small EVM degradation.

[0034] An adaptive peak normalization feature can be added to a noise shaping crest factor reduction circuit to make the circuit work more effectively in the new hybrid architecture. Parallel peak cancellation can allow an arbitrary number of peaks to be cancelled in parallel. Pre-correction and post-correction frequency shifting can add more flexibility to control the clipping noise location.

[0035] FIG. 1A illustrates a hybrid crest factor reduction circuit, according to some embodiments of the present disclosure. The circuit can receive an input signal, x, and output a crest factor reduced signal y. In the process, there may be a number of intermediate signals, xl, x2, x3, and x4. The circuit can include a pre-cancellation frequency shifter 110 and a post cancellation frequency shifter 150.

[0036] The pre-cancellation frequency shifter 110 can shift the center frequency of input signal x away from direct current (DC). This may be done to alter the effects of the cancellation process. For example, the shifting can be done to make the left or right roll-off resulting from the cancellation sharper. For example, for radio bearers (RBs) at the left edge of the band, it may be advantageous to make the roll-off of any cancellation noise much sharper to the left, whereas the roll-off on the right may be tolerated. Similarly, at the right edge of the band, the reverse may be true. This may be because it may be necessary for the transmitting device that includes the crest factor reduction circuit to comply with tight requirements that prohibit or limit out-of-band radio frequency emissions.

[0037] The post-cancellation frequency shifter 150 may be configured to shift the crest factor reduced signal, shown as intermediate signal x4, back by the same amount that the pre cancellation frequency shifter 110 had shifted input signal x. The amount of frequency shift, F, may be a configurable parameter. In certain instances, such as when dealing with a resource block in the center of the band, it may be preferable to make the shift zero. Thus, F may be a function of resource block position within the band.

[0038] The frequency-shifted output of pre-cancellation frequency shifter 110, xl, can be provided to adaptive noise shaping (ANS) crest factor reduction (CFR) circuit 120. Adaptive noise shaping, discussed in some illustrative examples below, can be a suitable technique for addressing slowly changing variations in signal peaks. By contrast, parallel peak cancellation (PPC) can be a suitable technique for addressing quickly-changing variations in signal peaks. Thus, adaptive noise shaping CFR circuit 120 can generate intermediate signal x2, which can be provided, in turn, to parallel peak cancellation CFR circuit 130. Parallel peak cancellation is also discussed in some illustrative examples below. The output of parallel peak cancellation CFR circuit 130, x3, can be provided to hard clipping circuit 140. Hard clipping circuit 140 can be viewed as a backstop or last resort to perform crest factor reduction in cases where adaptive noise shaping and parallel peak cancellation are not sufficient. Parallel peak cancellation circuit CFR 130 can generate intermediate signal x4, which can be shifted by post-cancellation frequency shifter 150, as mentioned above, thereby yielding output signal y.

[0039] The pre-cancellation frequency shifter 110 and post-cancellation frequency shifter

150 can be configured to shift the signal in the frequency domain to move the signal’s spectrum relative to DC. As mentioned above, the frequency shift amount, F, can be a configurable parameter and can be the same in magnitude, but opposite in direction, for pre-cancellation frequency shifter 110 and post-cancellation frequency shifter 150. Thus, the frequency may be shifted +F in the pre-cancellation frequency shifter 110 and -F in the post-cancellation frequency shifter 150. [0040] Adaptive noise shaping CFR circuit 120, parallel peak cancellation CFR circuit 130, and hard clipping circuit 140 can each be controlled by a respective clipping level parameter, A, B, and C. A, B, and C can be set individually, and do not have to be the same. Optionally, A, B, and C could be the same. The clipping level can be set in software, firmware, or the like.

[0041] Adaptive noise shaping CFR 120 and parallel peak cancellation CFR circuit 130 can also each be controlled by a respective pulse width parameter, N and M. The shaping pulse width parameter, N, may be different from the parallel peak cancellation pulse width parameter, M. As mentioned above, adaptive noise shaping may be best for wide peaks, while parallel peak cancellation may be best for narrower peaks.

[0042] The parameter L can be a long peak threshold, which is discussed below.

[0043] The cascaded adaptive noise shaping crest factor reduction, parallel peak cancellation crest factor reduction, and hard clipper may achieve an excellent tradeoff of performance and complexity. In certain embodiments, the adaptive noise shaping crest factor reduction may have an adaptive peak normalization feature. In certain embodiments, the parallel peak cancellation crest factor reduction may have a parallel peak cancellation feature.

[0044] In certain embodiments, based on the signal’s property and quality requirement, pre-cancellation frequency shifting and post-cancellation frequency shifting can be used to control the location of clipping noise relative to the signal to generate an un-symmetric spectrum to help pass emission on one side. In certain embodiments, programmable parameters at each stage can optimize the performance for each type of waveform. For example, PAPR reduction can be optimized.

[0045] More particularly, the signal’s property and quality requirement can be, for example, bandwidth, waveform type (for example, DFT-s-OFDM/CP-OFDM), modulation order (for example, QPSK/16QAM/64QAM/256QAM/1024QAM), or resource block configuration. The configurable parameters can be optimized to achieve the best PAPR reduction given such requirements. These may be requirements imposed by a standard or other external rule, but these are not requirements of the present disclosure, as various embodiments may be designed with different standards requirements in mind.

[0046] FIG. IB illustrates another hybrid crest factor reduction circuit, according to some embodiments of the present disclosure. The circuit of FIG. IB may differ from the circuit of FIG. 1A in that the circuit of FIG. IB may include a selector 105, configured to operate based on a selection input. The selector 105 may be implemented as a multiplexor or the like. The selector 105 may route the signal X2 from the adaptive noise shaping CFR circuit 120 to parallel peak cancellation CFR circuit 130 (as occurs in FIG. 1A), may bypass parallel peak cancellation CFR circuit 130 and route the signal X2 directly to hard clipping circuit 140, or may bypass both parallel peak cancellation CFR circuit 130 and hard clipping circuit 140 and route the signal X2 directly to post-cancellation frequency shifter 150. Other mechanisms for providing a bypass are also permitted. In certain embodiments, the adaptive noise shaping CFR circuit 120 may be bypassed in a similar manner. The hard clipping circuit 140 may be effectively bypassed by setting C sufficiently high that no signal is clipped. Other bypassing mechanisms and techniques are likewise permitted, with selector 105 and its associated connections providing an example of a bypass circuit.

[0047] FIG. 2 illustrates an example of an adaptive noise shaping crest factor reduction circuit, according to certain embodiments of the present disclosure. As shown in FIG. 2, adaptive noise shaping CFR circuit 120 can receive signal xl as an input and output signal x2. Input signal xl can be provided to peak extractor 122. Peak extractor 122 can extract peak based on a preprogrammed threshold A as shown in Equation 1 below:

(1),

where x is the signal, A is the clipping level, and p is the peak.

[0048] In case the signal ramps for too many samples (more than L samples, for example), a wide peak flag can be declared, and the scaling can be 1 (i.e., scaling can be omitted). The extracted peaks information, p, can be provided to a noise shaper 124.

[0049] Noise shaper 124 can filter peaks with pre-defmed pulses. The noise shaper 124 can be a finite impulse response (FIR) filter. The pre-defmed pulses can use any desired window functions, such Hanning, Blackman, Kaiser, or the like to achieve various noise suppression effects in the frequency domain. The noise shaper 124 can be configured with pulse-width by parameter

N.

[0050] The peaks can be provided to adaptive scaling 126, or instead, the wide peak flag can be provided to adaptive scaling 126. Accordingly, adaptive scaling 126 can provide a scaling factor, a.

[0051] The scaling factor, a, can be the ratio between the peak value of raw peaks, p, and filtered peaks, pf. When the wide peak flag is set, a can be 1. After scaling, by multiplying a by pf, the scaled peaks, ps, can reach the same level and phase of raw peaks to improve the efficiency of peak cancellation.

[0052] FIG. 3 illustrates an example of the peaks, filtered peaks, and scaled peaks, according to certain embodiments of the present disclosure. As shown in FIG. 3, the scaled peaks, ps, can provide an approximation of the peaks, p, that is more accurate than the filtered peaks, pf. [0053] If the peak width exceeds, L, the wide peak flag can be set. Since the filtered pulse is scaled to have unity gain, the noise shaper output may reach almost the same value for wide peaks. In this case, the ratio a can be set to 1 when the wide peak flag is set.

[0054] FIG. 4 illustrates an example of a wide peak case, according to certain embodiments of the present disclosure. FIG. 4 illustrates that the filtered peaks, pf, reach almost the same level as the original peaks, p, which justifies the choice of scaling factor a=l. The scaling factor, a, for any given peak can be a constant value.

[0055] Referring again to FIG. 2, the delay 128 can be configured according to the number of samples that may need to be reviewed to determine a peak. Thus, the larger L, the larger the delay in delay 128 may need to be. Accordingly, certain embodiments may balance by setting L to a relatively short value on the order of a few dozen samples, to avoid an unnecessarily long delay value in delay 128.

[0056] The scaled peaks, ps, can be cancelled from the original signal xl to yield the shaped signal x2. FIG. 5 illustrates cancellation with adaptive noise shaping, according to certain embodiments. FIG. 5 illustrates 100MHz 273RB, original signal xl and ANS output x2 with scaling factor a¹l.

[0057] FIG. 6 illustrates wide peak cancellation with adaptive noise shaping, according to certain embodiments. FIG. 6 shows 4RB, original signal xl and ANS output x2 with scaling factor a = 1. In both the 273RB and 4RB cases, due to the adaptive scaling, the efficiency of ANS CFR can be significantly improved.

[0058] FIG. 7 illustrates a parallel peak cancellation circuit according to certain embodiments. As shown in FIG. 7, the parallel peak cancellation CFR circuit 130 can receive a signal x2 from adaptive noise shaping CFR circuit 120 and output a parallel peak cancelled signal x3.

[0059] The parallel peak cancellation CFR circuit 130 can include a peak extractor 132 that provides peaks, pn, as an output based on the clipping level parameter, B. A pulse generator 134 controlled by pulse width parameter, M, can be connected to a plurality of taps, which may be M taps, ranging from 1 to M, with a center tap, which may correspond to (MTl)/2, assuming M is an odd integer.

[0060] The original signal x2 may be delayed by delay 136 and then sequentially delayed by delay elements D, such that when a detected peak reaches the center tap the corresponding portion of the original signal is aligned, such that cancellation can be applied.

[0061] Peak extractor 132 extracts the peak amplitude and phase, pn, based on threshold

B. A cancellation pulse can be chosen from any desired window function. Programmable parameter M can decide the cancellation pulse width. The center taps of all the pulses with different M can be aligned to match the peak of x2 when it arrives. When the peak of x2 arrives, the whole cancellation pulse can be cancelled from x2 in parallel. This architecture supports parallel cancellation of an arbitrary number of peaks.

[0062] FIG. 8 illustrates an example of parallel peak cancellation according to certain embodiments of the present disclosure. As shown in FIG. 8, two peaks (pi and p2) can be extracted and used to scale a cancellation pulse. As mentioned above, any arbitrary number of peaks can be cancelled with this approach. Thus, two peaks are just one example.

[0063] FIG. 9 illustrates hard clipping according to certain embodiments of the present disclosure. As shown in FIG. 9, hard clipping circuit 140 can receive input signal x3 from a parallel peak cancellation circuit and provide a hard clipped output, x4. If no subsequent frequency shifting is applied, x4 can be y.

[0064] Hard clipping can simply limit the amplitude of any peaks that exceed threshold C while maintaining the phase, as shown in Equation 2, below:

where x is the signal, C is the clipping level, and y is the output of the hard clipping.

[0065] If all clipping thresholds are set equal, A=B=C, there may be very few peaks that needs hard clipping at this stage.

[0066] Clipping noise may be centered at DC or OMHz). Proper use of the pre-cancellation frequency shifter 110 and post-cancellation frequency shifter 150 in FIG. 1A or FIG. IB can shift the center of RB relative to the center of clipping noise to achieve symmetric or unsymmetric clipping. For the 4RB on the left edge of the transmission bandwidth, if the signal is shifted to DC before clipping, a symmetric spectrum will be generated. If the signal is shifted to a frequency other than DC before clipping, an un-symmetric spectrum can be generated. For RBs on the left edge, unsymmetric clipping can generate very sharp spectrum roll-off on the left edge to help pass stringent emission masks, or for any other desired reasons.

[0067] Certain embodiments may have various benefits and/or advantages. For example, certain embodiments, based on a signal’s properties and quality requirement, may use frequency shifting to control the location of clipping noise relative to signal. Sharp spectrum roll-off can be created on left or right edges to help pass stringent emission masks. Additionally, in certain embodiments, cascaded ANS CFR, PPC CFR, and hard clipper may achieve the best tradeoff of performance and complexity. Furthermore, certain embodiments may provide ANS CFR with an adaptive peak normalization feature (see FIG. 2 and adaptive scaling 126 for an example of an adaptive peak normalization feature). Likewise, certain embodiments may provide PPC CFR with a parallel peak cancellation feature (see FIG. 7 and the parallel structure aligned with pulse generator 134 for an example of a parallel peak cancellation feature). In certain embodiments, programmable parameters at each stage may optimize the performance (for example, PAPR reduction) for each type of waveform.

[0068] FIG. 10 illustrates a method for crest factor reduction according to certain embodiments. As shown in FIG. 10, a method can include, at 1010, adaptive noise shaping to achieve crest factor reduction on an input signal to provide an adaptive noise-shaped output signal. The adaptive noise shaping circuits shown in, for example, FIGs. 1A, IB, and 2 can be used for performing this, and control of this step may be performed using programmable parameters, as discussed above.

[0069] The method can also include, at 1020, parallel peak cancelling to achieve crest factor reduction on the adaptive noise-shaped output signal to provide a peak parallel cancelled output signal (single hashed path). The parallel peak cancellation circuits shown in, for example, FIGs. 1A, IB, and 7 can be used for performing this, and control of this step may be performed using programmable parameters, as discussed above.

[0070] The method can further include, at 1030, hard clipping the peak parallel cancelled output signal to provide a hard clipped output signal. Optionally, the hard clipping at 1030 may be performed directly on the adaptive noise-shaped output signal (double hashed path). The hard clipper circuit shown in, for example, FIGs. 1 A, IB, and 9 can be used to perform this, and control of this step may be performed using a programmable parameter for clipping level, as discussed above.

[0071] The method can also include, at 1005, pre-cancellation frequency shifting to offset a center frequency of the signal from direct current (DC) prior to the adaptive noise shaping crest factor reduction. The method can further include, at 1035, post-cancellation frequency shifting to offset a center frequency of the hard clipped output signal toward DC. Optionally, the post cancellation frequency shifting can be performed directly on the adaptive noise-shaped output signal (treble hashed path). The double and treble hashed paths can be selected at 1012 as alternatives to the single hashed path using, for example, a selection signal and a bypass circuit (as illustrated, for example, in FIG. IB), although other mechanisms are also permitted. The pre- and post-cancellation frequency shifting steps can be performed dependent on a determination of whether a given resource block is on a left or right edge of transmission bandwidth, or based on considerations.

[0072] The method can further include, at 1015, programming a clipping level of at least one of the adaptive noise shaping crest factor reduction circuit, the parallel peak cancellation crest factor reduction circuit, or the hard clipper. These may be the same level or different levels. The clipping level may be determined based on considerations such as signal needs for transmission. The method can further include, at 1025, programming a pulse width of at least one of the adaptive noise shaping crest factor reduction circuit or the parallel peak cancellation crest factor reduction circuit. The pulse widths can be selected individually based on considerations of the tradeoff between consuming more time to improve the signal quality and the need to process the signal quickly or based on other considerations.

[0073] The software and hardware methods and systems disclosed herein, such as the system of FIG. 1A or FIG. IB or the method illustrated in FIG. 10 may be implemented by any suitable node in a wireless network. For example, FIGs. 11 and 12 illustrate respective apparatuses 1100 and 1200, and FIG. 13 illustrates an exemplary wireless network 1300, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure.

[0074] FIG. 11 illustrates a block diagram of an apparatus 1100 including a baseband chip

1102, a radio frequency (RF) chip 1104, and a host chip 1106, according to some embodiments of the present disclosure. Apparatus 1100 may be an example of any suitable node of wireless network 1300 in FIG. 13, such as user equipment 1302 or network node 1304. As shown in FIG. 11, apparatus 1100 may include baseband chip 1102, radio frequency chip 1104, host chip 1106, and one or more antennas 1110. In some embodiments, baseband chip 1102 is implemented by processor 1202 and memory 1204, and radio frequency chip 1104 is implemented by processor 1202, memory 1204, and transceiver 1206, as described below with respect to FIG. 12. In some embodiments, radio frequency chip 1104 may, in whole or in part, implement the systems and methods and generate and process the signals shown in FIGs. 1 A-10. For example, radio frequency chip 1104 in a user equipment may perform crest factor reduction using the illustrated circuits or their equivalents. The radio frequency chip 1104 may have an interface to the baseband chip 1102 as well as a further interface to the one or more antennas 1110.

[0075] The radio frequency chip 1104 may have various internal components including, for example, the circuits shown in FIGs. 1A, IB, 2, 7, and 9, as well as other circuits, such as a power amplifier (PA) 1112. The radio frequency chip 1104 may process a signal from the baseband chip 1102 to prepare the signal for transmission. Thus, for example, the signal may undergo crest factor reduction before being passed to the PA 1112.

[0076] Besides the on-chip memory (also known as “internal memory” or “local memory,” e.g., registers, buffers, or caches) on each chip 1102, 1104, or 1106, apparatus 1100 may further include an external memory 1108 (e.g., the system memory or main memory) that can be shared by each chip 1102, 1104, or 1106 through the system/main bus. Although baseband chip 1102 is illustrated as a standalone SoC in FIG. 11, it is understood that in one example, baseband chip 1102 and radio frequency chip 1104 may be integrated as one SoC; in another example, baseband chip 1102 and host chip 1106 may be integrated as one SoC; in still another example, baseband chip 1102, radio frequency chip 1104, and host chip 1106 may be integrated as one SoC, as described above. Thus, in certain embodiments, a SoC may include the features of baseband chip 1102 and 1104, with a first interface to a host chip 1106 and a second interface to the one or more antennas 1110

[0077] In the uplink, host chip 1106 may generate raw data and send it to baseband chip

1102 for encoding, modulation, and mapping. The data from host chip 1106 may be associated with various IP flows. Baseband chip 1102 may map those IP flows to quality of service flows and perform additional data plane management functions. Baseband chip 1102 may also access the raw data generated by host chip 1106 and stored in external memory 1108, for example, using the direct memory access (DMA). Baseband chip 1102 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase pre-shared key (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 1102 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 1102 may send the modulated signal to radio frequency chip 1104. Radio frequency chip 1104, through the transmitter (Tx), may convert the modulated signal in the digital form into analog signals, i.e., radio frequency signals, and perform any suitable front-end radio frequency functions, such as filtering, up-conversion, or sample-rate conversion. Crest factor reduction may be performed at this stage by the radio frequency chip 1104. Antenna 1110 (e.g., an antenna array) may transmit the radio frequency signals provided by the transmitter of radio frequency chip 1104. For example, one or more antennas 1110 can transmit a crest factor reduced signal over the air.

[0078] In the downlink, antenna 1110 may receive radio frequency signals and pass the radio frequency signals to the receiver (Rx) of radio frequency chip 1104. Radio frequency chip 1104 may perform any suitable front-end radio frequency functions, such as filtering, down- conversion, or sample-rate conversion, and convert the radio frequency signals into low-frequency digital signals (baseband signals) that can be processed by baseband chip 1102. In the downlink, baseband chip 1102 may demodulate and decode the baseband signals to extract raw data that can be processed by host chip 1106. Baseband chip 1102 may perform additional functions, such as error checking, de-mapping, channel estimation, descrambling, etc. The raw data provided by baseband chip 1102 may be sent to host chip 1106 directly or stored in external memory 1108. [0079] As shown in FIG. 12, a node 1200 may include a processor 1202, a memory 1204, a transceiver 1206. These components are shown as connected to one another by bus 1208, but other connection types are also permitted. When node 1200 is user equipment 1302, additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 1200 may be implemented as a blade in a server system when node 1200 is configured as core network element 1306. Other implementations are also possible.

[0080] Transceiver 1206 may include any suitable device for sending and/or receiving data.

Node 1200 may include one or more transceivers, although only one transceiver 1206 is shown for simplicity of illustration. An antenna 1210 is shown as a possible communication mechanism for node 1200. Multiple antennas and/or arrays of antennas may be utilized. Additionally, examples of node 1200 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, network node 1304 may communicate wirelessly to user equipment 1302 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 1306. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0081] As shown in FIG. 12, node 1200 may include processor 1202. Although only one processor is shown, it is understood that multiple processors can be included. Processor 1202 may include microprocessors, microcontrollers, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 1202 may be a hardware device having one or many processing cores. Processor 1202 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can include computer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software. Processor 1202 may be a baseband chip, such as baseband chip 1102 in FIG. 11. Node 1200 may also include other processors, not shown, such as a central processing unit of the device, a graphics processor, or the like. Processor 1202 may include internal memory (also known as local memory, not shown in FIG. 12) that may serve as memory for L2 data. Processor 1202 may include a radio frequency chip, for example, integrated into a baseband chip, or a radio frequency chip may be provided separately. Processor 1202 may be configured to operate as a modem of node 1200, or may be one element or component of a modem. Other arrangements and configurations are also permitted. [0082] As shown in FIG. 12, node 1200 may also include memory 1204. Although only one memory is shown, it is understood that multiple memories can be included. Memory 1204 can broadly include both memory and storage. For example, memory 1204 may include random-access memory (RAM), read-only memory (ROM), static RAM (SRAM), dynamic RAM (DRAM), ferro electric RAM (FRAM), electrically erasable programmable ROM (EEPROM), CD-ROM or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 1202. Broadly, memory 1204 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium. The memory 1204 can be the external memory 1108 in FIG. 11. The memory 1204 may be shared by processor 1202 and other components of node 1200, such as the unillustrated graphic processor or central processing unit. [0083] As shown in FIG. 13, wireless network 1300 may include a network of nodes, such as a UE 1302, a network node 1304, and a core network element 1306. User equipment 1302 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Intemet-of-Things (IoT) node. It is understood that user equipment 1302 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0084] Network node 1304 may be a device that communicates with user equipment 1302, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Network node 1304 may have a wired connection to user equipment 1302, a wireless connection to user equipment 1302, or any combination thereof. Network node 1304 may be connected to user equipment 1302 by multiple connections, and user equipment 1302 may be connected to other access nodes in addition to network node 1304. Network node 1304 may also be connected to other UEs. It is understood that network node 1304 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0085] Core network element 1306 may serve network node 1304 and user equipment 1302 to provide core network services. Examples of core network element 1306 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 1306 includes an access and mobility management function (AMF) device, a session management function (SMF) device, or a user plane function (UPF) device, of a core network for the NR system. It is understood that core network element 1306 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.

[0086] Core network element 1306 may connect with a large network, such as the Internet

1308, or another IP network, to communicate packet data over any distance. In this way, data from user equipment 1302 may be communicated to other UEs connected to other access points, including, for example, a computer 1310 connected to Internet 1308, for example, using a wired connection or a wireless connection, or to a tablet 1312 wirelessly connected to Internet 1308 via a router 1314. Thus, computer 1310 and tablet 1312 provide additional examples of possible UEs, and router 1314 provides an example of another possible access node.

[0087] A generic example of a rack-mounted server is provided as an illustration of core network element 1306. However, there may be multiple elements in the core network including database servers, such as a database 1316, and security and authentication servers, such as an authentication server 1318. Database 1316 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 1318 may handle authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the specific entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 1306, authentication server 1318, and database 1316, may be local connections within a single rack.

[0088] Each of the elements of FIG. 13 may be considered a node of wireless network

1300. More detail regarding the possible implementation of a node is provided by way of example in the description of a node 1200 in FIG. 12 above. Node 1200 may be configured as user equipment 1302, network node 1304, or core network element 1306 in FIG. 13. Similarly, node 1200 may also be configured as computer 1310, router 1314, tablet 1312, database 1316, or authentication server 1318 in FIG. 13.

[0089] In various aspects of the present disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 1200 in FIG. 12. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer. Disk and disc, as used herein, includes CD, laser disc, optical disc, digital versatile disk (DVD), and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. [0090] According to one aspect of the present disclosure, an apparatus for crest factor reduction can include an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise-shaped output signal. The apparatus can also include a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise shaped output signal and to provide a peak parallel cancelled output signal. The apparatus can further include a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal.

[0091] In some embodiments, the apparatus can further include a pre-cancellation frequency shift circuit configured to offset a center frequency of the signal from direct current (DC) prior to reception of the signal by the adaptive noise shaping crest factor reduction circuit.

[0092] In some embodiments, the offset provided by the pre-cancellation frequency shift circuit can have a direction (for example, positive or negative) dependent on a location of a resource block corresponding to the signal.

[0093] In some embodiments, the direction of the offset can be configured to shift clipping noise away from a transmission bandwidth edge of a transmission bandwidth comprising the resource block.

[0094] In some embodiments, the apparatus can further include a post-cancellation frequency shift circuit configured to offset a center frequency of the hard clipped output signal toward DC.

[0095] In some embodiments, the offset of the pre-cancellation frequency shift circuit can be equal and opposite to the offset of the post-cancellation frequency shift circuit.

[0096] In some embodiments, the apparatus can further include a bypass circuit configured to selectably bypass at least one of the parallel peak cancellation crest factor reduction circuit or the hard clipper.

[0097] In some embodiments, the adaptive noise shaping crest factor reduction circuit can have an adaptive peak normalization feature.

[0098] In some embodiments, the parallel peak cancellation crest factor reduction circuit can have a parallel peak cancellation feature.

[0099] In some embodiments, a clipping level of the adaptive noise shaping crest factor reduction circuit can be programmable.

[0100] In some embodiments, a clipping level of the parallel peak cancellation crest factor reduction circuit can be programmable. [0101] In some embodiments, a clipping level of the hard clipper can be programmable.

[0102] In some embodiments, a pulse width of the adaptive noise shaping crest factor reduction circuit can be programmable.

[0103] In some embodiments, a pulse width of the parallel peak cancellation crest factor reduction circuit can be programmable.

[0104] In some embodiments, a long pulse threshold of the adaptive noise shaping crest factor reduction circuit can be programmable.

[0105] According to another aspect of certain embodiments, a method for crest factor reduction can include adaptive noise shaping to achieve crest factor reduction on an input signal to provide an adaptive noise-shaped output signal. The method can also include parallel peak cancelling to achieve crest factor reduction on the adaptive noise-shaped output signal to provide a peak parallel cancelled output signal. The method can further include hard clipping the peak parallel cancelled output signal to provide a hard clipped output signal.

[0106] In some embodiments, the method can also include pre-cancellation frequency shifting to offset a center frequency of the signal from direct current (DC) prior to the adaptive noise shaping crest factor reduction.

[0107] In some embodiments, the method can further include post-cancellation frequency shifting to offset a center frequency of the hard clipped output signal toward DC.

[0108] In some embodiments, the method can further include programming a clipping level of at least one of the adaptive noise shaping crest factor reduction circuit, the parallel peak cancellation crest factor reduction circuit, or the hard clipper (for example, all or any one of these parameters can be programmed, individually or together).

[0109] In some embodiments, the method can also include programming a pulse width of at least one of the adaptive noise shaping crest factor reduction circuit or the parallel peak cancellation crest factor reduction circuit.

[0110] In some embodiments, the method can further include selectively bypassing at least one of the parallel peak cancellation crest factor reduction circuit or the hard clipper.

[0111] According to a further aspect, a non-transitory computer-readable medium can be encoded with instructions that, when executed in a network device, control a process for crest factor reduction. The controlled process can include adaptive noise shaping to achieve crest factor reduction on an input signal to provide an adaptive noise-shaped output signal. The controlled process can also include parallel peak cancelling to achieve crest factor reduction on the adaptive noise-shaped output signal to provide a peak parallel cancelled output signal. The controlled process can further include hard clipping the peak parallel cancelled output signal to provide a hard clipped output signal.

[0112] According to an additional aspect, a radio frequency chip can include an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise-shaped output signal. The radio frequency chip can also include a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise-shaped output signal and to provide a peak parallel cancelled output signal. The radio frequency chip can further include a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal. The radio frequency chip can additionally include a power amplifier configured to receive the hard clipped output signal and to provide an amplified signal. The radio frequency chip can further include an interface to one or more antennas configured to transmit the amplified signal over the air.

[0113] The foregoing description of the specific embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0114] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0115] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0116] Various functional blocks, modules, and steps are disclosed above. The particular arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, some embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0117] Although the above discussion focused on various circuits and methods that may be applicable to a radio frequency chip of a modem or other user equipment device, the same circuits and methods may be applied to other devices including, without limitation, audio processors operating on an input audio signal to provide a crest factor reduced audio signal.

[0118] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

WHAT IS CLAIMED IS:

1. An apparatus for crest factor reduction, comprising: an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise-shaped output signal; a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise-shaped output signal and to provide a peak parallel cancelled output signal; and a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal.

2. The apparatus of claim 1, further comprising: a pre-cancellation frequency shift circuit configured to offset a center frequency of the signal from direct current (DC) prior to reception of the signal by the adaptive noise shaping crest factor reduction circuit.

3. The apparatus of claim 2, wherein the offset provided by the pre-cancellation frequency shift circuit has a direction dependent on a location of a resource block corresponding to the signal.

4. The apparatus of claim 3, wherein the direction of the offset is configured to shift clipping noise away from a transmission bandwidth edge of a transmission bandwidth comprising the resource block.

5. The apparatus of claim 2, further comprising: a post-cancellation frequency shift circuit configured to offset a center frequency of the hard clipped output signal toward DC.

6. The apparatus of claim 5, wherein the offset of the pre-cancellation frequency shift circuit is equal and opposite to the offset of the post-cancellation frequency shift circuit.

7. The apparatus of claim 1, further comprising: a bypass circuit configured to selectably bypass at least one of the parallel peak cancellation crest factor reduction circuit or the hard clipper.

8. The apparatus of claim 1, wherein the adaptive noise shaping crest factor reduction circuit has an adaptive peak normalization feature.

9. The apparatus of claim 1, wherein the parallel peak cancellation crest factor reduction circuit has a parallel peak cancellation feature.

10. The apparatus of claim 1, wherein a clipping level of the adaptive noise shaping crest factor reduction circuit is programmable.

11. The apparatus of claim 1, wherein a clipping level of the parallel peak cancellation crest factor reduction circuit is programmable.

12. The apparatus of claim 1, wherein a clipping level of the hard clipper is programmable.

13. The apparatus of claim 1, wherein a pulse width of the adaptive noise shaping crest factor reduction circuit is programmable.

14. The apparatus of claim 1, wherein a pulse width of the parallel peak cancellation crest factor reduction circuit is programmable.

15. The apparatus of claim 1, wherein a long pulse threshold of the adaptive noise shaping crest factor reduction circuit is programmable.

16. A method for crest factor reduction, comprising: adaptive noise shaping to achieve crest factor reduction on an input signal to provide an adaptive noise-shaped output signal; parallel peak cancelling to achieve crest factor reduction on the adaptive noise-shaped output signal to provide a peak parallel cancelled output signal; and hard clipping the peak parallel cancelled output signal to provide a hard clipped output signal.

17. The method of claim 16, further comprising: pre-cancellation frequency shifting to offset a center frequency of the signal from direct current (DC) prior to the adaptive noise shaping crest factor reduction; and post-cancellation frequency shifting to offset a center frequency of the hard clipped output signal toward DC.

18. The method of claim 16, further comprising: programming a clipping level of at least one of the adaptive noise shaping crest factor reduction circuit, the parallel peak cancellation crest factor reduction circuit, or the hard clipper.

19. The method of claim 16, further comprising: programming a pulse width of at least one of the adaptive noise shaping crest factor reduction circuit or the parallel peak cancellation crest factor reduction circuit.

20. A radio frequency (RF) chip, comprising: an adaptive noise shaping crest factor reduction circuit configured to receive an input signal and provide an adaptive noise-shaped output signal; a parallel peak cancellation crest factor reduction circuit configured to receive the adaptive noise-shaped output signal and to provide a peak parallel cancelled output signal; and a hard clipper configured to receive the peak parallel cancelled output signal and to provide a hard clipped output signal; a power amplifier configured to receive the hard clipped output signal and to provide an amplified signal; and an interface to one or more antennas configured to transmit the amplified signal over the air.