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WO2022259793A1 - Plasma treatment device - Google Patents

Plasma treatment device Download PDF

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Publication number
WO2022259793A1
WO2022259793A1 PCT/JP2022/019675 JP2022019675W WO2022259793A1 WO 2022259793 A1 WO2022259793 A1 WO 2022259793A1 JP 2022019675 W JP2022019675 W JP 2022019675W WO 2022259793 A1 WO2022259793 A1 WO 2022259793A1
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WO
WIPO (PCT)
Prior art keywords
base
substrate
support
power supply
processing apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/019675
Other languages
French (fr)
Japanese (ja)
Inventor
地塩 輿水
昇一郎 松山
康晴 佐々木
大樹 佐藤
雄介 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of WO2022259793A1 publication Critical patent/WO2022259793A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

Definitions

  • An exemplary embodiment of the present disclosure relates to a plasma processing apparatus.
  • a plasma processing apparatus is used for plasma processing of substrates.
  • a capacitively coupled plasma processing apparatus is known as one type of plasma processing apparatus.
  • a capacitively coupled plasma processing apparatus includes a chamber, a substrate support, and a high frequency power supply.
  • a substrate support is provided within the chamber and supports the substrate and the edge ring.
  • a radio frequency power supply provides radio frequency power to generate a plasma from the gas within the chamber. High-frequency power is supplied, for example, to the base of the substrate support.
  • Patent Document 1 below discloses such a plasma processing apparatus.
  • the present disclosure provides a technique for suppressing in-plane variations in plasma processing on a substrate.
  • a plasma processing apparatus includes a chamber, a substrate support, a first RF power supply, and a second RF power supply.
  • a substrate support is provided within the chamber.
  • the substrate support includes a first base, a second base, a first support area, and a second support area.
  • the first base and the second base have conductivity.
  • the second base is separated from the first base and extends to surround the outer periphery of the first base.
  • a first support region is formed from a dielectric material, is disposed above the first base, and is configured to support a substrate placed thereon.
  • a second support region is formed from a dielectric material and is disposed above the second base and configured to support an edge ring resting thereon.
  • the first high-frequency power supply is configured to supply high-frequency power for plasma generation to the first base.
  • the second high frequency power supply is configured to supply high frequency power for plasma generation to the second base.
  • FIG. 1 schematically illustrates a plasma processing apparatus according to one exemplary embodiment
  • FIG. 2 schematically illustrates a plasma processing apparatus according to another exemplary embodiment
  • FIG. 4 schematically illustrates a plasma processing apparatus according to yet another exemplary embodiment
  • FIG. 4 schematically illustrates a plasma processing apparatus according to yet another exemplary embodiment
  • FIG. 4 schematically illustrates a plasma processing apparatus according to yet another exemplary embodiment
  • a plasma processing apparatus includes a chamber, a substrate support, a first RF power supply, and a second RF power supply.
  • a substrate support is provided within the chamber.
  • the substrate support includes a first base, a second base, a first support area, and a second support area.
  • the first base and the second base have conductivity.
  • the second base is separated from the first base and extends to surround the outer periphery of the first base.
  • a first support region is formed from a dielectric material, is disposed above the first base, and is configured to support a substrate placed thereon.
  • a second support region is formed from a dielectric material and is disposed above the second base and configured to support an edge ring resting thereon.
  • the first high-frequency power supply is configured to supply high-frequency power for plasma generation to the first base.
  • the second high frequency power supply is configured to supply high frequency power for plasma generation to the second base.
  • high-frequency power from the first high-frequency power supply is supplied to the plasma through the first base, the first support region, and the substrate.
  • high frequency power from the second high frequency power supply is supplied to the plasma via the second base, the second support region, and the edge ring. That is, the RF power supplied to the plasma on the substrate and the RF power supplied to the plasma on the edge ring can be adjusted independently. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the above embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.
  • the position of the top surface of the second base may be lower than the position of the top surface of the first base.
  • the thickness of the second support region may be less than the thickness of the first support region.
  • the substrate support may further include a dielectric portion provided between the second support region and the second base and on the upper surface of the second base. In this embodiment, the difference in capacitance between the first pedestal and substrate and the second pedestal and edge ring is reduced by the dielectric portion.
  • the dielectric portion may be a thermally sprayed ceramic film formed on the upper surface of the second base.
  • the second support area may be fixed to the second base through the joining member and the dielectric portion.
  • a bonding member is provided between the dielectric portion and the second support region to secure the second support region to the dielectric portion.
  • the plasma processing apparatus may further include a bias power supply and a regulated power supply.
  • a bias power supply is configured to supply bias energy to the first pedestal for drawing ions from the plasma to the substrate.
  • the adjustment power supply is configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring.
  • first base and the second base are provided between the first base and the second base for delivering a portion of the bias energy from the first base to the second base.
  • a dielectric region may be provided between the first base and the second base.
  • the plasma processing apparatus may further include a first bias power supply and a second bias power supply.
  • a first bias power supply is configured to supply bias energy to the first pedestal for drawing ions from the plasma to the substrate.
  • a second bias power supply is configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring.
  • the capacitance per unit area between the second pedestal and the edge ring is 0.00% of the capacitance per unit area between the first pedestal and the substrate. It may be 8 times or more and 1.2 times or less.
  • a plasma processing apparatus includes a chamber, a substrate support, a high frequency power supply, and an impedance circuit.
  • a substrate support is provided within the chamber.
  • the substrate support includes a first base, a second base, a first support area, and a second support area.
  • the first base and the second base have conductivity.
  • the second base is separated from the first base and extends to surround the outer periphery of the first base.
  • a first support region is formed from a dielectric material, is disposed above the first base, and is configured to support a substrate placed thereon.
  • a second support region is formed from a dielectric material and is disposed above the second base and configured to support an edge ring resting thereon.
  • a radio frequency power source is electrically coupled to the first base and the second base and is configured to generate radio frequency power for plasma generation.
  • An impedance circuit is connected between the high frequency power source and the first base or the second base.
  • the high frequency power supplied to the plasma on the substrate and the high frequency power supplied to the plasma on the edge ring can be adjusted by the impedance circuit. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the above embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.
  • the plasma processing apparatus may further include a first bias power supply and a second bias power supply.
  • a first bias power supply is configured to supply bias energy to the first pedestal for drawing ions from the plasma to the substrate.
  • a second bias power supply is configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring.
  • the plasma processing apparatus may further comprise a bias power supply and another impedance circuit.
  • a bias power supply is configured to generate bias energy for drawing ions from the plasma to the substrate and edge ring.
  • An impedance circuit is connected between the bias power supply and the first base or the second base.
  • the capacitance per unit area between the RF power supply and the edge ring is at least 0.8 times the capacitance per unit area between the RF power supply and the substrate,1. It may be twice or less.
  • a plasma processing apparatus includes a chamber, a substrate support, a radio frequency power supply, and a regulated power supply.
  • a substrate support is provided within the chamber.
  • the substrate support includes a base, a first support area, and a second support area.
  • the base has a first portion and a second portion extending circumferentially outside the first portion.
  • a first support region is formed from a dielectric material, overlies the first portion, and is configured to support a substrate resting thereon.
  • a second support region is formed from a dielectric material and overlies the second portion and is configured to support an edge ring resting thereon.
  • the high frequency power supply is configured to supply high frequency power for plasma generation to the base.
  • the adjustment power supply is configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring.
  • the position of the top surface of the second portion is lower than the position of the top surface of the first portion.
  • the thickness of the second support region is less than the thickness of the first support region.
  • the substrate support further includes a dielectric portion disposed between the second support region and the second portion and on top of the second portion.
  • a regulated power supply may apply voltage to the edge ring via an electrical path that does not include the base and the second support area.
  • RF power from the RF power source is supplied to the plasma through the first portion, the first support region, and the substrate, and through the second portion, the second support region, and the edge ring. supplied to the plasma.
  • the difference in capacitance between the first portion and the substrate and between the second portion and the edge ring is reduced by the dielectric portion. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the above embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.
  • the dielectric portion may be a thermally sprayed ceramic film formed on the upper surface of the second portion.
  • the second support region may be fixed to the second portion via the joining member and the dielectric portion.
  • a joining member is provided between the dielectric portion and the second support region, and fixes the second support region to the dielectric portion.
  • the plasma processing apparatus may further include a bias power supply.
  • a bias power supply is configured to provide bias energy to the pedestal for drawing ions from the plasma to the substrate and edge ring.
  • the capacitance per unit area between the second portion and the edge ring is 0.8 times the capacitance per unit area between the first portion and the substrate. It may be greater than or equal to 1.2 times or less.
  • first support area and the second support area may be separate electrostatic chucks separated from each other.
  • first support region and the second support region may be integrated together to form a single electrostatic chuck.
  • FIG. 1 is a diagram schematically showing a plasma processing apparatus according to one exemplary embodiment.
  • a plasma processing apparatus 1 shown in FIG. 1 includes a chamber 10 .
  • FIG. 2 is a diagram showing the configuration inside the chamber of the plasma processing apparatus according to one exemplary embodiment. As shown in FIG. 2, the plasma processing apparatus 1 may be a capacitively coupled plasma processing apparatus.
  • the chamber 10 provides an internal space 10s therein.
  • the center axis of the internal space 10s is the axis AX extending in the vertical direction.
  • chamber 10 includes a chamber body 12 .
  • the chamber body 12 has a substantially cylindrical shape.
  • An interior space 10 s is provided within the chamber body 12 .
  • the chamber body 12 is made of aluminum, for example.
  • the chamber body 12 is electrically grounded.
  • a plasma-resistant film is formed on the inner wall surface of the chamber main body 12, that is, on the wall surface defining the internal space 10s.
  • the membrane can be a ceramic membrane, such as a membrane formed by an anodizing process or a membrane formed from yttrium oxide.
  • a passage 12p is formed in the side wall of the chamber main body 12.
  • the substrate W passes through the passage 12p when being transported between the interior space 10s and the outside of the chamber 10.
  • a gate valve 12g is provided along the side wall of the chamber body 12 for opening and closing the passage 12p.
  • the plasma processing apparatus 1 further includes a substrate support section 16 .
  • the substrate support 16 is configured to support a substrate W placed thereon within the chamber 10 .
  • the substrate W has a substantially disk shape.
  • the substrate support portion 16 may be supported by the support portion 17 .
  • the support portion 17 extends upward from the bottom portion of the chamber body 12 .
  • the support portion 17 has a substantially cylindrical shape.
  • the support portion 17 is made of an insulating material such as quartz.
  • the substrate support portion 16 is configured to further support the edge ring ER placed thereon.
  • the edge ring ER is a plate having a substantially ring shape.
  • the edge ring ER may have conductivity.
  • the edge ring ER is made of silicon or silicon carbide, for example.
  • a substrate W is placed in the chamber 10 on the substrate support 16 and within the area surrounded by the edge ring ER.
  • the substrate W and edge ring ER are mounted on the substrate support 16 such that their central axes coincide with the axis AX.
  • the plasma processing apparatus 1 may further include an outer peripheral portion 28 and an outer peripheral portion 29 .
  • the outer peripheral portion 28 extends upward from the bottom of the chamber body 12 .
  • the outer peripheral portion 28 has a substantially cylindrical shape and extends along the outer periphery of the support portion 17 .
  • the outer peripheral portion 28 is made of a conductive material and has a substantially cylindrical shape.
  • the outer peripheral portion 28 is electrically grounded.
  • a plasma-resistant film is formed on the surface of the outer peripheral portion 28 .
  • the membrane can be a ceramic membrane, such as a membrane formed by an anodizing process or a membrane formed from yttrium oxide.
  • the outer peripheral portion 29 is provided on the outer peripheral portion 28 .
  • the outer peripheral portion 29 is made of an insulating material.
  • the outer peripheral portion 29 is made of ceramic such as quartz.
  • the outer peripheral portion 29 has a substantially cylindrical shape. The outer peripheral portion 29 extends along the outer periphery of the substrate support portion 16 .
  • the plasma processing apparatus 1 further includes an upper electrode 30.
  • the upper electrode 30 is provided above the substrate support portion 16 .
  • the upper electrode 30 closes the upper opening of the chamber body 12 together with the member 32 .
  • the member 32 has insulation.
  • the upper electrode 30 is supported above the chamber body 12 via this member 32 .
  • the upper electrode 30 may include a top plate 34 and a support 36.
  • a lower surface of the top plate 34 defines an internal space 10s.
  • the top plate 34 provides a plurality of gas holes 34a. Each of the plurality of gas holes 34a penetrates the top plate 34 in the plate thickness direction (vertical direction). The plurality of gas holes 34a are open toward the internal space 10s.
  • the top plate 34 is made of silicon, for example.
  • the top plate 34 may have a structure in which a plasma-resistant film is provided on the surface of an aluminum member.
  • the membrane can be a ceramic membrane, such as a membrane formed by an anodizing process or a membrane formed from yttrium oxide.
  • the support 36 detachably supports the top plate 34 .
  • the support 36 is made of a conductive material such as aluminum.
  • the support 36 provides a gas diffusion chamber 36a therein.
  • Support 36 further provides a plurality of gas holes 36b.
  • a plurality of gas holes 36b extend downward from the gas diffusion chamber 36a.
  • the multiple gas holes 36b communicate with the multiple gas holes 34a, respectively.
  • Support 36 further provides gas inlet port 36c.
  • the gas introduction port 36c is connected to the gas diffusion chamber 36a.
  • a gas supply pipe 38 is connected to the gas introduction port 36c.
  • a gas source group 40 is connected to the gas supply pipe 38 via a valve group 41 , a flow controller group 42 , and a valve group 43 .
  • the gas source group 40, the valve group 41, the flow controller group 42, and the valve group 43 constitute a gas supply section.
  • Gas source group 40 includes a plurality of gas sources.
  • Each of the valve group 41 and the valve group 43 includes a plurality of valves (eg open/close valves).
  • the flow controller group 42 includes a plurality of flow controllers.
  • Each of the plurality of flow controllers in the flow controller group 42 is a mass flow controller or a pressure-controlled flow controller.
  • Each of the plurality of gas sources of the gas source group 40 is connected to the gas supply pipe 38 via a corresponding valve of the valve group 41, a corresponding flow controller of the flow controller group 42, and a corresponding valve of the valve group 43. It is connected.
  • the plasma processing apparatus 1 is capable of supplying gas from one or more gas sources selected from a plurality of gas sources in the gas source group 40 to the internal space 10s at individually adjusted flow rates. .
  • a baffle plate 48 is provided between the outer peripheral portion 28 and the side wall of the chamber body 12 .
  • the baffle plate 48 can be configured by coating an aluminum member with ceramic such as yttrium oxide, for example.
  • a large number of through holes are formed in the baffle plate 48 .
  • An exhaust pipe 52 is connected to the bottom of the chamber body 12 below the baffle plate 48 .
  • An exhaust device 50 is connected to the exhaust pipe 52 .
  • the evacuation device 50 has a pressure controller such as an automatic pressure control valve and a vacuum pump such as a turbomolecular pump, and can reduce the pressure in the internal space 10s.
  • the plasma processing apparatus 1 may further include a controller MC.
  • the controller MC is a computer including a processor, storage device, input device, display device, etc., and controls each part of the plasma processing apparatus 1 .
  • the controller MC executes a control program stored in the storage device, and controls each part of the plasma processing apparatus 1 based on the recipe data stored in the storage device.
  • a process specified by the recipe data is executed in the plasma processing apparatus 1 under the control of the controller MC.
  • the substrate support 16 includes a first base 181, a second base 182, a first support area 201, and a second support area 202. As shown in FIG. 1, the substrate support 16 includes a first base 181, a second base 182, a first support area 201, and a second support area 202. As shown in FIG. 1, the substrate support 16 includes a first base 181, a second base 182, a first support area 201, and a second support area 202. As shown in FIG.
  • the first base 181 and the second base 182 are conductive.
  • the first base 181 and the second base 182 may be made of a conductive material such as aluminum.
  • the first base 181 has a substantially disk shape.
  • the central axis of the first base 181 substantially coincides with the axis AX.
  • the second base 182 is separated from the first base 181 and extends to surround the outer circumference of the first base 181 .
  • the second base 182 may have a substantially ring shape in plan view.
  • the central axis of the second base 182 substantially coincides with the axis AX.
  • the position of the upper surface of the second base 182 in the height direction may be lower than the position of the upper surface of the first base 181 in the height direction.
  • the first support region 201 is made of a dielectric.
  • the first support area 201 is provided above the first base 181 .
  • the first support area 201 is configured to support a substrate W placed thereon.
  • the first support area 201 may be fixed to the top surface of the first base 181 via a bonding member 191 such as an adhesive.
  • the first support region 201 may include a body 201m and a chuck electrode 201a.
  • Body 201m is made of a dielectric such as aluminum oxide or aluminum nitride.
  • the main body 201m has a substantially disk shape.
  • the central axis of the main body 201m substantially coincides with the axis AX.
  • the chuck electrode 201a is provided inside the main body 201m.
  • the chuck electrode 201a can be a membrane made of a conductive material.
  • the chuck electrode 201a can have a substantially circular planar shape.
  • the center of the chuck electrode 201a is positioned on the axis AX.
  • the chuck electrode 201a is connected to a DC power supply 51p via a switch 51s. When the DC voltage from the DC power supply 51p is applied to the chuck electrode 201a, electrostatic attraction is generated between the first support region 201 and the substrate W. As shown in FIG. Due to the generated electrostatic attraction, the substrate W is attracted to the first support area 201 and held by the first support area 201 .
  • the second support region 202 is made of a dielectric.
  • a second support area 202 is provided above the second base 182 .
  • the second support area 202 is configured to support an edge ring ER resting thereon.
  • the second support region 202 may be fixed to the top surface of the second base 182 or the top surface of the dielectric section 22 described below via a bonding member 192 such as an adhesive.
  • the second support region 202 may include a body 202m, a chuck electrode 202a, and a chuck electrode 202b.
  • Body 202m is formed from a dielectric such as aluminum oxide or aluminum nitride.
  • the body 202m extends circumferentially to surround the first support area 201 .
  • Body 202m may have a generally annular shape.
  • a central axis of the main body 202m substantially coincides with the axis AX.
  • the chuck electrodes 202a and 202b are provided in the main body 202m.
  • Each of chuck electrodes 202a and 202b can be a membrane formed from a conductive material.
  • the chuck electrodes 202a and 202b extend circumferentially around the axis AX.
  • Chuck electrode 202b extends outside of chuck electrode 202a.
  • Chuck electrodes 202a and 202b may have a generally annular shape.
  • the center of each of chuck electrodes 202a and 202b is located on axis AX.
  • the chuck electrode 202a is connected to a DC power supply 521p via a switch 521s.
  • the chuck electrode 202b is connected to a DC power supply 522p via a switch 522s.
  • the plasma processing apparatus 1 further includes a first high frequency power supply 61 and a second high frequency power supply 62 .
  • the first high-frequency power supply 61 is configured to supply high-frequency power for plasma generation to the first base 181 .
  • the first high frequency power supply 61 is electrically connected to the first base 181 via a matching box 61m.
  • the high-frequency power generated by the first high-frequency power supply 61 has a frequency within the range of 27-100 MHz, eg, 40 MHz or 60 MHz.
  • the matching unit 61m has a matching circuit for matching the load impedance of the first high frequency power supply 61 with the output impedance of the first high frequency power supply 61 .
  • the second high-frequency power supply 62 is configured to supply high-frequency power for plasma generation to the second base 182 .
  • the second high frequency power supply 62 is electrically connected to the second base 182 via a matching box 62m.
  • the high frequency power generated by the second high frequency power supply 62 can have the same frequency as the frequency of the high frequency power generated by the first high frequency power supply 61 .
  • the matching device 62m has a matching circuit for matching the impedance of the load of the second high frequency power supply 62 with the output impedance of the second high frequency power supply 62 .
  • high-frequency electric fields are generated in the chamber 10 by the high-frequency power from the first high-frequency power supply 61 and the high-frequency power from the second high-frequency power supply 62 .
  • the gas within chamber 10 is excited by the generated high frequency electric field.
  • a plasma is generated within chamber 10 .
  • the substrate W is treated with chemical species such as ions and/or radicals from the generated plasma.
  • the substrate W is etched by species from the plasma.
  • the plasma processing apparatus 1 may further include a bias power supply 71.
  • a bias power supply 71 is electrically connected to the first base 181 .
  • a bias power supply 71 generates the bias energy used to attract ions to the substrate W.
  • the bias energy has a bias frequency.
  • the bias frequency can be a frequency within the range of 50 kHz to 13.56 MHz.
  • the bias energy may be radio frequency bias power having a bias frequency.
  • the bias power supply 71 is electrically connected to the first base 181 via a matching device 71m.
  • the matching unit 71m has a matching circuit for matching the impedance of the load of the bias power supply 71 with the output impedance of the bias power supply 71 .
  • the bias energy may be a pulse of voltage. Pulses of voltage are generated and applied to the first base 181 periodically at intervals of time (ie, bias period) having a time length that is the reciprocal of the bias frequency.
  • the voltage pulse may be a negative voltage pulse or a negative DC voltage pulse.
  • the voltage pulse may have any waveform such as a square wave or a triangular wave.
  • high-frequency power from the first high-frequency power supply 61 is supplied to the plasma through the first base 181, the first support region 201, and the substrate W.
  • high frequency power from the second high frequency power supply 62 is supplied to the plasma via the second base 182, the second support region 202, and the edge ring ER. That is, in the plasma processing apparatus 1, the high frequency power supplied to the plasma on the substrate W and the high frequency power supplied to the plasma on the edge ring ER can be individually adjusted. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the plasma processing apparatus 1, it is possible to suppress in-plane variations in the plasma processing of the substrate W.
  • the position of the top surface of the second base 182 may be lower than the position of the top surface of the first base 181 .
  • the thickness of the second support region 202 may be thinner than the thickness of the first support region 201 .
  • the substrate support portion 16 may further include a dielectric portion 22 .
  • the dielectric portion 22 is provided between the second support region 202 and the second base 182 and on the upper surface of the second base 182 .
  • Dielectric portion 22 is made of a dielectric such as aluminum oxide or aluminum nitride.
  • the dielectric portion 22 may be a thermally sprayed ceramic film formed on the upper surface of the second base 182 .
  • the difference in capacitance between the first base 181 and the substrate W and the second base 182 and the edge ring ER is reduced by the dielectric portion 22. be.
  • the plasma processing apparatus 1 may further include a regulated power supply 80.
  • the adjustment power supply 80 is configured to apply a voltage to the edge ring ER to adjust the heightwise position of the upper end of the plasma sheath above the edge ring ER.
  • a dielectric region 24 may be provided between the first base 181 and the second base 182 .
  • Dielectric region 24 is formed of a dielectric.
  • Dielectric region 24 is provided to deliver a portion of the bias energy from first base 181 to second base 182 . That is, the first base 181 and the second base 182 are capacitively coupled via the dielectric region 24 .
  • the capacitance per unit area between the second pedestal 182 and the edge ring ER is less than the capacitance per unit area between the first pedestal 181 and the substrate W. It may be 0.8 times or more and 1.2 times or less. According to this embodiment, it is possible to further reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring.
  • first support area 201 and the second support area 202 are separate electrostatic chucks separated from each other.
  • first support region 201 and the second support region 202 may be integrated together and form a single electrostatic chuck.
  • FIG. 3 is a schematic diagram of a plasma processing apparatus according to another exemplary embodiment. Differences of the plasma processing apparatus 1B shown in FIG. 3 from the plasma processing apparatus 1 will be described below.
  • the plasma processing apparatus 1B further includes a bias power supply 72.
  • Bias power supply 72 (second bias power supply) generates bias energy similar to the bias energy generated by bias power supply 71 (first bias power supply).
  • a bias power supply 72 is electrically connected to the second base 182 .
  • the bias power supply 72 is electrically connected to the second base 182 via the matching box 72m.
  • the matching device 72m has a matching circuit for matching the impedance of the load of the bias power supply 72 with the output impedance of the bias power supply 72 .
  • a dielectric region 24B is provided between a first base 181 and a second base 182 in the substrate support portion 16B of the plasma processing apparatus 1B.
  • Dielectric region 24B has a relatively low capacitance to electrically isolate first base 181 and second base 182 from each other in the respective frequency bands of high frequency power and bias energy.
  • FIG. 4 is a schematic diagram of a plasma processing apparatus according to yet another exemplary embodiment. Differences of the plasma processing apparatus 1C shown in FIG. 4 from the plasma processing apparatus 1B will be described below.
  • the plasma processing apparatus 1C does not include the second high frequency power supply 62. Further, in the plasma processing apparatus 1C, the substrate supporting portion 16C does not have to have the dielectric portion 22, and the second supporting region 202 is placed on the second base 182 via the bonding member 192. may be placed.
  • the position of the upper surface of the second base 182 in the height direction may be substantially the same as the position of the upper surface of the first base 181 in the height direction.
  • the plasma processing apparatus 1C further includes impedance circuits 91 and 92 .
  • the impedance circuit 91 is connected between the output of the first high frequency power supply 61 (output of high frequency power) and the first base 181 .
  • Impedance circuit 91 may have a variable impedance.
  • Impedance circuit 91 may include a variable capacitor connected between the output of first high frequency power supply 61 and first base 181 .
  • the impedance circuit 92 is connected between the output of the first high frequency power supply 61 (output of high frequency power) and the second base 182 .
  • Impedance circuit 92 may have a variable impedance.
  • Impedance circuit 92 may include a variable capacitor connected between the output of first high frequency power supply 61 and second base 182 .
  • the first high frequency power supply 61 is electrically connected to the first base 181 via the matching box 61m and the impedance circuit 91. As shown in FIG. Also, the first high-frequency power supply 61 is electrically connected to the second base 182 via the matching device 62m and the impedance circuit 92 .
  • the capacitance per unit area between the output of the first high-frequency power supply 61 (output of high-frequency power) and the edge ring ER is equal to the output of the first high-frequency power supply 61 (output of high-frequency power ) and the substrate W may be 0.8 times or more and 1.2 times or less of the capacitance per unit area.
  • the capacitance between the output of the first high frequency power supply 61 and the edge ring ER is the capacitance of the electrical path of the high frequency power from the first high frequency power supply 61 to the edge ring ER. Contains a capacitive component.
  • the capacitance between the output of the first high-frequency power source 61 and the substrate W is the capacitance of the electrical path of the high-frequency power from the first high-frequency power source 61 to the substrate W, and the capacitance of the impedance circuit 91 Contains ingredients.
  • high-frequency power is supplied from the first high-frequency power supply 61 to the plasma through the impedance circuit 91, the first base 181, the first support region 201, and the substrate W. Also, high frequency power is supplied to the plasma from the first high frequency power source 61 via the impedance circuit 92, the second base 182, the second support region 202, and the edge ring ER. That is, the high frequency power supplied to the plasma on the substrate W and the high frequency power supplied to the plasma on the edge ring ER can be individually adjusted by the impedance circuits 91 and 92 .
  • the plasma processing apparatus 1 ⁇ /b>C may include only one of the impedance circuit 91 and the impedance circuit 92 . Even in this case, the capacitance per unit area between the output of the first high-frequency power supply 61 and the edge ring ER is equal to the static capacitance per unit area between the output of the first high-frequency power supply 61 and the substrate W. It may be 0.8 times or more and 1.2 times or less of the electric capacity.
  • FIG. 5 is a schematic diagram of a plasma processing apparatus according to yet another exemplary embodiment. Differences of the plasma processing apparatus 1D shown in FIG. 5 from the plasma processing apparatus 1C will be described below.
  • the plasma processing apparatus 1D does not have a bias power supply 72.
  • the plasma processing apparatus 1D further includes impedance circuits 93 and 94 .
  • the impedance circuit 93 is connected between the output of the bias power supply 71 (bias energy output) and the first base 181 .
  • Impedance circuit 93 may have a variable impedance.
  • Impedance circuit 93 may include a variable capacitor connected between the output of bias power supply 71 and first base 181 .
  • the impedance circuit 94 is connected between the output of the bias power supply 71 (bias energy output) and the second base 182 .
  • Impedance circuit 94 may have a variable impedance.
  • Impedance circuit 94 may include a variable capacitor connected between the output of bias power supply 71 and second base 182 .
  • bias energy is supplied from the bias power supply 71 to the first base 181 through the impedance circuit 93. Also, bias energy is supplied from the bias power supply 71 to the second base 182 through the impedance circuit 94 . That is, the bias energy from the bias power supply 71 is distributed to the first base 181 and the second base 182 with a distribution ratio adjusted by the impedance circuit 93 and the impedance circuit 94 .
  • the capacitance per unit area between the output of the first high-frequency power supply 61 (output of high-frequency power) and the edge ring ER is equal to the output of the first high-frequency power supply 61 (output of high-frequency power ) and the substrate W may be 0.8 times or more and 1.2 times or less of the capacitance per unit area.
  • the capacitance between the output of the first high frequency power supply 61 and the edge ring ER is the capacitance of the electrical path of the high frequency power from the first high frequency power supply 61 to the edge ring ER. Contains a capacitive component.
  • the capacitance between the output of the first high-frequency power source 61 and the substrate W is the capacitance of the electrical path of the high-frequency power from the first high-frequency power source 61 to the substrate W, and the capacitance of the impedance circuit 91 Contains ingredients.
  • the plasma processing apparatus 1D may include only one of the impedance circuit 91 and the impedance circuit 92. FIG. Even in this case, the capacitance per unit area between the output of the first high-frequency power supply 61 and the edge ring ER is equal to the static capacitance per unit area between the output of the first high-frequency power supply 61 and the substrate W. It may be 0.8 times or more and 1.2 times or less of the electric capacity.
  • the capacitance per unit area between the output of the bias power supply 71 (output of bias energy) and the edge ring ER is the output of the bias power supply 71 (output of bias energy) and the substrate W It may be 0.8 times or more and 1.2 times or less of the capacitance per unit area between.
  • the capacitance between the output of bias power supply 71 and edge ring ER is the capacitance of the electrical path of the bias energy from bias power supply 71 to edge ring ER and includes the capacitive component of impedance circuit 94 .
  • the capacitance between the output of bias power supply 71 and substrate W is the capacitance of the electrical path of the bias energy from bias power supply 71 to substrate W and includes the capacitive component of impedance circuit 93 .
  • the plasma processing apparatus 1D may include only one of the impedance circuit 93 and the impedance circuit 94.
  • FIG. Even in this case, the capacitance per unit area between the output of the bias power supply 71 and the edge ring ER is 0.8 of the capacitance per unit area between the output of the bias power supply 71 and the substrate W. It may be more than twice and less than 1.2 times.
  • FIG. 6 is a schematic diagram of a plasma processing apparatus according to yet another exemplary embodiment. Differences of the plasma processing apparatus 1E shown in FIG. 6 from the plasma processing apparatus 1 will be described below.
  • the plasma processing apparatus 1E includes a substrate support portion 16E instead of the substrate support portion 16.
  • the substrate support portion 16E includes a base 18E, a first support area 20a, and a second support area 20b.
  • the base 18E has conductivity.
  • the base 18E may be made of a conductive material such as aluminum.
  • the base 18E includes a first portion 18a and a second portion 18b.
  • the first portion 18a has a substantially disk shape.
  • the central axis of the first portion 18a substantially coincides with the axis AX.
  • the second portion 18b extends to surround the outer circumference of the first portion 18a.
  • the second portion 18b may have a substantially annular shape in plan view.
  • the central axis of the second portion 18b substantially coincides with the axis AX.
  • the first portion 18a and the second portion 18b are integrated with each other.
  • the first high frequency power supply 61 is electrically connected to the base 18E via a matching box 61m.
  • a bias power supply 71 is also electrically connected to the base 18E.
  • the first support region 20a is made of a dielectric.
  • a first support area 20a is provided above the first portion 18a.
  • the first support area 20a is configured to support a substrate W placed thereon.
  • the first support area 20a may be secured to the top surface of the first portion 18a via a bonding member 19 such as an adhesive.
  • First support region 20a like first support region 201, may include body 20m and chuck electrode 201a.
  • the second support region 20b is made of a dielectric.
  • a second support area 20b is provided above the second portion 18b.
  • the second support area 20b is configured to support an edge ring ER resting thereon.
  • the second support region 20b may be fixed to the upper surface of the dielectric portion 22, which will be described later, via the joint member 19.
  • Second support region 20b like second support region 202, may include body 20m, chuck electrode 202a, and chuck electrode 202b.
  • the position of the upper surface of the second portion 18b may be lower than the position of the upper surface of the first portion 18a.
  • the thickness of the second support region 20b may be thinner than the thickness of the first support region 20a.
  • the substrate support portion 16E further includes a dielectric portion 22. As shown in FIG.
  • the dielectric portion 22 is provided between the second support region 20b and the second portion 18b and on the upper surface of the second portion 18b.
  • the dielectric portion 22 is made of a dielectric material, like the dielectric portion 22 of the substrate support portion 16 .
  • the adjustment power supply 80 is configured to apply a voltage to the edge ring ER in order to adjust the height direction position of the upper end of the plasma sheath above the edge ring ER.
  • Regulated power supply 80 may apply voltage to the edge ring via an electrical path that does not include base 18E and second support region 20b.
  • high-frequency power from the first high-frequency power supply 61 is supplied to the plasma through the first portion 18a, the first support region 20a, and the substrate W, and the second portion 18b, the second is supplied to the plasma via the support region 20b of the and the edge ring ER.
  • the difference in capacitance between the first portion 18a and the substrate W and between the second portion 18b and the edge ring ER is reduced by the dielectric portion 22. . Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring ER. Therefore, according to the plasma processing apparatus 1E, it is possible to suppress in-plane variations in the plasma processing of the substrate W.
  • the capacitance per unit area between the second portion 18b and the edge ring ER is the capacitance per unit area of the substrate between the first portion 18a and the substrate W. may be 0.8 times or more and 1.2 times or less.
  • the first support region 20a and the second support region 20b are integrated with each other to form a single electrostatic chuck. Regions 20b may be separated from each other.
  • a plurality of plasma processing apparatuses having the same structure as the plasma processing apparatus 1E and having different capacitance ratios were used to etch the sample substrate so as to form a plurality of holes distributed in the plane.
  • the capacitance ratio is a value obtained by dividing the capacitance per unit area between the base 18E and the edge ring ER by the capacitance per unit area between the base 18E and the sample substrate.
  • FIG. 7 shows the results of the experiment.
  • the horizontal axis indicates capacitance ratios of a plurality of plasma processing apparatuses used in the experiment.
  • the vertical axis indicates the circularity.
  • the capacitance per unit area between the base (second base 182 or second portion 18b) and the edge ring ER is ) and the substrate W is preferably 0.8 times or more and 1.2 times or less of the capacitance per unit area.
  • a plasma processing apparatus comprising:
  • the position of the upper surface of the second base is lower than the position of the upper surface of the first base; the thickness of the second support region is thinner than the thickness of the first support region;
  • the substrate support further includes a dielectric part provided between the second support region and the second base and on the upper surface of the second base, The plasma processing apparatus according to [E1].
  • the second support region is fixed to the second base via a joint member provided between the dielectric portion and the second support region and the dielectric portion, [E2 ] or the plasma processing apparatus as described in [E3].
  • a bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate; an adjustment power supply configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring;
  • a first bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate; a second bias power supply configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring;
  • the capacitance per unit area between the second base and the edge ring is 0.8 times or more the capacitance per unit area between the first base and the substrate;
  • the plasma processing apparatus according to any one of [E1] to [E7], which is 1.2 times or less.
  • a substrate support provided in the chamber, a conductive first base; a second electrically conductive base spaced apart from the first base and extending around the circumference of the first base; a first support region formed from a dielectric and disposed above the first base and configured to support a substrate mounted thereon; a second support region formed from a dielectric and disposed above the second base and configured to support an edge ring resting thereon; the substrate support comprising a radio frequency power source electrically coupled to the first base and the second base and configured to generate radio frequency power for plasma generation; an impedance circuit connected between the high-frequency power source and the first base or the second base;
  • a plasma processing apparatus comprising:
  • a first bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate; a second bias power supply configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring;
  • a bias power supply configured to generate bias energy for drawing ions from a plasma into the substrate and the edge ring; another impedance circuit connected between the bias power supply and the first base or the second base;
  • the capacitance per unit area between the high-frequency power supply and the edge ring is 0.8 times or more and 1.2 times or less the capacitance per unit area between the high-frequency power supply and the substrate.
  • the plasma processing apparatus according to any one of [E9] to [E11].
  • a substrate support provided in the chamber, an electrically conductive base having a first portion and a second portion extending circumferentially outside the first portion; a first support region formed from a dielectric and disposed above the first portion and configured to support a substrate resting thereon; a second support region formed from a dielectric material overlying the second portion and configured to support an edge ring resting thereon; the substrate support comprising a high-frequency power source configured to supply high-frequency power for plasma generation to the base; an adjustment power supply configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring; with the position of the top surface of the second portion is lower than the position of the top surface of the first portion; the thickness of the second support region is thinner than the thickness of the first support region; the substrate support further includes a dielectric portion provided between the second support region and the second portion and on the upper surface of the second portion; Plasma processing equipment.
  • the second support region is fixed to the second portion via a bonding member provided between the dielectric portion and the second support region and the dielectric portion, [E13] Or the plasma processing apparatus according to [E14].
  • the capacitance per unit area between the second portion and the edge ring is 0.8 times or more the capacitance per unit area between the first portion and the substrate;
  • the plasma processing apparatus according to any one of [E13] to [E16], which is twice or less.
  • the first support region and the second support region are separate electrostatic chucks separated from each other or integrated with each other to form a single electrostatic chuck, [E1]-[ E17].

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Abstract

The disclosed plasma treatment device is provided with a chamber, a substrate support portion, a first high-frequency power source, and a second high-frequency power source. The substrate support portion includes first and second bases and first and second support regions. The first and second bases have conductivity. The second base is separate from the first base, and surrounds the outer periphery of the first base. The first support region is formed from a dielectric and provided above the first base, and supports a substrate mounted thereon. The second support region is formed from a dielectric and provided above the second base, and supports an edge ring mounted thereon. The first and second high-frequency power sources are configured to supply high-frequency power to the first and second bases, respectively.

Description

プラズマ処理装置Plasma processing equipment

 本開示の例示的実施形態は、プラズマ処理装置に関するものである。 An exemplary embodiment of the present disclosure relates to a plasma processing apparatus.

 プラズマ処理装置が、基板に対するプラズマ処理において用いられている。容量結合型のプラズマ処理装置が、プラズマ処理装置の一種として、知られている。容量結合型のプラズマ処理装置は、チャンバ、基板支持部、及び高周波電源を備える。基板支持部は、チャンバ内に設けられており、基板及びエッジリングを支持する。高周波電源は、チャンバ内でガスからプラズマを生成するために、高周波電力を供給する。高周波電力は、例えば、基板支持部の基台に供給される。下記の特許文献1は、このようなプラズマ処理装置を開示している。 A plasma processing apparatus is used for plasma processing of substrates. A capacitively coupled plasma processing apparatus is known as one type of plasma processing apparatus. A capacitively coupled plasma processing apparatus includes a chamber, a substrate support, and a high frequency power supply. A substrate support is provided within the chamber and supports the substrate and the edge ring. A radio frequency power supply provides radio frequency power to generate a plasma from the gas within the chamber. High-frequency power is supplied, for example, to the base of the substrate support. Patent Document 1 below discloses such a plasma processing apparatus.

特開2020-96176号公報JP 2020-96176 A

 本開示は、基板に対するプラズマ処理の面内バラツキを抑制する技術を提供する。 The present disclosure provides a technique for suppressing in-plane variations in plasma processing on a substrate.

 一つの例示的実施形態において、プラズマ処理装置が提供される。プラズマ処理装置は、チャンバ、基板支持部、第1の高周波電源、及び第2の高周波電源を備える。基板支持部は、チャンバ内に設けられている。基板支持部は、第1の基台、第2の基台、第1の支持領域、及び第2の支持領域を含む。第1の基台及び第2の基台は、導電性を有する。第2の基台は、第1の基台から離れており、第1の基台の外周を囲むように延在する。第1の支持領域は、誘電体から形成されており、第1の基台の上方に設けられており、その上に載置される基板を支持するように構成されている。第2の支持領域は、誘電体から形成されており、第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成されている。第1の高周波電源は、プラズマ生成用の高周波電力を第1の基台に供給するように構成されている。第2の高周波電源は、プラズマ生成用の高周波電力を第2の基台に供給するように構成されている。 In one exemplary embodiment, a plasma processing apparatus is provided. A plasma processing apparatus includes a chamber, a substrate support, a first RF power supply, and a second RF power supply. A substrate support is provided within the chamber. The substrate support includes a first base, a second base, a first support area, and a second support area. The first base and the second base have conductivity. The second base is separated from the first base and extends to surround the outer periphery of the first base. A first support region is formed from a dielectric material, is disposed above the first base, and is configured to support a substrate placed thereon. A second support region is formed from a dielectric material and is disposed above the second base and configured to support an edge ring resting thereon. The first high-frequency power supply is configured to supply high-frequency power for plasma generation to the first base. The second high frequency power supply is configured to supply high frequency power for plasma generation to the second base.

 一つの例示的実施形態によれば、基板に対するプラズマ処理の面内バラツキを抑制することが可能となる。 According to one exemplary embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.

一つの例示的実施形態に係るプラズマ処理装置を概略的に示す図である。1 schematically illustrates a plasma processing apparatus according to one exemplary embodiment; FIG. 一つの例示的実施形態に係るプラズマ処理装置のチャンバ内の構成を示す図である。It is a figure which shows the structure in the chamber of the plasma processing apparatus which concerns on one exemplary embodiment. 別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。FIG. 2 schematically illustrates a plasma processing apparatus according to another exemplary embodiment; 更に別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。FIG. 4 schematically illustrates a plasma processing apparatus according to yet another exemplary embodiment; 更に別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。FIG. 4 schematically illustrates a plasma processing apparatus according to yet another exemplary embodiment; 更に別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。FIG. 4 schematically illustrates a plasma processing apparatus according to yet another exemplary embodiment; 実験の結果を示す図である。It is a figure which shows the result of experiment.

 以下、種々の例示的実施形態について説明する。 Various exemplary embodiments are described below.

 一つの例示的実施形態において、プラズマ処理装置が提供される。プラズマ処理装置は、チャンバ、基板支持部、第1の高周波電源、及び第2の高周波電源を備える。基板支持部は、チャンバ内に設けられている。基板支持部は、第1の基台、第2の基台、第1の支持領域、及び第2の支持領域を含む。第1の基台及び第2の基台は、導電性を有する。第2の基台は、第1の基台から離れており、第1の基台の外周を囲むように延在する。第1の支持領域は、誘電体から形成されており、第1の基台の上方に設けられており、その上に載置される基板を支持するように構成されている。第2の支持領域は、誘電体から形成されており、第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成されている。第1の高周波電源は、プラズマ生成用の高周波電力を第1の基台に供給するように構成されている。第2の高周波電源は、プラズマ生成用の高周波電力を第2の基台に供給するように構成されている。 In one exemplary embodiment, a plasma processing apparatus is provided. A plasma processing apparatus includes a chamber, a substrate support, a first RF power supply, and a second RF power supply. A substrate support is provided within the chamber. The substrate support includes a first base, a second base, a first support area, and a second support area. The first base and the second base have conductivity. The second base is separated from the first base and extends to surround the outer periphery of the first base. A first support region is formed from a dielectric material, is disposed above the first base, and is configured to support a substrate placed thereon. A second support region is formed from a dielectric material and is disposed above the second base and configured to support an edge ring resting thereon. The first high-frequency power supply is configured to supply high-frequency power for plasma generation to the first base. The second high frequency power supply is configured to supply high frequency power for plasma generation to the second base.

 上記実施形態では、第1の高周波電源からの高周波電力は、第1の基台、第1の支持領域、及び基板を介してプラズマに供給される。また、第2の高周波電源からの高周波電力は、第2の基台、第2の支持領域、及びエッジリングを介してプラズマに供給される。即ち、基板上でプラズマに供給される高周波電力とエッジリング上でプラズマに供給される高周波電力は、個別に調整可能である。したがって、基板上でプラズマに供給される単位面積当りの高周波電力とエッジリング上でプラズマに供給される単位面積当りの高周波電力の差を低減させることが可能である。故に、上記実施形態によれば、基板に対するプラズマ処理の面内バラツキを抑制することが可能となる。 In the above embodiment, high-frequency power from the first high-frequency power supply is supplied to the plasma through the first base, the first support region, and the substrate. Also, high frequency power from the second high frequency power supply is supplied to the plasma via the second base, the second support region, and the edge ring. That is, the RF power supplied to the plasma on the substrate and the RF power supplied to the plasma on the edge ring can be adjusted independently. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the above embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.

 一つの例示的実施形態において、第2の基台の上面の位置は、第1の基台の上面の位置よりも低くてもよい。第2の支持領域の厚さは、第1の支持領域の厚さよりも薄くてもよい。基板支持部は、第2の支持領域と第2の基台の間、且つ、第2の基台の上面の上に設けられた誘電体部を更に含んでいてもよい。この実施形態では、第1の基台と基板との間の静電容量と第2の基台とエッジリングとの間の静電容量の差が、誘電体部により低減される。 In one exemplary embodiment, the position of the top surface of the second base may be lower than the position of the top surface of the first base. The thickness of the second support region may be less than the thickness of the first support region. The substrate support may further include a dielectric portion provided between the second support region and the second base and on the upper surface of the second base. In this embodiment, the difference in capacitance between the first pedestal and substrate and the second pedestal and edge ring is reduced by the dielectric portion.

 一つの例示的実施形態において、誘電体部は、第2の基台の上面に形成されたセラミックスの溶射膜であってもよい。 In one exemplary embodiment, the dielectric portion may be a thermally sprayed ceramic film formed on the upper surface of the second base.

 一つの例示的実施形態において、第2の支持領域は、接合部材及び誘電体部を介して第2の基台に固定されていてもよい。接合部材は、誘電体部と第2の支持領域との間に設けられ、第2の支持領域を誘電体部に固定する。 In one exemplary embodiment, the second support area may be fixed to the second base through the joining member and the dielectric portion. A bonding member is provided between the dielectric portion and the second support region to secure the second support region to the dielectric portion.

 一つの例示的実施形態において、プラズマ処理装置は、バイアス電源及び調整電源を更に備えていてもよい。バイアス電源は、イオンをプラズマから基板に引き込むためのバイアスエネルギーを第1の基台に供給するように構成されている。調整電源は、エッジリングの上方でプラズマシースの上端の高さ方向の位置を調整するためにエッジリングに電圧を印加するように構成されている。 In one exemplary embodiment, the plasma processing apparatus may further include a bias power supply and a regulated power supply. A bias power supply is configured to supply bias energy to the first pedestal for drawing ions from the plasma to the substrate. The adjustment power supply is configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring.

 一つの例示的実施形態において、第1の基台と第2の基台との間には、バイアスエネルギーの一部を第1の基台から第2の基台に供給するために設けられた誘電体領域が設けられていてもよい。 In one exemplary embodiment, between the first base and the second base is provided for delivering a portion of the bias energy from the first base to the second base. A dielectric region may be provided.

 一つの例示的実施形態において、プラズマ処理装置は、第1のバイアス電源及び第2のバイアス電源を更に備えていてもよい。第1のバイアス電源は、イオンをプラズマから基板に引き込むためのバイアスエネルギーを第1の基台に供給するように構成されている。第2のバイアス電源は、イオンをプラズマからエッジリングに引き込むためのバイアスエネルギーを第2の基台に供給するように構成されている。 In one exemplary embodiment, the plasma processing apparatus may further include a first bias power supply and a second bias power supply. A first bias power supply is configured to supply bias energy to the first pedestal for drawing ions from the plasma to the substrate. A second bias power supply is configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring.

 一つの例示的実施形態において、第2の基台とエッジリングとの間の単位面積当りの静電容量は、第1の基台と基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In one exemplary embodiment, the capacitance per unit area between the second pedestal and the edge ring is 0.00% of the capacitance per unit area between the first pedestal and the substrate. It may be 8 times or more and 1.2 times or less.

 別の例示的実施形態においても、プラズマ処理装置が提供される。プラズマ処理装置は、チャンバ、基板支持部、高周波電源、及びインピーダンス回路を備える。基板支持部は、チャンバ内に設けられている。基板支持部は、第1の基台、第2の基台、第1の支持領域、及び第2の支持領域を含む。第1の基台及び第2の基台は、導電性を有する。第2の基台は、第1の基台から離れており、第1の基台の外周を囲むように延在する。第1の支持領域は、誘電体から形成されており、第1の基台の上方に設けられており、その上に載置される基板を支持するように構成されている。第2の支持領域は、誘電体から形成されており、第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成されている。高周波電源は、第1の基台及び第2の基台に電気的に結合されており、プラズマ生成用の高周波電力を発生するように構成されている。インピーダンス回路は、高周波電源と第1の基台又は第2の基台との間で接続されている。 A plasma processing apparatus is also provided in another exemplary embodiment. A plasma processing apparatus includes a chamber, a substrate support, a high frequency power supply, and an impedance circuit. A substrate support is provided within the chamber. The substrate support includes a first base, a second base, a first support area, and a second support area. The first base and the second base have conductivity. The second base is separated from the first base and extends to surround the outer periphery of the first base. A first support region is formed from a dielectric material, is disposed above the first base, and is configured to support a substrate placed thereon. A second support region is formed from a dielectric material and is disposed above the second base and configured to support an edge ring resting thereon. A radio frequency power source is electrically coupled to the first base and the second base and is configured to generate radio frequency power for plasma generation. An impedance circuit is connected between the high frequency power source and the first base or the second base.

 上記実施形態では、基板上でプラズマに供給される高周波電力とエッジリング上でプラズマに供給される高周波電力は、インピーダンス回路により調整可能である。したがって、基板上でプラズマに供給される単位面積当りの高周波電力とエッジリング上でプラズマに供給される単位面積当りの高周波電力の差を低減させることが可能である。故に、上記実施形態によれば、基板に対するプラズマ処理の面内バラツキを抑制することが可能となる。 In the above embodiment, the high frequency power supplied to the plasma on the substrate and the high frequency power supplied to the plasma on the edge ring can be adjusted by the impedance circuit. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the above embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.

 一つの例示的実施形態において、プラズマ処理装置は、第1のバイアス電源及び第2のバイアス電源を更に備えていてもよい。第1のバイアス電源は、イオンをプラズマから基板に引き込むためのバイアスエネルギーを第1の基台に供給するように構成されている。第2のバイアス電源は、イオンをプラズマからエッジリングに引き込むためのバイアスエネルギーを第2の基台に供給するように構成されている。 In one exemplary embodiment, the plasma processing apparatus may further include a first bias power supply and a second bias power supply. A first bias power supply is configured to supply bias energy to the first pedestal for drawing ions from the plasma to the substrate. A second bias power supply is configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring.

 一つの例示的実施形態において、プラズマ処理装置は、バイアス電源及び別のインピーダンス回路を更に備えていてもよい。バイアス電源は、イオンをプラズマから基板及びエッジリングに引き込むためのバイアスエネルギーを発生するように構成されている。インピーダンス回路は、バイアス電源と第1の基台又は第2の基台との間で接続されている。 In one exemplary embodiment, the plasma processing apparatus may further comprise a bias power supply and another impedance circuit. A bias power supply is configured to generate bias energy for drawing ions from the plasma to the substrate and edge ring. An impedance circuit is connected between the bias power supply and the first base or the second base.

 一つの例示的実施形態において、高周波電源とエッジリングとの間の単位面積当りの静電容量は、高周波電源と基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In one exemplary embodiment, the capacitance per unit area between the RF power supply and the edge ring is at least 0.8 times the capacitance per unit area between the RF power supply and the substrate,1. It may be twice or less.

 更に別の例示的実施形態においても、プラズマ処理装置が提供される。プラズマ処理装置は、チャンバ、基板支持部、高周波電源、及び調整電源を備える。基板支持部は、チャンバ内に設けられている。基板支持部は、基台、第1の支持領域、及び第2の支持領域を含む。基台は、第1の部分と該第1の部分の外側で周方向に延在する第2の部分を有する。第1の支持領域は、誘電体から形成されており、第1の部分の上方に設けられており、その上に載置される基板を支持するように構成されている。第2の支持領域は、誘電体から形成されており、第2の部分の上方に設けられており、その上に載置されるエッジリングを支持するように構成されている。高周波電源は、プラズマ生成用の高周波電力を基台に供給するように構成されている。調整電源は、エッジリングの上方でプラズマシースの上端の高さ方向の位置を調整するためにエッジリングに電圧を印加するように構成されている。第2の部分の上面の位置は、第1の部分の上面の位置よりも低い。第2の支持領域の厚さは、第1の支持領域の厚さよりも薄い。基板支持部は、第2の支持領域と第2の部分の間、且つ、第2の部分の上面の上に設けられた誘電体部を更に含んでいる。 A plasma processing apparatus is also provided in yet another exemplary embodiment. A plasma processing apparatus includes a chamber, a substrate support, a radio frequency power supply, and a regulated power supply. A substrate support is provided within the chamber. The substrate support includes a base, a first support area, and a second support area. The base has a first portion and a second portion extending circumferentially outside the first portion. A first support region is formed from a dielectric material, overlies the first portion, and is configured to support a substrate resting thereon. A second support region is formed from a dielectric material and overlies the second portion and is configured to support an edge ring resting thereon. The high frequency power supply is configured to supply high frequency power for plasma generation to the base. The adjustment power supply is configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring. The position of the top surface of the second portion is lower than the position of the top surface of the first portion. The thickness of the second support region is less than the thickness of the first support region. The substrate support further includes a dielectric portion disposed between the second support region and the second portion and on top of the second portion.

 調整電源は、基台及び第2の支持領域を含まない電気的パスを介してエッジリングに電圧を印加し得る。 A regulated power supply may apply voltage to the edge ring via an electrical path that does not include the base and the second support area.

 上記実施形態では、高周波電源からの高周波電力は、第1の部分、第1の支持領域、及び基板を介してプラズマに供給され、第2の部分、第2の支持領域、及びエッジリングを介してプラズマに供給される。この実施形態では、第1の部分と基板との間の静電容量と第2の部分とエッジリングとの間の静電容量の差が、誘電体部により低減される。したがって、基板上でプラズマに供給される単位面積当りの高周波電力とエッジリング上でプラズマに供給される単位面積当りの高周波電力の差を低減させることが可能である。故に、上記実施形態によれば、基板に対するプラズマ処理の面内バラツキを抑制することが可能となる。 In the above embodiment, RF power from the RF power source is supplied to the plasma through the first portion, the first support region, and the substrate, and through the second portion, the second support region, and the edge ring. supplied to the plasma. In this embodiment, the difference in capacitance between the first portion and the substrate and between the second portion and the edge ring is reduced by the dielectric portion. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the above embodiment, it is possible to suppress in-plane variations in the plasma processing of the substrate.

 一つの例示的実施形態において、誘電体部は、第2の部分の上面に形成されたセラミックスの溶射膜であってもよい。 In one exemplary embodiment, the dielectric portion may be a thermally sprayed ceramic film formed on the upper surface of the second portion.

 一つの例示的実施形態において、第2の支持領域は、接合部材及び誘電体部を介して第2の部分に固定されていてもよい。接合部材は、誘電体部と第2の支持領域との間に設けられており、第2の支持領域を誘電体部に固定する。 In one exemplary embodiment, the second support region may be fixed to the second portion via the joining member and the dielectric portion. A joining member is provided between the dielectric portion and the second support region, and fixes the second support region to the dielectric portion.

 一つの例示的実施形態において、プラズマ処理装置は、バイアス電源を更に備えていてもよい。バイアス電源は、イオンをプラズマから基板及びエッジリングに引き込むためのバイアスエネルギーを基台に供給するように構成されている。 In one exemplary embodiment, the plasma processing apparatus may further include a bias power supply. A bias power supply is configured to provide bias energy to the pedestal for drawing ions from the plasma to the substrate and edge ring.

 一つの例示的実施形態において、第2の部分とエッジリングとの間の単位面積当りの静電容量は、第1の部分と基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In one exemplary embodiment, the capacitance per unit area between the second portion and the edge ring is 0.8 times the capacitance per unit area between the first portion and the substrate. It may be greater than or equal to 1.2 times or less.

 上述した種々の例示的実施形態において、第1の支持領域及び第2の支持領域は、互いから分離された別個の静電チャックであってもよい。或いは、第1の支持領域及び第2の支持領域は、互いに一体化されており、単一の静電チャックを構成していてもよい。 In the various exemplary embodiments described above, the first support area and the second support area may be separate electrostatic chucks separated from each other. Alternatively, the first support region and the second support region may be integrated together to form a single electrostatic chuck.

 以下、図面を参照して種々の例示的実施形態について詳細に説明する。なお、各図面において同一又は相当の部分に対しては同一の符号を附すこととする。 Various exemplary embodiments are described in detail below with reference to the drawings. In addition, suppose that the same code|symbol is attached|subjected to the part which is the same or equivalent in each drawing.

 図1は、一つの例示的実施形態に係るプラズマ処理装置を概略的に示す図である。図1に示すプラズマ処理装置1は、チャンバ10を備えている。図2は、一つの例示的実施形態に係るプラズマ処理装置のチャンバ内の構成を示す図である。図2に示すように、プラズマ処理装置1は、容量結合型のプラズマ処理装置であり得る。 FIG. 1 is a diagram schematically showing a plasma processing apparatus according to one exemplary embodiment. A plasma processing apparatus 1 shown in FIG. 1 includes a chamber 10 . FIG. 2 is a diagram showing the configuration inside the chamber of the plasma processing apparatus according to one exemplary embodiment. As shown in FIG. 2, the plasma processing apparatus 1 may be a capacitively coupled plasma processing apparatus.

 チャンバ10は、その中に内部空間10sを提供している。内部空間10sの中心軸線は、鉛直方向に延びる軸線AXである。一実施形態において、チャンバ10は、チャンバ本体12を含んでいる。チャンバ本体12は、略円筒形状を有している。内部空間10sは、チャンバ本体12の中に提供されている。チャンバ本体12は、例えばアルミニウムから形成されている。チャンバ本体12は電気的に接地されている。チャンバ本体12の内壁面、即ち内部空間10sを画成する壁面には、耐プラズマ性を有する膜が形成されている。この膜は、陽極酸化処理によって形成された膜又は酸化イットリウムから形成された膜といったセラミック製の膜であり得る。 The chamber 10 provides an internal space 10s therein. The center axis of the internal space 10s is the axis AX extending in the vertical direction. In one embodiment, chamber 10 includes a chamber body 12 . The chamber body 12 has a substantially cylindrical shape. An interior space 10 s is provided within the chamber body 12 . The chamber body 12 is made of aluminum, for example. The chamber body 12 is electrically grounded. A plasma-resistant film is formed on the inner wall surface of the chamber main body 12, that is, on the wall surface defining the internal space 10s. The membrane can be a ceramic membrane, such as a membrane formed by an anodizing process or a membrane formed from yttrium oxide.

 チャンバ本体12の側壁には通路12pが形成されている。基板Wは、内部空間10sとチャンバ10の外部との間で搬送されるときに、通路12pを通過する。この通路12pの開閉のために、ゲートバルブ12gがチャンバ本体12の側壁に沿って設けられている。 A passage 12p is formed in the side wall of the chamber main body 12. The substrate W passes through the passage 12p when being transported between the interior space 10s and the outside of the chamber 10. As shown in FIG. A gate valve 12g is provided along the side wall of the chamber body 12 for opening and closing the passage 12p.

 プラズマ処理装置1は、基板支持部16を更に備える。基板支持部16は、チャンバ10の中で、その上に載置された基板Wを支持するように構成されている。基板Wは、略円盤形状を有する。基板支持部16は、支持部17によって支持されていてもよい。支持部17は、チャンバ本体12の底部から上方に延在している。支持部17は、略円筒形状を有している。支持部17は、石英といった絶縁材料から形成されている。 The plasma processing apparatus 1 further includes a substrate support section 16 . The substrate support 16 is configured to support a substrate W placed thereon within the chamber 10 . The substrate W has a substantially disk shape. The substrate support portion 16 may be supported by the support portion 17 . The support portion 17 extends upward from the bottom portion of the chamber body 12 . The support portion 17 has a substantially cylindrical shape. The support portion 17 is made of an insulating material such as quartz.

 基板支持部16は、その上に載置されるエッジリングERを更に支持するように構成されている。エッジリングERは、略環形状を有する板である。エッジリングERは、導電性を有していてもよい。エッジリングERは、例えばシリコン又は炭化ケイ素から形成されている。基板Wは、チャンバ10内において、基板支持部16上且つエッジリングERによって囲まれた領域内に配置される。基板W及びエッジリングERは、それらの中心軸線が軸線AXに一致するように基板支持部16上に搭載される。 The substrate support portion 16 is configured to further support the edge ring ER placed thereon. The edge ring ER is a plate having a substantially ring shape. The edge ring ER may have conductivity. The edge ring ER is made of silicon or silicon carbide, for example. A substrate W is placed in the chamber 10 on the substrate support 16 and within the area surrounded by the edge ring ER. The substrate W and edge ring ER are mounted on the substrate support 16 such that their central axes coincide with the axis AX.

 プラズマ処理装置1は、外周部28及び外周部29を更に備えていてもよい。外周部28は、チャンバ本体12の底部から上方に延在している。外周部28は、略円筒形状を有し、支持部17の外周に沿って延在している。外周部28は、導電性材料から形成されており、略円筒形状を有している。外周部28は、電気的に接地されている。外周部28の表面には、耐プラズマ性を有する膜が形成されている。この膜は、陽極酸化処理によって形成された膜又は酸化イットリウムから形成された膜といったセラミック製の膜であり得る。 The plasma processing apparatus 1 may further include an outer peripheral portion 28 and an outer peripheral portion 29 . The outer peripheral portion 28 extends upward from the bottom of the chamber body 12 . The outer peripheral portion 28 has a substantially cylindrical shape and extends along the outer periphery of the support portion 17 . The outer peripheral portion 28 is made of a conductive material and has a substantially cylindrical shape. The outer peripheral portion 28 is electrically grounded. A plasma-resistant film is formed on the surface of the outer peripheral portion 28 . The membrane can be a ceramic membrane, such as a membrane formed by an anodizing process or a membrane formed from yttrium oxide.

 外周部29は、外周部28上に設けられている。外周部29は、絶縁性を有する材料から形成されている。外周部29は、例えば石英といったセラミックから形成されている。外周部29は、略円筒形状を有している。外周部29は、基板支持部16の外周に沿って延在している。 The outer peripheral portion 29 is provided on the outer peripheral portion 28 . The outer peripheral portion 29 is made of an insulating material. The outer peripheral portion 29 is made of ceramic such as quartz. The outer peripheral portion 29 has a substantially cylindrical shape. The outer peripheral portion 29 extends along the outer periphery of the substrate support portion 16 .

 プラズマ処理装置1は、上部電極30を更に備えている。上部電極30は、基板支持部16の上方に設けられている。上部電極30は、部材32と共にチャンバ本体12の上部開口を閉じている。部材32は、絶縁性を有している。上部電極30は、この部材32を介してチャンバ本体12の上部に支持されている。 The plasma processing apparatus 1 further includes an upper electrode 30. The upper electrode 30 is provided above the substrate support portion 16 . The upper electrode 30 closes the upper opening of the chamber body 12 together with the member 32 . The member 32 has insulation. The upper electrode 30 is supported above the chamber body 12 via this member 32 .

 上部電極30は、天板34及び支持体36を含んでいてもよい。天板34の下面は、内部空間10sを画成している。天板34は、複数のガス孔34aを提供している。複数のガス孔34aの各々は、天板34を板厚方向(鉛直方向)に貫通している。複数のガス孔34aは、内部空間10sに向けて開口している。天板34は、例えばシリコンから形成されている。或いは、天板34は、アルミニウム製の部材の表面に耐プラズマ性の膜を設けた構造を有し得る。この膜は、陽極酸化処理によって形成された膜又は酸化イットリウムから形成された膜といったセラミック製の膜であり得る。 The upper electrode 30 may include a top plate 34 and a support 36. A lower surface of the top plate 34 defines an internal space 10s. The top plate 34 provides a plurality of gas holes 34a. Each of the plurality of gas holes 34a penetrates the top plate 34 in the plate thickness direction (vertical direction). The plurality of gas holes 34a are open toward the internal space 10s. The top plate 34 is made of silicon, for example. Alternatively, the top plate 34 may have a structure in which a plasma-resistant film is provided on the surface of an aluminum member. The membrane can be a ceramic membrane, such as a membrane formed by an anodizing process or a membrane formed from yttrium oxide.

 支持体36は、天板34を着脱自在に支持している。支持体36は、例えばアルミニウムといった導電性材料から形成されている。支持体36は、その内部においてガス拡散室36aを提供している。支持体36は、複数のガス孔36bを更に提供している。複数のガス孔36bは、ガス拡散室36aから下方に延びている。複数のガス孔36bは、複数のガス孔34aにそれぞれ連通している。支持体36は、ガス導入ポート36cを更に提供している。ガス導入ポート36cは、ガス拡散室36aに接続している。ガス導入ポート36cには、ガス供給管38が接続されている。 The support 36 detachably supports the top plate 34 . The support 36 is made of a conductive material such as aluminum. The support 36 provides a gas diffusion chamber 36a therein. Support 36 further provides a plurality of gas holes 36b. A plurality of gas holes 36b extend downward from the gas diffusion chamber 36a. The multiple gas holes 36b communicate with the multiple gas holes 34a, respectively. Support 36 further provides gas inlet port 36c. The gas introduction port 36c is connected to the gas diffusion chamber 36a. A gas supply pipe 38 is connected to the gas introduction port 36c.

 ガス供給管38には、ガスソース群40が、バルブ群41、流量制御器群42、及びバルブ群43を介して接続されている。ガスソース群40、バルブ群41、流量制御器群42、及びバルブ群43は、ガス供給部を構成している。ガスソース群40は、複数のガスソースを含んでいる。バルブ群41及びバルブ群43の各々は、複数のバルブ(例えば開閉バルブ)を含んでいる。流量制御器群42は、複数の流量制御器を含んでいる。流量制御器群42の複数の流量制御器の各々は、マスフローコントローラ又は圧力制御式の流量制御器である。ガスソース群40の複数のガスソースの各々は、バルブ群41の対応のバルブ、流量制御器群42の対応の流量制御器、及びバルブ群43の対応のバルブを介して、ガス供給管38に接続されている。プラズマ処理装置1は、ガスソース群40の複数のガスソースのうち選択された一つ以上のガスソースからのガスを、個別に調整された流量で、内部空間10sに供給することが可能である。 A gas source group 40 is connected to the gas supply pipe 38 via a valve group 41 , a flow controller group 42 , and a valve group 43 . The gas source group 40, the valve group 41, the flow controller group 42, and the valve group 43 constitute a gas supply section. Gas source group 40 includes a plurality of gas sources. Each of the valve group 41 and the valve group 43 includes a plurality of valves (eg open/close valves). The flow controller group 42 includes a plurality of flow controllers. Each of the plurality of flow controllers in the flow controller group 42 is a mass flow controller or a pressure-controlled flow controller. Each of the plurality of gas sources of the gas source group 40 is connected to the gas supply pipe 38 via a corresponding valve of the valve group 41, a corresponding flow controller of the flow controller group 42, and a corresponding valve of the valve group 43. It is connected. The plasma processing apparatus 1 is capable of supplying gas from one or more gas sources selected from a plurality of gas sources in the gas source group 40 to the internal space 10s at individually adjusted flow rates. .

 外周部28とチャンバ本体12の側壁との間には、バッフルプレート48が設けられている。バッフルプレート48は、例えば、アルミニウム製の部材に酸化イットリウム等のセラミックを被覆することにより構成され得る。バッフルプレート48には、多数の貫通孔が形成されている。バッフルプレート48の下方においては、排気管52がチャンバ本体12の底部に接続されている。この排気管52には、排気装置50が接続されている。排気装置50は、自動圧力制御弁といった圧力制御器、及び、ターボ分子ポンプなどの真空ポンプを有しており、内部空間10sの中の圧力を減圧することができる。 A baffle plate 48 is provided between the outer peripheral portion 28 and the side wall of the chamber body 12 . The baffle plate 48 can be configured by coating an aluminum member with ceramic such as yttrium oxide, for example. A large number of through holes are formed in the baffle plate 48 . An exhaust pipe 52 is connected to the bottom of the chamber body 12 below the baffle plate 48 . An exhaust device 50 is connected to the exhaust pipe 52 . The evacuation device 50 has a pressure controller such as an automatic pressure control valve and a vacuum pump such as a turbomolecular pump, and can reduce the pressure in the internal space 10s.

 一実施形態においては、プラズマ処理装置1は、制御部MCを更に備えていてもよい。制御部MCは、プロセッサ、記憶装置、入力装置、表示装置等を備えるコンピュータであり、プラズマ処理装置1の各部を制御する。具体的に、制御部MCは、記憶装置に記憶されている制御プログラムを実行し、当該記憶装置に記憶されているレシピデータに基づいてプラズマ処理装置1の各部を制御する。制御部MCによる制御により、レシピデータによって指定されたプロセスがプラズマ処理装置1において実行される。 In one embodiment, the plasma processing apparatus 1 may further include a controller MC. The controller MC is a computer including a processor, storage device, input device, display device, etc., and controls each part of the plasma processing apparatus 1 . Specifically, the controller MC executes a control program stored in the storage device, and controls each part of the plasma processing apparatus 1 based on the recipe data stored in the storage device. A process specified by the recipe data is executed in the plasma processing apparatus 1 under the control of the controller MC.

 以下、基板支持部16について詳細に説明する。図1に示すように、基板支持部16は、第1の基台181、第2の基台182、第1の支持領域201、及び第2の支持領域202を含む。 The substrate support portion 16 will be described in detail below. As shown in FIG. 1, the substrate support 16 includes a first base 181, a second base 182, a first support area 201, and a second support area 202. As shown in FIG.

 第1の基台181及び第2の基台182は、導電性を有する。第1の基台181及び第2の基台182は、アルミニウムのような導電性材料から形成されていてもよい。第1の基台181は、略円盤形状を有している。第1の基台181の中心軸線は、軸線AXと略一致する。第2の基台182は、第1の基台181から離れており、第1の基台181の外周を囲むように延在する。第2の基台182は、平面視では略環形状を有し得る。第2の基台182の中心軸線は、軸線AXと略一致する。第2の基台182の上面の高さ方向の位置は、第1の基台181の上面の高さ方向の位置よりも低くてもよい。 The first base 181 and the second base 182 are conductive. The first base 181 and the second base 182 may be made of a conductive material such as aluminum. The first base 181 has a substantially disk shape. The central axis of the first base 181 substantially coincides with the axis AX. The second base 182 is separated from the first base 181 and extends to surround the outer circumference of the first base 181 . The second base 182 may have a substantially ring shape in plan view. The central axis of the second base 182 substantially coincides with the axis AX. The position of the upper surface of the second base 182 in the height direction may be lower than the position of the upper surface of the first base 181 in the height direction.

 第1の支持領域201は、誘電体から形成されている。第1の支持領域201は、第1の基台181の上方に設けられている。第1の支持領域201は、その上に載置される基板Wを支持するように構成されている。第1の支持領域201は、接着剤のような接合部材191を介して第1の基台181の上面に固定されていてもよい。 The first support region 201 is made of a dielectric. The first support area 201 is provided above the first base 181 . The first support area 201 is configured to support a substrate W placed thereon. The first support area 201 may be fixed to the top surface of the first base 181 via a bonding member 191 such as an adhesive.

 第1の支持領域201は、本体201m及びチャック電極201aを含んでいてもよい。本体201mは、酸化アルミニウム、窒化アルミニウムのような誘電体から形成されている。本体201mは、略円盤形状を有している。本体201mの中心軸線は、軸線AXと略一致する。 The first support region 201 may include a body 201m and a chuck electrode 201a. Body 201m is made of a dielectric such as aluminum oxide or aluminum nitride. The main body 201m has a substantially disk shape. The central axis of the main body 201m substantially coincides with the axis AX.

 チャック電極201aは、本体201mの中に設けられている。チャック電極201aは、導電性材料から形成された膜であり得る。チャック電極201aは、略円形の平面形状を有し得る。チャック電極201aの中心は、軸線AX上に位置している。チャック電極201aは、スイッチ51sを介して直流電源51pに接続されている。直流電源51pからの直流電圧がチャック電極201aに印加されると、第1の支持領域201と基板Wとの間で静電引力が発生する。発生した静電引力により、基板Wは第1の支持領域201に引き付けられて、第1の支持領域201によって保持される。 The chuck electrode 201a is provided inside the main body 201m. The chuck electrode 201a can be a membrane made of a conductive material. The chuck electrode 201a can have a substantially circular planar shape. The center of the chuck electrode 201a is positioned on the axis AX. The chuck electrode 201a is connected to a DC power supply 51p via a switch 51s. When the DC voltage from the DC power supply 51p is applied to the chuck electrode 201a, electrostatic attraction is generated between the first support region 201 and the substrate W. As shown in FIG. Due to the generated electrostatic attraction, the substrate W is attracted to the first support area 201 and held by the first support area 201 .

 第2の支持領域202は、誘電体から形成されている。第2の支持領域202は、第2の基台182の上方に設けられている。第2の支持領域202は、その上に載置されるエッジリングERを支持するように構成されている。第2の支持領域202は、接着剤のような接合部材192を介して第2の基台182の上面又は後述する誘電体部22の上面に固定されていてもよい。 The second support region 202 is made of a dielectric. A second support area 202 is provided above the second base 182 . The second support area 202 is configured to support an edge ring ER resting thereon. The second support region 202 may be fixed to the top surface of the second base 182 or the top surface of the dielectric section 22 described below via a bonding member 192 such as an adhesive.

 第2の支持領域202は、本体202m、チャック電極202a、及びチャック電極202bを含んでいてもよい。本体202mは、酸化アルミニウム、窒化アルミニウムのような誘電体から形成されている。本体202mは、第1の支持領域201を囲むように周方向に延在している。本体202mは、略環形状を有し得る。本体202mの中心軸線は、軸線AXと略一致する。 The second support region 202 may include a body 202m, a chuck electrode 202a, and a chuck electrode 202b. Body 202m is formed from a dielectric such as aluminum oxide or aluminum nitride. The body 202m extends circumferentially to surround the first support area 201 . Body 202m may have a generally annular shape. A central axis of the main body 202m substantially coincides with the axis AX.

 チャック電極202a及び202bは、本体202mの中に設けられている。チャック電極202a及び202bの各々は、導電性材料から形成された膜であり得る。チャック電極202a及び202bは、軸線AXの周りで周方向に延在している。チャック電極202bは、チャック電極202aの外側で延在している。チャック電極202a及び202bは、略環形状を有し得る。チャック電極202a及び202bの各々の中心は、軸線AX上に位置している。チャック電極202aは、スイッチ521sを介して直流電源521pに接続されている。チャック電極202bは、スイッチ522sを介して直流電源522pに接続されている。直流電源521p及び522pからの直流電圧がチャック電極202a及び202bにそれぞれ印加されると、第2の支持領域202とエッジリングERとの間で静電引力が発生する。発生した静電引力により、エッジリングERは第2の支持領域202に引き付けられて、第2の支持領域202によって保持される。 The chuck electrodes 202a and 202b are provided in the main body 202m. Each of chuck electrodes 202a and 202b can be a membrane formed from a conductive material. The chuck electrodes 202a and 202b extend circumferentially around the axis AX. Chuck electrode 202b extends outside of chuck electrode 202a. Chuck electrodes 202a and 202b may have a generally annular shape. The center of each of chuck electrodes 202a and 202b is located on axis AX. The chuck electrode 202a is connected to a DC power supply 521p via a switch 521s. The chuck electrode 202b is connected to a DC power supply 522p via a switch 522s. When DC voltages from DC power sources 521p and 522p are applied to chuck electrodes 202a and 202b, respectively, electrostatic attraction is generated between second support region 202 and edge ring ER. Due to the generated electrostatic attraction, the edge ring ER is attracted to the second support area 202 and held by the second support area 202 .

 プラズマ処理装置1は、第1の高周波電源61及び第2の高周波電源62を更に備える。第1の高周波電源61は、プラズマ生成用の高周波電力を第1の基台181に供給するように構成されている。第1の高周波電源61は、整合器61mを介して第1の基台181に電気的に接続されている。第1の高周波電源61が発生する高周波電力は、27~100MHzの範囲内の周波数、例えば40MHz又は60MHzの周波数を有する。整合器61mは、第1の高周波電源61の負荷のインピーダンスを第1の高周波電源61の出力インピーダンスに整合させるための整合回路を有している。 The plasma processing apparatus 1 further includes a first high frequency power supply 61 and a second high frequency power supply 62 . The first high-frequency power supply 61 is configured to supply high-frequency power for plasma generation to the first base 181 . The first high frequency power supply 61 is electrically connected to the first base 181 via a matching box 61m. The high-frequency power generated by the first high-frequency power supply 61 has a frequency within the range of 27-100 MHz, eg, 40 MHz or 60 MHz. The matching unit 61m has a matching circuit for matching the load impedance of the first high frequency power supply 61 with the output impedance of the first high frequency power supply 61 .

 第2の高周波電源62は、プラズマ生成用の高周波電力を第2の基台182に供給するように構成されている。第2の高周波電源62は、整合器62mを介して第2の基台182に電気的に接続されている。第2の高周波電源62が発生する高周波電力は、第1の高周波電源61が発生する高周波電力の周波数と同じ周波数を有し得る。整合器62mは、第2の高周波電源62の負荷のインピーダンスを第2の高周波電源62の出力インピーダンスに整合させるための整合回路を有している。 The second high-frequency power supply 62 is configured to supply high-frequency power for plasma generation to the second base 182 . The second high frequency power supply 62 is electrically connected to the second base 182 via a matching box 62m. The high frequency power generated by the second high frequency power supply 62 can have the same frequency as the frequency of the high frequency power generated by the first high frequency power supply 61 . The matching device 62m has a matching circuit for matching the impedance of the load of the second high frequency power supply 62 with the output impedance of the second high frequency power supply 62 .

 プラズマ処理装置1では、第1の高周波電源61からの高周波電力及び第2の高周波電源62からの高周波電力によりチャンバ10内で高周波電界が生成される。チャンバ10内のガスは、生成された高周波電界により励起される。その結果、プラズマが、チャンバ10内で生成される。基板Wは、生成されたプラズマからのイオン及び/又はラジカルといった化学種により処理される。例えば、基板Wは、プラズマからの化学種によりエッチングされる。 In the plasma processing apparatus 1 , high-frequency electric fields are generated in the chamber 10 by the high-frequency power from the first high-frequency power supply 61 and the high-frequency power from the second high-frequency power supply 62 . The gas within chamber 10 is excited by the generated high frequency electric field. As a result, a plasma is generated within chamber 10 . The substrate W is treated with chemical species such as ions and/or radicals from the generated plasma. For example, the substrate W is etched by species from the plasma.

 プラズマ処理装置1は、バイアス電源71を更に備えていてもよい。バイアス電源71は、第1の基台181に電気的に接続されている。バイアス電源71は、基板Wにイオンを引き込むために用いられるバイアスエネルギーを発生する。バイアスエネルギーは、バイアス周波数を有する。バイアス周波数は、50kHz~13.56MHzの範囲内の周波数であり得る。 The plasma processing apparatus 1 may further include a bias power supply 71. A bias power supply 71 is electrically connected to the first base 181 . A bias power supply 71 generates the bias energy used to attract ions to the substrate W. FIG. The bias energy has a bias frequency. The bias frequency can be a frequency within the range of 50 kHz to 13.56 MHz.

 一実施形態において、バイアスエネルギーは、バイアス周波数を有する高周波バイアス電力であってもよい。この実施形態において、バイアス電源71は、整合器71mを介して第1の基台181に電気的に接続される。整合器71mは、バイアス電源71の負荷のインピーダンスをバイアス電源71の出力インピーダンスに整合させるための整合回路を有している。 In one embodiment, the bias energy may be radio frequency bias power having a bias frequency. In this embodiment, the bias power supply 71 is electrically connected to the first base 181 via a matching device 71m. The matching unit 71m has a matching circuit for matching the impedance of the load of the bias power supply 71 with the output impedance of the bias power supply 71 .

 別の実施形態において、バイアスエネルギーは、電圧のパルスであってもよい。電圧のパルスは、バイアス周波数の逆数である時間長を有する時間間隔(即ちバイアス周期)で周期的に発生されて、第1の基台181に印加される。電圧のパルスは、負の電圧のパルス又は負の直流電圧のパルスであってもよい。電圧のパルスは、矩形波、三角波のように任意の波形を有していてもよい。 In another embodiment, the bias energy may be a pulse of voltage. Pulses of voltage are generated and applied to the first base 181 periodically at intervals of time (ie, bias period) having a time length that is the reciprocal of the bias frequency. The voltage pulse may be a negative voltage pulse or a negative DC voltage pulse. The voltage pulse may have any waveform such as a square wave or a triangular wave.

 プラズマ処理装置1では、第1の高周波電源61からの高周波電力は、第1の基台181、第1の支持領域201、及び基板Wを介してプラズマに供給される。また、第2の高周波電源62からの高周波電力は、第2の基台182、第2の支持領域202、及びエッジリングERを介してプラズマに供給される。即ち、プラズマ処理装置1では、基板W上でプラズマに供給される高周波電力とエッジリングER上でプラズマに供給される高周波電力は、個別に調整可能である。したがって、基板W上でプラズマに供給される単位面積当りの高周波電力とエッジリング上でプラズマに供給される単位面積当りの高周波電力の差を低減させることが可能である。故に、プラズマ処理装置1によれば、基板Wに対するプラズマ処理の面内バラツキを抑制することが可能となる。 In the plasma processing apparatus 1, high-frequency power from the first high-frequency power supply 61 is supplied to the plasma through the first base 181, the first support region 201, and the substrate W. Also, high frequency power from the second high frequency power supply 62 is supplied to the plasma via the second base 182, the second support region 202, and the edge ring ER. That is, in the plasma processing apparatus 1, the high frequency power supplied to the plasma on the substrate W and the high frequency power supplied to the plasma on the edge ring ER can be individually adjusted. Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring. Therefore, according to the plasma processing apparatus 1, it is possible to suppress in-plane variations in the plasma processing of the substrate W. FIG.

 図1に示すように、一実施形態において、第2の基台182の上面の位置は、第1の基台181の上面の位置よりも低くてもよい。第2の支持領域202の厚さは、第1の支持領域201の厚さよりも薄くてもよい。基板支持部16は、誘電体部22を更に含んでいてもよい。誘電体部22は、第2の支持領域202と第2の基台182の間、且つ、第2の基台182の上面の上に設けられている。誘電体部22は、酸化アルミニウム、窒化アルミニウムのような誘電体から形成されている。誘電体部22は、第2の基台182の上面に形成されたセラミックスの溶射膜であってもよい。この実施形態では、第1の基台181と基板Wとの間の静電容量と第2の基台182とエッジリングERとの間の静電容量の差が、誘電体部22により低減される。 As shown in FIG. 1, in one embodiment, the position of the top surface of the second base 182 may be lower than the position of the top surface of the first base 181 . The thickness of the second support region 202 may be thinner than the thickness of the first support region 201 . The substrate support portion 16 may further include a dielectric portion 22 . The dielectric portion 22 is provided between the second support region 202 and the second base 182 and on the upper surface of the second base 182 . Dielectric portion 22 is made of a dielectric such as aluminum oxide or aluminum nitride. The dielectric portion 22 may be a thermally sprayed ceramic film formed on the upper surface of the second base 182 . In this embodiment, the difference in capacitance between the first base 181 and the substrate W and the second base 182 and the edge ring ER is reduced by the dielectric portion 22. be.

 一実施形態において、プラズマ処理装置1は、調整電源80を更に備えていてもよい。調整電源80は、エッジリングERの上方でプラズマシースの上端の高さ方向の位置を調整するためにエッジリングERに電圧を印加するように構成されている。 In one embodiment, the plasma processing apparatus 1 may further include a regulated power supply 80. The adjustment power supply 80 is configured to apply a voltage to the edge ring ER to adjust the heightwise position of the upper end of the plasma sheath above the edge ring ER.

 一実施形態において、誘電体領域24が、第1の基台181と第2の基台182との間に設けられていてもよい。誘電体領域24は、誘電体から形成されている。誘電体領域24は、バイアスエネルギーの一部を第1の基台181から第2の基台182に供給するために設けられている。即ち、第1の基台181と第2の基台182は、誘電体領域24を介して容量結合されている。 In one embodiment, a dielectric region 24 may be provided between the first base 181 and the second base 182 . Dielectric region 24 is formed of a dielectric. Dielectric region 24 is provided to deliver a portion of the bias energy from first base 181 to second base 182 . That is, the first base 181 and the second base 182 are capacitively coupled via the dielectric region 24 .

 一実施形態において、第2の基台182とエッジリングERとの間の単位面積当りの静電容量は、第1の基台181と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。この実施形態によれば、基板W上でプラズマに供給される単位面積当りの高周波電力とエッジリング上でプラズマに供給される単位面積当りの高周波電力の差を更に低減させることが可能である。 In one embodiment, the capacitance per unit area between the second pedestal 182 and the edge ring ER is less than the capacitance per unit area between the first pedestal 181 and the substrate W. It may be 0.8 times or more and 1.2 times or less. According to this embodiment, it is possible to further reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring.

 なお、図1に示す例では、第1の支持領域201及び第2の支持領域202は、互いから分離された別個の静電チャックである。しかしながら、第1の支持領域201及び第2の支持領域202は、互いに一体化されていてもよく、単一の静電チャックを構成していてもよい。 Note that in the example shown in FIG. 1, the first support area 201 and the second support area 202 are separate electrostatic chucks separated from each other. However, the first support region 201 and the second support region 202 may be integrated together and form a single electrostatic chuck.

 以下、図3を参照する。図3は、別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。以下、図3に示すプラズマ処理装置1Bのプラズマ処理装置1に対する相違点について説明する。 See Figure 3 below. FIG. 3 is a schematic diagram of a plasma processing apparatus according to another exemplary embodiment. Differences of the plasma processing apparatus 1B shown in FIG. 3 from the plasma processing apparatus 1 will be described below.

 プラズマ処理装置1Bは、バイアス電源72を更に備えている。バイアス電源72(第2のバイアス電源)は、バイアス電源71(第1のバイアス電源)によって発生されるバイアスエネルギーと同様のバイアスエネルギーを発生する。バイアス電源72は、第2の基台182に電気的に接続されている。バイアス電源72によって発生されるバイアスエネルギーが高周波バイアス電力である場合には、バイアス電源72は、整合器72mを介して第2の基台182に電気的に接続される。整合器72mは、バイアス電源72の負荷のインピーダンスをバイアス電源72の出力インピーダンスに整合させるための整合回路を有している。 The plasma processing apparatus 1B further includes a bias power supply 72. Bias power supply 72 (second bias power supply) generates bias energy similar to the bias energy generated by bias power supply 71 (first bias power supply). A bias power supply 72 is electrically connected to the second base 182 . When the bias energy generated by the bias power supply 72 is high frequency bias power, the bias power supply 72 is electrically connected to the second base 182 via the matching box 72m. The matching device 72m has a matching circuit for matching the impedance of the load of the bias power supply 72 with the output impedance of the bias power supply 72 .

 プラズマ処理装置1Bの基板支持部16Bでは、誘電体領域24Bが、第1の基台181と第2の基台182との間に設けられている。誘電体領域24Bは、高周波電力及びバイアスエネルギーのそれぞれの周波数帯において第1の基台181と第2の基台182を互いから電気的に分離するために、比較的小さい静電容量を有する。 A dielectric region 24B is provided between a first base 181 and a second base 182 in the substrate support portion 16B of the plasma processing apparatus 1B. Dielectric region 24B has a relatively low capacitance to electrically isolate first base 181 and second base 182 from each other in the respective frequency bands of high frequency power and bias energy.

 以下、図4を参照する。図4は、更に別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。以下、図4に示すプラズマ処理装置1Cのプラズマ処理装置1Bに対する相違点について説明する。 See Figure 4 below. FIG. 4 is a schematic diagram of a plasma processing apparatus according to yet another exemplary embodiment. Differences of the plasma processing apparatus 1C shown in FIG. 4 from the plasma processing apparatus 1B will be described below.

 プラズマ処理装置1Cは、第2の高周波電源62を備えていない。また、プラズマ処理装置1Cでは、基板支持部16Cは、誘電体部22を有していなくてもよく、第2の支持領域202は、接合部材192を介して第2の基台182上に載置されていてもよい。なお、第2の基台182の上面の高さ方向の位置は、第1の基台181の上面の高さ方向の位置と略同一であってもよい。 The plasma processing apparatus 1C does not include the second high frequency power supply 62. Further, in the plasma processing apparatus 1C, the substrate supporting portion 16C does not have to have the dielectric portion 22, and the second supporting region 202 is placed on the second base 182 via the bonding member 192. may be placed. The position of the upper surface of the second base 182 in the height direction may be substantially the same as the position of the upper surface of the first base 181 in the height direction.

 プラズマ処理装置1Cは、インピーダンス回路91及びインピーダンス回路92を更に備えている。インピーダンス回路91は、第1の高周波電源61の出力(高周波電力の出力)と第1の基台181との間で接続されている。インピーダンス回路91は、可変インピーダンスを有していてもよい。インピーダンス回路91は、第1の高周波電源61の出力と第1の基台181との間で接続された可変容量コンデンサを含んでいてもよい。インピーダンス回路92は、第1の高周波電源61の出力(高周波電力の出力)と第2の基台182との間で接続されている。インピーダンス回路92は、可変インピーダンスを有していてもよい。インピーダンス回路92は、第1の高周波電源61の出力と第2の基台182との間で接続された可変容量コンデンサを含んでいてもよい。プラズマ処理装置1Cにおいて、第1の高周波電源61は、整合器61m及びインピーダンス回路91を介して、第1の基台181に電気的に接続されている。また、第1の高周波電源61は、整合器62m及びインピーダンス回路92を介して、第2の基台182に電気的に接続されている。 The plasma processing apparatus 1C further includes impedance circuits 91 and 92 . The impedance circuit 91 is connected between the output of the first high frequency power supply 61 (output of high frequency power) and the first base 181 . Impedance circuit 91 may have a variable impedance. Impedance circuit 91 may include a variable capacitor connected between the output of first high frequency power supply 61 and first base 181 . The impedance circuit 92 is connected between the output of the first high frequency power supply 61 (output of high frequency power) and the second base 182 . Impedance circuit 92 may have a variable impedance. Impedance circuit 92 may include a variable capacitor connected between the output of first high frequency power supply 61 and second base 182 . In the plasma processing apparatus 1C, the first high frequency power supply 61 is electrically connected to the first base 181 via the matching box 61m and the impedance circuit 91. As shown in FIG. Also, the first high-frequency power supply 61 is electrically connected to the second base 182 via the matching device 62m and the impedance circuit 92 .

 プラズマ処理装置1Cでは、第1の高周波電源61の出力(高周波電力の出力)とエッジリングERとの間の単位面積当りの静電容量は、第1の高周波電源61の出力(高周波電力の出力)と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。第1の高周波電源61の出力とエッジリングERとの間の静電容量は、第1の高周波電源61からエッジリングERまでの高周波電力の電気的パスの静電容量であり、インピーダンス回路92の容量性成分を含む。第1の高周波電源61の出力と基板Wとの間の静電容量は、第1の高周波電源61から基板Wまでの高周波電力の電気的パスの静電容量であり、インピーダンス回路91の容量性成分を含む。 In the plasma processing apparatus 1C, the capacitance per unit area between the output of the first high-frequency power supply 61 (output of high-frequency power) and the edge ring ER is equal to the output of the first high-frequency power supply 61 (output of high-frequency power ) and the substrate W may be 0.8 times or more and 1.2 times or less of the capacitance per unit area. The capacitance between the output of the first high frequency power supply 61 and the edge ring ER is the capacitance of the electrical path of the high frequency power from the first high frequency power supply 61 to the edge ring ER. Contains a capacitive component. The capacitance between the output of the first high-frequency power source 61 and the substrate W is the capacitance of the electrical path of the high-frequency power from the first high-frequency power source 61 to the substrate W, and the capacitance of the impedance circuit 91 Contains ingredients.

 プラズマ処理装置1Cでは、高周波電力は、第1の高周波電源61からインピーダンス回路91、第1の基台181、第1の支持領域201、及び基板Wを介してプラズマに供給される。また、高周波電力は、第1の高周波電源61からインピーダンス回路92、第2の基台182、第2の支持領域202、及びエッジリングERを介してプラズマに供給される。即ち、基板W上でプラズマに供給される高周波電力とエッジリングER上でプラズマに供給される高周波電力は、インピーダンス回路91及びインピーダンス回路92により個別に調整可能である。したがって、基板W上でプラズマに供給される単位面積当りの高周波電力とエッジリングER上でプラズマに供給される単位面積当りの高周波電力の差を低減させることが可能である。故に、プラズマ処理装置1Cによれば、基板に対するプラズマ処理の面内バラツキを抑制することが可能となる。なお、プラズマ処理装置1Cは、インピーダンス回路91及びインピーダンス回路92のうち一方のみを備えていてもよい。この場合においても、第1の高周波電源61の出力とエッジリングERとの間の単位面積当りの静電容量は、第1の高周波電源61の出力と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In the plasma processing apparatus 1C, high-frequency power is supplied from the first high-frequency power supply 61 to the plasma through the impedance circuit 91, the first base 181, the first support region 201, and the substrate W. Also, high frequency power is supplied to the plasma from the first high frequency power source 61 via the impedance circuit 92, the second base 182, the second support region 202, and the edge ring ER. That is, the high frequency power supplied to the plasma on the substrate W and the high frequency power supplied to the plasma on the edge ring ER can be individually adjusted by the impedance circuits 91 and 92 . Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring ER. Therefore, according to the plasma processing apparatus 1C, it is possible to suppress in-plane variations in the plasma processing of the substrate. In addition, the plasma processing apparatus 1</b>C may include only one of the impedance circuit 91 and the impedance circuit 92 . Even in this case, the capacitance per unit area between the output of the first high-frequency power supply 61 and the edge ring ER is equal to the static capacitance per unit area between the output of the first high-frequency power supply 61 and the substrate W. It may be 0.8 times or more and 1.2 times or less of the electric capacity.

 以下、図5を参照する。図5は、更に別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。以下、図5に示すプラズマ処理装置1Dのプラズマ処理装置1Cに対する相違点について説明する。 See Figure 5 below. FIG. 5 is a schematic diagram of a plasma processing apparatus according to yet another exemplary embodiment. Differences of the plasma processing apparatus 1D shown in FIG. 5 from the plasma processing apparatus 1C will be described below.

 プラズマ処理装置1Dは、バイアス電源72を備えていない。プラズマ処理装置1Dは、インピーダンス回路93及びインピーダンス回路94を更に備えている。インピーダンス回路93は、バイアス電源71の出力(バイアスエネルギーの出力)と第1の基台181との間で接続されている。インピーダンス回路93は、可変インピーダンスを有していてもよい。インピーダンス回路93は、バイアス電源71の出力と第1の基台181との間で接続された可変容量コンデンサを含んでいてもよい。インピーダンス回路94は、バイアス電源71の出力(バイアスエネルギーの出力)と第2の基台182との間で接続されている。インピーダンス回路94は、可変インピーダンスを有していてもよい。インピーダンス回路94は、バイアス電源71の出力と第2の基台182との間で接続された可変容量コンデンサを含んでいてもよい。 The plasma processing apparatus 1D does not have a bias power supply 72. The plasma processing apparatus 1D further includes impedance circuits 93 and 94 . The impedance circuit 93 is connected between the output of the bias power supply 71 (bias energy output) and the first base 181 . Impedance circuit 93 may have a variable impedance. Impedance circuit 93 may include a variable capacitor connected between the output of bias power supply 71 and first base 181 . The impedance circuit 94 is connected between the output of the bias power supply 71 (bias energy output) and the second base 182 . Impedance circuit 94 may have a variable impedance. Impedance circuit 94 may include a variable capacitor connected between the output of bias power supply 71 and second base 182 .

 プラズマ処理装置1Dでは、バイアスエネルギーは、バイアス電源71からインピーダンス回路93を介して第1の基台181に供給される。また、バイアスエネルギーは、バイアス電源71からインピーダンス回路94を介して第2の基台182に供給される。即ち、バイアス電源71からのバイアスエネルギーは、インピーダンス回路93及びインピーダンス回路94によって調整される分配比率で、第1の基台181及び第2の基台182に分配される。 In the plasma processing apparatus 1D, bias energy is supplied from the bias power supply 71 to the first base 181 through the impedance circuit 93. Also, bias energy is supplied from the bias power supply 71 to the second base 182 through the impedance circuit 94 . That is, the bias energy from the bias power supply 71 is distributed to the first base 181 and the second base 182 with a distribution ratio adjusted by the impedance circuit 93 and the impedance circuit 94 .

 プラズマ処理装置1Dでは、第1の高周波電源61の出力(高周波電力の出力)とエッジリングERとの間の単位面積当りの静電容量は、第1の高周波電源61の出力(高周波電力の出力)と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。第1の高周波電源61の出力とエッジリングERとの間の静電容量は、第1の高周波電源61からエッジリングERまでの高周波電力の電気的パスの静電容量であり、インピーダンス回路92の容量性成分を含む。第1の高周波電源61の出力と基板Wとの間の静電容量は、第1の高周波電源61から基板Wまでの高周波電力の電気的パスの静電容量であり、インピーダンス回路91の容量性成分を含む。なお、プラズマ処理装置1Dは、インピーダンス回路91及びインピーダンス回路92のうち一方のみを備えていてもよい。この場合においても、第1の高周波電源61の出力とエッジリングERとの間の単位面積当りの静電容量は、第1の高周波電源61の出力と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In the plasma processing apparatus 1D, the capacitance per unit area between the output of the first high-frequency power supply 61 (output of high-frequency power) and the edge ring ER is equal to the output of the first high-frequency power supply 61 (output of high-frequency power ) and the substrate W may be 0.8 times or more and 1.2 times or less of the capacitance per unit area. The capacitance between the output of the first high frequency power supply 61 and the edge ring ER is the capacitance of the electrical path of the high frequency power from the first high frequency power supply 61 to the edge ring ER. Contains a capacitive component. The capacitance between the output of the first high-frequency power source 61 and the substrate W is the capacitance of the electrical path of the high-frequency power from the first high-frequency power source 61 to the substrate W, and the capacitance of the impedance circuit 91 Contains ingredients. The plasma processing apparatus 1D may include only one of the impedance circuit 91 and the impedance circuit 92. FIG. Even in this case, the capacitance per unit area between the output of the first high-frequency power supply 61 and the edge ring ER is equal to the static capacitance per unit area between the output of the first high-frequency power supply 61 and the substrate W. It may be 0.8 times or more and 1.2 times or less of the electric capacity.

 また、プラズマ処理装置1Dでは、バイアス電源71の出力(バイアスエネルギーの出力)とエッジリングERとの間の単位面積当りの静電容量は、バイアス電源71の出力(バイアスエネルギーの出力)と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。バイアス電源71の出力とエッジリングERとの間の静電容量は、バイアス電源71からエッジリングERまでのバイアスエネルギーの電気的パスの静電容量であり、インピーダンス回路94の容量性成分を含む。バイアス電源71の出力と基板Wとの間の静電容量は、バイアス電源71から基板Wまでのバイアスエネルギーの電気的パスの静電容量であり、インピーダンス回路93の容量性成分を含む。なお、プラズマ処理装置1Dは、インピーダンス回路93及びインピーダンス回路94のうち一方のみを備えていてもよい。この場合においても、バイアス電源71の出力とエッジリングERとの間の単位面積当りの静電容量は、バイアス電源71の出力と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In the plasma processing apparatus 1D, the capacitance per unit area between the output of the bias power supply 71 (output of bias energy) and the edge ring ER is the output of the bias power supply 71 (output of bias energy) and the substrate W It may be 0.8 times or more and 1.2 times or less of the capacitance per unit area between. The capacitance between the output of bias power supply 71 and edge ring ER is the capacitance of the electrical path of the bias energy from bias power supply 71 to edge ring ER and includes the capacitive component of impedance circuit 94 . The capacitance between the output of bias power supply 71 and substrate W is the capacitance of the electrical path of the bias energy from bias power supply 71 to substrate W and includes the capacitive component of impedance circuit 93 . Note that the plasma processing apparatus 1D may include only one of the impedance circuit 93 and the impedance circuit 94. FIG. Even in this case, the capacitance per unit area between the output of the bias power supply 71 and the edge ring ER is 0.8 of the capacitance per unit area between the output of the bias power supply 71 and the substrate W. It may be more than twice and less than 1.2 times.

 以下、図6を参照する。図6は、更に別の例示的実施形態に係るプラズマ処理装置を概略的に示す図である。以下、図6に示すプラズマ処理装置1Eのプラズマ処理装置1に対する相違点について説明する。 See Figure 6 below. FIG. 6 is a schematic diagram of a plasma processing apparatus according to yet another exemplary embodiment. Differences of the plasma processing apparatus 1E shown in FIG. 6 from the plasma processing apparatus 1 will be described below.

 プラズマ処理装置1Eは、基板支持部16に代えて基板支持部16Eを備えている。基板支持部16Eは、基台18E、第1の支持領域20a、及び第2の支持領域20bを含んでいる。 The plasma processing apparatus 1E includes a substrate support portion 16E instead of the substrate support portion 16. The substrate support portion 16E includes a base 18E, a first support area 20a, and a second support area 20b.

 基台18Eは、導電性を有する。基台18Eは、アルミニウムのような導電性材料から形成されていてもよい。基台18Eは、第1の部分18a及び第2の部分18bを含んでいる。第1の部分18aは、略円盤形状を有している。第1の部分18aの中心軸線は、軸線AXと略一致する。第2の部分18bは、第1の部分18aの外周を囲むように延在する。第2の部分18bは、平面視では略環形状を有し得る。第2の部分18bの中心軸線は、軸線AXと略一致する。第1の部分18aと第2の部分18bは、互いに一体化されていている。 The base 18E has conductivity. The base 18E may be made of a conductive material such as aluminum. The base 18E includes a first portion 18a and a second portion 18b. The first portion 18a has a substantially disk shape. The central axis of the first portion 18a substantially coincides with the axis AX. The second portion 18b extends to surround the outer circumference of the first portion 18a. The second portion 18b may have a substantially annular shape in plan view. The central axis of the second portion 18b substantially coincides with the axis AX. The first portion 18a and the second portion 18b are integrated with each other.

 プラズマ処理装置1Eにおいて、第1の高周波電源61は、整合器61mを介して基台18Eに電気的に接続されている。バイアス電源71も、基台18Eに電気的に接続されている。 In the plasma processing apparatus 1E, the first high frequency power supply 61 is electrically connected to the base 18E via a matching box 61m. A bias power supply 71 is also electrically connected to the base 18E.

 第1の支持領域20aは、誘電体から形成されている。第1の支持領域20aは、第1の部分18aの上方に設けられている。第1の支持領域20aは、その上に載置される基板Wを支持するように構成されている。第1の支持領域20aは、接着剤のような接合部材19を介して第1の部分18aの上面に固定されていてもよい。第1の支持領域20aは、第1の支持領域201と同様に、本体20m及びチャック電極201aを含んでいてもよい。 The first support region 20a is made of a dielectric. A first support area 20a is provided above the first portion 18a. The first support area 20a is configured to support a substrate W placed thereon. The first support area 20a may be secured to the top surface of the first portion 18a via a bonding member 19 such as an adhesive. First support region 20a, like first support region 201, may include body 20m and chuck electrode 201a.

 第2の支持領域20bは、誘電体から形成されている。第2の支持領域20bは、第2の部分18bの上方に設けられている。第2の支持領域20bは、その上に載置されるエッジリングERを支持するように構成されている。第2の支持領域20bは、接合部材19を介して後述する誘電体部22の上面に固定されていてもよい。第2の支持領域20bは、第2の支持領域202と同様に、本体20m、チャック電極202a、及びチャック電極202bを含んでいてもよい。 The second support region 20b is made of a dielectric. A second support area 20b is provided above the second portion 18b. The second support area 20b is configured to support an edge ring ER resting thereon. The second support region 20b may be fixed to the upper surface of the dielectric portion 22, which will be described later, via the joint member 19. As shown in FIG. Second support region 20b, like second support region 202, may include body 20m, chuck electrode 202a, and chuck electrode 202b.

 第2の部分18bの上面の位置は、第1の部分18aの上面の位置よりも低くてもよい。第2の支持領域20bの厚さは、第1の支持領域20aの厚さよりも薄くてもよい。基板支持部16Eは、誘電体部22を更に含んでいる。誘電体部22は、第2の支持領域20bと第2の部分18bの間、且つ、第2の部分18bの上面の上に設けられている。誘電体部22は、基板支持部16の誘電体部22と同様に、誘電体から形成されている。 The position of the upper surface of the second portion 18b may be lower than the position of the upper surface of the first portion 18a. The thickness of the second support region 20b may be thinner than the thickness of the first support region 20a. The substrate support portion 16E further includes a dielectric portion 22. As shown in FIG. The dielectric portion 22 is provided between the second support region 20b and the second portion 18b and on the upper surface of the second portion 18b. The dielectric portion 22 is made of a dielectric material, like the dielectric portion 22 of the substrate support portion 16 .

 プラズマ処理装置1Eにおいて、調整電源80は、エッジリングERの上方でプラズマシースの上端の高さ方向の位置を調整するためにエッジリングERに電圧を印加するように構成されている。調整電源80は、基台18E及び第2の支持領域20bを含まない電気的パスを介してエッジリングに電圧を印加し得る。 In the plasma processing apparatus 1E, the adjustment power supply 80 is configured to apply a voltage to the edge ring ER in order to adjust the height direction position of the upper end of the plasma sheath above the edge ring ER. Regulated power supply 80 may apply voltage to the edge ring via an electrical path that does not include base 18E and second support region 20b.

 プラズマ処理装置1Eでは、第1の高周波電源61からの高周波電力は、第1の部分18a、第1の支持領域20a、及び基板Wを介してプラズマに供給され、第2の部分18b、第2の支持領域20b、及びエッジリングERを介してプラズマに供給される。プラズマ処理装置1Eでは、第1の部分18aと基板Wとの間の静電容量と第2の部分18bとエッジリングERとの間の静電容量の差が、誘電体部22により低減される。したがって、基板W上でプラズマに供給される単位面積当りの高周波電力とエッジリングER上でプラズマに供給される単位面積当りの高周波電力の差を低減させることが可能である。故に、プラズマ処理装置1Eによれば、基板Wに対するプラズマ処理の面内バラツキを抑制することが可能となる。 In the plasma processing apparatus 1E, high-frequency power from the first high-frequency power supply 61 is supplied to the plasma through the first portion 18a, the first support region 20a, and the substrate W, and the second portion 18b, the second is supplied to the plasma via the support region 20b of the and the edge ring ER. In the plasma processing apparatus 1E, the difference in capacitance between the first portion 18a and the substrate W and between the second portion 18b and the edge ring ER is reduced by the dielectric portion 22. . Therefore, it is possible to reduce the difference between the RF power per unit area supplied to the plasma on the substrate W and the RF power per unit area supplied to the plasma on the edge ring ER. Therefore, according to the plasma processing apparatus 1E, it is possible to suppress in-plane variations in the plasma processing of the substrate W. FIG.

 プラズマ処理装置1Eにおいては、第2の部分18bとエッジリングERとの間の単位面積当りの静電容量は、第1の部分18aと基板Wとの間の基板の単位面積当りの静電容量の0.8倍以上、1.2倍以下であってもよい。 In the plasma processing apparatus 1E, the capacitance per unit area between the second portion 18b and the edge ring ER is the capacitance per unit area of the substrate between the first portion 18a and the substrate W. may be 0.8 times or more and 1.2 times or less.

 なお、図6において、第1の支持領域20aと第2の支持領域20bは互いに一体化されており単一の静電チャックを構成しているが、第1の支持領域20aと第2の支持領域20bは互いから分離されていてもよい。 In FIG. 6, the first support region 20a and the second support region 20b are integrated with each other to form a single electrostatic chuck. Regions 20b may be separated from each other.

 以下、プラズマ処理装置の評価のために行った実験について説明する。実験では、プラズマ処理装置1Eと同一構造のプラズマ処理装置として静電容量比の異なる複数のプラズマ処理装置を用いて、面内において分布する複数の孔を形成するようにサンプル基板のエッチングを行った。静電容量比は、基台18EとエッジリングERとの間の単位面積当りの静電容量を基台18Eとサンプル基板との間の単位面積当りの静電容量で除した値である。 The following describes the experiments conducted to evaluate the plasma processing equipment. In the experiment, a plurality of plasma processing apparatuses having the same structure as the plasma processing apparatus 1E and having different capacitance ratios were used to etch the sample substrate so as to form a plurality of holes distributed in the plane. . The capacitance ratio is a value obtained by dividing the capacitance per unit area between the base 18E and the edge ring ER by the capacitance per unit area between the base 18E and the sample substrate.

 実験では、サンプル基板のエッジに形成された孔の真円度を求めた。真円度は、孔の短径を孔の長径で除した値である。図7に実験の結果を示す。図7において、横軸は、実験で用いた複数のプラズマ処理装置の静電容量比を示している。図7において、縦軸は、真円度を示している。図7に示すように、静電容量比が0.8以上、1.2以下であれば、サンプル基板のエッジにおいても高い真円度の孔を形成可能であることが確認された。したがって、基台(第2の基台182又は第2の部分18b)とエッジリングERとの間の単位面積当りの静電容量は、基台(第1の基台181又は第1の部分18a)と基板Wとの間の単位面積当りの静電容量の0.8倍以上、1.2倍以下であることが望ましいことが確認された。 In the experiment, the roundness of the holes formed on the edge of the sample substrate was determined. The circularity is a value obtained by dividing the short diameter of the hole by the long diameter of the hole. FIG. 7 shows the results of the experiment. In FIG. 7, the horizontal axis indicates capacitance ratios of a plurality of plasma processing apparatuses used in the experiment. In FIG. 7, the vertical axis indicates the circularity. As shown in FIG. 7, it was confirmed that holes with high roundness can be formed even at the edge of the sample substrate when the capacitance ratio is 0.8 or more and 1.2 or less. Therefore, the capacitance per unit area between the base (second base 182 or second portion 18b) and the edge ring ER is ) and the substrate W is preferably 0.8 times or more and 1.2 times or less of the capacitance per unit area.

 以上、種々の例示的実施形態について説明してきたが、上述した例示的実施形態に限定されることなく、様々な追加、省略、置換、及び変更がなされてもよい。また、異なる実施形態における要素を組み合わせて他の実施形態を形成することが可能である。 Although various exemplary embodiments have been described above, various additions, omissions, substitutions, and modifications may be made without being limited to the exemplary embodiments described above. Also, elements from different embodiments can be combined to form other embodiments.

 ここで、本開示に含まれる種々の例示的実施形態を、以下の[E1]~[E18]に記載する。 Various exemplary embodiments included in the present disclosure are now described in [E1] to [E18] below.

[E1]
 チャンバと、
 前記チャンバ内に設けられた基板支持部であり、
  導電性を有する第1の基台と、
  導電性を有する第2の基台であり、前記第1の基台から離れており、前記第1の基台の外周を囲むように延在する、該第2の基台と、
  誘電体から形成されており、前記第1の基台の上方に設けられており、その上に載置される基板を支持するように構成された第1の支持領域と、
  誘電体から形成されており、前記第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成された第2の支持領域と、
 を含む該基板支持部と、
 プラズマ生成用の高周波電力を前記第1の基台に供給するように構成された第1の高周波電源と、
 プラズマ生成用の高周波電力を前記第2の基台に供給するように構成された第2の高周波電源と、
を備えるプラズマ処理装置。
[E1]
a chamber;
A substrate support provided in the chamber,
a conductive first base;
a second electrically conductive base spaced apart from the first base and extending around the circumference of the first base;
a first support region formed from a dielectric and disposed above the first base and configured to support a substrate mounted thereon;
a second support region formed from a dielectric and disposed above the second base and configured to support an edge ring resting thereon;
the substrate support comprising
a first high frequency power supply configured to supply high frequency power for plasma generation to the first base;
a second high frequency power supply configured to supply high frequency power for plasma generation to the second base;
A plasma processing apparatus comprising:

[E2]
 前記第2の基台の上面の位置は、前記第1の基台の上面の位置よりも低く、
 前記第2の支持領域の厚さは、前記第1の支持領域の厚さよりも薄く、
 前記基板支持部は、前記第2の支持領域と前記第2の基台の間、且つ、前記第2の基台の前記上面の上に設けられた誘電体部を更に含む、
[E1]に記載のプラズマ処理装置。
[E2]
the position of the upper surface of the second base is lower than the position of the upper surface of the first base;
the thickness of the second support region is thinner than the thickness of the first support region;
The substrate support further includes a dielectric part provided between the second support region and the second base and on the upper surface of the second base,
The plasma processing apparatus according to [E1].

[E3]
 前記誘電体部は、前記第2の基台の前記上面に形成されたセラミックスの溶射膜である、[E2]に記載のプラズマ処理装置。
[E3]
The plasma processing apparatus according to [E2], wherein the dielectric section is a thermally sprayed ceramic film formed on the upper surface of the second base.

[E4]
 前記第2の支持領域は、前記誘電体部と該第2の支持領域との間に設けられた接合部材及び前記誘電体部を介して前記第2の基台に固定されている、[E2]又は[E3]に記載のプラズマ処理装置。
[E4]
The second support region is fixed to the second base via a joint member provided between the dielectric portion and the second support region and the dielectric portion, [E2 ] or the plasma processing apparatus as described in [E3].

[E5]
 イオンをプラズマから前記基板に引き込むためのバイアスエネルギーを前記第1の基台に供給するように構成されたバイアス電源と、
 前記エッジリングの上方でプラズマシースの上端の高さ方向の位置を調整するために前記エッジリングに電圧を印加するように構成された調整電源と、
を更に備える、[E1]~[E4]の何れか一項に記載のプラズマ処理装置。
[E5]
a bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate;
an adjustment power supply configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring;
The plasma processing apparatus according to any one of [E1] to [E4], further comprising:

[E6]
 前記第1の基台と前記第2の基台との間には、前記バイアスエネルギーの一部を前記第1の基台から前記第2の基台に供給するために設けられた誘電体領域が設けられている、[E5]に記載のプラズマ処理装置。
[E6]
a dielectric region between the first base and the second base for supplying a portion of the bias energy from the first base to the second base; is provided, the plasma processing apparatus according to [E5].

[E7]
 イオンをプラズマから前記基板に引き込むためのバイアスエネルギーを前記第1の基台に供給するように構成された第1のバイアス電源と、
 イオンを前記プラズマから前記エッジリングに引き込むためのバイアスエネルギーを前記第2の基台に供給するように構成された第2のバイアス電源と、
を更に備える、[E1]~[E4]の何れか一項に記載のプラズマ処理装置。
[E7]
a first bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate;
a second bias power supply configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring;
The plasma processing apparatus according to any one of [E1] to [E4], further comprising:

[E8]
 前記第2の基台と前記エッジリングとの間の単位面積当りの静電容量は、前記第1の基台と前記基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下である、[E1]~[E7]の何れか一項に記載のプラズマ処理装置。
[E8]
the capacitance per unit area between the second base and the edge ring is 0.8 times or more the capacitance per unit area between the first base and the substrate; The plasma processing apparatus according to any one of [E1] to [E7], which is 1.2 times or less.

[E9]
 チャンバと、
 前記チャンバ内に設けられた基板支持部であり、
  導電性を有する第1の基台と、
  導電性を有する第2の基台であり、前記第1の基台から離れており、前記第1の基台の外周を囲むように延在する、該第2の基台と、
  誘電体から形成されており、前記第1の基台の上方に設けられており、その上に載置される基板を支持するように構成された第1の支持領域と、
  誘電体から形成されており、前記第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成された第2の支持領域と、
 を含む該基板支持部と、
 前記第1の基台及び前記第2の基台に電気的に結合されており、プラズマ生成用の高周波電力を発生するように構成された高周波電源と、
 前記高周波電源と前記第1の基台又は前記第2の基台との間で接続されたインピーダンス回路と、
を備えるプラズマ処理装置。
[E9]
a chamber;
A substrate support provided in the chamber,
a conductive first base;
a second electrically conductive base spaced apart from the first base and extending around the circumference of the first base;
a first support region formed from a dielectric and disposed above the first base and configured to support a substrate mounted thereon;
a second support region formed from a dielectric and disposed above the second base and configured to support an edge ring resting thereon;
the substrate support comprising
a radio frequency power source electrically coupled to the first base and the second base and configured to generate radio frequency power for plasma generation;
an impedance circuit connected between the high-frequency power source and the first base or the second base;
A plasma processing apparatus comprising:

[E10]
 イオンをプラズマから前記基板に引き込むためのバイアスエネルギーを前記第1の基台に供給するように構成された第1のバイアス電源と、
 イオンを前記プラズマから前記エッジリングに引き込むためのバイアスエネルギーを前記第2の基台に供給するように構成された第2のバイアス電源と、
を更に備える、[E9]に記載のプラズマ処理装置。
[E10]
a first bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate;
a second bias power supply configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring;
The plasma processing apparatus according to [E9], further comprising:

[E11]
 イオンをプラズマから前記基板及び前記エッジリングに引き込むためのバイアスエネルギーを発生するように構成されたバイアス電源と、
 前記バイアス電源と前記第1の基台又は前記第2の基台との間で接続された別のインピーダンス回路と、
を更に備える、[E9]に記載のプラズマ処理装置。
[E11]
a bias power supply configured to generate bias energy for drawing ions from a plasma into the substrate and the edge ring;
another impedance circuit connected between the bias power supply and the first base or the second base;
The plasma processing apparatus according to [E9], further comprising:

[E12]
 前記高周波電源と前記エッジリングとの間の単位面積当りの静電容量は、前記高周波電源と前記基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下である、[E9]~[E11]の何れか一項に記載のプラズマ処理装置。
[E12]
The capacitance per unit area between the high-frequency power supply and the edge ring is 0.8 times or more and 1.2 times or less the capacitance per unit area between the high-frequency power supply and the substrate. The plasma processing apparatus according to any one of [E9] to [E11].

[E13]
 チャンバと、
 前記チャンバ内に設けられた基板支持部であり、
  導電性を有する基台であり、第1の部分と該第1の部分の外側で周方向に延在する第2の部分を有する、該基台と、
  誘電体から形成されており、前記第1の部分の上方に設けられており、その上に載置される基板を支持するように構成された第1の支持領域と、
  誘電体から形成されており、前記第2の部分の上方に設けられており、その上に載置されるエッジリングを支持するように構成された第2の支持領域と、
 を含む該基板支持部と、
 プラズマ生成用の高周波電力を前記基台に供給するように構成された高周波電源と、
 前記エッジリングの上方でプラズマシースの上端の高さ方向の位置を調整するために前記エッジリングに電圧を印加するように構成された調整電源と、
を備え、
 前記第2の部分の上面の位置は、前記第1の部分の上面の位置よりも低く、
 前記第2の支持領域の厚さは、前記第1の支持領域の厚さよりも薄く、
 前記基板支持部は、前記第2の支持領域と前記第2の部分の間、且つ、前記第2の部分の前記上面の上に設けられた誘電体部を更に含む、
プラズマ処理装置。
[E13]
a chamber;
A substrate support provided in the chamber,
an electrically conductive base having a first portion and a second portion extending circumferentially outside the first portion;
a first support region formed from a dielectric and disposed above the first portion and configured to support a substrate resting thereon;
a second support region formed from a dielectric material overlying the second portion and configured to support an edge ring resting thereon;
the substrate support comprising
a high-frequency power source configured to supply high-frequency power for plasma generation to the base;
an adjustment power supply configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring;
with
the position of the top surface of the second portion is lower than the position of the top surface of the first portion;
the thickness of the second support region is thinner than the thickness of the first support region;
the substrate support further includes a dielectric portion provided between the second support region and the second portion and on the upper surface of the second portion;
Plasma processing equipment.

[E14]
 前記誘電体部は、前記第2の部分の前記上面に形成されたセラミックスの溶射膜である、[E13]に記載のプラズマ処理装置。
[E14]
The plasma processing apparatus according to [E13], wherein the dielectric section is a thermally sprayed ceramic film formed on the upper surface of the second portion.

[E15]
 前記第2の支持領域は、前記誘電体部と該第2の支持領域との間に設けられた接合部材及び前記誘電体部を介して前記第2の部分に固定されている、[E13]又は[E14]に記載のプラズマ処理装置。
[E15]
The second support region is fixed to the second portion via a bonding member provided between the dielectric portion and the second support region and the dielectric portion, [E13] Or the plasma processing apparatus according to [E14].

[E16]
 イオンをプラズマから前記基板及び前記エッジリングに引き込むためのバイアスエネルギーを前記基台に供給するように構成されたバイアス電源を更に備える、[E13]~[E15]の何れか一項に記載のプラズマ処理装置。
[E16]
The plasma of any one of [E13]-[E15], further comprising a bias power supply configured to supply bias energy to the base for drawing ions from the plasma into the substrate and the edge ring. processing equipment.

[E17]
 前記第2の部分と前記エッジリングとの間の単位面積当りの静電容量は、前記第1の部分と前記基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下である、[E13]~[E16]の何れか一項に記載のプラズマ処理装置。
[E17]
1. the capacitance per unit area between the second portion and the edge ring is 0.8 times or more the capacitance per unit area between the first portion and the substrate; The plasma processing apparatus according to any one of [E13] to [E16], which is twice or less.

[E18]
 前記第1の支持領域及び第2の支持領域は、互いから分離された別個の静電チャックであるか、互いに一体化されており、単一の静電チャックを構成する、[E1]~[E17]の何れか一項に記載のプラズマ処理装置。
[E18]
The first support region and the second support region are separate electrostatic chucks separated from each other or integrated with each other to form a single electrostatic chuck, [E1]-[ E17].

 以上の説明から、本開示の種々の実施形態は、説明の目的で本明細書で説明されており、本開示の範囲及び主旨から逸脱することなく種々の変更をなし得ることが、理解されるであろう。したがって、本明細書に開示した種々の実施形態は限定することを意図しておらず、真の範囲と主旨は、添付の特許請求の範囲によって示される。 From the foregoing description, it will be appreciated that various embodiments of the present disclosure have been set forth herein for purposes of illustration, and that various changes may be made without departing from the scope and spirit of the present disclosure. Will. Therefore, the various embodiments disclosed herein are not intended to be limiting, with a true scope and spirit being indicated by the following claims.

 1…プラズマ処理装置、10…チャンバ、181…第1の基台、182…第2の基台、201…第1の支持領域、202…第2の支持領域、61…第1の高周波電源、62…第2の高周波電源。 Reference Signs List 1 plasma processing apparatus 10 chamber 181 first base 182 second base 201 first support region 202 second support region 61 first high-frequency power supply 62 . . . second high-frequency power supply;

Claims (18)

 チャンバと、
 前記チャンバ内に設けられた基板支持部であり、
  導電性を有する第1の基台と、
  導電性を有する第2の基台であり、前記第1の基台から離れており、前記第1の基台の外周を囲むように延在する、該第2の基台と、
  誘電体から形成されており、前記第1の基台の上方に設けられており、その上に載置される基板を支持するように構成された第1の支持領域と、
  誘電体から形成されており、前記第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成された第2の支持領域と、
 を含む該基板支持部と、
 プラズマ生成用の高周波電力を前記第1の基台に供給するように構成された第1の高周波電源と、
 プラズマ生成用の高周波電力を前記第2の基台に供給するように構成された第2の高周波電源と、
を備えるプラズマ処理装置。
a chamber;
A substrate support provided in the chamber,
a conductive first base;
a second electrically conductive base spaced apart from the first base and extending around the circumference of the first base;
a first support region formed from a dielectric and disposed above the first base and configured to support a substrate mounted thereon;
a second support region formed from a dielectric and disposed above the second base and configured to support an edge ring resting thereon;
the substrate support comprising
a first high frequency power supply configured to supply high frequency power for plasma generation to the first base;
a second high frequency power supply configured to supply high frequency power for plasma generation to the second base;
A plasma processing apparatus comprising:
 前記第2の基台の上面の位置は、前記第1の基台の上面の位置よりも低く、
 前記第2の支持領域の厚さは、前記第1の支持領域の厚さよりも薄く、
 前記基板支持部は、前記第2の支持領域と前記第2の基台の間、且つ、前記第2の基台の前記上面の上に設けられた誘電体部を更に含む、
請求項1に記載のプラズマ処理装置。
the position of the upper surface of the second base is lower than the position of the upper surface of the first base;
the thickness of the second support region is thinner than the thickness of the first support region;
The substrate support further includes a dielectric part provided between the second support region and the second base and on the upper surface of the second base,
The plasma processing apparatus according to claim 1.
 前記誘電体部は、前記第2の基台の前記上面に形成されたセラミックスの溶射膜である、請求項2に記載のプラズマ処理装置。 3. The plasma processing apparatus according to claim 2, wherein said dielectric portion is a ceramic sprayed film formed on said upper surface of said second base.  前記第2の支持領域は、前記誘電体部と該第2の支持領域との間に設けられた接合部材及び前記誘電体部を介して前記第2の基台に固定されている、請求項2に記載のプラズマ処理装置。 3. The second support region is fixed to the second base via a joint member provided between the dielectric portion and the second support region and the dielectric portion. 3. The plasma processing apparatus according to 2.  イオンをプラズマから前記基板に引き込むためのバイアスエネルギーを前記第1の基台に供給するように構成されたバイアス電源と、
 前記エッジリングの上方でプラズマシースの上端の高さ方向の位置を調整するために前記エッジリングに電圧を印加するように構成された調整電源と、
を更に備える、請求項1~4の何れか一項に記載のプラズマ処理装置。
a bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate;
an adjustment power supply configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring;
The plasma processing apparatus according to any one of claims 1 to 4, further comprising:
 前記第1の基台と前記第2の基台との間には、前記バイアスエネルギーの一部を前記第1の基台から前記第2の基台に供給するために設けられた誘電体領域が設けられている、請求項5に記載のプラズマ処理装置。 a dielectric region between the first base and the second base for supplying a portion of the bias energy from the first base to the second base; 6. The plasma processing apparatus of claim 5, further comprising:  イオンをプラズマから前記基板に引き込むためのバイアスエネルギーを前記第1の基台に供給するように構成された第1のバイアス電源と、
 イオンを前記プラズマから前記エッジリングに引き込むためのバイアスエネルギーを前記第2の基台に供給するように構成された第2のバイアス電源と、
を更に備える、請求項1~4の何れか一項に記載のプラズマ処理装置。
a first bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate;
a second bias power supply configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring;
The plasma processing apparatus according to any one of claims 1 to 4, further comprising:
 前記第2の基台と前記エッジリングとの間の単位面積当りの静電容量は、前記第1の基台と前記基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下である、請求項1~4の何れか一項に記載のプラズマ処理装置。 the capacitance per unit area between the second base and the edge ring is 0.8 times or more the capacitance per unit area between the first base and the substrate; 5. The plasma processing apparatus according to any one of claims 1 to 4, which is 1.2 times or less.  チャンバと、
 前記チャンバ内に設けられた基板支持部であり、
  導電性を有する第1の基台と、
  導電性を有する第2の基台であり、前記第1の基台から離れており、前記第1の基台の外周を囲むように延在する、該第2の基台と、
  誘電体から形成されており、前記第1の基台の上方に設けられており、その上に載置される基板を支持するように構成された第1の支持領域と、
  誘電体から形成されており、前記第2の基台の上方に設けられており、その上に載置されるエッジリングを支持するように構成された第2の支持領域と、
 を含む該基板支持部と、
 前記第1の基台及び前記第2の基台に電気的に結合されており、プラズマ生成用の高周波電力を発生するように構成された高周波電源と、
 前記高周波電源と前記第1の基台又は前記第2の基台との間で接続されたインピーダンス回路と、
を備えるプラズマ処理装置。
a chamber;
A substrate support provided in the chamber,
a conductive first base;
a second electrically conductive base spaced apart from the first base and extending around the circumference of the first base;
a first support region formed from a dielectric and disposed above the first base and configured to support a substrate mounted thereon;
a second support region formed from a dielectric and disposed above the second base and configured to support an edge ring resting thereon;
the substrate support comprising
a radio frequency power source electrically coupled to the first base and the second base and configured to generate radio frequency power for plasma generation;
an impedance circuit connected between the high-frequency power source and the first base or the second base;
A plasma processing apparatus comprising:
 イオンをプラズマから前記基板に引き込むためのバイアスエネルギーを前記第1の基台に供給するように構成された第1のバイアス電源と、
 イオンを前記プラズマから前記エッジリングに引き込むためのバイアスエネルギーを前記第2の基台に供給するように構成された第2のバイアス電源と、
を更に備える、請求項9に記載のプラズマ処理装置。
a first bias power supply configured to supply bias energy to the first pedestal for drawing ions from a plasma to the substrate;
a second bias power supply configured to supply bias energy to the second pedestal for drawing ions from the plasma into the edge ring;
10. The plasma processing apparatus of claim 9, further comprising:
 イオンをプラズマから前記基板及び前記エッジリングに引き込むためのバイアスエネルギーを発生するように構成されたバイアス電源と、
 前記バイアス電源と前記第1の基台又は前記第2の基台との間で接続された別のインピーダンス回路と、
を更に備える、請求項9に記載のプラズマ処理装置。
a bias power supply configured to generate bias energy for drawing ions from a plasma into the substrate and the edge ring;
another impedance circuit connected between the bias power supply and the first base or the second base;
10. The plasma processing apparatus of claim 9, further comprising:
 前記高周波電源と前記エッジリングとの間の単位面積当りの静電容量は、前記高周波電源と前記基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下である、請求項9~11の何れか一項に記載のプラズマ処理装置。 The capacitance per unit area between the high-frequency power supply and the edge ring is 0.8 times or more and 1.2 times or less the capacitance per unit area between the high-frequency power supply and the substrate. A plasma processing apparatus according to any one of claims 9 to 11.  チャンバと、
 前記チャンバ内に設けられた基板支持部であり、
  導電性を有する基台であり、第1の部分と該第1の部分の外側で周方向に延在する第2の部分を有する、該基台と、
  誘電体から形成されており、前記第1の部分の上方に設けられており、その上に載置される基板を支持するように構成された第1の支持領域と、
  誘電体から形成されており、前記第2の部分の上方に設けられており、その上に載置されるエッジリングを支持するように構成された第2の支持領域と、
 を含む該基板支持部と、
 プラズマ生成用の高周波電力を前記基台に供給するように構成された高周波電源と、
 前記エッジリングの上方でプラズマシースの上端の高さ方向の位置を調整するために前記エッジリングに電圧を印加するように構成された調整電源と、
を備え、
 前記第2の部分の上面の位置は、前記第1の部分の上面の位置よりも低く、
 前記第2の支持領域の厚さは、前記第1の支持領域の厚さよりも薄く、
 前記基板支持部は、前記第2の支持領域と前記第2の部分の間、且つ、前記第2の部分の前記上面の上に設けられた誘電体部を更に含む、
プラズマ処理装置。
a chamber;
A substrate support provided in the chamber,
an electrically conductive base having a first portion and a second portion extending circumferentially outside the first portion;
a first support region formed from a dielectric and disposed above the first portion and configured to support a substrate resting thereon;
a second support region formed from a dielectric material overlying the second portion and configured to support an edge ring resting thereon;
the substrate support comprising
a high-frequency power source configured to supply high-frequency power for plasma generation to the base;
an adjustment power supply configured to apply a voltage to the edge ring to adjust the heightwise position of the upper end of the plasma sheath above the edge ring;
with
the position of the top surface of the second portion is lower than the position of the top surface of the first portion;
the thickness of the second support region is thinner than the thickness of the first support region;
the substrate support further includes a dielectric portion provided between the second support region and the second portion and on the upper surface of the second portion;
Plasma processing equipment.
 前記誘電体部は、前記第2の部分の前記上面に形成されたセラミックスの溶射膜である、請求項13に記載のプラズマ処理装置。 14. The plasma processing apparatus according to claim 13, wherein said dielectric portion is a ceramic sprayed film formed on said upper surface of said second portion.  前記第2の支持領域は、前記誘電体部と該第2の支持領域との間に設けられた接合部材及び前記誘電体部を介して前記第2の部分に固定されている、請求項13に記載のプラズマ処理装置。 13. The second support region is fixed to the second portion via a bonding member provided between the dielectric portion and the second support region and the dielectric portion. 3. The plasma processing apparatus according to .  イオンをプラズマから前記基板及び前記エッジリングに引き込むためのバイアスエネルギーを前記基台に供給するように構成されたバイアス電源を更に備える、請求項13~15の何れか一項に記載のプラズマ処理装置。 16. The plasma processing apparatus of any one of claims 13 to 15, further comprising a bias power supply configured to supply bias energy to the base for drawing ions from the plasma into the substrate and the edge ring. .  前記第2の部分と前記エッジリングとの間の単位面積当りの静電容量は、前記第1の部分と前記基板との間の単位面積当りの静電容量の0.8倍以上、1.2倍以下である、請求項13~15の何れか一項に記載のプラズマ処理装置。 1. the capacitance per unit area between the second portion and the edge ring is 0.8 times or more the capacitance per unit area between the first portion and the substrate; 16. The plasma processing apparatus according to any one of claims 13 to 15, which is two times or less.  前記第1の支持領域及び第2の支持領域は、互いから分離された別個の静電チャックであるか、互いに一体化されており、単一の静電チャックを構成する、請求項1~4、9~11、及び13~15の何れか一項に記載のプラズマ処理装置。 Claims 1-4, wherein the first support region and the second support region are separate electrostatic chucks separated from each other or integrated with each other to form a single electrostatic chuck. , 9-11, and 13-15.
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